mpt2sas_base.c 99 KB

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  1. /*
  2. * This is the Fusion MPT base driver providing common API layer interface
  3. * for access to MPT (Message Passing Technology) firmware.
  4. *
  5. * This code is based on drivers/scsi/mpt2sas/mpt2_base.c
  6. * Copyright (C) 2007-2008 LSI Corporation
  7. * (mailto:DL-MPTFusionLinux@lsi.com)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version 2
  12. * of the License, or (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * NO WARRANTY
  20. * THE PROGRAM IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OR
  21. * CONDITIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED INCLUDING, WITHOUT
  22. * LIMITATION, ANY WARRANTIES OR CONDITIONS OF TITLE, NON-INFRINGEMENT,
  23. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. Each Recipient is
  24. * solely responsible for determining the appropriateness of using and
  25. * distributing the Program and assumes all risks associated with its
  26. * exercise of rights under this Agreement, including but not limited to
  27. * the risks and costs of program errors, damage to or loss of data,
  28. * programs or equipment, and unavailability or interruption of operations.
  29. * DISCLAIMER OF LIABILITY
  30. * NEITHER RECIPIENT NOR ANY CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY
  31. * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  32. * DAMAGES (INCLUDING WITHOUT LIMITATION LOST PROFITS), HOWEVER CAUSED AND
  33. * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR
  34. * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  35. * USE OR DISTRIBUTION OF THE PROGRAM OR THE EXERCISE OF ANY RIGHTS GRANTED
  36. * HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES
  37. * You should have received a copy of the GNU General Public License
  38. * along with this program; if not, write to the Free Software
  39. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301,
  40. * USA.
  41. */
  42. #include <linux/version.h>
  43. #include <linux/kernel.h>
  44. #include <linux/module.h>
  45. #include <linux/errno.h>
  46. #include <linux/init.h>
  47. #include <linux/slab.h>
  48. #include <linux/types.h>
  49. #include <linux/pci.h>
  50. #include <linux/kdev_t.h>
  51. #include <linux/blkdev.h>
  52. #include <linux/delay.h>
  53. #include <linux/interrupt.h>
  54. #include <linux/dma-mapping.h>
  55. #include <linux/sort.h>
  56. #include <linux/io.h>
  57. #include "mpt2sas_base.h"
  58. static MPT_CALLBACK mpt_callbacks[MPT_MAX_CALLBACKS];
  59. #define FAULT_POLLING_INTERVAL 1000 /* in milliseconds */
  60. #define MPT2SAS_MAX_REQUEST_QUEUE 500 /* maximum controller queue depth */
  61. static int max_queue_depth = -1;
  62. module_param(max_queue_depth, int, 0);
  63. MODULE_PARM_DESC(max_queue_depth, " max controller queue depth ");
  64. static int max_sgl_entries = -1;
  65. module_param(max_sgl_entries, int, 0);
  66. MODULE_PARM_DESC(max_sgl_entries, " max sg entries ");
  67. static int msix_disable = -1;
  68. module_param(msix_disable, int, 0);
  69. MODULE_PARM_DESC(msix_disable, " disable msix routed interrupts (default=0)");
  70. /**
  71. * _base_fault_reset_work - workq handling ioc fault conditions
  72. * @work: input argument, used to derive ioc
  73. * Context: sleep.
  74. *
  75. * Return nothing.
  76. */
  77. static void
  78. _base_fault_reset_work(struct work_struct *work)
  79. {
  80. struct MPT2SAS_ADAPTER *ioc =
  81. container_of(work, struct MPT2SAS_ADAPTER, fault_reset_work.work);
  82. unsigned long flags;
  83. u32 doorbell;
  84. int rc;
  85. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  86. if (ioc->ioc_reset_in_progress)
  87. goto rearm_timer;
  88. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  89. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  90. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  91. rc = mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  92. FORCE_BIG_HAMMER);
  93. printk(MPT2SAS_WARN_FMT "%s: hard reset: %s\n", ioc->name,
  94. __func__, (rc == 0) ? "success" : "failed");
  95. doorbell = mpt2sas_base_get_iocstate(ioc, 0);
  96. if ((doorbell & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT)
  97. mpt2sas_base_fault_info(ioc, doorbell &
  98. MPI2_DOORBELL_DATA_MASK);
  99. }
  100. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  101. rearm_timer:
  102. if (ioc->fault_reset_work_q)
  103. queue_delayed_work(ioc->fault_reset_work_q,
  104. &ioc->fault_reset_work,
  105. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  106. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  107. }
  108. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  109. /**
  110. * _base_sas_ioc_info - verbose translation of the ioc status
  111. * @ioc: pointer to scsi command object
  112. * @mpi_reply: reply mf payload returned from firmware
  113. * @request_hdr: request mf
  114. *
  115. * Return nothing.
  116. */
  117. static void
  118. _base_sas_ioc_info(struct MPT2SAS_ADAPTER *ioc, MPI2DefaultReply_t *mpi_reply,
  119. MPI2RequestHeader_t *request_hdr)
  120. {
  121. u16 ioc_status = le16_to_cpu(mpi_reply->IOCStatus) &
  122. MPI2_IOCSTATUS_MASK;
  123. char *desc = NULL;
  124. u16 frame_sz;
  125. char *func_str = NULL;
  126. /* SCSI_IO, RAID_PASS are handled from _scsih_scsi_ioc_info */
  127. if (request_hdr->Function == MPI2_FUNCTION_SCSI_IO_REQUEST ||
  128. request_hdr->Function == MPI2_FUNCTION_RAID_SCSI_IO_PASSTHROUGH ||
  129. request_hdr->Function == MPI2_FUNCTION_EVENT_NOTIFICATION)
  130. return;
  131. switch (ioc_status) {
  132. /****************************************************************************
  133. * Common IOCStatus values for all replies
  134. ****************************************************************************/
  135. case MPI2_IOCSTATUS_INVALID_FUNCTION:
  136. desc = "invalid function";
  137. break;
  138. case MPI2_IOCSTATUS_BUSY:
  139. desc = "busy";
  140. break;
  141. case MPI2_IOCSTATUS_INVALID_SGL:
  142. desc = "invalid sgl";
  143. break;
  144. case MPI2_IOCSTATUS_INTERNAL_ERROR:
  145. desc = "internal error";
  146. break;
  147. case MPI2_IOCSTATUS_INVALID_VPID:
  148. desc = "invalid vpid";
  149. break;
  150. case MPI2_IOCSTATUS_INSUFFICIENT_RESOURCES:
  151. desc = "insufficient resources";
  152. break;
  153. case MPI2_IOCSTATUS_INVALID_FIELD:
  154. desc = "invalid field";
  155. break;
  156. case MPI2_IOCSTATUS_INVALID_STATE:
  157. desc = "invalid state";
  158. break;
  159. case MPI2_IOCSTATUS_OP_STATE_NOT_SUPPORTED:
  160. desc = "op state not supported";
  161. break;
  162. /****************************************************************************
  163. * Config IOCStatus values
  164. ****************************************************************************/
  165. case MPI2_IOCSTATUS_CONFIG_INVALID_ACTION:
  166. desc = "config invalid action";
  167. break;
  168. case MPI2_IOCSTATUS_CONFIG_INVALID_TYPE:
  169. desc = "config invalid type";
  170. break;
  171. case MPI2_IOCSTATUS_CONFIG_INVALID_PAGE:
  172. desc = "config invalid page";
  173. break;
  174. case MPI2_IOCSTATUS_CONFIG_INVALID_DATA:
  175. desc = "config invalid data";
  176. break;
  177. case MPI2_IOCSTATUS_CONFIG_NO_DEFAULTS:
  178. desc = "config no defaults";
  179. break;
  180. case MPI2_IOCSTATUS_CONFIG_CANT_COMMIT:
  181. desc = "config cant commit";
  182. break;
  183. /****************************************************************************
  184. * SCSI IO Reply
  185. ****************************************************************************/
  186. case MPI2_IOCSTATUS_SCSI_RECOVERED_ERROR:
  187. case MPI2_IOCSTATUS_SCSI_INVALID_DEVHANDLE:
  188. case MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE:
  189. case MPI2_IOCSTATUS_SCSI_DATA_OVERRUN:
  190. case MPI2_IOCSTATUS_SCSI_DATA_UNDERRUN:
  191. case MPI2_IOCSTATUS_SCSI_IO_DATA_ERROR:
  192. case MPI2_IOCSTATUS_SCSI_PROTOCOL_ERROR:
  193. case MPI2_IOCSTATUS_SCSI_TASK_TERMINATED:
  194. case MPI2_IOCSTATUS_SCSI_RESIDUAL_MISMATCH:
  195. case MPI2_IOCSTATUS_SCSI_TASK_MGMT_FAILED:
  196. case MPI2_IOCSTATUS_SCSI_IOC_TERMINATED:
  197. case MPI2_IOCSTATUS_SCSI_EXT_TERMINATED:
  198. break;
  199. /****************************************************************************
  200. * For use by SCSI Initiator and SCSI Target end-to-end data protection
  201. ****************************************************************************/
  202. case MPI2_IOCSTATUS_EEDP_GUARD_ERROR:
  203. desc = "eedp guard error";
  204. break;
  205. case MPI2_IOCSTATUS_EEDP_REF_TAG_ERROR:
  206. desc = "eedp ref tag error";
  207. break;
  208. case MPI2_IOCSTATUS_EEDP_APP_TAG_ERROR:
  209. desc = "eedp app tag error";
  210. break;
  211. /****************************************************************************
  212. * SCSI Target values
  213. ****************************************************************************/
  214. case MPI2_IOCSTATUS_TARGET_INVALID_IO_INDEX:
  215. desc = "target invalid io index";
  216. break;
  217. case MPI2_IOCSTATUS_TARGET_ABORTED:
  218. desc = "target aborted";
  219. break;
  220. case MPI2_IOCSTATUS_TARGET_NO_CONN_RETRYABLE:
  221. desc = "target no conn retryable";
  222. break;
  223. case MPI2_IOCSTATUS_TARGET_NO_CONNECTION:
  224. desc = "target no connection";
  225. break;
  226. case MPI2_IOCSTATUS_TARGET_XFER_COUNT_MISMATCH:
  227. desc = "target xfer count mismatch";
  228. break;
  229. case MPI2_IOCSTATUS_TARGET_DATA_OFFSET_ERROR:
  230. desc = "target data offset error";
  231. break;
  232. case MPI2_IOCSTATUS_TARGET_TOO_MUCH_WRITE_DATA:
  233. desc = "target too much write data";
  234. break;
  235. case MPI2_IOCSTATUS_TARGET_IU_TOO_SHORT:
  236. desc = "target iu too short";
  237. break;
  238. case MPI2_IOCSTATUS_TARGET_ACK_NAK_TIMEOUT:
  239. desc = "target ack nak timeout";
  240. break;
  241. case MPI2_IOCSTATUS_TARGET_NAK_RECEIVED:
  242. desc = "target nak received";
  243. break;
  244. /****************************************************************************
  245. * Serial Attached SCSI values
  246. ****************************************************************************/
  247. case MPI2_IOCSTATUS_SAS_SMP_REQUEST_FAILED:
  248. desc = "smp request failed";
  249. break;
  250. case MPI2_IOCSTATUS_SAS_SMP_DATA_OVERRUN:
  251. desc = "smp data overrun";
  252. break;
  253. /****************************************************************************
  254. * Diagnostic Buffer Post / Diagnostic Release values
  255. ****************************************************************************/
  256. case MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED:
  257. desc = "diagnostic released";
  258. break;
  259. default:
  260. break;
  261. }
  262. if (!desc)
  263. return;
  264. switch (request_hdr->Function) {
  265. case MPI2_FUNCTION_CONFIG:
  266. frame_sz = sizeof(Mpi2ConfigRequest_t) + ioc->sge_size;
  267. func_str = "config_page";
  268. break;
  269. case MPI2_FUNCTION_SCSI_TASK_MGMT:
  270. frame_sz = sizeof(Mpi2SCSITaskManagementRequest_t);
  271. func_str = "task_mgmt";
  272. break;
  273. case MPI2_FUNCTION_SAS_IO_UNIT_CONTROL:
  274. frame_sz = sizeof(Mpi2SasIoUnitControlRequest_t);
  275. func_str = "sas_iounit_ctl";
  276. break;
  277. case MPI2_FUNCTION_SCSI_ENCLOSURE_PROCESSOR:
  278. frame_sz = sizeof(Mpi2SepRequest_t);
  279. func_str = "enclosure";
  280. break;
  281. case MPI2_FUNCTION_IOC_INIT:
  282. frame_sz = sizeof(Mpi2IOCInitRequest_t);
  283. func_str = "ioc_init";
  284. break;
  285. case MPI2_FUNCTION_PORT_ENABLE:
  286. frame_sz = sizeof(Mpi2PortEnableRequest_t);
  287. func_str = "port_enable";
  288. break;
  289. case MPI2_FUNCTION_SMP_PASSTHROUGH:
  290. frame_sz = sizeof(Mpi2SmpPassthroughRequest_t) + ioc->sge_size;
  291. func_str = "smp_passthru";
  292. break;
  293. default:
  294. frame_sz = 32;
  295. func_str = "unknown";
  296. break;
  297. }
  298. printk(MPT2SAS_WARN_FMT "ioc_status: %s(0x%04x), request(0x%p),"
  299. " (%s)\n", ioc->name, desc, ioc_status, request_hdr, func_str);
  300. _debug_dump_mf(request_hdr, frame_sz/4);
  301. }
  302. /**
  303. * _base_display_event_data - verbose translation of firmware asyn events
  304. * @ioc: pointer to scsi command object
  305. * @mpi_reply: reply mf payload returned from firmware
  306. *
  307. * Return nothing.
  308. */
  309. static void
  310. _base_display_event_data(struct MPT2SAS_ADAPTER *ioc,
  311. Mpi2EventNotificationReply_t *mpi_reply)
  312. {
  313. char *desc = NULL;
  314. u16 event;
  315. if (!(ioc->logging_level & MPT_DEBUG_EVENTS))
  316. return;
  317. event = le16_to_cpu(mpi_reply->Event);
  318. switch (event) {
  319. case MPI2_EVENT_LOG_DATA:
  320. desc = "Log Data";
  321. break;
  322. case MPI2_EVENT_STATE_CHANGE:
  323. desc = "Status Change";
  324. break;
  325. case MPI2_EVENT_HARD_RESET_RECEIVED:
  326. desc = "Hard Reset Received";
  327. break;
  328. case MPI2_EVENT_EVENT_CHANGE:
  329. desc = "Event Change";
  330. break;
  331. case MPI2_EVENT_TASK_SET_FULL:
  332. desc = "Task Set Full";
  333. break;
  334. case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
  335. desc = "Device Status Change";
  336. break;
  337. case MPI2_EVENT_IR_OPERATION_STATUS:
  338. desc = "IR Operation Status";
  339. break;
  340. case MPI2_EVENT_SAS_DISCOVERY:
  341. desc = "Discovery";
  342. break;
  343. case MPI2_EVENT_SAS_BROADCAST_PRIMITIVE:
  344. desc = "SAS Broadcast Primitive";
  345. break;
  346. case MPI2_EVENT_SAS_INIT_DEVICE_STATUS_CHANGE:
  347. desc = "SAS Init Device Status Change";
  348. break;
  349. case MPI2_EVENT_SAS_INIT_TABLE_OVERFLOW:
  350. desc = "SAS Init Table Overflow";
  351. break;
  352. case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
  353. desc = "SAS Topology Change List";
  354. break;
  355. case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
  356. desc = "SAS Enclosure Device Status Change";
  357. break;
  358. case MPI2_EVENT_IR_VOLUME:
  359. desc = "IR Volume";
  360. break;
  361. case MPI2_EVENT_IR_PHYSICAL_DISK:
  362. desc = "IR Physical Disk";
  363. break;
  364. case MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST:
  365. desc = "IR Configuration Change List";
  366. break;
  367. case MPI2_EVENT_LOG_ENTRY_ADDED:
  368. desc = "Log Entry Added";
  369. break;
  370. }
  371. if (!desc)
  372. return;
  373. printk(MPT2SAS_INFO_FMT "%s\n", ioc->name, desc);
  374. }
  375. #endif
  376. /**
  377. * _base_sas_log_info - verbose translation of firmware log info
  378. * @ioc: pointer to scsi command object
  379. * @log_info: log info
  380. *
  381. * Return nothing.
  382. */
  383. static void
  384. _base_sas_log_info(struct MPT2SAS_ADAPTER *ioc , u32 log_info)
  385. {
  386. union loginfo_type {
  387. u32 loginfo;
  388. struct {
  389. u32 subcode:16;
  390. u32 code:8;
  391. u32 originator:4;
  392. u32 bus_type:4;
  393. } dw;
  394. };
  395. union loginfo_type sas_loginfo;
  396. char *originator_str = NULL;
  397. sas_loginfo.loginfo = log_info;
  398. if (sas_loginfo.dw.bus_type != 3 /*SAS*/)
  399. return;
  400. /* eat the loginfos associated with task aborts */
  401. if (ioc->ignore_loginfos && (log_info == 30050000 || log_info ==
  402. 0x31140000 || log_info == 0x31130000))
  403. return;
  404. switch (sas_loginfo.dw.originator) {
  405. case 0:
  406. originator_str = "IOP";
  407. break;
  408. case 1:
  409. originator_str = "PL";
  410. break;
  411. case 2:
  412. originator_str = "IR";
  413. break;
  414. }
  415. printk(MPT2SAS_WARN_FMT "log_info(0x%08x): originator(%s), "
  416. "code(0x%02x), sub_code(0x%04x)\n", ioc->name, log_info,
  417. originator_str, sas_loginfo.dw.code,
  418. sas_loginfo.dw.subcode);
  419. }
  420. /**
  421. * mpt2sas_base_fault_info - verbose translation of firmware FAULT code
  422. * @ioc: pointer to scsi command object
  423. * @fault_code: fault code
  424. *
  425. * Return nothing.
  426. */
  427. void
  428. mpt2sas_base_fault_info(struct MPT2SAS_ADAPTER *ioc , u16 fault_code)
  429. {
  430. printk(MPT2SAS_ERR_FMT "fault_state(0x%04x)!\n",
  431. ioc->name, fault_code);
  432. }
  433. /**
  434. * _base_display_reply_info -
  435. * @ioc: pointer to scsi command object
  436. * @smid: system request message index
  437. * @VF_ID: virtual function id
  438. * @reply: reply message frame(lower 32bit addr)
  439. *
  440. * Return nothing.
  441. */
  442. static void
  443. _base_display_reply_info(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID,
  444. u32 reply)
  445. {
  446. MPI2DefaultReply_t *mpi_reply;
  447. u16 ioc_status;
  448. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  449. ioc_status = le16_to_cpu(mpi_reply->IOCStatus);
  450. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  451. if ((ioc_status & MPI2_IOCSTATUS_MASK) &&
  452. (ioc->logging_level & MPT_DEBUG_REPLY)) {
  453. _base_sas_ioc_info(ioc , mpi_reply,
  454. mpt2sas_base_get_msg_frame(ioc, smid));
  455. }
  456. #endif
  457. if (ioc_status & MPI2_IOCSTATUS_FLAG_LOG_INFO_AVAILABLE)
  458. _base_sas_log_info(ioc, le32_to_cpu(mpi_reply->IOCLogInfo));
  459. }
  460. /**
  461. * mpt2sas_base_done - base internal command completion routine
  462. * @ioc: pointer to scsi command object
  463. * @smid: system request message index
  464. * @VF_ID: virtual function id
  465. * @reply: reply message frame(lower 32bit addr)
  466. *
  467. * Return nothing.
  468. */
  469. void
  470. mpt2sas_base_done(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 VF_ID, u32 reply)
  471. {
  472. MPI2DefaultReply_t *mpi_reply;
  473. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  474. if (mpi_reply && mpi_reply->Function == MPI2_FUNCTION_EVENT_ACK)
  475. return;
  476. if (ioc->base_cmds.status == MPT2_CMD_NOT_USED)
  477. return;
  478. ioc->base_cmds.status |= MPT2_CMD_COMPLETE;
  479. if (mpi_reply) {
  480. ioc->base_cmds.status |= MPT2_CMD_REPLY_VALID;
  481. memcpy(ioc->base_cmds.reply, mpi_reply, mpi_reply->MsgLength*4);
  482. }
  483. ioc->base_cmds.status &= ~MPT2_CMD_PENDING;
  484. complete(&ioc->base_cmds.done);
  485. }
  486. /**
  487. * _base_async_event - main callback handler for firmware asyn events
  488. * @ioc: pointer to scsi command object
  489. * @VF_ID: virtual function id
  490. * @reply: reply message frame(lower 32bit addr)
  491. *
  492. * Return nothing.
  493. */
  494. static void
  495. _base_async_event(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, u32 reply)
  496. {
  497. Mpi2EventNotificationReply_t *mpi_reply;
  498. Mpi2EventAckRequest_t *ack_request;
  499. u16 smid;
  500. mpi_reply = mpt2sas_base_get_reply_virt_addr(ioc, reply);
  501. if (!mpi_reply)
  502. return;
  503. if (mpi_reply->Function != MPI2_FUNCTION_EVENT_NOTIFICATION)
  504. return;
  505. #ifdef CONFIG_SCSI_MPT2SAS_LOGGING
  506. _base_display_event_data(ioc, mpi_reply);
  507. #endif
  508. if (!(mpi_reply->AckRequired & MPI2_EVENT_NOTIFICATION_ACK_REQUIRED))
  509. goto out;
  510. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  511. if (!smid) {
  512. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  513. ioc->name, __func__);
  514. goto out;
  515. }
  516. ack_request = mpt2sas_base_get_msg_frame(ioc, smid);
  517. memset(ack_request, 0, sizeof(Mpi2EventAckRequest_t));
  518. ack_request->Function = MPI2_FUNCTION_EVENT_ACK;
  519. ack_request->Event = mpi_reply->Event;
  520. ack_request->EventContext = mpi_reply->EventContext;
  521. ack_request->VF_ID = VF_ID;
  522. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  523. out:
  524. /* scsih callback handler */
  525. mpt2sas_scsih_event_callback(ioc, VF_ID, reply);
  526. /* ctl callback handler */
  527. mpt2sas_ctl_event_callback(ioc, VF_ID, reply);
  528. }
  529. /**
  530. * _base_mask_interrupts - disable interrupts
  531. * @ioc: pointer to scsi command object
  532. *
  533. * Disabling ResetIRQ, Reply and Doorbell Interrupts
  534. *
  535. * Return nothing.
  536. */
  537. static void
  538. _base_mask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  539. {
  540. u32 him_register;
  541. ioc->mask_interrupts = 1;
  542. him_register = readl(&ioc->chip->HostInterruptMask);
  543. him_register |= MPI2_HIM_DIM + MPI2_HIM_RIM + MPI2_HIM_RESET_IRQ_MASK;
  544. writel(him_register, &ioc->chip->HostInterruptMask);
  545. readl(&ioc->chip->HostInterruptMask);
  546. }
  547. /**
  548. * _base_unmask_interrupts - enable interrupts
  549. * @ioc: pointer to scsi command object
  550. *
  551. * Enabling only Reply Interrupts
  552. *
  553. * Return nothing.
  554. */
  555. static void
  556. _base_unmask_interrupts(struct MPT2SAS_ADAPTER *ioc)
  557. {
  558. u32 him_register;
  559. writel(0, &ioc->chip->HostInterruptStatus);
  560. him_register = readl(&ioc->chip->HostInterruptMask);
  561. him_register &= ~MPI2_HIM_RIM;
  562. writel(him_register, &ioc->chip->HostInterruptMask);
  563. ioc->mask_interrupts = 0;
  564. }
  565. /**
  566. * _base_interrupt - MPT adapter (IOC) specific interrupt handler.
  567. * @irq: irq number (not used)
  568. * @bus_id: bus identifier cookie == pointer to MPT_ADAPTER structure
  569. * @r: pt_regs pointer (not used)
  570. *
  571. * Return IRQ_HANDLE if processed, else IRQ_NONE.
  572. */
  573. static irqreturn_t
  574. _base_interrupt(int irq, void *bus_id)
  575. {
  576. union reply_descriptor {
  577. u64 word;
  578. struct {
  579. u32 low;
  580. u32 high;
  581. } u;
  582. };
  583. union reply_descriptor rd;
  584. u32 post_index, post_index_next, completed_cmds;
  585. u8 request_desript_type;
  586. u16 smid;
  587. u8 cb_idx;
  588. u32 reply;
  589. u8 VF_ID;
  590. int i;
  591. struct MPT2SAS_ADAPTER *ioc = bus_id;
  592. if (ioc->mask_interrupts)
  593. return IRQ_NONE;
  594. post_index = ioc->reply_post_host_index;
  595. request_desript_type = ioc->reply_post_free[post_index].
  596. Default.ReplyFlags & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  597. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  598. return IRQ_NONE;
  599. completed_cmds = 0;
  600. do {
  601. rd.word = ioc->reply_post_free[post_index].Words;
  602. if (rd.u.low == UINT_MAX || rd.u.high == UINT_MAX)
  603. goto out;
  604. reply = 0;
  605. cb_idx = 0xFF;
  606. smid = le16_to_cpu(ioc->reply_post_free[post_index].
  607. Default.DescriptorTypeDependent1);
  608. VF_ID = ioc->reply_post_free[post_index].
  609. Default.VF_ID;
  610. if (request_desript_type ==
  611. MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
  612. reply = le32_to_cpu(ioc->reply_post_free[post_index].
  613. AddressReply.ReplyFrameAddress);
  614. } else if (request_desript_type ==
  615. MPI2_RPY_DESCRIPT_FLAGS_TARGET_COMMAND_BUFFER)
  616. goto next;
  617. else if (request_desript_type ==
  618. MPI2_RPY_DESCRIPT_FLAGS_TARGETASSIST_SUCCESS)
  619. goto next;
  620. if (smid)
  621. cb_idx = ioc->scsi_lookup[smid - 1].cb_idx;
  622. if (smid && cb_idx != 0xFF) {
  623. mpt_callbacks[cb_idx](ioc, smid, VF_ID, reply);
  624. if (reply)
  625. _base_display_reply_info(ioc, smid, VF_ID,
  626. reply);
  627. mpt2sas_base_free_smid(ioc, smid);
  628. }
  629. if (!smid)
  630. _base_async_event(ioc, VF_ID, reply);
  631. /* reply free queue handling */
  632. if (reply) {
  633. ioc->reply_free_host_index =
  634. (ioc->reply_free_host_index ==
  635. (ioc->reply_free_queue_depth - 1)) ?
  636. 0 : ioc->reply_free_host_index + 1;
  637. ioc->reply_free[ioc->reply_free_host_index] =
  638. cpu_to_le32(reply);
  639. writel(ioc->reply_free_host_index,
  640. &ioc->chip->ReplyFreeHostIndex);
  641. wmb();
  642. }
  643. next:
  644. post_index_next = (post_index == (ioc->reply_post_queue_depth -
  645. 1)) ? 0 : post_index + 1;
  646. request_desript_type =
  647. ioc->reply_post_free[post_index_next].Default.ReplyFlags
  648. & MPI2_RPY_DESCRIPT_FLAGS_TYPE_MASK;
  649. completed_cmds++;
  650. if (request_desript_type == MPI2_RPY_DESCRIPT_FLAGS_UNUSED)
  651. goto out;
  652. post_index = post_index_next;
  653. } while (1);
  654. out:
  655. if (!completed_cmds)
  656. return IRQ_NONE;
  657. /* reply post descriptor handling */
  658. post_index_next = ioc->reply_post_host_index;
  659. for (i = 0 ; i < completed_cmds; i++) {
  660. post_index = post_index_next;
  661. /* poison the reply post descriptor */
  662. ioc->reply_post_free[post_index_next].Words = ULLONG_MAX;
  663. post_index_next = (post_index ==
  664. (ioc->reply_post_queue_depth - 1))
  665. ? 0 : post_index + 1;
  666. }
  667. ioc->reply_post_host_index = post_index_next;
  668. writel(post_index_next, &ioc->chip->ReplyPostHostIndex);
  669. wmb();
  670. return IRQ_HANDLED;
  671. }
  672. /**
  673. * mpt2sas_base_release_callback_handler - clear interupt callback handler
  674. * @cb_idx: callback index
  675. *
  676. * Return nothing.
  677. */
  678. void
  679. mpt2sas_base_release_callback_handler(u8 cb_idx)
  680. {
  681. mpt_callbacks[cb_idx] = NULL;
  682. }
  683. /**
  684. * mpt2sas_base_register_callback_handler - obtain index for the interrupt callback handler
  685. * @cb_func: callback function
  686. *
  687. * Returns cb_func.
  688. */
  689. u8
  690. mpt2sas_base_register_callback_handler(MPT_CALLBACK cb_func)
  691. {
  692. u8 cb_idx;
  693. for (cb_idx = MPT_MAX_CALLBACKS-1; cb_idx; cb_idx--)
  694. if (mpt_callbacks[cb_idx] == NULL)
  695. break;
  696. mpt_callbacks[cb_idx] = cb_func;
  697. return cb_idx;
  698. }
  699. /**
  700. * mpt2sas_base_initialize_callback_handler - initialize the interrupt callback handler
  701. *
  702. * Return nothing.
  703. */
  704. void
  705. mpt2sas_base_initialize_callback_handler(void)
  706. {
  707. u8 cb_idx;
  708. for (cb_idx = 0; cb_idx < MPT_MAX_CALLBACKS; cb_idx++)
  709. mpt2sas_base_release_callback_handler(cb_idx);
  710. }
  711. /**
  712. * mpt2sas_base_build_zero_len_sge - build zero length sg entry
  713. * @ioc: per adapter object
  714. * @paddr: virtual address for SGE
  715. *
  716. * Create a zero length scatter gather entry to insure the IOCs hardware has
  717. * something to use if the target device goes brain dead and tries
  718. * to send data even when none is asked for.
  719. *
  720. * Return nothing.
  721. */
  722. void
  723. mpt2sas_base_build_zero_len_sge(struct MPT2SAS_ADAPTER *ioc, void *paddr)
  724. {
  725. u32 flags_length = (u32)((MPI2_SGE_FLAGS_LAST_ELEMENT |
  726. MPI2_SGE_FLAGS_END_OF_BUFFER | MPI2_SGE_FLAGS_END_OF_LIST |
  727. MPI2_SGE_FLAGS_SIMPLE_ELEMENT) <<
  728. MPI2_SGE_FLAGS_SHIFT);
  729. ioc->base_add_sg_single(paddr, flags_length, -1);
  730. }
  731. /**
  732. * _base_add_sg_single_32 - Place a simple 32 bit SGE at address pAddr.
  733. * @paddr: virtual address for SGE
  734. * @flags_length: SGE flags and data transfer length
  735. * @dma_addr: Physical address
  736. *
  737. * Return nothing.
  738. */
  739. static void
  740. _base_add_sg_single_32(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  741. {
  742. Mpi2SGESimple32_t *sgel = paddr;
  743. flags_length |= (MPI2_SGE_FLAGS_32_BIT_ADDRESSING |
  744. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  745. sgel->FlagsLength = cpu_to_le32(flags_length);
  746. sgel->Address = cpu_to_le32(dma_addr);
  747. }
  748. /**
  749. * _base_add_sg_single_64 - Place a simple 64 bit SGE at address pAddr.
  750. * @paddr: virtual address for SGE
  751. * @flags_length: SGE flags and data transfer length
  752. * @dma_addr: Physical address
  753. *
  754. * Return nothing.
  755. */
  756. static void
  757. _base_add_sg_single_64(void *paddr, u32 flags_length, dma_addr_t dma_addr)
  758. {
  759. Mpi2SGESimple64_t *sgel = paddr;
  760. flags_length |= (MPI2_SGE_FLAGS_64_BIT_ADDRESSING |
  761. MPI2_SGE_FLAGS_SYSTEM_ADDRESS) << MPI2_SGE_FLAGS_SHIFT;
  762. sgel->FlagsLength = cpu_to_le32(flags_length);
  763. sgel->Address = cpu_to_le64(dma_addr);
  764. }
  765. #define convert_to_kb(x) ((x) << (PAGE_SHIFT - 10))
  766. /**
  767. * _base_config_dma_addressing - set dma addressing
  768. * @ioc: per adapter object
  769. * @pdev: PCI device struct
  770. *
  771. * Returns 0 for success, non-zero for failure.
  772. */
  773. static int
  774. _base_config_dma_addressing(struct MPT2SAS_ADAPTER *ioc, struct pci_dev *pdev)
  775. {
  776. struct sysinfo s;
  777. char *desc = NULL;
  778. if (sizeof(dma_addr_t) > 4) {
  779. const uint64_t required_mask =
  780. dma_get_required_mask(&pdev->dev);
  781. if ((required_mask > DMA_BIT_MASK(32)) && !pci_set_dma_mask(pdev,
  782. DMA_BIT_MASK(64)) && !pci_set_consistent_dma_mask(pdev,
  783. DMA_BIT_MASK(64))) {
  784. ioc->base_add_sg_single = &_base_add_sg_single_64;
  785. ioc->sge_size = sizeof(Mpi2SGESimple64_t);
  786. desc = "64";
  787. goto out;
  788. }
  789. }
  790. if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))
  791. && !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32))) {
  792. ioc->base_add_sg_single = &_base_add_sg_single_32;
  793. ioc->sge_size = sizeof(Mpi2SGESimple32_t);
  794. desc = "32";
  795. } else
  796. return -ENODEV;
  797. out:
  798. si_meminfo(&s);
  799. printk(MPT2SAS_INFO_FMT "%s BIT PCI BUS DMA ADDRESSING SUPPORTED, "
  800. "total mem (%ld kB)\n", ioc->name, desc, convert_to_kb(s.totalram));
  801. return 0;
  802. }
  803. /**
  804. * _base_save_msix_table - backup msix vector table
  805. * @ioc: per adapter object
  806. *
  807. * This address an errata where diag reset clears out the table
  808. */
  809. static void
  810. _base_save_msix_table(struct MPT2SAS_ADAPTER *ioc)
  811. {
  812. int i;
  813. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  814. return;
  815. for (i = 0; i < ioc->msix_vector_count; i++)
  816. ioc->msix_table_backup[i] = ioc->msix_table[i];
  817. }
  818. /**
  819. * _base_restore_msix_table - this restores the msix vector table
  820. * @ioc: per adapter object
  821. *
  822. */
  823. static void
  824. _base_restore_msix_table(struct MPT2SAS_ADAPTER *ioc)
  825. {
  826. int i;
  827. if (!ioc->msix_enable || ioc->msix_table_backup == NULL)
  828. return;
  829. for (i = 0; i < ioc->msix_vector_count; i++)
  830. ioc->msix_table[i] = ioc->msix_table_backup[i];
  831. }
  832. /**
  833. * _base_check_enable_msix - checks MSIX capabable.
  834. * @ioc: per adapter object
  835. *
  836. * Check to see if card is capable of MSIX, and set number
  837. * of avaliable msix vectors
  838. */
  839. static int
  840. _base_check_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  841. {
  842. int base;
  843. u16 message_control;
  844. u32 msix_table_offset;
  845. base = pci_find_capability(ioc->pdev, PCI_CAP_ID_MSIX);
  846. if (!base) {
  847. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "msix not "
  848. "supported\n", ioc->name));
  849. return -EINVAL;
  850. }
  851. /* get msix vector count */
  852. pci_read_config_word(ioc->pdev, base + 2, &message_control);
  853. ioc->msix_vector_count = (message_control & 0x3FF) + 1;
  854. /* get msix table */
  855. pci_read_config_dword(ioc->pdev, base + 4, &msix_table_offset);
  856. msix_table_offset &= 0xFFFFFFF8;
  857. ioc->msix_table = (u32 *)((void *)ioc->chip + msix_table_offset);
  858. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "msix is supported, "
  859. "vector_count(%d), table_offset(0x%08x), table(%p)\n", ioc->name,
  860. ioc->msix_vector_count, msix_table_offset, ioc->msix_table));
  861. return 0;
  862. }
  863. /**
  864. * _base_disable_msix - disables msix
  865. * @ioc: per adapter object
  866. *
  867. */
  868. static void
  869. _base_disable_msix(struct MPT2SAS_ADAPTER *ioc)
  870. {
  871. if (ioc->msix_enable) {
  872. pci_disable_msix(ioc->pdev);
  873. kfree(ioc->msix_table_backup);
  874. ioc->msix_table_backup = NULL;
  875. ioc->msix_enable = 0;
  876. }
  877. }
  878. /**
  879. * _base_enable_msix - enables msix, failback to io_apic
  880. * @ioc: per adapter object
  881. *
  882. */
  883. static int
  884. _base_enable_msix(struct MPT2SAS_ADAPTER *ioc)
  885. {
  886. struct msix_entry entries;
  887. int r;
  888. u8 try_msix = 0;
  889. if (msix_disable == -1 || msix_disable == 0)
  890. try_msix = 1;
  891. if (!try_msix)
  892. goto try_ioapic;
  893. if (_base_check_enable_msix(ioc) != 0)
  894. goto try_ioapic;
  895. ioc->msix_table_backup = kcalloc(ioc->msix_vector_count,
  896. sizeof(u32), GFP_KERNEL);
  897. if (!ioc->msix_table_backup) {
  898. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "allocation for "
  899. "msix_table_backup failed!!!\n", ioc->name));
  900. goto try_ioapic;
  901. }
  902. memset(&entries, 0, sizeof(struct msix_entry));
  903. r = pci_enable_msix(ioc->pdev, &entries, 1);
  904. if (r) {
  905. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "pci_enable_msix "
  906. "failed (r=%d) !!!\n", ioc->name, r));
  907. goto try_ioapic;
  908. }
  909. r = request_irq(entries.vector, _base_interrupt, IRQF_SHARED,
  910. ioc->name, ioc);
  911. if (r) {
  912. dfailprintk(ioc, printk(MPT2SAS_INFO_FMT "unable to allocate "
  913. "interrupt %d !!!\n", ioc->name, entries.vector));
  914. pci_disable_msix(ioc->pdev);
  915. goto try_ioapic;
  916. }
  917. ioc->pci_irq = entries.vector;
  918. ioc->msix_enable = 1;
  919. return 0;
  920. /* failback to io_apic interrupt routing */
  921. try_ioapic:
  922. r = request_irq(ioc->pdev->irq, _base_interrupt, IRQF_SHARED,
  923. ioc->name, ioc);
  924. if (r) {
  925. printk(MPT2SAS_ERR_FMT "unable to allocate interrupt %d!\n",
  926. ioc->name, ioc->pdev->irq);
  927. r = -EBUSY;
  928. goto out_fail;
  929. }
  930. ioc->pci_irq = ioc->pdev->irq;
  931. return 0;
  932. out_fail:
  933. return r;
  934. }
  935. /**
  936. * mpt2sas_base_map_resources - map in controller resources (io/irq/memap)
  937. * @ioc: per adapter object
  938. *
  939. * Returns 0 for success, non-zero for failure.
  940. */
  941. int
  942. mpt2sas_base_map_resources(struct MPT2SAS_ADAPTER *ioc)
  943. {
  944. struct pci_dev *pdev = ioc->pdev;
  945. u32 memap_sz;
  946. u32 pio_sz;
  947. int i, r = 0;
  948. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n",
  949. ioc->name, __func__));
  950. ioc->bars = pci_select_bars(pdev, IORESOURCE_MEM);
  951. if (pci_enable_device_mem(pdev)) {
  952. printk(MPT2SAS_WARN_FMT "pci_enable_device_mem: "
  953. "failed\n", ioc->name);
  954. return -ENODEV;
  955. }
  956. if (pci_request_selected_regions(pdev, ioc->bars,
  957. MPT2SAS_DRIVER_NAME)) {
  958. printk(MPT2SAS_WARN_FMT "pci_request_selected_regions: "
  959. "failed\n", ioc->name);
  960. r = -ENODEV;
  961. goto out_fail;
  962. }
  963. pci_set_master(pdev);
  964. if (_base_config_dma_addressing(ioc, pdev) != 0) {
  965. printk(MPT2SAS_WARN_FMT "no suitable DMA mask for %s\n",
  966. ioc->name, pci_name(pdev));
  967. r = -ENODEV;
  968. goto out_fail;
  969. }
  970. for (i = 0, memap_sz = 0, pio_sz = 0 ; i < DEVICE_COUNT_RESOURCE; i++) {
  971. if (pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE_IO) {
  972. if (pio_sz)
  973. continue;
  974. ioc->pio_chip = pci_resource_start(pdev, i);
  975. pio_sz = pci_resource_len(pdev, i);
  976. } else {
  977. if (memap_sz)
  978. continue;
  979. ioc->chip_phys = pci_resource_start(pdev, i);
  980. memap_sz = pci_resource_len(pdev, i);
  981. ioc->chip = ioremap(ioc->chip_phys, memap_sz);
  982. if (ioc->chip == NULL) {
  983. printk(MPT2SAS_ERR_FMT "unable to map adapter "
  984. "memory!\n", ioc->name);
  985. r = -EINVAL;
  986. goto out_fail;
  987. }
  988. }
  989. }
  990. pci_set_drvdata(pdev, ioc->shost);
  991. _base_mask_interrupts(ioc);
  992. r = _base_enable_msix(ioc);
  993. if (r)
  994. goto out_fail;
  995. printk(MPT2SAS_INFO_FMT "%s: IRQ %d\n",
  996. ioc->name, ((ioc->msix_enable) ? "PCI-MSI-X enabled" :
  997. "IO-APIC enabled"), ioc->pci_irq);
  998. printk(MPT2SAS_INFO_FMT "iomem(0x%lx), mapped(0x%p), size(%d)\n",
  999. ioc->name, ioc->chip_phys, ioc->chip, memap_sz);
  1000. printk(MPT2SAS_INFO_FMT "ioport(0x%lx), size(%d)\n",
  1001. ioc->name, ioc->pio_chip, pio_sz);
  1002. return 0;
  1003. out_fail:
  1004. if (ioc->chip_phys)
  1005. iounmap(ioc->chip);
  1006. ioc->chip_phys = 0;
  1007. ioc->pci_irq = -1;
  1008. pci_release_selected_regions(ioc->pdev, ioc->bars);
  1009. pci_disable_device(pdev);
  1010. pci_set_drvdata(pdev, NULL);
  1011. return r;
  1012. }
  1013. /**
  1014. * mpt2sas_base_get_msg_frame_dma - obtain request mf pointer phys addr
  1015. * @ioc: per adapter object
  1016. * @smid: system request message index(smid zero is invalid)
  1017. *
  1018. * Returns phys pointer to message frame.
  1019. */
  1020. dma_addr_t
  1021. mpt2sas_base_get_msg_frame_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1022. {
  1023. return ioc->request_dma + (smid * ioc->request_sz);
  1024. }
  1025. /**
  1026. * mpt2sas_base_get_msg_frame - obtain request mf pointer
  1027. * @ioc: per adapter object
  1028. * @smid: system request message index(smid zero is invalid)
  1029. *
  1030. * Returns virt pointer to message frame.
  1031. */
  1032. void *
  1033. mpt2sas_base_get_msg_frame(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1034. {
  1035. return (void *)(ioc->request + (smid * ioc->request_sz));
  1036. }
  1037. /**
  1038. * mpt2sas_base_get_sense_buffer - obtain a sense buffer assigned to a mf request
  1039. * @ioc: per adapter object
  1040. * @smid: system request message index
  1041. *
  1042. * Returns virt pointer to sense buffer.
  1043. */
  1044. void *
  1045. mpt2sas_base_get_sense_buffer(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1046. {
  1047. return (void *)(ioc->sense + ((smid - 1) * SCSI_SENSE_BUFFERSIZE));
  1048. }
  1049. /**
  1050. * mpt2sas_base_get_sense_buffer_dma - obtain a sense buffer assigned to a mf request
  1051. * @ioc: per adapter object
  1052. * @smid: system request message index
  1053. *
  1054. * Returns phys pointer to sense buffer.
  1055. */
  1056. dma_addr_t
  1057. mpt2sas_base_get_sense_buffer_dma(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1058. {
  1059. return ioc->sense_dma + ((smid - 1) * SCSI_SENSE_BUFFERSIZE);
  1060. }
  1061. /**
  1062. * mpt2sas_base_get_reply_virt_addr - obtain reply frames virt address
  1063. * @ioc: per adapter object
  1064. * @phys_addr: lower 32 physical addr of the reply
  1065. *
  1066. * Converts 32bit lower physical addr into a virt address.
  1067. */
  1068. void *
  1069. mpt2sas_base_get_reply_virt_addr(struct MPT2SAS_ADAPTER *ioc, u32 phys_addr)
  1070. {
  1071. if (!phys_addr)
  1072. return NULL;
  1073. return ioc->reply + (phys_addr - (u32)ioc->reply_dma);
  1074. }
  1075. /**
  1076. * mpt2sas_base_get_smid - obtain a free smid
  1077. * @ioc: per adapter object
  1078. * @cb_idx: callback index
  1079. *
  1080. * Returns smid (zero is invalid)
  1081. */
  1082. u16
  1083. mpt2sas_base_get_smid(struct MPT2SAS_ADAPTER *ioc, u8 cb_idx)
  1084. {
  1085. unsigned long flags;
  1086. struct request_tracker *request;
  1087. u16 smid;
  1088. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1089. if (list_empty(&ioc->free_list)) {
  1090. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1091. printk(MPT2SAS_ERR_FMT "%s: smid not available\n",
  1092. ioc->name, __func__);
  1093. return 0;
  1094. }
  1095. request = list_entry(ioc->free_list.next,
  1096. struct request_tracker, tracker_list);
  1097. request->cb_idx = cb_idx;
  1098. smid = request->smid;
  1099. list_del(&request->tracker_list);
  1100. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1101. return smid;
  1102. }
  1103. /**
  1104. * mpt2sas_base_free_smid - put smid back on free_list
  1105. * @ioc: per adapter object
  1106. * @smid: system request message index
  1107. *
  1108. * Return nothing.
  1109. */
  1110. void
  1111. mpt2sas_base_free_smid(struct MPT2SAS_ADAPTER *ioc, u16 smid)
  1112. {
  1113. unsigned long flags;
  1114. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  1115. ioc->scsi_lookup[smid - 1].cb_idx = 0xFF;
  1116. list_add_tail(&ioc->scsi_lookup[smid - 1].tracker_list,
  1117. &ioc->free_list);
  1118. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  1119. /*
  1120. * See _wait_for_commands_to_complete() call with regards to this code.
  1121. */
  1122. if (ioc->shost_recovery && ioc->pending_io_count) {
  1123. if (ioc->pending_io_count == 1)
  1124. wake_up(&ioc->reset_wq);
  1125. ioc->pending_io_count--;
  1126. }
  1127. }
  1128. /**
  1129. * _base_writeq - 64 bit write to MMIO
  1130. * @ioc: per adapter object
  1131. * @b: data payload
  1132. * @addr: address in MMIO space
  1133. * @writeq_lock: spin lock
  1134. *
  1135. * Glue for handling an atomic 64 bit word to MMIO. This special handling takes
  1136. * care of 32 bit environment where its not quarenteed to send the entire word
  1137. * in one transfer.
  1138. */
  1139. #ifndef writeq
  1140. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1141. spinlock_t *writeq_lock)
  1142. {
  1143. unsigned long flags;
  1144. __u64 data_out = cpu_to_le64(b);
  1145. spin_lock_irqsave(writeq_lock, flags);
  1146. writel((u32)(data_out), addr);
  1147. writel((u32)(data_out >> 32), (addr + 4));
  1148. spin_unlock_irqrestore(writeq_lock, flags);
  1149. }
  1150. #else
  1151. static inline void _base_writeq(__u64 b, volatile void __iomem *addr,
  1152. spinlock_t *writeq_lock)
  1153. {
  1154. writeq(cpu_to_le64(b), addr);
  1155. }
  1156. #endif
  1157. /**
  1158. * mpt2sas_base_put_smid_scsi_io - send SCSI_IO request to firmware
  1159. * @ioc: per adapter object
  1160. * @smid: system request message index
  1161. * @vf_id: virtual function id
  1162. * @handle: device handle
  1163. *
  1164. * Return nothing.
  1165. */
  1166. void
  1167. mpt2sas_base_put_smid_scsi_io(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id,
  1168. u16 handle)
  1169. {
  1170. Mpi2RequestDescriptorUnion_t descriptor;
  1171. u64 *request = (u64 *)&descriptor;
  1172. descriptor.SCSIIO.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_SCSI_IO;
  1173. descriptor.SCSIIO.VF_ID = vf_id;
  1174. descriptor.SCSIIO.SMID = cpu_to_le16(smid);
  1175. descriptor.SCSIIO.DevHandle = cpu_to_le16(handle);
  1176. descriptor.SCSIIO.LMID = 0;
  1177. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1178. &ioc->scsi_lookup_lock);
  1179. }
  1180. /**
  1181. * mpt2sas_base_put_smid_hi_priority - send Task Managment request to firmware
  1182. * @ioc: per adapter object
  1183. * @smid: system request message index
  1184. * @vf_id: virtual function id
  1185. *
  1186. * Return nothing.
  1187. */
  1188. void
  1189. mpt2sas_base_put_smid_hi_priority(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1190. u8 vf_id)
  1191. {
  1192. Mpi2RequestDescriptorUnion_t descriptor;
  1193. u64 *request = (u64 *)&descriptor;
  1194. descriptor.HighPriority.RequestFlags =
  1195. MPI2_REQ_DESCRIPT_FLAGS_HIGH_PRIORITY;
  1196. descriptor.HighPriority.VF_ID = vf_id;
  1197. descriptor.HighPriority.SMID = cpu_to_le16(smid);
  1198. descriptor.HighPriority.LMID = 0;
  1199. descriptor.HighPriority.Reserved1 = 0;
  1200. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1201. &ioc->scsi_lookup_lock);
  1202. }
  1203. /**
  1204. * mpt2sas_base_put_smid_default - Default, primarily used for config pages
  1205. * @ioc: per adapter object
  1206. * @smid: system request message index
  1207. * @vf_id: virtual function id
  1208. *
  1209. * Return nothing.
  1210. */
  1211. void
  1212. mpt2sas_base_put_smid_default(struct MPT2SAS_ADAPTER *ioc, u16 smid, u8 vf_id)
  1213. {
  1214. Mpi2RequestDescriptorUnion_t descriptor;
  1215. u64 *request = (u64 *)&descriptor;
  1216. descriptor.Default.RequestFlags = MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
  1217. descriptor.Default.VF_ID = vf_id;
  1218. descriptor.Default.SMID = cpu_to_le16(smid);
  1219. descriptor.Default.LMID = 0;
  1220. descriptor.Default.DescriptorTypeDependent = 0;
  1221. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1222. &ioc->scsi_lookup_lock);
  1223. }
  1224. /**
  1225. * mpt2sas_base_put_smid_target_assist - send Target Assist/Status to firmware
  1226. * @ioc: per adapter object
  1227. * @smid: system request message index
  1228. * @vf_id: virtual function id
  1229. * @io_index: value used to track the IO
  1230. *
  1231. * Return nothing.
  1232. */
  1233. void
  1234. mpt2sas_base_put_smid_target_assist(struct MPT2SAS_ADAPTER *ioc, u16 smid,
  1235. u8 vf_id, u16 io_index)
  1236. {
  1237. Mpi2RequestDescriptorUnion_t descriptor;
  1238. u64 *request = (u64 *)&descriptor;
  1239. descriptor.SCSITarget.RequestFlags =
  1240. MPI2_REQ_DESCRIPT_FLAGS_SCSI_TARGET;
  1241. descriptor.SCSITarget.VF_ID = vf_id;
  1242. descriptor.SCSITarget.SMID = cpu_to_le16(smid);
  1243. descriptor.SCSITarget.LMID = 0;
  1244. descriptor.SCSITarget.IoIndex = cpu_to_le16(io_index);
  1245. _base_writeq(*request, &ioc->chip->RequestDescriptorPostLow,
  1246. &ioc->scsi_lookup_lock);
  1247. }
  1248. /**
  1249. * _base_display_dell_branding - Disply branding string
  1250. * @ioc: per adapter object
  1251. *
  1252. * Return nothing.
  1253. */
  1254. static void
  1255. _base_display_dell_branding(struct MPT2SAS_ADAPTER *ioc)
  1256. {
  1257. char dell_branding[MPT2SAS_DELL_BRANDING_SIZE];
  1258. if (ioc->pdev->subsystem_vendor != PCI_VENDOR_ID_DELL)
  1259. return;
  1260. memset(dell_branding, 0, MPT2SAS_DELL_BRANDING_SIZE);
  1261. switch (ioc->pdev->subsystem_device) {
  1262. case MPT2SAS_DELL_6GBPS_SAS_HBA_SSDID:
  1263. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_HBA_BRANDING,
  1264. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1265. break;
  1266. case MPT2SAS_DELL_PERC_H200_ADAPTER_SSDID:
  1267. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_ADAPTER_BRANDING,
  1268. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1269. break;
  1270. case MPT2SAS_DELL_PERC_H200_INTEGRATED_SSDID:
  1271. strncpy(dell_branding,
  1272. MPT2SAS_DELL_PERC_H200_INTEGRATED_BRANDING,
  1273. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1274. break;
  1275. case MPT2SAS_DELL_PERC_H200_MODULAR_SSDID:
  1276. strncpy(dell_branding,
  1277. MPT2SAS_DELL_PERC_H200_MODULAR_BRANDING,
  1278. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1279. break;
  1280. case MPT2SAS_DELL_PERC_H200_EMBEDDED_SSDID:
  1281. strncpy(dell_branding,
  1282. MPT2SAS_DELL_PERC_H200_EMBEDDED_BRANDING,
  1283. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1284. break;
  1285. case MPT2SAS_DELL_PERC_H200_SSDID:
  1286. strncpy(dell_branding, MPT2SAS_DELL_PERC_H200_BRANDING,
  1287. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1288. break;
  1289. case MPT2SAS_DELL_6GBPS_SAS_SSDID:
  1290. strncpy(dell_branding, MPT2SAS_DELL_6GBPS_SAS_BRANDING,
  1291. MPT2SAS_DELL_BRANDING_SIZE - 1);
  1292. break;
  1293. default:
  1294. sprintf(dell_branding, "0x%4X", ioc->pdev->subsystem_device);
  1295. break;
  1296. }
  1297. printk(MPT2SAS_INFO_FMT "%s: Vendor(0x%04X), Device(0x%04X),"
  1298. " SSVID(0x%04X), SSDID(0x%04X)\n", ioc->name, dell_branding,
  1299. ioc->pdev->vendor, ioc->pdev->device, ioc->pdev->subsystem_vendor,
  1300. ioc->pdev->subsystem_device);
  1301. }
  1302. /**
  1303. * _base_display_ioc_capabilities - Disply IOC's capabilities.
  1304. * @ioc: per adapter object
  1305. *
  1306. * Return nothing.
  1307. */
  1308. static void
  1309. _base_display_ioc_capabilities(struct MPT2SAS_ADAPTER *ioc)
  1310. {
  1311. int i = 0;
  1312. char desc[16];
  1313. u8 revision;
  1314. u32 iounit_pg1_flags;
  1315. pci_read_config_byte(ioc->pdev, PCI_CLASS_REVISION, &revision);
  1316. strncpy(desc, ioc->manu_pg0.ChipName, 16);
  1317. printk(MPT2SAS_INFO_FMT "%s: FWVersion(%02d.%02d.%02d.%02d), "
  1318. "ChipRevision(0x%02x), BiosVersion(%02d.%02d.%02d.%02d)\n",
  1319. ioc->name, desc,
  1320. (ioc->facts.FWVersion.Word & 0xFF000000) >> 24,
  1321. (ioc->facts.FWVersion.Word & 0x00FF0000) >> 16,
  1322. (ioc->facts.FWVersion.Word & 0x0000FF00) >> 8,
  1323. ioc->facts.FWVersion.Word & 0x000000FF,
  1324. revision,
  1325. (ioc->bios_pg3.BiosVersion & 0xFF000000) >> 24,
  1326. (ioc->bios_pg3.BiosVersion & 0x00FF0000) >> 16,
  1327. (ioc->bios_pg3.BiosVersion & 0x0000FF00) >> 8,
  1328. ioc->bios_pg3.BiosVersion & 0x000000FF);
  1329. printk(MPT2SAS_INFO_FMT "Protocol=(", ioc->name);
  1330. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_INITIATOR) {
  1331. printk("Initiator");
  1332. i++;
  1333. }
  1334. if (ioc->facts.ProtocolFlags & MPI2_IOCFACTS_PROTOCOL_SCSI_TARGET) {
  1335. printk("%sTarget", i ? "," : "");
  1336. i++;
  1337. }
  1338. _base_display_dell_branding(ioc);
  1339. i = 0;
  1340. printk("), ");
  1341. printk("Capabilities=(");
  1342. if (ioc->facts.IOCCapabilities &
  1343. MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID) {
  1344. printk("Raid");
  1345. i++;
  1346. }
  1347. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_TLR) {
  1348. printk("%sTLR", i ? "," : "");
  1349. i++;
  1350. }
  1351. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_MULTICAST) {
  1352. printk("%sMulticast", i ? "," : "");
  1353. i++;
  1354. }
  1355. if (ioc->facts.IOCCapabilities &
  1356. MPI2_IOCFACTS_CAPABILITY_BIDIRECTIONAL_TARGET) {
  1357. printk("%sBIDI Target", i ? "," : "");
  1358. i++;
  1359. }
  1360. if (ioc->facts.IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_EEDP) {
  1361. printk("%sEEDP", i ? "," : "");
  1362. i++;
  1363. }
  1364. if (ioc->facts.IOCCapabilities &
  1365. MPI2_IOCFACTS_CAPABILITY_SNAPSHOT_BUFFER) {
  1366. printk("%sSnapshot Buffer", i ? "," : "");
  1367. i++;
  1368. }
  1369. if (ioc->facts.IOCCapabilities &
  1370. MPI2_IOCFACTS_CAPABILITY_DIAG_TRACE_BUFFER) {
  1371. printk("%sDiag Trace Buffer", i ? "," : "");
  1372. i++;
  1373. }
  1374. if (ioc->facts.IOCCapabilities &
  1375. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING) {
  1376. printk("%sTask Set Full", i ? "," : "");
  1377. i++;
  1378. }
  1379. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1380. if (!(iounit_pg1_flags & MPI2_IOUNITPAGE1_NATIVE_COMMAND_Q_DISABLE)) {
  1381. printk("%sNCQ", i ? "," : "");
  1382. i++;
  1383. }
  1384. printk(")\n");
  1385. }
  1386. /**
  1387. * _base_static_config_pages - static start of day config pages
  1388. * @ioc: per adapter object
  1389. *
  1390. * Return nothing.
  1391. */
  1392. static void
  1393. _base_static_config_pages(struct MPT2SAS_ADAPTER *ioc)
  1394. {
  1395. Mpi2ConfigReply_t mpi_reply;
  1396. u32 iounit_pg1_flags;
  1397. mpt2sas_config_get_manufacturing_pg0(ioc, &mpi_reply, &ioc->manu_pg0);
  1398. mpt2sas_config_get_bios_pg2(ioc, &mpi_reply, &ioc->bios_pg2);
  1399. mpt2sas_config_get_bios_pg3(ioc, &mpi_reply, &ioc->bios_pg3);
  1400. mpt2sas_config_get_ioc_pg8(ioc, &mpi_reply, &ioc->ioc_pg8);
  1401. mpt2sas_config_get_iounit_pg0(ioc, &mpi_reply, &ioc->iounit_pg0);
  1402. mpt2sas_config_get_iounit_pg1(ioc, &mpi_reply, &ioc->iounit_pg1);
  1403. _base_display_ioc_capabilities(ioc);
  1404. /*
  1405. * Enable task_set_full handling in iounit_pg1 when the
  1406. * facts capabilities indicate that its supported.
  1407. */
  1408. iounit_pg1_flags = le32_to_cpu(ioc->iounit_pg1.Flags);
  1409. if ((ioc->facts.IOCCapabilities &
  1410. MPI2_IOCFACTS_CAPABILITY_TASK_SET_FULL_HANDLING))
  1411. iounit_pg1_flags &=
  1412. ~MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1413. else
  1414. iounit_pg1_flags |=
  1415. MPI2_IOUNITPAGE1_DISABLE_TASK_SET_FULL_HANDLING;
  1416. ioc->iounit_pg1.Flags = cpu_to_le32(iounit_pg1_flags);
  1417. mpt2sas_config_set_iounit_pg1(ioc, &mpi_reply, ioc->iounit_pg1);
  1418. }
  1419. /**
  1420. * _base_release_memory_pools - release memory
  1421. * @ioc: per adapter object
  1422. *
  1423. * Free memory allocated from _base_allocate_memory_pools.
  1424. *
  1425. * Return nothing.
  1426. */
  1427. static void
  1428. _base_release_memory_pools(struct MPT2SAS_ADAPTER *ioc)
  1429. {
  1430. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1431. __func__));
  1432. if (ioc->request) {
  1433. pci_free_consistent(ioc->pdev, ioc->request_dma_sz,
  1434. ioc->request, ioc->request_dma);
  1435. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "request_pool(0x%p)"
  1436. ": free\n", ioc->name, ioc->request));
  1437. ioc->request = NULL;
  1438. }
  1439. if (ioc->sense) {
  1440. pci_pool_free(ioc->sense_dma_pool, ioc->sense, ioc->sense_dma);
  1441. if (ioc->sense_dma_pool)
  1442. pci_pool_destroy(ioc->sense_dma_pool);
  1443. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_pool(0x%p)"
  1444. ": free\n", ioc->name, ioc->sense));
  1445. ioc->sense = NULL;
  1446. }
  1447. if (ioc->reply) {
  1448. pci_pool_free(ioc->reply_dma_pool, ioc->reply, ioc->reply_dma);
  1449. if (ioc->reply_dma_pool)
  1450. pci_pool_destroy(ioc->reply_dma_pool);
  1451. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_pool(0x%p)"
  1452. ": free\n", ioc->name, ioc->reply));
  1453. ioc->reply = NULL;
  1454. }
  1455. if (ioc->reply_free) {
  1456. pci_pool_free(ioc->reply_free_dma_pool, ioc->reply_free,
  1457. ioc->reply_free_dma);
  1458. if (ioc->reply_free_dma_pool)
  1459. pci_pool_destroy(ioc->reply_free_dma_pool);
  1460. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_pool"
  1461. "(0x%p): free\n", ioc->name, ioc->reply_free));
  1462. ioc->reply_free = NULL;
  1463. }
  1464. if (ioc->reply_post_free) {
  1465. pci_pool_free(ioc->reply_post_free_dma_pool,
  1466. ioc->reply_post_free, ioc->reply_post_free_dma);
  1467. if (ioc->reply_post_free_dma_pool)
  1468. pci_pool_destroy(ioc->reply_post_free_dma_pool);
  1469. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1470. "reply_post_free_pool(0x%p): free\n", ioc->name,
  1471. ioc->reply_post_free));
  1472. ioc->reply_post_free = NULL;
  1473. }
  1474. if (ioc->config_page) {
  1475. dexitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1476. "config_page(0x%p): free\n", ioc->name,
  1477. ioc->config_page));
  1478. pci_free_consistent(ioc->pdev, ioc->config_page_sz,
  1479. ioc->config_page, ioc->config_page_dma);
  1480. }
  1481. kfree(ioc->scsi_lookup);
  1482. }
  1483. /**
  1484. * _base_allocate_memory_pools - allocate start of day memory pools
  1485. * @ioc: per adapter object
  1486. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1487. *
  1488. * Returns 0 success, anything else error
  1489. */
  1490. static int
  1491. _base_allocate_memory_pools(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  1492. {
  1493. Mpi2IOCFactsReply_t *facts;
  1494. u32 queue_size, queue_diff;
  1495. u16 max_sge_elements;
  1496. u16 num_of_reply_frames;
  1497. u16 chains_needed_per_io;
  1498. u32 sz, total_sz;
  1499. u16 i;
  1500. u32 retry_sz;
  1501. u16 max_request_credit;
  1502. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  1503. __func__));
  1504. retry_sz = 0;
  1505. facts = &ioc->facts;
  1506. /* command line tunables for max sgl entries */
  1507. if (max_sgl_entries != -1) {
  1508. ioc->shost->sg_tablesize = (max_sgl_entries <
  1509. MPT2SAS_SG_DEPTH) ? max_sgl_entries :
  1510. MPT2SAS_SG_DEPTH;
  1511. } else {
  1512. ioc->shost->sg_tablesize = MPT2SAS_SG_DEPTH;
  1513. }
  1514. /* command line tunables for max controller queue depth */
  1515. if (max_queue_depth != -1) {
  1516. max_request_credit = (max_queue_depth < facts->RequestCredit)
  1517. ? max_queue_depth : facts->RequestCredit;
  1518. } else {
  1519. max_request_credit = (facts->RequestCredit >
  1520. MPT2SAS_MAX_REQUEST_QUEUE) ? MPT2SAS_MAX_REQUEST_QUEUE :
  1521. facts->RequestCredit;
  1522. }
  1523. ioc->request_depth = max_request_credit;
  1524. /* request frame size */
  1525. ioc->request_sz = facts->IOCRequestFrameSize * 4;
  1526. /* reply frame size */
  1527. ioc->reply_sz = facts->ReplyFrameSize * 4;
  1528. retry_allocation:
  1529. total_sz = 0;
  1530. /* calculate number of sg elements left over in the 1st frame */
  1531. max_sge_elements = ioc->request_sz - ((sizeof(Mpi2SCSIIORequest_t) -
  1532. sizeof(Mpi2SGEIOUnion_t)) + ioc->sge_size);
  1533. ioc->max_sges_in_main_message = max_sge_elements/ioc->sge_size;
  1534. /* now do the same for a chain buffer */
  1535. max_sge_elements = ioc->request_sz - ioc->sge_size;
  1536. ioc->max_sges_in_chain_message = max_sge_elements/ioc->sge_size;
  1537. ioc->chain_offset_value_for_main_message =
  1538. ((sizeof(Mpi2SCSIIORequest_t) - sizeof(Mpi2SGEIOUnion_t)) +
  1539. (ioc->max_sges_in_chain_message * ioc->sge_size)) / 4;
  1540. /*
  1541. * MPT2SAS_SG_DEPTH = CONFIG_FUSION_MAX_SGE
  1542. */
  1543. chains_needed_per_io = ((ioc->shost->sg_tablesize -
  1544. ioc->max_sges_in_main_message)/ioc->max_sges_in_chain_message)
  1545. + 1;
  1546. if (chains_needed_per_io > facts->MaxChainDepth) {
  1547. chains_needed_per_io = facts->MaxChainDepth;
  1548. ioc->shost->sg_tablesize = min_t(u16,
  1549. ioc->max_sges_in_main_message + (ioc->max_sges_in_chain_message
  1550. * chains_needed_per_io), ioc->shost->sg_tablesize);
  1551. }
  1552. ioc->chains_needed_per_io = chains_needed_per_io;
  1553. /* reply free queue sizing - taking into account for events */
  1554. num_of_reply_frames = ioc->request_depth + 32;
  1555. /* number of replies frames can't be a multiple of 16 */
  1556. /* decrease number of reply frames by 1 */
  1557. if (!(num_of_reply_frames % 16))
  1558. num_of_reply_frames--;
  1559. /* calculate number of reply free queue entries
  1560. * (must be multiple of 16)
  1561. */
  1562. /* (we know reply_free_queue_depth is not a multiple of 16) */
  1563. queue_size = num_of_reply_frames;
  1564. queue_size += 16 - (queue_size % 16);
  1565. ioc->reply_free_queue_depth = queue_size;
  1566. /* reply descriptor post queue sizing */
  1567. /* this size should be the number of request frames + number of reply
  1568. * frames
  1569. */
  1570. queue_size = ioc->request_depth + num_of_reply_frames + 1;
  1571. /* round up to 16 byte boundary */
  1572. if (queue_size % 16)
  1573. queue_size += 16 - (queue_size % 16);
  1574. /* check against IOC maximum reply post queue depth */
  1575. if (queue_size > facts->MaxReplyDescriptorPostQueueDepth) {
  1576. queue_diff = queue_size -
  1577. facts->MaxReplyDescriptorPostQueueDepth;
  1578. /* round queue_diff up to multiple of 16 */
  1579. if (queue_diff % 16)
  1580. queue_diff += 16 - (queue_diff % 16);
  1581. /* adjust request_depth, reply_free_queue_depth,
  1582. * and queue_size
  1583. */
  1584. ioc->request_depth -= queue_diff;
  1585. ioc->reply_free_queue_depth -= queue_diff;
  1586. queue_size -= queue_diff;
  1587. }
  1588. ioc->reply_post_queue_depth = queue_size;
  1589. /* max scsi host queue depth */
  1590. ioc->shost->can_queue = ioc->request_depth - INTERNAL_CMDS_COUNT;
  1591. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scsi host queue: depth"
  1592. "(%d)\n", ioc->name, ioc->shost->can_queue));
  1593. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "scatter gather: "
  1594. "sge_in_main_msg(%d), sge_per_chain(%d), sge_per_io(%d), "
  1595. "chains_per_io(%d)\n", ioc->name, ioc->max_sges_in_main_message,
  1596. ioc->max_sges_in_chain_message, ioc->shost->sg_tablesize,
  1597. ioc->chains_needed_per_io));
  1598. /* contiguous pool for request and chains, 16 byte align, one extra "
  1599. * "frame for smid=0
  1600. */
  1601. ioc->chain_depth = ioc->chains_needed_per_io * ioc->request_depth;
  1602. sz = ((ioc->request_depth + 1 + ioc->chain_depth) * ioc->request_sz);
  1603. ioc->request_dma_sz = sz;
  1604. ioc->request = pci_alloc_consistent(ioc->pdev, sz, &ioc->request_dma);
  1605. if (!ioc->request) {
  1606. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1607. "failed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1608. "total(%d kB)\n", ioc->name, ioc->request_depth,
  1609. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1610. if (ioc->request_depth < MPT2SAS_SAS_QUEUE_DEPTH)
  1611. goto out;
  1612. retry_sz += 64;
  1613. ioc->request_depth = max_request_credit - retry_sz;
  1614. goto retry_allocation;
  1615. }
  1616. if (retry_sz)
  1617. printk(MPT2SAS_ERR_FMT "request pool: pci_alloc_consistent "
  1618. "succeed: req_depth(%d), chains_per_io(%d), frame_sz(%d), "
  1619. "total(%d kb)\n", ioc->name, ioc->request_depth,
  1620. ioc->chains_needed_per_io, ioc->request_sz, sz/1024);
  1621. ioc->chain = ioc->request + ((ioc->request_depth + 1) *
  1622. ioc->request_sz);
  1623. ioc->chain_dma = ioc->request_dma + ((ioc->request_depth + 1) *
  1624. ioc->request_sz);
  1625. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool(0x%p): "
  1626. "depth(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name,
  1627. ioc->request, ioc->request_depth, ioc->request_sz,
  1628. ((ioc->request_depth + 1) * ioc->request_sz)/1024));
  1629. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "chain pool(0x%p): depth"
  1630. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->chain,
  1631. ioc->chain_depth, ioc->request_sz, ((ioc->chain_depth *
  1632. ioc->request_sz))/1024));
  1633. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request pool: dma(0x%llx)\n",
  1634. ioc->name, (unsigned long long) ioc->request_dma));
  1635. total_sz += sz;
  1636. ioc->scsi_lookup = kcalloc(ioc->request_depth,
  1637. sizeof(struct request_tracker), GFP_KERNEL);
  1638. if (!ioc->scsi_lookup) {
  1639. printk(MPT2SAS_ERR_FMT "scsi_lookup: kcalloc failed\n",
  1640. ioc->name);
  1641. goto out;
  1642. }
  1643. /* initialize some bits */
  1644. for (i = 0; i < ioc->request_depth; i++)
  1645. ioc->scsi_lookup[i].smid = i + 1;
  1646. /* sense buffers, 4 byte align */
  1647. sz = ioc->request_depth * SCSI_SENSE_BUFFERSIZE;
  1648. ioc->sense_dma_pool = pci_pool_create("sense pool", ioc->pdev, sz, 4,
  1649. 0);
  1650. if (!ioc->sense_dma_pool) {
  1651. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_create failed\n",
  1652. ioc->name);
  1653. goto out;
  1654. }
  1655. ioc->sense = pci_pool_alloc(ioc->sense_dma_pool , GFP_KERNEL,
  1656. &ioc->sense_dma);
  1657. if (!ioc->sense) {
  1658. printk(MPT2SAS_ERR_FMT "sense pool: pci_pool_alloc failed\n",
  1659. ioc->name);
  1660. goto out;
  1661. }
  1662. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT
  1663. "sense pool(0x%p): depth(%d), element_size(%d), pool_size"
  1664. "(%d kB)\n", ioc->name, ioc->sense, ioc->request_depth,
  1665. SCSI_SENSE_BUFFERSIZE, sz/1024));
  1666. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "sense_dma(0x%llx)\n",
  1667. ioc->name, (unsigned long long)ioc->sense_dma));
  1668. total_sz += sz;
  1669. /* reply pool, 4 byte align */
  1670. sz = ioc->reply_free_queue_depth * ioc->reply_sz;
  1671. ioc->reply_dma_pool = pci_pool_create("reply pool", ioc->pdev, sz, 4,
  1672. 0);
  1673. if (!ioc->reply_dma_pool) {
  1674. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_create failed\n",
  1675. ioc->name);
  1676. goto out;
  1677. }
  1678. ioc->reply = pci_pool_alloc(ioc->reply_dma_pool , GFP_KERNEL,
  1679. &ioc->reply_dma);
  1680. if (!ioc->reply) {
  1681. printk(MPT2SAS_ERR_FMT "reply pool: pci_pool_alloc failed\n",
  1682. ioc->name);
  1683. goto out;
  1684. }
  1685. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply pool(0x%p): depth"
  1686. "(%d), frame_size(%d), pool_size(%d kB)\n", ioc->name, ioc->reply,
  1687. ioc->reply_free_queue_depth, ioc->reply_sz, sz/1024));
  1688. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_dma(0x%llx)\n",
  1689. ioc->name, (unsigned long long)ioc->reply_dma));
  1690. total_sz += sz;
  1691. /* reply free queue, 16 byte align */
  1692. sz = ioc->reply_free_queue_depth * 4;
  1693. ioc->reply_free_dma_pool = pci_pool_create("reply_free pool",
  1694. ioc->pdev, sz, 16, 0);
  1695. if (!ioc->reply_free_dma_pool) {
  1696. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_create "
  1697. "failed\n", ioc->name);
  1698. goto out;
  1699. }
  1700. ioc->reply_free = pci_pool_alloc(ioc->reply_free_dma_pool , GFP_KERNEL,
  1701. &ioc->reply_free_dma);
  1702. if (!ioc->reply_free) {
  1703. printk(MPT2SAS_ERR_FMT "reply_free pool: pci_pool_alloc "
  1704. "failed\n", ioc->name);
  1705. goto out;
  1706. }
  1707. memset(ioc->reply_free, 0, sz);
  1708. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free pool(0x%p): "
  1709. "depth(%d), element_size(%d), pool_size(%d kB)\n", ioc->name,
  1710. ioc->reply_free, ioc->reply_free_queue_depth, 4, sz/1024));
  1711. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_free_dma"
  1712. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->reply_free_dma));
  1713. total_sz += sz;
  1714. /* reply post queue, 16 byte align */
  1715. sz = ioc->reply_post_queue_depth * sizeof(Mpi2DefaultReplyDescriptor_t);
  1716. ioc->reply_post_free_dma_pool = pci_pool_create("reply_post_free pool",
  1717. ioc->pdev, sz, 16, 0);
  1718. if (!ioc->reply_post_free_dma_pool) {
  1719. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_create "
  1720. "failed\n", ioc->name);
  1721. goto out;
  1722. }
  1723. ioc->reply_post_free = pci_pool_alloc(ioc->reply_post_free_dma_pool ,
  1724. GFP_KERNEL, &ioc->reply_post_free_dma);
  1725. if (!ioc->reply_post_free) {
  1726. printk(MPT2SAS_ERR_FMT "reply_post_free pool: pci_pool_alloc "
  1727. "failed\n", ioc->name);
  1728. goto out;
  1729. }
  1730. memset(ioc->reply_post_free, 0, sz);
  1731. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply post free pool"
  1732. "(0x%p): depth(%d), element_size(%d), pool_size(%d kB)\n",
  1733. ioc->name, ioc->reply_post_free, ioc->reply_post_queue_depth, 8,
  1734. sz/1024));
  1735. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "reply_post_free_dma = "
  1736. "(0x%llx)\n", ioc->name, (unsigned long long)
  1737. ioc->reply_post_free_dma));
  1738. total_sz += sz;
  1739. ioc->config_page_sz = 512;
  1740. ioc->config_page = pci_alloc_consistent(ioc->pdev,
  1741. ioc->config_page_sz, &ioc->config_page_dma);
  1742. if (!ioc->config_page) {
  1743. printk(MPT2SAS_ERR_FMT "config page: pci_pool_alloc "
  1744. "failed\n", ioc->name);
  1745. goto out;
  1746. }
  1747. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config page(0x%p): size"
  1748. "(%d)\n", ioc->name, ioc->config_page, ioc->config_page_sz));
  1749. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "config_page_dma"
  1750. "(0x%llx)\n", ioc->name, (unsigned long long)ioc->config_page_dma));
  1751. total_sz += ioc->config_page_sz;
  1752. printk(MPT2SAS_INFO_FMT "Allocated physical memory: size(%d kB)\n",
  1753. ioc->name, total_sz/1024);
  1754. printk(MPT2SAS_INFO_FMT "Current Controller Queue Depth(%d), "
  1755. "Max Controller Queue Depth(%d)\n",
  1756. ioc->name, ioc->shost->can_queue, facts->RequestCredit);
  1757. printk(MPT2SAS_INFO_FMT "Scatter Gather Elements per IO(%d)\n",
  1758. ioc->name, ioc->shost->sg_tablesize);
  1759. return 0;
  1760. out:
  1761. _base_release_memory_pools(ioc);
  1762. return -ENOMEM;
  1763. }
  1764. /**
  1765. * mpt2sas_base_get_iocstate - Get the current state of a MPT adapter.
  1766. * @ioc: Pointer to MPT_ADAPTER structure
  1767. * @cooked: Request raw or cooked IOC state
  1768. *
  1769. * Returns all IOC Doorbell register bits if cooked==0, else just the
  1770. * Doorbell bits in MPI_IOC_STATE_MASK.
  1771. */
  1772. u32
  1773. mpt2sas_base_get_iocstate(struct MPT2SAS_ADAPTER *ioc, int cooked)
  1774. {
  1775. u32 s, sc;
  1776. s = readl(&ioc->chip->Doorbell);
  1777. sc = s & MPI2_IOC_STATE_MASK;
  1778. return cooked ? sc : s;
  1779. }
  1780. /**
  1781. * _base_wait_on_iocstate - waiting on a particular ioc state
  1782. * @ioc_state: controller state { READY, OPERATIONAL, or RESET }
  1783. * @timeout: timeout in second
  1784. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1785. *
  1786. * Returns 0 for success, non-zero for failure.
  1787. */
  1788. static int
  1789. _base_wait_on_iocstate(struct MPT2SAS_ADAPTER *ioc, u32 ioc_state, int timeout,
  1790. int sleep_flag)
  1791. {
  1792. u32 count, cntdn;
  1793. u32 current_state;
  1794. count = 0;
  1795. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1796. do {
  1797. current_state = mpt2sas_base_get_iocstate(ioc, 1);
  1798. if (current_state == ioc_state)
  1799. return 0;
  1800. if (count && current_state == MPI2_IOC_STATE_FAULT)
  1801. break;
  1802. if (sleep_flag == CAN_SLEEP)
  1803. msleep(1);
  1804. else
  1805. udelay(500);
  1806. count++;
  1807. } while (--cntdn);
  1808. return current_state;
  1809. }
  1810. /**
  1811. * _base_wait_for_doorbell_int - waiting for controller interrupt(generated by
  1812. * a write to the doorbell)
  1813. * @ioc: per adapter object
  1814. * @timeout: timeout in second
  1815. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1816. *
  1817. * Returns 0 for success, non-zero for failure.
  1818. *
  1819. * Notes: MPI2_HIS_IOC2SYS_DB_STATUS - set to one when IOC writes to doorbell.
  1820. */
  1821. static int
  1822. _base_wait_for_doorbell_int(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1823. int sleep_flag)
  1824. {
  1825. u32 cntdn, count;
  1826. u32 int_status;
  1827. count = 0;
  1828. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1829. do {
  1830. int_status = readl(&ioc->chip->HostInterruptStatus);
  1831. if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1832. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1833. "successfull count(%d), timeout(%d)\n", ioc->name,
  1834. __func__, count, timeout));
  1835. return 0;
  1836. }
  1837. if (sleep_flag == CAN_SLEEP)
  1838. msleep(1);
  1839. else
  1840. udelay(500);
  1841. count++;
  1842. } while (--cntdn);
  1843. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1844. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1845. return -EFAULT;
  1846. }
  1847. /**
  1848. * _base_wait_for_doorbell_ack - waiting for controller to read the doorbell.
  1849. * @ioc: per adapter object
  1850. * @timeout: timeout in second
  1851. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1852. *
  1853. * Returns 0 for success, non-zero for failure.
  1854. *
  1855. * Notes: MPI2_HIS_SYS2IOC_DB_STATUS - set to one when host writes to
  1856. * doorbell.
  1857. */
  1858. static int
  1859. _base_wait_for_doorbell_ack(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1860. int sleep_flag)
  1861. {
  1862. u32 cntdn, count;
  1863. u32 int_status;
  1864. u32 doorbell;
  1865. count = 0;
  1866. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1867. do {
  1868. int_status = readl(&ioc->chip->HostInterruptStatus);
  1869. if (!(int_status & MPI2_HIS_SYS2IOC_DB_STATUS)) {
  1870. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1871. "successfull count(%d), timeout(%d)\n", ioc->name,
  1872. __func__, count, timeout));
  1873. return 0;
  1874. } else if (int_status & MPI2_HIS_IOC2SYS_DB_STATUS) {
  1875. doorbell = readl(&ioc->chip->Doorbell);
  1876. if ((doorbell & MPI2_IOC_STATE_MASK) ==
  1877. MPI2_IOC_STATE_FAULT) {
  1878. mpt2sas_base_fault_info(ioc , doorbell);
  1879. return -EFAULT;
  1880. }
  1881. } else if (int_status == 0xFFFFFFFF)
  1882. goto out;
  1883. if (sleep_flag == CAN_SLEEP)
  1884. msleep(1);
  1885. else
  1886. udelay(500);
  1887. count++;
  1888. } while (--cntdn);
  1889. out:
  1890. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1891. "int_status(%x)!\n", ioc->name, __func__, count, int_status);
  1892. return -EFAULT;
  1893. }
  1894. /**
  1895. * _base_wait_for_doorbell_not_used - waiting for doorbell to not be in use
  1896. * @ioc: per adapter object
  1897. * @timeout: timeout in second
  1898. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1899. *
  1900. * Returns 0 for success, non-zero for failure.
  1901. *
  1902. */
  1903. static int
  1904. _base_wait_for_doorbell_not_used(struct MPT2SAS_ADAPTER *ioc, int timeout,
  1905. int sleep_flag)
  1906. {
  1907. u32 cntdn, count;
  1908. u32 doorbell_reg;
  1909. count = 0;
  1910. cntdn = (sleep_flag == CAN_SLEEP) ? 1000*timeout : 2000*timeout;
  1911. do {
  1912. doorbell_reg = readl(&ioc->chip->Doorbell);
  1913. if (!(doorbell_reg & MPI2_DOORBELL_USED)) {
  1914. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  1915. "successfull count(%d), timeout(%d)\n", ioc->name,
  1916. __func__, count, timeout));
  1917. return 0;
  1918. }
  1919. if (sleep_flag == CAN_SLEEP)
  1920. msleep(1);
  1921. else
  1922. udelay(500);
  1923. count++;
  1924. } while (--cntdn);
  1925. printk(MPT2SAS_ERR_FMT "%s: failed due to timeout count(%d), "
  1926. "doorbell_reg(%x)!\n", ioc->name, __func__, count, doorbell_reg);
  1927. return -EFAULT;
  1928. }
  1929. /**
  1930. * _base_send_ioc_reset - send doorbell reset
  1931. * @ioc: per adapter object
  1932. * @reset_type: currently only supports: MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET
  1933. * @timeout: timeout in second
  1934. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1935. *
  1936. * Returns 0 for success, non-zero for failure.
  1937. */
  1938. static int
  1939. _base_send_ioc_reset(struct MPT2SAS_ADAPTER *ioc, u8 reset_type, int timeout,
  1940. int sleep_flag)
  1941. {
  1942. u32 ioc_state;
  1943. int r = 0;
  1944. if (reset_type != MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET) {
  1945. printk(MPT2SAS_ERR_FMT "%s: unknown reset_type\n",
  1946. ioc->name, __func__);
  1947. return -EFAULT;
  1948. }
  1949. if (!(ioc->facts.IOCCapabilities &
  1950. MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY))
  1951. return -EFAULT;
  1952. printk(MPT2SAS_INFO_FMT "sending message unit reset !!\n", ioc->name);
  1953. writel(reset_type << MPI2_DOORBELL_FUNCTION_SHIFT,
  1954. &ioc->chip->Doorbell);
  1955. if ((_base_wait_for_doorbell_ack(ioc, 15, sleep_flag))) {
  1956. r = -EFAULT;
  1957. goto out;
  1958. }
  1959. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY,
  1960. timeout, sleep_flag);
  1961. if (ioc_state) {
  1962. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  1963. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  1964. r = -EFAULT;
  1965. goto out;
  1966. }
  1967. out:
  1968. printk(MPT2SAS_INFO_FMT "message unit reset: %s\n",
  1969. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  1970. return r;
  1971. }
  1972. /**
  1973. * _base_handshake_req_reply_wait - send request thru doorbell interface
  1974. * @ioc: per adapter object
  1975. * @request_bytes: request length
  1976. * @request: pointer having request payload
  1977. * @reply_bytes: reply length
  1978. * @reply: pointer to reply payload
  1979. * @timeout: timeout in second
  1980. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  1981. *
  1982. * Returns 0 for success, non-zero for failure.
  1983. */
  1984. static int
  1985. _base_handshake_req_reply_wait(struct MPT2SAS_ADAPTER *ioc, int request_bytes,
  1986. u32 *request, int reply_bytes, u16 *reply, int timeout, int sleep_flag)
  1987. {
  1988. MPI2DefaultReply_t *default_reply = (MPI2DefaultReply_t *)reply;
  1989. int i;
  1990. u8 failed;
  1991. u16 dummy;
  1992. u32 *mfp;
  1993. /* make sure doorbell is not in use */
  1994. if ((readl(&ioc->chip->Doorbell) & MPI2_DOORBELL_USED)) {
  1995. printk(MPT2SAS_ERR_FMT "doorbell is in use "
  1996. " (line=%d)\n", ioc->name, __LINE__);
  1997. return -EFAULT;
  1998. }
  1999. /* clear pending doorbell interrupts from previous state changes */
  2000. if (readl(&ioc->chip->HostInterruptStatus) &
  2001. MPI2_HIS_IOC2SYS_DB_STATUS)
  2002. writel(0, &ioc->chip->HostInterruptStatus);
  2003. /* send message to ioc */
  2004. writel(((MPI2_FUNCTION_HANDSHAKE<<MPI2_DOORBELL_FUNCTION_SHIFT) |
  2005. ((request_bytes/4)<<MPI2_DOORBELL_ADD_DWORDS_SHIFT)),
  2006. &ioc->chip->Doorbell);
  2007. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2008. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2009. "int failed (line=%d)\n", ioc->name, __LINE__);
  2010. return -EFAULT;
  2011. }
  2012. writel(0, &ioc->chip->HostInterruptStatus);
  2013. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag))) {
  2014. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2015. "ack failed (line=%d)\n", ioc->name, __LINE__);
  2016. return -EFAULT;
  2017. }
  2018. /* send message 32-bits at a time */
  2019. for (i = 0, failed = 0; i < request_bytes/4 && !failed; i++) {
  2020. writel(cpu_to_le32(request[i]), &ioc->chip->Doorbell);
  2021. if ((_base_wait_for_doorbell_ack(ioc, 5, sleep_flag)))
  2022. failed = 1;
  2023. }
  2024. if (failed) {
  2025. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2026. "sending request failed (line=%d)\n", ioc->name, __LINE__);
  2027. return -EFAULT;
  2028. }
  2029. /* now wait for the reply */
  2030. if ((_base_wait_for_doorbell_int(ioc, timeout, sleep_flag))) {
  2031. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2032. "int failed (line=%d)\n", ioc->name, __LINE__);
  2033. return -EFAULT;
  2034. }
  2035. /* read the first two 16-bits, it gives the total length of the reply */
  2036. reply[0] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2037. & MPI2_DOORBELL_DATA_MASK);
  2038. writel(0, &ioc->chip->HostInterruptStatus);
  2039. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2040. printk(MPT2SAS_ERR_FMT "doorbell handshake "
  2041. "int failed (line=%d)\n", ioc->name, __LINE__);
  2042. return -EFAULT;
  2043. }
  2044. reply[1] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2045. & MPI2_DOORBELL_DATA_MASK);
  2046. writel(0, &ioc->chip->HostInterruptStatus);
  2047. for (i = 2; i < default_reply->MsgLength * 2; i++) {
  2048. if ((_base_wait_for_doorbell_int(ioc, 5, sleep_flag))) {
  2049. printk(MPT2SAS_ERR_FMT "doorbell "
  2050. "handshake int failed (line=%d)\n", ioc->name,
  2051. __LINE__);
  2052. return -EFAULT;
  2053. }
  2054. if (i >= reply_bytes/2) /* overflow case */
  2055. dummy = readl(&ioc->chip->Doorbell);
  2056. else
  2057. reply[i] = le16_to_cpu(readl(&ioc->chip->Doorbell)
  2058. & MPI2_DOORBELL_DATA_MASK);
  2059. writel(0, &ioc->chip->HostInterruptStatus);
  2060. }
  2061. _base_wait_for_doorbell_int(ioc, 5, sleep_flag);
  2062. if (_base_wait_for_doorbell_not_used(ioc, 5, sleep_flag) != 0) {
  2063. dhsprintk(ioc, printk(MPT2SAS_INFO_FMT "doorbell is in use "
  2064. " (line=%d)\n", ioc->name, __LINE__));
  2065. }
  2066. writel(0, &ioc->chip->HostInterruptStatus);
  2067. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2068. mfp = (u32 *)reply;
  2069. printk(KERN_DEBUG "\toffset:data\n");
  2070. for (i = 0; i < reply_bytes/4; i++)
  2071. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2072. le32_to_cpu(mfp[i]));
  2073. }
  2074. return 0;
  2075. }
  2076. /**
  2077. * mpt2sas_base_sas_iounit_control - send sas iounit control to FW
  2078. * @ioc: per adapter object
  2079. * @mpi_reply: the reply payload from FW
  2080. * @mpi_request: the request payload sent to FW
  2081. *
  2082. * The SAS IO Unit Control Request message allows the host to perform low-level
  2083. * operations, such as resets on the PHYs of the IO Unit, also allows the host
  2084. * to obtain the IOC assigned device handles for a device if it has other
  2085. * identifying information about the device, in addition allows the host to
  2086. * remove IOC resources associated with the device.
  2087. *
  2088. * Returns 0 for success, non-zero for failure.
  2089. */
  2090. int
  2091. mpt2sas_base_sas_iounit_control(struct MPT2SAS_ADAPTER *ioc,
  2092. Mpi2SasIoUnitControlReply_t *mpi_reply,
  2093. Mpi2SasIoUnitControlRequest_t *mpi_request)
  2094. {
  2095. u16 smid;
  2096. u32 ioc_state;
  2097. unsigned long timeleft;
  2098. u8 issue_reset;
  2099. int rc;
  2100. void *request;
  2101. u16 wait_state_count;
  2102. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2103. __func__));
  2104. mutex_lock(&ioc->base_cmds.mutex);
  2105. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2106. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2107. ioc->name, __func__);
  2108. rc = -EAGAIN;
  2109. goto out;
  2110. }
  2111. wait_state_count = 0;
  2112. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2113. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2114. if (wait_state_count++ == 10) {
  2115. printk(MPT2SAS_ERR_FMT
  2116. "%s: failed due to ioc not operational\n",
  2117. ioc->name, __func__);
  2118. rc = -EFAULT;
  2119. goto out;
  2120. }
  2121. ssleep(1);
  2122. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2123. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2124. "operational state(count=%d)\n", ioc->name,
  2125. __func__, wait_state_count);
  2126. }
  2127. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2128. if (!smid) {
  2129. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2130. ioc->name, __func__);
  2131. rc = -EAGAIN;
  2132. goto out;
  2133. }
  2134. rc = 0;
  2135. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2136. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2137. ioc->base_cmds.smid = smid;
  2138. memcpy(request, mpi_request, sizeof(Mpi2SasIoUnitControlRequest_t));
  2139. if (mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2140. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET)
  2141. ioc->ioc_link_reset_in_progress = 1;
  2142. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2143. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2144. msecs_to_jiffies(10000));
  2145. if ((mpi_request->Operation == MPI2_SAS_OP_PHY_HARD_RESET ||
  2146. mpi_request->Operation == MPI2_SAS_OP_PHY_LINK_RESET) &&
  2147. ioc->ioc_link_reset_in_progress)
  2148. ioc->ioc_link_reset_in_progress = 0;
  2149. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2150. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2151. ioc->name, __func__);
  2152. _debug_dump_mf(mpi_request,
  2153. sizeof(Mpi2SasIoUnitControlRequest_t)/4);
  2154. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2155. issue_reset = 1;
  2156. goto issue_host_reset;
  2157. }
  2158. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2159. memcpy(mpi_reply, ioc->base_cmds.reply,
  2160. sizeof(Mpi2SasIoUnitControlReply_t));
  2161. else
  2162. memset(mpi_reply, 0, sizeof(Mpi2SasIoUnitControlReply_t));
  2163. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2164. goto out;
  2165. issue_host_reset:
  2166. if (issue_reset)
  2167. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2168. FORCE_BIG_HAMMER);
  2169. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2170. rc = -EFAULT;
  2171. out:
  2172. mutex_unlock(&ioc->base_cmds.mutex);
  2173. return rc;
  2174. }
  2175. /**
  2176. * mpt2sas_base_scsi_enclosure_processor - sending request to sep device
  2177. * @ioc: per adapter object
  2178. * @mpi_reply: the reply payload from FW
  2179. * @mpi_request: the request payload sent to FW
  2180. *
  2181. * The SCSI Enclosure Processor request message causes the IOC to
  2182. * communicate with SES devices to control LED status signals.
  2183. *
  2184. * Returns 0 for success, non-zero for failure.
  2185. */
  2186. int
  2187. mpt2sas_base_scsi_enclosure_processor(struct MPT2SAS_ADAPTER *ioc,
  2188. Mpi2SepReply_t *mpi_reply, Mpi2SepRequest_t *mpi_request)
  2189. {
  2190. u16 smid;
  2191. u32 ioc_state;
  2192. unsigned long timeleft;
  2193. u8 issue_reset;
  2194. int rc;
  2195. void *request;
  2196. u16 wait_state_count;
  2197. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2198. __func__));
  2199. mutex_lock(&ioc->base_cmds.mutex);
  2200. if (ioc->base_cmds.status != MPT2_CMD_NOT_USED) {
  2201. printk(MPT2SAS_ERR_FMT "%s: base_cmd in use\n",
  2202. ioc->name, __func__);
  2203. rc = -EAGAIN;
  2204. goto out;
  2205. }
  2206. wait_state_count = 0;
  2207. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2208. while (ioc_state != MPI2_IOC_STATE_OPERATIONAL) {
  2209. if (wait_state_count++ == 10) {
  2210. printk(MPT2SAS_ERR_FMT
  2211. "%s: failed due to ioc not operational\n",
  2212. ioc->name, __func__);
  2213. rc = -EFAULT;
  2214. goto out;
  2215. }
  2216. ssleep(1);
  2217. ioc_state = mpt2sas_base_get_iocstate(ioc, 1);
  2218. printk(MPT2SAS_INFO_FMT "%s: waiting for "
  2219. "operational state(count=%d)\n", ioc->name,
  2220. __func__, wait_state_count);
  2221. }
  2222. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2223. if (!smid) {
  2224. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2225. ioc->name, __func__);
  2226. rc = -EAGAIN;
  2227. goto out;
  2228. }
  2229. rc = 0;
  2230. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2231. request = mpt2sas_base_get_msg_frame(ioc, smid);
  2232. ioc->base_cmds.smid = smid;
  2233. memcpy(request, mpi_request, sizeof(Mpi2SepReply_t));
  2234. mpt2sas_base_put_smid_default(ioc, smid, mpi_request->VF_ID);
  2235. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2236. msecs_to_jiffies(10000));
  2237. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2238. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2239. ioc->name, __func__);
  2240. _debug_dump_mf(mpi_request,
  2241. sizeof(Mpi2SepRequest_t)/4);
  2242. if (!(ioc->base_cmds.status & MPT2_CMD_RESET))
  2243. issue_reset = 1;
  2244. goto issue_host_reset;
  2245. }
  2246. if (ioc->base_cmds.status & MPT2_CMD_REPLY_VALID)
  2247. memcpy(mpi_reply, ioc->base_cmds.reply,
  2248. sizeof(Mpi2SepReply_t));
  2249. else
  2250. memset(mpi_reply, 0, sizeof(Mpi2SepReply_t));
  2251. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2252. goto out;
  2253. issue_host_reset:
  2254. if (issue_reset)
  2255. mpt2sas_base_hard_reset_handler(ioc, CAN_SLEEP,
  2256. FORCE_BIG_HAMMER);
  2257. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2258. rc = -EFAULT;
  2259. out:
  2260. mutex_unlock(&ioc->base_cmds.mutex);
  2261. return rc;
  2262. }
  2263. /**
  2264. * _base_get_port_facts - obtain port facts reply and save in ioc
  2265. * @ioc: per adapter object
  2266. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2267. *
  2268. * Returns 0 for success, non-zero for failure.
  2269. */
  2270. static int
  2271. _base_get_port_facts(struct MPT2SAS_ADAPTER *ioc, int port, int sleep_flag)
  2272. {
  2273. Mpi2PortFactsRequest_t mpi_request;
  2274. Mpi2PortFactsReply_t mpi_reply, *pfacts;
  2275. int mpi_reply_sz, mpi_request_sz, r;
  2276. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2277. __func__));
  2278. mpi_reply_sz = sizeof(Mpi2PortFactsReply_t);
  2279. mpi_request_sz = sizeof(Mpi2PortFactsRequest_t);
  2280. memset(&mpi_request, 0, mpi_request_sz);
  2281. mpi_request.Function = MPI2_FUNCTION_PORT_FACTS;
  2282. mpi_request.PortNumber = port;
  2283. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2284. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2285. if (r != 0) {
  2286. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2287. ioc->name, __func__, r);
  2288. return r;
  2289. }
  2290. pfacts = &ioc->pfacts[port];
  2291. memset(pfacts, 0, sizeof(Mpi2PortFactsReply_t));
  2292. pfacts->PortNumber = mpi_reply.PortNumber;
  2293. pfacts->VP_ID = mpi_reply.VP_ID;
  2294. pfacts->VF_ID = mpi_reply.VF_ID;
  2295. pfacts->MaxPostedCmdBuffers =
  2296. le16_to_cpu(mpi_reply.MaxPostedCmdBuffers);
  2297. return 0;
  2298. }
  2299. /**
  2300. * _base_get_ioc_facts - obtain ioc facts reply and save in ioc
  2301. * @ioc: per adapter object
  2302. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2303. *
  2304. * Returns 0 for success, non-zero for failure.
  2305. */
  2306. static int
  2307. _base_get_ioc_facts(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2308. {
  2309. Mpi2IOCFactsRequest_t mpi_request;
  2310. Mpi2IOCFactsReply_t mpi_reply, *facts;
  2311. int mpi_reply_sz, mpi_request_sz, r;
  2312. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2313. __func__));
  2314. mpi_reply_sz = sizeof(Mpi2IOCFactsReply_t);
  2315. mpi_request_sz = sizeof(Mpi2IOCFactsRequest_t);
  2316. memset(&mpi_request, 0, mpi_request_sz);
  2317. mpi_request.Function = MPI2_FUNCTION_IOC_FACTS;
  2318. r = _base_handshake_req_reply_wait(ioc, mpi_request_sz,
  2319. (u32 *)&mpi_request, mpi_reply_sz, (u16 *)&mpi_reply, 5, CAN_SLEEP);
  2320. if (r != 0) {
  2321. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2322. ioc->name, __func__, r);
  2323. return r;
  2324. }
  2325. facts = &ioc->facts;
  2326. memset(facts, 0, sizeof(Mpi2IOCFactsReply_t));
  2327. facts->MsgVersion = le16_to_cpu(mpi_reply.MsgVersion);
  2328. facts->HeaderVersion = le16_to_cpu(mpi_reply.HeaderVersion);
  2329. facts->VP_ID = mpi_reply.VP_ID;
  2330. facts->VF_ID = mpi_reply.VF_ID;
  2331. facts->IOCExceptions = le16_to_cpu(mpi_reply.IOCExceptions);
  2332. facts->MaxChainDepth = mpi_reply.MaxChainDepth;
  2333. facts->WhoInit = mpi_reply.WhoInit;
  2334. facts->NumberOfPorts = mpi_reply.NumberOfPorts;
  2335. facts->RequestCredit = le16_to_cpu(mpi_reply.RequestCredit);
  2336. facts->MaxReplyDescriptorPostQueueDepth =
  2337. le16_to_cpu(mpi_reply.MaxReplyDescriptorPostQueueDepth);
  2338. facts->ProductID = le16_to_cpu(mpi_reply.ProductID);
  2339. facts->IOCCapabilities = le32_to_cpu(mpi_reply.IOCCapabilities);
  2340. if ((facts->IOCCapabilities & MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID))
  2341. ioc->ir_firmware = 1;
  2342. facts->FWVersion.Word = le32_to_cpu(mpi_reply.FWVersion.Word);
  2343. facts->IOCRequestFrameSize =
  2344. le16_to_cpu(mpi_reply.IOCRequestFrameSize);
  2345. facts->MaxInitiators = le16_to_cpu(mpi_reply.MaxInitiators);
  2346. facts->MaxTargets = le16_to_cpu(mpi_reply.MaxTargets);
  2347. ioc->shost->max_id = -1;
  2348. facts->MaxSasExpanders = le16_to_cpu(mpi_reply.MaxSasExpanders);
  2349. facts->MaxEnclosures = le16_to_cpu(mpi_reply.MaxEnclosures);
  2350. facts->ProtocolFlags = le16_to_cpu(mpi_reply.ProtocolFlags);
  2351. facts->HighPriorityCredit =
  2352. le16_to_cpu(mpi_reply.HighPriorityCredit);
  2353. facts->ReplyFrameSize = mpi_reply.ReplyFrameSize;
  2354. facts->MaxDevHandle = le16_to_cpu(mpi_reply.MaxDevHandle);
  2355. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "hba queue depth(%d), "
  2356. "max chains per io(%d)\n", ioc->name, facts->RequestCredit,
  2357. facts->MaxChainDepth));
  2358. dinitprintk(ioc, printk(MPT2SAS_INFO_FMT "request frame size(%d), "
  2359. "reply frame size(%d)\n", ioc->name,
  2360. facts->IOCRequestFrameSize * 4, facts->ReplyFrameSize * 4));
  2361. return 0;
  2362. }
  2363. /**
  2364. * _base_send_ioc_init - send ioc_init to firmware
  2365. * @ioc: per adapter object
  2366. * @VF_ID: virtual function id
  2367. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2368. *
  2369. * Returns 0 for success, non-zero for failure.
  2370. */
  2371. static int
  2372. _base_send_ioc_init(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2373. {
  2374. Mpi2IOCInitRequest_t mpi_request;
  2375. Mpi2IOCInitReply_t mpi_reply;
  2376. int r;
  2377. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2378. __func__));
  2379. memset(&mpi_request, 0, sizeof(Mpi2IOCInitRequest_t));
  2380. mpi_request.Function = MPI2_FUNCTION_IOC_INIT;
  2381. mpi_request.WhoInit = MPI2_WHOINIT_HOST_DRIVER;
  2382. mpi_request.VF_ID = VF_ID;
  2383. mpi_request.MsgVersion = cpu_to_le16(MPI2_VERSION);
  2384. mpi_request.HeaderVersion = cpu_to_le16(MPI2_HEADER_VERSION);
  2385. /* In MPI Revision I (0xA), the SystemReplyFrameSize(offset 0x18) was
  2386. * removed and made reserved. For those with older firmware will need
  2387. * this fix. It was decided that the Reply and Request frame sizes are
  2388. * the same.
  2389. */
  2390. if ((ioc->facts.HeaderVersion >> 8) < 0xA) {
  2391. mpi_request.Reserved7 = cpu_to_le16(ioc->reply_sz);
  2392. /* mpi_request.SystemReplyFrameSize =
  2393. * cpu_to_le16(ioc->reply_sz);
  2394. */
  2395. }
  2396. mpi_request.SystemRequestFrameSize = cpu_to_le16(ioc->request_sz/4);
  2397. mpi_request.ReplyDescriptorPostQueueDepth =
  2398. cpu_to_le16(ioc->reply_post_queue_depth);
  2399. mpi_request.ReplyFreeQueueDepth =
  2400. cpu_to_le16(ioc->reply_free_queue_depth);
  2401. #if BITS_PER_LONG > 32
  2402. mpi_request.SenseBufferAddressHigh =
  2403. cpu_to_le32(ioc->sense_dma >> 32);
  2404. mpi_request.SystemReplyAddressHigh =
  2405. cpu_to_le32(ioc->reply_dma >> 32);
  2406. mpi_request.SystemRequestFrameBaseAddress =
  2407. cpu_to_le64(ioc->request_dma);
  2408. mpi_request.ReplyFreeQueueAddress =
  2409. cpu_to_le64(ioc->reply_free_dma);
  2410. mpi_request.ReplyDescriptorPostQueueAddress =
  2411. cpu_to_le64(ioc->reply_post_free_dma);
  2412. #else
  2413. mpi_request.SystemRequestFrameBaseAddress =
  2414. cpu_to_le32(ioc->request_dma);
  2415. mpi_request.ReplyFreeQueueAddress =
  2416. cpu_to_le32(ioc->reply_free_dma);
  2417. mpi_request.ReplyDescriptorPostQueueAddress =
  2418. cpu_to_le32(ioc->reply_post_free_dma);
  2419. #endif
  2420. if (ioc->logging_level & MPT_DEBUG_INIT) {
  2421. u32 *mfp;
  2422. int i;
  2423. mfp = (u32 *)&mpi_request;
  2424. printk(KERN_DEBUG "\toffset:data\n");
  2425. for (i = 0; i < sizeof(Mpi2IOCInitRequest_t)/4; i++)
  2426. printk(KERN_DEBUG "\t[0x%02x]:%08x\n", i*4,
  2427. le32_to_cpu(mfp[i]));
  2428. }
  2429. r = _base_handshake_req_reply_wait(ioc,
  2430. sizeof(Mpi2IOCInitRequest_t), (u32 *)&mpi_request,
  2431. sizeof(Mpi2IOCInitReply_t), (u16 *)&mpi_reply, 10,
  2432. sleep_flag);
  2433. if (r != 0) {
  2434. printk(MPT2SAS_ERR_FMT "%s: handshake failed (r=%d)\n",
  2435. ioc->name, __func__, r);
  2436. return r;
  2437. }
  2438. if (mpi_reply.IOCStatus != MPI2_IOCSTATUS_SUCCESS ||
  2439. mpi_reply.IOCLogInfo) {
  2440. printk(MPT2SAS_ERR_FMT "%s: failed\n", ioc->name, __func__);
  2441. r = -EIO;
  2442. }
  2443. return 0;
  2444. }
  2445. /**
  2446. * _base_send_port_enable - send port_enable(discovery stuff) to firmware
  2447. * @ioc: per adapter object
  2448. * @VF_ID: virtual function id
  2449. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2450. *
  2451. * Returns 0 for success, non-zero for failure.
  2452. */
  2453. static int
  2454. _base_send_port_enable(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2455. {
  2456. Mpi2PortEnableRequest_t *mpi_request;
  2457. u32 ioc_state;
  2458. unsigned long timeleft;
  2459. int r = 0;
  2460. u16 smid;
  2461. printk(MPT2SAS_INFO_FMT "sending port enable !!\n", ioc->name);
  2462. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2463. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2464. ioc->name, __func__);
  2465. return -EAGAIN;
  2466. }
  2467. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2468. if (!smid) {
  2469. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2470. ioc->name, __func__);
  2471. return -EAGAIN;
  2472. }
  2473. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2474. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2475. ioc->base_cmds.smid = smid;
  2476. memset(mpi_request, 0, sizeof(Mpi2PortEnableRequest_t));
  2477. mpi_request->Function = MPI2_FUNCTION_PORT_ENABLE;
  2478. mpi_request->VF_ID = VF_ID;
  2479. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2480. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done,
  2481. 300*HZ);
  2482. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2483. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2484. ioc->name, __func__);
  2485. _debug_dump_mf(mpi_request,
  2486. sizeof(Mpi2PortEnableRequest_t)/4);
  2487. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2488. r = -EFAULT;
  2489. else
  2490. r = -ETIME;
  2491. goto out;
  2492. } else
  2493. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2494. ioc->name, __func__));
  2495. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_OPERATIONAL,
  2496. 60, sleep_flag);
  2497. if (ioc_state) {
  2498. printk(MPT2SAS_ERR_FMT "%s: failed going to operational state "
  2499. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2500. r = -EFAULT;
  2501. }
  2502. out:
  2503. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2504. printk(MPT2SAS_INFO_FMT "port enable: %s\n",
  2505. ioc->name, ((r == 0) ? "SUCCESS" : "FAILED"));
  2506. return r;
  2507. }
  2508. /**
  2509. * _base_unmask_events - turn on notification for this event
  2510. * @ioc: per adapter object
  2511. * @event: firmware event
  2512. *
  2513. * The mask is stored in ioc->event_masks.
  2514. */
  2515. static void
  2516. _base_unmask_events(struct MPT2SAS_ADAPTER *ioc, u16 event)
  2517. {
  2518. u32 desired_event;
  2519. if (event >= 128)
  2520. return;
  2521. desired_event = (1 << (event % 32));
  2522. if (event < 32)
  2523. ioc->event_masks[0] &= ~desired_event;
  2524. else if (event < 64)
  2525. ioc->event_masks[1] &= ~desired_event;
  2526. else if (event < 96)
  2527. ioc->event_masks[2] &= ~desired_event;
  2528. else if (event < 128)
  2529. ioc->event_masks[3] &= ~desired_event;
  2530. }
  2531. /**
  2532. * _base_event_notification - send event notification
  2533. * @ioc: per adapter object
  2534. * @VF_ID: virtual function id
  2535. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2536. *
  2537. * Returns 0 for success, non-zero for failure.
  2538. */
  2539. static int
  2540. _base_event_notification(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID, int sleep_flag)
  2541. {
  2542. Mpi2EventNotificationRequest_t *mpi_request;
  2543. unsigned long timeleft;
  2544. u16 smid;
  2545. int r = 0;
  2546. int i;
  2547. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2548. __func__));
  2549. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  2550. printk(MPT2SAS_ERR_FMT "%s: internal command already in use\n",
  2551. ioc->name, __func__);
  2552. return -EAGAIN;
  2553. }
  2554. smid = mpt2sas_base_get_smid(ioc, ioc->base_cb_idx);
  2555. if (!smid) {
  2556. printk(MPT2SAS_ERR_FMT "%s: failed obtaining a smid\n",
  2557. ioc->name, __func__);
  2558. return -EAGAIN;
  2559. }
  2560. ioc->base_cmds.status = MPT2_CMD_PENDING;
  2561. mpi_request = mpt2sas_base_get_msg_frame(ioc, smid);
  2562. ioc->base_cmds.smid = smid;
  2563. memset(mpi_request, 0, sizeof(Mpi2EventNotificationRequest_t));
  2564. mpi_request->Function = MPI2_FUNCTION_EVENT_NOTIFICATION;
  2565. mpi_request->VF_ID = VF_ID;
  2566. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2567. mpi_request->EventMasks[i] =
  2568. le32_to_cpu(ioc->event_masks[i]);
  2569. mpt2sas_base_put_smid_default(ioc, smid, VF_ID);
  2570. timeleft = wait_for_completion_timeout(&ioc->base_cmds.done, 30*HZ);
  2571. if (!(ioc->base_cmds.status & MPT2_CMD_COMPLETE)) {
  2572. printk(MPT2SAS_ERR_FMT "%s: timeout\n",
  2573. ioc->name, __func__);
  2574. _debug_dump_mf(mpi_request,
  2575. sizeof(Mpi2EventNotificationRequest_t)/4);
  2576. if (ioc->base_cmds.status & MPT2_CMD_RESET)
  2577. r = -EFAULT;
  2578. else
  2579. r = -ETIME;
  2580. } else
  2581. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: complete\n",
  2582. ioc->name, __func__));
  2583. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2584. return r;
  2585. }
  2586. /**
  2587. * mpt2sas_base_validate_event_type - validating event types
  2588. * @ioc: per adapter object
  2589. * @event: firmware event
  2590. *
  2591. * This will turn on firmware event notification when application
  2592. * ask for that event. We don't mask events that are already enabled.
  2593. */
  2594. void
  2595. mpt2sas_base_validate_event_type(struct MPT2SAS_ADAPTER *ioc, u32 *event_type)
  2596. {
  2597. int i, j;
  2598. u32 event_mask, desired_event;
  2599. u8 send_update_to_fw;
  2600. for (i = 0, send_update_to_fw = 0; i <
  2601. MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++) {
  2602. event_mask = ~event_type[i];
  2603. desired_event = 1;
  2604. for (j = 0; j < 32; j++) {
  2605. if (!(event_mask & desired_event) &&
  2606. (ioc->event_masks[i] & desired_event)) {
  2607. ioc->event_masks[i] &= ~desired_event;
  2608. send_update_to_fw = 1;
  2609. }
  2610. desired_event = (desired_event << 1);
  2611. }
  2612. }
  2613. if (!send_update_to_fw)
  2614. return;
  2615. mutex_lock(&ioc->base_cmds.mutex);
  2616. _base_event_notification(ioc, 0, CAN_SLEEP);
  2617. mutex_unlock(&ioc->base_cmds.mutex);
  2618. }
  2619. /**
  2620. * _base_diag_reset - the "big hammer" start of day reset
  2621. * @ioc: per adapter object
  2622. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2623. *
  2624. * Returns 0 for success, non-zero for failure.
  2625. */
  2626. static int
  2627. _base_diag_reset(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  2628. {
  2629. u32 host_diagnostic;
  2630. u32 ioc_state;
  2631. u32 count;
  2632. u32 hcb_size;
  2633. printk(MPT2SAS_INFO_FMT "sending diag reset !!\n", ioc->name);
  2634. _base_save_msix_table(ioc);
  2635. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "clear interrupts\n",
  2636. ioc->name));
  2637. writel(0, &ioc->chip->HostInterruptStatus);
  2638. count = 0;
  2639. do {
  2640. /* Write magic sequence to WriteSequence register
  2641. * Loop until in diagnostic mode
  2642. */
  2643. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "write magic "
  2644. "sequence\n", ioc->name));
  2645. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2646. writel(MPI2_WRSEQ_1ST_KEY_VALUE, &ioc->chip->WriteSequence);
  2647. writel(MPI2_WRSEQ_2ND_KEY_VALUE, &ioc->chip->WriteSequence);
  2648. writel(MPI2_WRSEQ_3RD_KEY_VALUE, &ioc->chip->WriteSequence);
  2649. writel(MPI2_WRSEQ_4TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2650. writel(MPI2_WRSEQ_5TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2651. writel(MPI2_WRSEQ_6TH_KEY_VALUE, &ioc->chip->WriteSequence);
  2652. /* wait 100 msec */
  2653. if (sleep_flag == CAN_SLEEP)
  2654. msleep(100);
  2655. else
  2656. mdelay(100);
  2657. if (count++ > 20)
  2658. goto out;
  2659. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2660. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "wrote magic "
  2661. "sequence: count(%d), host_diagnostic(0x%08x)\n",
  2662. ioc->name, count, host_diagnostic));
  2663. } while ((host_diagnostic & MPI2_DIAG_DIAG_WRITE_ENABLE) == 0);
  2664. hcb_size = readl(&ioc->chip->HCBSize);
  2665. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "diag reset: issued\n",
  2666. ioc->name));
  2667. writel(host_diagnostic | MPI2_DIAG_RESET_ADAPTER,
  2668. &ioc->chip->HostDiagnostic);
  2669. /* don't access any registers for 50 milliseconds */
  2670. msleep(50);
  2671. /* 300 second max wait */
  2672. for (count = 0; count < 3000000 ; count++) {
  2673. host_diagnostic = readl(&ioc->chip->HostDiagnostic);
  2674. if (host_diagnostic == 0xFFFFFFFF)
  2675. goto out;
  2676. if (!(host_diagnostic & MPI2_DIAG_RESET_ADAPTER))
  2677. break;
  2678. /* wait 100 msec */
  2679. if (sleep_flag == CAN_SLEEP)
  2680. msleep(1);
  2681. else
  2682. mdelay(1);
  2683. }
  2684. if (host_diagnostic & MPI2_DIAG_HCB_MODE) {
  2685. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter "
  2686. "assuming the HCB Address points to good F/W\n",
  2687. ioc->name));
  2688. host_diagnostic &= ~MPI2_DIAG_BOOT_DEVICE_SELECT_MASK;
  2689. host_diagnostic |= MPI2_DIAG_BOOT_DEVICE_SELECT_HCDW;
  2690. writel(host_diagnostic, &ioc->chip->HostDiagnostic);
  2691. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT
  2692. "re-enable the HCDW\n", ioc->name));
  2693. writel(hcb_size | MPI2_HCB_SIZE_HCB_ENABLE,
  2694. &ioc->chip->HCBSize);
  2695. }
  2696. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "restart the adapter\n",
  2697. ioc->name));
  2698. writel(host_diagnostic & ~MPI2_DIAG_HOLD_IOC_RESET,
  2699. &ioc->chip->HostDiagnostic);
  2700. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "disable writes to the "
  2701. "diagnostic register\n", ioc->name));
  2702. writel(MPI2_WRSEQ_FLUSH_KEY_VALUE, &ioc->chip->WriteSequence);
  2703. drsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "Wait for FW to go to the "
  2704. "READY state\n", ioc->name));
  2705. ioc_state = _base_wait_on_iocstate(ioc, MPI2_IOC_STATE_READY, 20,
  2706. sleep_flag);
  2707. if (ioc_state) {
  2708. printk(MPT2SAS_ERR_FMT "%s: failed going to ready state "
  2709. " (ioc_state=0x%x)\n", ioc->name, __func__, ioc_state);
  2710. goto out;
  2711. }
  2712. _base_restore_msix_table(ioc);
  2713. printk(MPT2SAS_INFO_FMT "diag reset: SUCCESS\n", ioc->name);
  2714. return 0;
  2715. out:
  2716. printk(MPT2SAS_ERR_FMT "diag reset: FAILED\n", ioc->name);
  2717. return -EFAULT;
  2718. }
  2719. /**
  2720. * _base_make_ioc_ready - put controller in READY state
  2721. * @ioc: per adapter object
  2722. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2723. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  2724. *
  2725. * Returns 0 for success, non-zero for failure.
  2726. */
  2727. static int
  2728. _base_make_ioc_ready(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  2729. enum reset_type type)
  2730. {
  2731. u32 ioc_state;
  2732. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2733. __func__));
  2734. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  2735. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: ioc_state(0x%08x)\n",
  2736. ioc->name, __func__, ioc_state));
  2737. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_READY)
  2738. return 0;
  2739. if (ioc_state & MPI2_DOORBELL_USED) {
  2740. dhsprintk(ioc, printk(MPT2SAS_DEBUG_FMT "unexpected doorbell "
  2741. "active!\n", ioc->name));
  2742. goto issue_diag_reset;
  2743. }
  2744. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_FAULT) {
  2745. mpt2sas_base_fault_info(ioc, ioc_state &
  2746. MPI2_DOORBELL_DATA_MASK);
  2747. goto issue_diag_reset;
  2748. }
  2749. if (type == FORCE_BIG_HAMMER)
  2750. goto issue_diag_reset;
  2751. if ((ioc_state & MPI2_IOC_STATE_MASK) == MPI2_IOC_STATE_OPERATIONAL)
  2752. if (!(_base_send_ioc_reset(ioc,
  2753. MPI2_FUNCTION_IOC_MESSAGE_UNIT_RESET, 15, CAN_SLEEP)))
  2754. return 0;
  2755. issue_diag_reset:
  2756. return _base_diag_reset(ioc, CAN_SLEEP);
  2757. }
  2758. /**
  2759. * _base_make_ioc_operational - put controller in OPERATIONAL state
  2760. * @ioc: per adapter object
  2761. * @VF_ID: virtual function id
  2762. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  2763. *
  2764. * Returns 0 for success, non-zero for failure.
  2765. */
  2766. static int
  2767. _base_make_ioc_operational(struct MPT2SAS_ADAPTER *ioc, u8 VF_ID,
  2768. int sleep_flag)
  2769. {
  2770. int r, i;
  2771. unsigned long flags;
  2772. u32 reply_address;
  2773. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2774. __func__));
  2775. /* initialize the scsi lookup free list */
  2776. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  2777. INIT_LIST_HEAD(&ioc->free_list);
  2778. for (i = 0; i < ioc->request_depth; i++) {
  2779. ioc->scsi_lookup[i].cb_idx = 0xFF;
  2780. list_add_tail(&ioc->scsi_lookup[i].tracker_list,
  2781. &ioc->free_list);
  2782. }
  2783. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  2784. /* initialize Reply Free Queue */
  2785. for (i = 0, reply_address = (u32)ioc->reply_dma ;
  2786. i < ioc->reply_free_queue_depth ; i++, reply_address +=
  2787. ioc->reply_sz)
  2788. ioc->reply_free[i] = cpu_to_le32(reply_address);
  2789. /* initialize Reply Post Free Queue */
  2790. for (i = 0; i < ioc->reply_post_queue_depth; i++)
  2791. ioc->reply_post_free[i].Words = ULLONG_MAX;
  2792. r = _base_send_ioc_init(ioc, VF_ID, sleep_flag);
  2793. if (r)
  2794. return r;
  2795. /* initialize the index's */
  2796. ioc->reply_free_host_index = ioc->reply_free_queue_depth - 1;
  2797. ioc->reply_post_host_index = 0;
  2798. writel(ioc->reply_free_host_index, &ioc->chip->ReplyFreeHostIndex);
  2799. writel(0, &ioc->chip->ReplyPostHostIndex);
  2800. _base_unmask_interrupts(ioc);
  2801. r = _base_event_notification(ioc, VF_ID, sleep_flag);
  2802. if (r)
  2803. return r;
  2804. if (sleep_flag == CAN_SLEEP)
  2805. _base_static_config_pages(ioc);
  2806. r = _base_send_port_enable(ioc, VF_ID, sleep_flag);
  2807. if (r)
  2808. return r;
  2809. return r;
  2810. }
  2811. /**
  2812. * mpt2sas_base_free_resources - free resources controller resources (io/irq/memap)
  2813. * @ioc: per adapter object
  2814. *
  2815. * Return nothing.
  2816. */
  2817. void
  2818. mpt2sas_base_free_resources(struct MPT2SAS_ADAPTER *ioc)
  2819. {
  2820. struct pci_dev *pdev = ioc->pdev;
  2821. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2822. __func__));
  2823. _base_mask_interrupts(ioc);
  2824. _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2825. if (ioc->pci_irq) {
  2826. synchronize_irq(pdev->irq);
  2827. free_irq(ioc->pci_irq, ioc);
  2828. }
  2829. _base_disable_msix(ioc);
  2830. if (ioc->chip_phys)
  2831. iounmap(ioc->chip);
  2832. ioc->pci_irq = -1;
  2833. ioc->chip_phys = 0;
  2834. pci_release_selected_regions(ioc->pdev, ioc->bars);
  2835. pci_disable_device(pdev);
  2836. pci_set_drvdata(pdev, NULL);
  2837. return;
  2838. }
  2839. /**
  2840. * mpt2sas_base_attach - attach controller instance
  2841. * @ioc: per adapter object
  2842. *
  2843. * Returns 0 for success, non-zero for failure.
  2844. */
  2845. int
  2846. mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc)
  2847. {
  2848. int r, i;
  2849. unsigned long flags;
  2850. dinitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2851. __func__));
  2852. r = mpt2sas_base_map_resources(ioc);
  2853. if (r)
  2854. return r;
  2855. r = _base_make_ioc_ready(ioc, CAN_SLEEP, SOFT_RESET);
  2856. if (r)
  2857. goto out_free_resources;
  2858. r = _base_get_ioc_facts(ioc, CAN_SLEEP);
  2859. if (r)
  2860. goto out_free_resources;
  2861. r = _base_allocate_memory_pools(ioc, CAN_SLEEP);
  2862. if (r)
  2863. goto out_free_resources;
  2864. init_waitqueue_head(&ioc->reset_wq);
  2865. /* base internal command bits */
  2866. mutex_init(&ioc->base_cmds.mutex);
  2867. init_completion(&ioc->base_cmds.done);
  2868. ioc->base_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2869. ioc->base_cmds.status = MPT2_CMD_NOT_USED;
  2870. /* transport internal command bits */
  2871. ioc->transport_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2872. ioc->transport_cmds.status = MPT2_CMD_NOT_USED;
  2873. mutex_init(&ioc->transport_cmds.mutex);
  2874. init_completion(&ioc->transport_cmds.done);
  2875. /* task management internal command bits */
  2876. ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2877. ioc->tm_cmds.status = MPT2_CMD_NOT_USED;
  2878. mutex_init(&ioc->tm_cmds.mutex);
  2879. init_completion(&ioc->tm_cmds.done);
  2880. /* config page internal command bits */
  2881. ioc->config_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2882. ioc->config_cmds.status = MPT2_CMD_NOT_USED;
  2883. mutex_init(&ioc->config_cmds.mutex);
  2884. init_completion(&ioc->config_cmds.done);
  2885. /* ctl module internal command bits */
  2886. ioc->ctl_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL);
  2887. ioc->ctl_cmds.status = MPT2_CMD_NOT_USED;
  2888. mutex_init(&ioc->ctl_cmds.mutex);
  2889. init_completion(&ioc->ctl_cmds.done);
  2890. for (i = 0; i < MPI2_EVENT_NOTIFY_EVENTMASK_WORDS; i++)
  2891. ioc->event_masks[i] = -1;
  2892. /* here we enable the events we care about */
  2893. _base_unmask_events(ioc, MPI2_EVENT_SAS_DISCOVERY);
  2894. _base_unmask_events(ioc, MPI2_EVENT_SAS_BROADCAST_PRIMITIVE);
  2895. _base_unmask_events(ioc, MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST);
  2896. _base_unmask_events(ioc, MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE);
  2897. _base_unmask_events(ioc, MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE);
  2898. _base_unmask_events(ioc, MPI2_EVENT_IR_CONFIGURATION_CHANGE_LIST);
  2899. _base_unmask_events(ioc, MPI2_EVENT_IR_VOLUME);
  2900. _base_unmask_events(ioc, MPI2_EVENT_IR_PHYSICAL_DISK);
  2901. _base_unmask_events(ioc, MPI2_EVENT_IR_OPERATION_STATUS);
  2902. _base_unmask_events(ioc, MPI2_EVENT_TASK_SET_FULL);
  2903. _base_unmask_events(ioc, MPI2_EVENT_LOG_ENTRY_ADDED);
  2904. ioc->pfacts = kcalloc(ioc->facts.NumberOfPorts,
  2905. sizeof(Mpi2PortFactsReply_t), GFP_KERNEL);
  2906. if (!ioc->pfacts)
  2907. goto out_free_resources;
  2908. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++) {
  2909. r = _base_get_port_facts(ioc, i, CAN_SLEEP);
  2910. if (r)
  2911. goto out_free_resources;
  2912. }
  2913. r = _base_make_ioc_operational(ioc, 0, CAN_SLEEP);
  2914. if (r)
  2915. goto out_free_resources;
  2916. /* initialize fault polling */
  2917. INIT_DELAYED_WORK(&ioc->fault_reset_work, _base_fault_reset_work);
  2918. snprintf(ioc->fault_reset_work_q_name,
  2919. sizeof(ioc->fault_reset_work_q_name), "poll_%d_status", ioc->id);
  2920. ioc->fault_reset_work_q =
  2921. create_singlethread_workqueue(ioc->fault_reset_work_q_name);
  2922. if (!ioc->fault_reset_work_q) {
  2923. printk(MPT2SAS_ERR_FMT "%s: failed (line=%d)\n",
  2924. ioc->name, __func__, __LINE__);
  2925. goto out_free_resources;
  2926. }
  2927. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2928. if (ioc->fault_reset_work_q)
  2929. queue_delayed_work(ioc->fault_reset_work_q,
  2930. &ioc->fault_reset_work,
  2931. msecs_to_jiffies(FAULT_POLLING_INTERVAL));
  2932. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2933. return 0;
  2934. out_free_resources:
  2935. ioc->remove_host = 1;
  2936. mpt2sas_base_free_resources(ioc);
  2937. _base_release_memory_pools(ioc);
  2938. kfree(ioc->tm_cmds.reply);
  2939. kfree(ioc->transport_cmds.reply);
  2940. kfree(ioc->config_cmds.reply);
  2941. kfree(ioc->base_cmds.reply);
  2942. kfree(ioc->ctl_cmds.reply);
  2943. kfree(ioc->pfacts);
  2944. ioc->ctl_cmds.reply = NULL;
  2945. ioc->base_cmds.reply = NULL;
  2946. ioc->tm_cmds.reply = NULL;
  2947. ioc->transport_cmds.reply = NULL;
  2948. ioc->config_cmds.reply = NULL;
  2949. ioc->pfacts = NULL;
  2950. return r;
  2951. }
  2952. /**
  2953. * mpt2sas_base_detach - remove controller instance
  2954. * @ioc: per adapter object
  2955. *
  2956. * Return nothing.
  2957. */
  2958. void
  2959. mpt2sas_base_detach(struct MPT2SAS_ADAPTER *ioc)
  2960. {
  2961. unsigned long flags;
  2962. struct workqueue_struct *wq;
  2963. dexitprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s\n", ioc->name,
  2964. __func__));
  2965. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  2966. wq = ioc->fault_reset_work_q;
  2967. ioc->fault_reset_work_q = NULL;
  2968. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  2969. if (!cancel_delayed_work(&ioc->fault_reset_work))
  2970. flush_workqueue(wq);
  2971. destroy_workqueue(wq);
  2972. mpt2sas_base_free_resources(ioc);
  2973. _base_release_memory_pools(ioc);
  2974. kfree(ioc->pfacts);
  2975. kfree(ioc->ctl_cmds.reply);
  2976. kfree(ioc->base_cmds.reply);
  2977. kfree(ioc->tm_cmds.reply);
  2978. kfree(ioc->transport_cmds.reply);
  2979. kfree(ioc->config_cmds.reply);
  2980. }
  2981. /**
  2982. * _base_reset_handler - reset callback handler (for base)
  2983. * @ioc: per adapter object
  2984. * @reset_phase: phase
  2985. *
  2986. * The handler for doing any required cleanup or initialization.
  2987. *
  2988. * The reset phase can be MPT2_IOC_PRE_RESET, MPT2_IOC_AFTER_RESET,
  2989. * MPT2_IOC_DONE_RESET
  2990. *
  2991. * Return nothing.
  2992. */
  2993. static void
  2994. _base_reset_handler(struct MPT2SAS_ADAPTER *ioc, int reset_phase)
  2995. {
  2996. switch (reset_phase) {
  2997. case MPT2_IOC_PRE_RESET:
  2998. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  2999. "MPT2_IOC_PRE_RESET\n", ioc->name, __func__));
  3000. break;
  3001. case MPT2_IOC_AFTER_RESET:
  3002. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3003. "MPT2_IOC_AFTER_RESET\n", ioc->name, __func__));
  3004. if (ioc->transport_cmds.status & MPT2_CMD_PENDING) {
  3005. ioc->transport_cmds.status |= MPT2_CMD_RESET;
  3006. mpt2sas_base_free_smid(ioc, ioc->transport_cmds.smid);
  3007. complete(&ioc->transport_cmds.done);
  3008. }
  3009. if (ioc->base_cmds.status & MPT2_CMD_PENDING) {
  3010. ioc->base_cmds.status |= MPT2_CMD_RESET;
  3011. mpt2sas_base_free_smid(ioc, ioc->base_cmds.smid);
  3012. complete(&ioc->base_cmds.done);
  3013. }
  3014. if (ioc->config_cmds.status & MPT2_CMD_PENDING) {
  3015. ioc->config_cmds.status |= MPT2_CMD_RESET;
  3016. mpt2sas_base_free_smid(ioc, ioc->config_cmds.smid);
  3017. complete(&ioc->config_cmds.done);
  3018. }
  3019. break;
  3020. case MPT2_IOC_DONE_RESET:
  3021. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: "
  3022. "MPT2_IOC_DONE_RESET\n", ioc->name, __func__));
  3023. break;
  3024. }
  3025. mpt2sas_scsih_reset_handler(ioc, reset_phase);
  3026. mpt2sas_ctl_reset_handler(ioc, reset_phase);
  3027. }
  3028. /**
  3029. * _wait_for_commands_to_complete - reset controller
  3030. * @ioc: Pointer to MPT_ADAPTER structure
  3031. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3032. *
  3033. * This function waiting(3s) for all pending commands to complete
  3034. * prior to putting controller in reset.
  3035. */
  3036. static void
  3037. _wait_for_commands_to_complete(struct MPT2SAS_ADAPTER *ioc, int sleep_flag)
  3038. {
  3039. u32 ioc_state;
  3040. unsigned long flags;
  3041. u16 i;
  3042. ioc->pending_io_count = 0;
  3043. if (sleep_flag != CAN_SLEEP)
  3044. return;
  3045. ioc_state = mpt2sas_base_get_iocstate(ioc, 0);
  3046. if ((ioc_state & MPI2_IOC_STATE_MASK) != MPI2_IOC_STATE_OPERATIONAL)
  3047. return;
  3048. /* pending command count */
  3049. spin_lock_irqsave(&ioc->scsi_lookup_lock, flags);
  3050. for (i = 0; i < ioc->request_depth; i++)
  3051. if (ioc->scsi_lookup[i].cb_idx != 0xFF)
  3052. ioc->pending_io_count++;
  3053. spin_unlock_irqrestore(&ioc->scsi_lookup_lock, flags);
  3054. if (!ioc->pending_io_count)
  3055. return;
  3056. /* wait for pending commands to complete */
  3057. wait_event_timeout(ioc->reset_wq, ioc->pending_io_count == 0, 3 * HZ);
  3058. }
  3059. /**
  3060. * mpt2sas_base_hard_reset_handler - reset controller
  3061. * @ioc: Pointer to MPT_ADAPTER structure
  3062. * @sleep_flag: CAN_SLEEP or NO_SLEEP
  3063. * @type: FORCE_BIG_HAMMER or SOFT_RESET
  3064. *
  3065. * Returns 0 for success, non-zero for failure.
  3066. */
  3067. int
  3068. mpt2sas_base_hard_reset_handler(struct MPT2SAS_ADAPTER *ioc, int sleep_flag,
  3069. enum reset_type type)
  3070. {
  3071. int r, i;
  3072. unsigned long flags;
  3073. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: enter\n", ioc->name,
  3074. __func__));
  3075. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3076. if (ioc->ioc_reset_in_progress) {
  3077. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3078. printk(MPT2SAS_ERR_FMT "%s: busy\n",
  3079. ioc->name, __func__);
  3080. return -EBUSY;
  3081. }
  3082. ioc->ioc_reset_in_progress = 1;
  3083. ioc->shost_recovery = 1;
  3084. if (ioc->shost->shost_state == SHOST_RUNNING) {
  3085. /* set back to SHOST_RUNNING in mpt2sas_scsih.c */
  3086. scsi_host_set_state(ioc->shost, SHOST_RECOVERY);
  3087. printk(MPT2SAS_INFO_FMT "putting controller into "
  3088. "SHOST_RECOVERY\n", ioc->name);
  3089. }
  3090. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3091. _base_reset_handler(ioc, MPT2_IOC_PRE_RESET);
  3092. _wait_for_commands_to_complete(ioc, sleep_flag);
  3093. _base_mask_interrupts(ioc);
  3094. r = _base_make_ioc_ready(ioc, sleep_flag, type);
  3095. if (r)
  3096. goto out;
  3097. _base_reset_handler(ioc, MPT2_IOC_AFTER_RESET);
  3098. for (i = 0 ; i < ioc->facts.NumberOfPorts; i++)
  3099. r = _base_make_ioc_operational(ioc, ioc->pfacts[i].VF_ID,
  3100. sleep_flag);
  3101. if (!r)
  3102. _base_reset_handler(ioc, MPT2_IOC_DONE_RESET);
  3103. out:
  3104. dtmprintk(ioc, printk(MPT2SAS_DEBUG_FMT "%s: %s\n",
  3105. ioc->name, __func__, ((r == 0) ? "SUCCESS" : "FAILED")));
  3106. spin_lock_irqsave(&ioc->ioc_reset_in_progress_lock, flags);
  3107. ioc->ioc_reset_in_progress = 0;
  3108. spin_unlock_irqrestore(&ioc->ioc_reset_in_progress_lock, flags);
  3109. return r;
  3110. }