ctcm_fsms.c 74 KB

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  1. /*
  2. * drivers/s390/net/ctcm_fsms.c
  3. *
  4. * Copyright IBM Corp. 2001, 2007
  5. * Authors: Fritz Elfert (felfert@millenux.com)
  6. * Peter Tiedemann (ptiedem@de.ibm.com)
  7. * MPC additions :
  8. * Belinda Thompson (belindat@us.ibm.com)
  9. * Andy Richter (richtera@us.ibm.com)
  10. */
  11. #undef DEBUG
  12. #undef DEBUGDATA
  13. #undef DEBUGCCW
  14. #define KMSG_COMPONENT "ctcm"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/module.h>
  17. #include <linux/init.h>
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/errno.h>
  21. #include <linux/types.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/timer.h>
  24. #include <linux/bitops.h>
  25. #include <linux/signal.h>
  26. #include <linux/string.h>
  27. #include <linux/ip.h>
  28. #include <linux/if_arp.h>
  29. #include <linux/tcp.h>
  30. #include <linux/skbuff.h>
  31. #include <linux/ctype.h>
  32. #include <net/dst.h>
  33. #include <linux/io.h>
  34. #include <asm/ccwdev.h>
  35. #include <asm/ccwgroup.h>
  36. #include <linux/uaccess.h>
  37. #include <asm/idals.h>
  38. #include "fsm.h"
  39. #include "cu3088.h"
  40. #include "ctcm_dbug.h"
  41. #include "ctcm_main.h"
  42. #include "ctcm_fsms.h"
  43. const char *dev_state_names[] = {
  44. [DEV_STATE_STOPPED] = "Stopped",
  45. [DEV_STATE_STARTWAIT_RXTX] = "StartWait RXTX",
  46. [DEV_STATE_STARTWAIT_RX] = "StartWait RX",
  47. [DEV_STATE_STARTWAIT_TX] = "StartWait TX",
  48. [DEV_STATE_STOPWAIT_RXTX] = "StopWait RXTX",
  49. [DEV_STATE_STOPWAIT_RX] = "StopWait RX",
  50. [DEV_STATE_STOPWAIT_TX] = "StopWait TX",
  51. [DEV_STATE_RUNNING] = "Running",
  52. };
  53. const char *dev_event_names[] = {
  54. [DEV_EVENT_START] = "Start",
  55. [DEV_EVENT_STOP] = "Stop",
  56. [DEV_EVENT_RXUP] = "RX up",
  57. [DEV_EVENT_TXUP] = "TX up",
  58. [DEV_EVENT_RXDOWN] = "RX down",
  59. [DEV_EVENT_TXDOWN] = "TX down",
  60. [DEV_EVENT_RESTART] = "Restart",
  61. };
  62. const char *ctc_ch_event_names[] = {
  63. [CTC_EVENT_IO_SUCCESS] = "ccw_device success",
  64. [CTC_EVENT_IO_EBUSY] = "ccw_device busy",
  65. [CTC_EVENT_IO_ENODEV] = "ccw_device enodev",
  66. [CTC_EVENT_IO_UNKNOWN] = "ccw_device unknown",
  67. [CTC_EVENT_ATTNBUSY] = "Status ATTN & BUSY",
  68. [CTC_EVENT_ATTN] = "Status ATTN",
  69. [CTC_EVENT_BUSY] = "Status BUSY",
  70. [CTC_EVENT_UC_RCRESET] = "Unit check remote reset",
  71. [CTC_EVENT_UC_RSRESET] = "Unit check remote system reset",
  72. [CTC_EVENT_UC_TXTIMEOUT] = "Unit check TX timeout",
  73. [CTC_EVENT_UC_TXPARITY] = "Unit check TX parity",
  74. [CTC_EVENT_UC_HWFAIL] = "Unit check Hardware failure",
  75. [CTC_EVENT_UC_RXPARITY] = "Unit check RX parity",
  76. [CTC_EVENT_UC_ZERO] = "Unit check ZERO",
  77. [CTC_EVENT_UC_UNKNOWN] = "Unit check Unknown",
  78. [CTC_EVENT_SC_UNKNOWN] = "SubChannel check Unknown",
  79. [CTC_EVENT_MC_FAIL] = "Machine check failure",
  80. [CTC_EVENT_MC_GOOD] = "Machine check operational",
  81. [CTC_EVENT_IRQ] = "IRQ normal",
  82. [CTC_EVENT_FINSTAT] = "IRQ final",
  83. [CTC_EVENT_TIMER] = "Timer",
  84. [CTC_EVENT_START] = "Start",
  85. [CTC_EVENT_STOP] = "Stop",
  86. /*
  87. * additional MPC events
  88. */
  89. [CTC_EVENT_SEND_XID] = "XID Exchange",
  90. [CTC_EVENT_RSWEEP_TIMER] = "MPC Group Sweep Timer",
  91. };
  92. const char *ctc_ch_state_names[] = {
  93. [CTC_STATE_IDLE] = "Idle",
  94. [CTC_STATE_STOPPED] = "Stopped",
  95. [CTC_STATE_STARTWAIT] = "StartWait",
  96. [CTC_STATE_STARTRETRY] = "StartRetry",
  97. [CTC_STATE_SETUPWAIT] = "SetupWait",
  98. [CTC_STATE_RXINIT] = "RX init",
  99. [CTC_STATE_TXINIT] = "TX init",
  100. [CTC_STATE_RX] = "RX",
  101. [CTC_STATE_TX] = "TX",
  102. [CTC_STATE_RXIDLE] = "RX idle",
  103. [CTC_STATE_TXIDLE] = "TX idle",
  104. [CTC_STATE_RXERR] = "RX error",
  105. [CTC_STATE_TXERR] = "TX error",
  106. [CTC_STATE_TERM] = "Terminating",
  107. [CTC_STATE_DTERM] = "Restarting",
  108. [CTC_STATE_NOTOP] = "Not operational",
  109. /*
  110. * additional MPC states
  111. */
  112. [CH_XID0_PENDING] = "Pending XID0 Start",
  113. [CH_XID0_INPROGRESS] = "In XID0 Negotiations ",
  114. [CH_XID7_PENDING] = "Pending XID7 P1 Start",
  115. [CH_XID7_PENDING1] = "Active XID7 P1 Exchange ",
  116. [CH_XID7_PENDING2] = "Pending XID7 P2 Start ",
  117. [CH_XID7_PENDING3] = "Active XID7 P2 Exchange ",
  118. [CH_XID7_PENDING4] = "XID7 Complete - Pending READY ",
  119. };
  120. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg);
  121. /*
  122. * ----- static ctcm actions for channel statemachine -----
  123. *
  124. */
  125. static void chx_txdone(fsm_instance *fi, int event, void *arg);
  126. static void chx_rx(fsm_instance *fi, int event, void *arg);
  127. static void chx_rxidle(fsm_instance *fi, int event, void *arg);
  128. static void chx_firstio(fsm_instance *fi, int event, void *arg);
  129. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  130. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  131. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  132. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  133. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  134. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  135. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  136. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  137. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  138. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  139. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  140. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  141. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  142. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  143. /*
  144. * ----- static ctcmpc actions for ctcmpc channel statemachine -----
  145. *
  146. */
  147. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg);
  148. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg);
  149. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg);
  150. /* shared :
  151. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg);
  152. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg);
  153. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg);
  154. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg);
  155. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg);
  156. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg);
  157. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg);
  158. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg);
  159. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg);
  160. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg);
  161. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg);
  162. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg);
  163. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg);
  164. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg);
  165. */
  166. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg);
  167. static void ctcmpc_chx_attnbusy(fsm_instance *, int, void *);
  168. static void ctcmpc_chx_resend(fsm_instance *, int, void *);
  169. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg);
  170. /**
  171. * Check return code of a preceeding ccw_device call, halt_IO etc...
  172. *
  173. * ch : The channel, the error belongs to.
  174. * Returns the error code (!= 0) to inspect.
  175. */
  176. void ctcm_ccw_check_rc(struct channel *ch, int rc, char *msg)
  177. {
  178. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  179. "%s(%s): %s: %04x\n",
  180. CTCM_FUNTAIL, ch->id, msg, rc);
  181. switch (rc) {
  182. case -EBUSY:
  183. pr_info("%s: The communication peer is busy\n",
  184. ch->id);
  185. fsm_event(ch->fsm, CTC_EVENT_IO_EBUSY, ch);
  186. break;
  187. case -ENODEV:
  188. pr_err("%s: The specified target device is not valid\n",
  189. ch->id);
  190. fsm_event(ch->fsm, CTC_EVENT_IO_ENODEV, ch);
  191. break;
  192. default:
  193. pr_err("An I/O operation resulted in error %04x\n",
  194. rc);
  195. fsm_event(ch->fsm, CTC_EVENT_IO_UNKNOWN, ch);
  196. }
  197. }
  198. void ctcm_purge_skb_queue(struct sk_buff_head *q)
  199. {
  200. struct sk_buff *skb;
  201. CTCM_DBF_TEXT(TRACE, CTC_DBF_DEBUG, __func__);
  202. while ((skb = skb_dequeue(q))) {
  203. atomic_dec(&skb->users);
  204. dev_kfree_skb_any(skb);
  205. }
  206. }
  207. /**
  208. * NOP action for statemachines
  209. */
  210. static void ctcm_action_nop(fsm_instance *fi, int event, void *arg)
  211. {
  212. }
  213. /*
  214. * Actions for channel - statemachines.
  215. */
  216. /**
  217. * Normal data has been send. Free the corresponding
  218. * skb (it's in io_queue), reset dev->tbusy and
  219. * revert to idle state.
  220. *
  221. * fi An instance of a channel statemachine.
  222. * event The event, just happened.
  223. * arg Generic pointer, casted from channel * upon call.
  224. */
  225. static void chx_txdone(fsm_instance *fi, int event, void *arg)
  226. {
  227. struct channel *ch = arg;
  228. struct net_device *dev = ch->netdev;
  229. struct ctcm_priv *priv = dev->ml_priv;
  230. struct sk_buff *skb;
  231. int first = 1;
  232. int i;
  233. unsigned long duration;
  234. struct timespec done_stamp = current_kernel_time(); /* xtime */
  235. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  236. duration =
  237. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  238. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  239. if (duration > ch->prof.tx_time)
  240. ch->prof.tx_time = duration;
  241. if (ch->irb->scsw.cmd.count != 0)
  242. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  243. "%s(%s): TX not complete, remaining %d bytes",
  244. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  245. fsm_deltimer(&ch->timer);
  246. while ((skb = skb_dequeue(&ch->io_queue))) {
  247. priv->stats.tx_packets++;
  248. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  249. if (first) {
  250. priv->stats.tx_bytes += 2;
  251. first = 0;
  252. }
  253. atomic_dec(&skb->users);
  254. dev_kfree_skb_irq(skb);
  255. }
  256. spin_lock(&ch->collect_lock);
  257. clear_normalized_cda(&ch->ccw[4]);
  258. if (ch->collect_len > 0) {
  259. int rc;
  260. if (ctcm_checkalloc_buffer(ch)) {
  261. spin_unlock(&ch->collect_lock);
  262. return;
  263. }
  264. ch->trans_skb->data = ch->trans_skb_data;
  265. skb_reset_tail_pointer(ch->trans_skb);
  266. ch->trans_skb->len = 0;
  267. if (ch->prof.maxmulti < (ch->collect_len + 2))
  268. ch->prof.maxmulti = ch->collect_len + 2;
  269. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  270. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  271. *((__u16 *)skb_put(ch->trans_skb, 2)) = ch->collect_len + 2;
  272. i = 0;
  273. while ((skb = skb_dequeue(&ch->collect_queue))) {
  274. skb_copy_from_linear_data(skb,
  275. skb_put(ch->trans_skb, skb->len), skb->len);
  276. priv->stats.tx_packets++;
  277. priv->stats.tx_bytes += skb->len - LL_HEADER_LENGTH;
  278. atomic_dec(&skb->users);
  279. dev_kfree_skb_irq(skb);
  280. i++;
  281. }
  282. ch->collect_len = 0;
  283. spin_unlock(&ch->collect_lock);
  284. ch->ccw[1].count = ch->trans_skb->len;
  285. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  286. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  287. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  288. (unsigned long)ch, 0xff, 0);
  289. ch->prof.doios_multi++;
  290. if (rc != 0) {
  291. priv->stats.tx_dropped += i;
  292. priv->stats.tx_errors += i;
  293. fsm_deltimer(&ch->timer);
  294. ctcm_ccw_check_rc(ch, rc, "chained TX");
  295. }
  296. } else {
  297. spin_unlock(&ch->collect_lock);
  298. fsm_newstate(fi, CTC_STATE_TXIDLE);
  299. }
  300. ctcm_clear_busy_do(dev);
  301. }
  302. /**
  303. * Initial data is sent.
  304. * Notify device statemachine that we are up and
  305. * running.
  306. *
  307. * fi An instance of a channel statemachine.
  308. * event The event, just happened.
  309. * arg Generic pointer, casted from channel * upon call.
  310. */
  311. void ctcm_chx_txidle(fsm_instance *fi, int event, void *arg)
  312. {
  313. struct channel *ch = arg;
  314. struct net_device *dev = ch->netdev;
  315. struct ctcm_priv *priv = dev->ml_priv;
  316. CTCM_PR_DEBUG("%s(%s): %s\n", __func__, ch->id, dev->name);
  317. fsm_deltimer(&ch->timer);
  318. fsm_newstate(fi, CTC_STATE_TXIDLE);
  319. fsm_event(priv->fsm, DEV_EVENT_TXUP, ch->netdev);
  320. }
  321. /**
  322. * Got normal data, check for sanity, queue it up, allocate new buffer
  323. * trigger bottom half, and initiate next read.
  324. *
  325. * fi An instance of a channel statemachine.
  326. * event The event, just happened.
  327. * arg Generic pointer, casted from channel * upon call.
  328. */
  329. static void chx_rx(fsm_instance *fi, int event, void *arg)
  330. {
  331. struct channel *ch = arg;
  332. struct net_device *dev = ch->netdev;
  333. struct ctcm_priv *priv = dev->ml_priv;
  334. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  335. struct sk_buff *skb = ch->trans_skb;
  336. __u16 block_len = *((__u16 *)skb->data);
  337. int check_len;
  338. int rc;
  339. fsm_deltimer(&ch->timer);
  340. if (len < 8) {
  341. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  342. "%s(%s): got packet with length %d < 8\n",
  343. CTCM_FUNTAIL, dev->name, len);
  344. priv->stats.rx_dropped++;
  345. priv->stats.rx_length_errors++;
  346. goto again;
  347. }
  348. if (len > ch->max_bufsize) {
  349. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  350. "%s(%s): got packet with length %d > %d\n",
  351. CTCM_FUNTAIL, dev->name, len, ch->max_bufsize);
  352. priv->stats.rx_dropped++;
  353. priv->stats.rx_length_errors++;
  354. goto again;
  355. }
  356. /*
  357. * VM TCP seems to have a bug sending 2 trailing bytes of garbage.
  358. */
  359. switch (ch->protocol) {
  360. case CTCM_PROTO_S390:
  361. case CTCM_PROTO_OS390:
  362. check_len = block_len + 2;
  363. break;
  364. default:
  365. check_len = block_len;
  366. break;
  367. }
  368. if ((len < block_len) || (len > check_len)) {
  369. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  370. "%s(%s): got block length %d != rx length %d\n",
  371. CTCM_FUNTAIL, dev->name, block_len, len);
  372. if (do_debug)
  373. ctcmpc_dump_skb(skb, 0);
  374. *((__u16 *)skb->data) = len;
  375. priv->stats.rx_dropped++;
  376. priv->stats.rx_length_errors++;
  377. goto again;
  378. }
  379. if (block_len > 2) {
  380. *((__u16 *)skb->data) = block_len - 2;
  381. ctcm_unpack_skb(ch, skb);
  382. }
  383. again:
  384. skb->data = ch->trans_skb_data;
  385. skb_reset_tail_pointer(skb);
  386. skb->len = 0;
  387. if (ctcm_checkalloc_buffer(ch))
  388. return;
  389. ch->ccw[1].count = ch->max_bufsize;
  390. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  391. (unsigned long)ch, 0xff, 0);
  392. if (rc != 0)
  393. ctcm_ccw_check_rc(ch, rc, "normal RX");
  394. }
  395. /**
  396. * Initialize connection by sending a __u16 of value 0.
  397. *
  398. * fi An instance of a channel statemachine.
  399. * event The event, just happened.
  400. * arg Generic pointer, casted from channel * upon call.
  401. */
  402. static void chx_firstio(fsm_instance *fi, int event, void *arg)
  403. {
  404. int rc;
  405. struct channel *ch = arg;
  406. int fsmstate = fsm_getstate(fi);
  407. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  408. "%s(%s) : %02x",
  409. CTCM_FUNTAIL, ch->id, fsmstate);
  410. ch->sense_rc = 0; /* reset unit check report control */
  411. if (fsmstate == CTC_STATE_TXIDLE)
  412. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  413. "%s(%s): remote side issued READ?, init.\n",
  414. CTCM_FUNTAIL, ch->id);
  415. fsm_deltimer(&ch->timer);
  416. if (ctcm_checkalloc_buffer(ch))
  417. return;
  418. if ((fsmstate == CTC_STATE_SETUPWAIT) &&
  419. (ch->protocol == CTCM_PROTO_OS390)) {
  420. /* OS/390 resp. z/OS */
  421. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  422. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  423. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC,
  424. CTC_EVENT_TIMER, ch);
  425. chx_rxidle(fi, event, arg);
  426. } else {
  427. struct net_device *dev = ch->netdev;
  428. struct ctcm_priv *priv = dev->ml_priv;
  429. fsm_newstate(fi, CTC_STATE_TXIDLE);
  430. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  431. }
  432. return;
  433. }
  434. /*
  435. * Don't setup a timer for receiving the initial RX frame
  436. * if in compatibility mode, since VM TCP delays the initial
  437. * frame until it has some data to send.
  438. */
  439. if ((CHANNEL_DIRECTION(ch->flags) == WRITE) ||
  440. (ch->protocol != CTCM_PROTO_S390))
  441. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  442. *((__u16 *)ch->trans_skb->data) = CTCM_INITIAL_BLOCKLEN;
  443. ch->ccw[1].count = 2; /* Transfer only length */
  444. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  445. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  446. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  447. (unsigned long)ch, 0xff, 0);
  448. if (rc != 0) {
  449. fsm_deltimer(&ch->timer);
  450. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  451. ctcm_ccw_check_rc(ch, rc, "init IO");
  452. }
  453. /*
  454. * If in compatibility mode since we don't setup a timer, we
  455. * also signal RX channel up immediately. This enables us
  456. * to send packets early which in turn usually triggers some
  457. * reply from VM TCP which brings up the RX channel to it's
  458. * final state.
  459. */
  460. if ((CHANNEL_DIRECTION(ch->flags) == READ) &&
  461. (ch->protocol == CTCM_PROTO_S390)) {
  462. struct net_device *dev = ch->netdev;
  463. struct ctcm_priv *priv = dev->ml_priv;
  464. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  465. }
  466. }
  467. /**
  468. * Got initial data, check it. If OK,
  469. * notify device statemachine that we are up and
  470. * running.
  471. *
  472. * fi An instance of a channel statemachine.
  473. * event The event, just happened.
  474. * arg Generic pointer, casted from channel * upon call.
  475. */
  476. static void chx_rxidle(fsm_instance *fi, int event, void *arg)
  477. {
  478. struct channel *ch = arg;
  479. struct net_device *dev = ch->netdev;
  480. struct ctcm_priv *priv = dev->ml_priv;
  481. __u16 buflen;
  482. int rc;
  483. fsm_deltimer(&ch->timer);
  484. buflen = *((__u16 *)ch->trans_skb->data);
  485. CTCM_PR_DEBUG("%s: %s: Initial RX count = %d\n",
  486. __func__, dev->name, buflen);
  487. if (buflen >= CTCM_INITIAL_BLOCKLEN) {
  488. if (ctcm_checkalloc_buffer(ch))
  489. return;
  490. ch->ccw[1].count = ch->max_bufsize;
  491. fsm_newstate(fi, CTC_STATE_RXIDLE);
  492. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  493. (unsigned long)ch, 0xff, 0);
  494. if (rc != 0) {
  495. fsm_newstate(fi, CTC_STATE_RXINIT);
  496. ctcm_ccw_check_rc(ch, rc, "initial RX");
  497. } else
  498. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  499. } else {
  500. CTCM_PR_DEBUG("%s: %s: Initial RX count %d not %d\n",
  501. __func__, dev->name,
  502. buflen, CTCM_INITIAL_BLOCKLEN);
  503. chx_firstio(fi, event, arg);
  504. }
  505. }
  506. /**
  507. * Set channel into extended mode.
  508. *
  509. * fi An instance of a channel statemachine.
  510. * event The event, just happened.
  511. * arg Generic pointer, casted from channel * upon call.
  512. */
  513. static void ctcm_chx_setmode(fsm_instance *fi, int event, void *arg)
  514. {
  515. struct channel *ch = arg;
  516. int rc;
  517. unsigned long saveflags = 0;
  518. int timeout = CTCM_TIME_5_SEC;
  519. fsm_deltimer(&ch->timer);
  520. if (IS_MPC(ch)) {
  521. timeout = 1500;
  522. CTCM_PR_DEBUG("enter %s: cp=%i ch=0x%p id=%s\n",
  523. __func__, smp_processor_id(), ch, ch->id);
  524. }
  525. fsm_addtimer(&ch->timer, timeout, CTC_EVENT_TIMER, ch);
  526. fsm_newstate(fi, CTC_STATE_SETUPWAIT);
  527. CTCM_CCW_DUMP((char *)&ch->ccw[6], sizeof(struct ccw1) * 2);
  528. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  529. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  530. /* Such conditional locking is undeterministic in
  531. * static view. => ignore sparse warnings here. */
  532. rc = ccw_device_start(ch->cdev, &ch->ccw[6],
  533. (unsigned long)ch, 0xff, 0);
  534. if (event == CTC_EVENT_TIMER) /* see above comments */
  535. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  536. if (rc != 0) {
  537. fsm_deltimer(&ch->timer);
  538. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  539. ctcm_ccw_check_rc(ch, rc, "set Mode");
  540. } else
  541. ch->retry = 0;
  542. }
  543. /**
  544. * Setup channel.
  545. *
  546. * fi An instance of a channel statemachine.
  547. * event The event, just happened.
  548. * arg Generic pointer, casted from channel * upon call.
  549. */
  550. static void ctcm_chx_start(fsm_instance *fi, int event, void *arg)
  551. {
  552. struct channel *ch = arg;
  553. unsigned long saveflags;
  554. int rc;
  555. CTCM_DBF_TEXT_(SETUP, CTC_DBF_INFO, "%s(%s): %s",
  556. CTCM_FUNTAIL, ch->id,
  557. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  558. if (ch->trans_skb != NULL) {
  559. clear_normalized_cda(&ch->ccw[1]);
  560. dev_kfree_skb(ch->trans_skb);
  561. ch->trans_skb = NULL;
  562. }
  563. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  564. ch->ccw[1].cmd_code = CCW_CMD_READ;
  565. ch->ccw[1].flags = CCW_FLAG_SLI;
  566. ch->ccw[1].count = 0;
  567. } else {
  568. ch->ccw[1].cmd_code = CCW_CMD_WRITE;
  569. ch->ccw[1].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  570. ch->ccw[1].count = 0;
  571. }
  572. if (ctcm_checkalloc_buffer(ch)) {
  573. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  574. "%s(%s): %s trans_skb alloc delayed "
  575. "until first transfer",
  576. CTCM_FUNTAIL, ch->id,
  577. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX");
  578. }
  579. ch->ccw[0].cmd_code = CCW_CMD_PREPARE;
  580. ch->ccw[0].flags = CCW_FLAG_SLI | CCW_FLAG_CC;
  581. ch->ccw[0].count = 0;
  582. ch->ccw[0].cda = 0;
  583. ch->ccw[2].cmd_code = CCW_CMD_NOOP; /* jointed CE + DE */
  584. ch->ccw[2].flags = CCW_FLAG_SLI;
  585. ch->ccw[2].count = 0;
  586. ch->ccw[2].cda = 0;
  587. memcpy(&ch->ccw[3], &ch->ccw[0], sizeof(struct ccw1) * 3);
  588. ch->ccw[4].cda = 0;
  589. ch->ccw[4].flags &= ~CCW_FLAG_IDA;
  590. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  591. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  592. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  593. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  594. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  595. if (rc != 0) {
  596. if (rc != -EBUSY)
  597. fsm_deltimer(&ch->timer);
  598. ctcm_ccw_check_rc(ch, rc, "initial HaltIO");
  599. }
  600. }
  601. /**
  602. * Shutdown a channel.
  603. *
  604. * fi An instance of a channel statemachine.
  605. * event The event, just happened.
  606. * arg Generic pointer, casted from channel * upon call.
  607. */
  608. static void ctcm_chx_haltio(fsm_instance *fi, int event, void *arg)
  609. {
  610. struct channel *ch = arg;
  611. unsigned long saveflags = 0;
  612. int rc;
  613. int oldstate;
  614. fsm_deltimer(&ch->timer);
  615. if (IS_MPC(ch))
  616. fsm_deltimer(&ch->sweep_timer);
  617. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  618. if (event == CTC_EVENT_STOP) /* only for STOP not yet locked */
  619. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  620. /* Such conditional locking is undeterministic in
  621. * static view. => ignore sparse warnings here. */
  622. oldstate = fsm_getstate(fi);
  623. fsm_newstate(fi, CTC_STATE_TERM);
  624. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  625. if (event == CTC_EVENT_STOP)
  626. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  627. /* see remark above about conditional locking */
  628. if (rc != 0 && rc != -EBUSY) {
  629. fsm_deltimer(&ch->timer);
  630. if (event != CTC_EVENT_STOP) {
  631. fsm_newstate(fi, oldstate);
  632. ctcm_ccw_check_rc(ch, rc, (char *)__func__);
  633. }
  634. }
  635. }
  636. /**
  637. * Cleanup helper for chx_fail and chx_stopped
  638. * cleanup channels queue and notify interface statemachine.
  639. *
  640. * fi An instance of a channel statemachine.
  641. * state The next state (depending on caller).
  642. * ch The channel to operate on.
  643. */
  644. static void ctcm_chx_cleanup(fsm_instance *fi, int state,
  645. struct channel *ch)
  646. {
  647. struct net_device *dev = ch->netdev;
  648. struct ctcm_priv *priv = dev->ml_priv;
  649. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  650. "%s(%s): %s[%d]\n",
  651. CTCM_FUNTAIL, dev->name, ch->id, state);
  652. fsm_deltimer(&ch->timer);
  653. if (IS_MPC(ch))
  654. fsm_deltimer(&ch->sweep_timer);
  655. fsm_newstate(fi, state);
  656. if (state == CTC_STATE_STOPPED && ch->trans_skb != NULL) {
  657. clear_normalized_cda(&ch->ccw[1]);
  658. dev_kfree_skb_any(ch->trans_skb);
  659. ch->trans_skb = NULL;
  660. }
  661. ch->th_seg = 0x00;
  662. ch->th_seq_num = 0x00;
  663. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  664. skb_queue_purge(&ch->io_queue);
  665. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  666. } else {
  667. ctcm_purge_skb_queue(&ch->io_queue);
  668. if (IS_MPC(ch))
  669. ctcm_purge_skb_queue(&ch->sweep_queue);
  670. spin_lock(&ch->collect_lock);
  671. ctcm_purge_skb_queue(&ch->collect_queue);
  672. ch->collect_len = 0;
  673. spin_unlock(&ch->collect_lock);
  674. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  675. }
  676. }
  677. /**
  678. * A channel has successfully been halted.
  679. * Cleanup it's queue and notify interface statemachine.
  680. *
  681. * fi An instance of a channel statemachine.
  682. * event The event, just happened.
  683. * arg Generic pointer, casted from channel * upon call.
  684. */
  685. static void ctcm_chx_stopped(fsm_instance *fi, int event, void *arg)
  686. {
  687. ctcm_chx_cleanup(fi, CTC_STATE_STOPPED, arg);
  688. }
  689. /**
  690. * A stop command from device statemachine arrived and we are in
  691. * not operational mode. Set state to stopped.
  692. *
  693. * fi An instance of a channel statemachine.
  694. * event The event, just happened.
  695. * arg Generic pointer, casted from channel * upon call.
  696. */
  697. static void ctcm_chx_stop(fsm_instance *fi, int event, void *arg)
  698. {
  699. fsm_newstate(fi, CTC_STATE_STOPPED);
  700. }
  701. /**
  702. * A machine check for no path, not operational status or gone device has
  703. * happened.
  704. * Cleanup queue and notify interface statemachine.
  705. *
  706. * fi An instance of a channel statemachine.
  707. * event The event, just happened.
  708. * arg Generic pointer, casted from channel * upon call.
  709. */
  710. static void ctcm_chx_fail(fsm_instance *fi, int event, void *arg)
  711. {
  712. ctcm_chx_cleanup(fi, CTC_STATE_NOTOP, arg);
  713. }
  714. /**
  715. * Handle error during setup of channel.
  716. *
  717. * fi An instance of a channel statemachine.
  718. * event The event, just happened.
  719. * arg Generic pointer, casted from channel * upon call.
  720. */
  721. static void ctcm_chx_setuperr(fsm_instance *fi, int event, void *arg)
  722. {
  723. struct channel *ch = arg;
  724. struct net_device *dev = ch->netdev;
  725. struct ctcm_priv *priv = dev->ml_priv;
  726. /*
  727. * Special case: Got UC_RCRESET on setmode.
  728. * This means that remote side isn't setup. In this case
  729. * simply retry after some 10 secs...
  730. */
  731. if ((fsm_getstate(fi) == CTC_STATE_SETUPWAIT) &&
  732. ((event == CTC_EVENT_UC_RCRESET) ||
  733. (event == CTC_EVENT_UC_RSRESET))) {
  734. fsm_newstate(fi, CTC_STATE_STARTRETRY);
  735. fsm_deltimer(&ch->timer);
  736. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  737. if (!IS_MPC(ch) && (CHANNEL_DIRECTION(ch->flags) == READ)) {
  738. int rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  739. if (rc != 0)
  740. ctcm_ccw_check_rc(ch, rc,
  741. "HaltIO in chx_setuperr");
  742. }
  743. return;
  744. }
  745. CTCM_DBF_TEXT_(ERROR, CTC_DBF_CRIT,
  746. "%s(%s) : %s error during %s channel setup state=%s\n",
  747. CTCM_FUNTAIL, dev->name, ctc_ch_event_names[event],
  748. (CHANNEL_DIRECTION(ch->flags) == READ) ? "RX" : "TX",
  749. fsm_getstate_str(fi));
  750. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  751. fsm_newstate(fi, CTC_STATE_RXERR);
  752. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  753. } else {
  754. fsm_newstate(fi, CTC_STATE_TXERR);
  755. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  756. }
  757. }
  758. /**
  759. * Restart a channel after an error.
  760. *
  761. * fi An instance of a channel statemachine.
  762. * event The event, just happened.
  763. * arg Generic pointer, casted from channel * upon call.
  764. */
  765. static void ctcm_chx_restart(fsm_instance *fi, int event, void *arg)
  766. {
  767. struct channel *ch = arg;
  768. struct net_device *dev = ch->netdev;
  769. unsigned long saveflags = 0;
  770. int oldstate;
  771. int rc;
  772. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  773. "%s: %s[%d] of %s\n",
  774. CTCM_FUNTAIL, ch->id, event, dev->name);
  775. fsm_deltimer(&ch->timer);
  776. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  777. oldstate = fsm_getstate(fi);
  778. fsm_newstate(fi, CTC_STATE_STARTWAIT);
  779. if (event == CTC_EVENT_TIMER) /* only for timer not yet locked */
  780. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  781. /* Such conditional locking is a known problem for
  782. * sparse because its undeterministic in static view.
  783. * Warnings should be ignored here. */
  784. rc = ccw_device_halt(ch->cdev, (unsigned long)ch);
  785. if (event == CTC_EVENT_TIMER)
  786. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev), saveflags);
  787. if (rc != 0) {
  788. if (rc != -EBUSY) {
  789. fsm_deltimer(&ch->timer);
  790. fsm_newstate(fi, oldstate);
  791. }
  792. ctcm_ccw_check_rc(ch, rc, "HaltIO in ctcm_chx_restart");
  793. }
  794. }
  795. /**
  796. * Handle error during RX initial handshake (exchange of
  797. * 0-length block header)
  798. *
  799. * fi An instance of a channel statemachine.
  800. * event The event, just happened.
  801. * arg Generic pointer, casted from channel * upon call.
  802. */
  803. static void ctcm_chx_rxiniterr(fsm_instance *fi, int event, void *arg)
  804. {
  805. struct channel *ch = arg;
  806. struct net_device *dev = ch->netdev;
  807. struct ctcm_priv *priv = dev->ml_priv;
  808. if (event == CTC_EVENT_TIMER) {
  809. if (!IS_MPCDEV(dev))
  810. /* TODO : check if MPC deletes timer somewhere */
  811. fsm_deltimer(&ch->timer);
  812. if (ch->retry++ < 3)
  813. ctcm_chx_restart(fi, event, arg);
  814. else {
  815. fsm_newstate(fi, CTC_STATE_RXERR);
  816. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  817. }
  818. } else {
  819. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  820. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  821. ctc_ch_event_names[event], fsm_getstate_str(fi));
  822. dev_warn(&dev->dev,
  823. "Initialization failed with RX/TX init handshake "
  824. "error %s\n", ctc_ch_event_names[event]);
  825. }
  826. }
  827. /**
  828. * Notify device statemachine if we gave up initialization
  829. * of RX channel.
  830. *
  831. * fi An instance of a channel statemachine.
  832. * event The event, just happened.
  833. * arg Generic pointer, casted from channel * upon call.
  834. */
  835. static void ctcm_chx_rxinitfail(fsm_instance *fi, int event, void *arg)
  836. {
  837. struct channel *ch = arg;
  838. struct net_device *dev = ch->netdev;
  839. struct ctcm_priv *priv = dev->ml_priv;
  840. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  841. "%s(%s): RX %s busy, init. fail",
  842. CTCM_FUNTAIL, dev->name, ch->id);
  843. fsm_newstate(fi, CTC_STATE_RXERR);
  844. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  845. }
  846. /**
  847. * Handle RX Unit check remote reset (remote disconnected)
  848. *
  849. * fi An instance of a channel statemachine.
  850. * event The event, just happened.
  851. * arg Generic pointer, casted from channel * upon call.
  852. */
  853. static void ctcm_chx_rxdisc(fsm_instance *fi, int event, void *arg)
  854. {
  855. struct channel *ch = arg;
  856. struct channel *ch2;
  857. struct net_device *dev = ch->netdev;
  858. struct ctcm_priv *priv = dev->ml_priv;
  859. CTCM_DBF_TEXT_(TRACE, CTC_DBF_NOTICE,
  860. "%s: %s: remote disconnect - re-init ...",
  861. CTCM_FUNTAIL, dev->name);
  862. fsm_deltimer(&ch->timer);
  863. /*
  864. * Notify device statemachine
  865. */
  866. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  867. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  868. fsm_newstate(fi, CTC_STATE_DTERM);
  869. ch2 = priv->channel[WRITE];
  870. fsm_newstate(ch2->fsm, CTC_STATE_DTERM);
  871. ccw_device_halt(ch->cdev, (unsigned long)ch);
  872. ccw_device_halt(ch2->cdev, (unsigned long)ch2);
  873. }
  874. /**
  875. * Handle error during TX channel initialization.
  876. *
  877. * fi An instance of a channel statemachine.
  878. * event The event, just happened.
  879. * arg Generic pointer, casted from channel * upon call.
  880. */
  881. static void ctcm_chx_txiniterr(fsm_instance *fi, int event, void *arg)
  882. {
  883. struct channel *ch = arg;
  884. struct net_device *dev = ch->netdev;
  885. struct ctcm_priv *priv = dev->ml_priv;
  886. if (event == CTC_EVENT_TIMER) {
  887. fsm_deltimer(&ch->timer);
  888. if (ch->retry++ < 3)
  889. ctcm_chx_restart(fi, event, arg);
  890. else {
  891. fsm_newstate(fi, CTC_STATE_TXERR);
  892. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  893. }
  894. } else {
  895. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  896. "%s(%s): %s in %s", CTCM_FUNTAIL, ch->id,
  897. ctc_ch_event_names[event], fsm_getstate_str(fi));
  898. dev_warn(&dev->dev,
  899. "Initialization failed with RX/TX init handshake "
  900. "error %s\n", ctc_ch_event_names[event]);
  901. }
  902. }
  903. /**
  904. * Handle TX timeout by retrying operation.
  905. *
  906. * fi An instance of a channel statemachine.
  907. * event The event, just happened.
  908. * arg Generic pointer, casted from channel * upon call.
  909. */
  910. static void ctcm_chx_txretry(fsm_instance *fi, int event, void *arg)
  911. {
  912. struct channel *ch = arg;
  913. struct net_device *dev = ch->netdev;
  914. struct ctcm_priv *priv = dev->ml_priv;
  915. struct sk_buff *skb;
  916. CTCM_PR_DEBUG("Enter: %s: cp=%i ch=0x%p id=%s\n",
  917. __func__, smp_processor_id(), ch, ch->id);
  918. fsm_deltimer(&ch->timer);
  919. if (ch->retry++ > 3) {
  920. struct mpc_group *gptr = priv->mpcg;
  921. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  922. "%s: %s: retries exceeded",
  923. CTCM_FUNTAIL, ch->id);
  924. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  925. /* call restart if not MPC or if MPC and mpcg fsm is ready.
  926. use gptr as mpc indicator */
  927. if (!(gptr && (fsm_getstate(gptr->fsm) != MPCG_STATE_READY)))
  928. ctcm_chx_restart(fi, event, arg);
  929. goto done;
  930. }
  931. CTCM_DBF_TEXT_(TRACE, CTC_DBF_DEBUG,
  932. "%s : %s: retry %d",
  933. CTCM_FUNTAIL, ch->id, ch->retry);
  934. skb = skb_peek(&ch->io_queue);
  935. if (skb) {
  936. int rc = 0;
  937. unsigned long saveflags = 0;
  938. clear_normalized_cda(&ch->ccw[4]);
  939. ch->ccw[4].count = skb->len;
  940. if (set_normalized_cda(&ch->ccw[4], skb->data)) {
  941. CTCM_DBF_TEXT_(TRACE, CTC_DBF_INFO,
  942. "%s: %s: IDAL alloc failed",
  943. CTCM_FUNTAIL, ch->id);
  944. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  945. ctcm_chx_restart(fi, event, arg);
  946. goto done;
  947. }
  948. fsm_addtimer(&ch->timer, 1000, CTC_EVENT_TIMER, ch);
  949. if (event == CTC_EVENT_TIMER) /* for TIMER not yet locked */
  950. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  951. /* Such conditional locking is a known problem for
  952. * sparse because its undeterministic in static view.
  953. * Warnings should be ignored here. */
  954. if (do_debug_ccw)
  955. ctcmpc_dumpit((char *)&ch->ccw[3],
  956. sizeof(struct ccw1) * 3);
  957. rc = ccw_device_start(ch->cdev, &ch->ccw[3],
  958. (unsigned long)ch, 0xff, 0);
  959. if (event == CTC_EVENT_TIMER)
  960. spin_unlock_irqrestore(get_ccwdev_lock(ch->cdev),
  961. saveflags);
  962. if (rc != 0) {
  963. fsm_deltimer(&ch->timer);
  964. ctcm_ccw_check_rc(ch, rc, "TX in chx_txretry");
  965. ctcm_purge_skb_queue(&ch->io_queue);
  966. }
  967. }
  968. done:
  969. return;
  970. }
  971. /**
  972. * Handle fatal errors during an I/O command.
  973. *
  974. * fi An instance of a channel statemachine.
  975. * event The event, just happened.
  976. * arg Generic pointer, casted from channel * upon call.
  977. */
  978. static void ctcm_chx_iofatal(fsm_instance *fi, int event, void *arg)
  979. {
  980. struct channel *ch = arg;
  981. struct net_device *dev = ch->netdev;
  982. struct ctcm_priv *priv = dev->ml_priv;
  983. int rd = CHANNEL_DIRECTION(ch->flags);
  984. fsm_deltimer(&ch->timer);
  985. CTCM_DBF_TEXT_(ERROR, CTC_DBF_ERROR,
  986. "%s: %s: %s unrecoverable channel error",
  987. CTCM_FUNTAIL, ch->id, rd == READ ? "RX" : "TX");
  988. if (IS_MPC(ch)) {
  989. priv->stats.tx_dropped++;
  990. priv->stats.tx_errors++;
  991. }
  992. if (rd == READ) {
  993. fsm_newstate(fi, CTC_STATE_RXERR);
  994. fsm_event(priv->fsm, DEV_EVENT_RXDOWN, dev);
  995. } else {
  996. fsm_newstate(fi, CTC_STATE_TXERR);
  997. fsm_event(priv->fsm, DEV_EVENT_TXDOWN, dev);
  998. }
  999. }
  1000. /*
  1001. * The ctcm statemachine for a channel.
  1002. */
  1003. const fsm_node ch_fsm[] = {
  1004. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1005. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1006. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1007. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1008. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1009. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1010. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1011. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1012. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1013. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1014. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1015. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1016. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1017. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1018. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1019. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1020. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1021. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1022. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1023. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1024. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1025. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, chx_firstio },
  1026. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1027. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1028. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1029. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1030. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1031. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1032. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1033. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, chx_rxidle },
  1034. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1035. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1036. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1037. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1038. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1039. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, chx_firstio },
  1040. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1041. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1042. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1043. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, chx_rx },
  1044. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1045. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1046. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1047. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, chx_rx },
  1048. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1049. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1050. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1051. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1052. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1053. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1054. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1055. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1056. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1057. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1058. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, chx_firstio },
  1059. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1060. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1061. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1062. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1063. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1064. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1065. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1066. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1067. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1068. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1069. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1070. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1071. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1072. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1073. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1074. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1075. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1076. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1077. { CTC_STATE_TX, CTC_EVENT_FINSTAT, chx_txdone },
  1078. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_txretry },
  1079. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_txretry },
  1080. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1081. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1082. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1083. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1084. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1085. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1086. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1087. };
  1088. int ch_fsm_len = ARRAY_SIZE(ch_fsm);
  1089. /*
  1090. * MPC actions for mpc channel statemachine
  1091. * handling of MPC protocol requires extra
  1092. * statemachine and actions which are prefixed ctcmpc_ .
  1093. * The ctc_ch_states and ctc_ch_state_names,
  1094. * ctc_ch_events and ctc_ch_event_names share the ctcm definitions
  1095. * which are expanded by some elements.
  1096. */
  1097. /*
  1098. * Actions for mpc channel statemachine.
  1099. */
  1100. /**
  1101. * Normal data has been send. Free the corresponding
  1102. * skb (it's in io_queue), reset dev->tbusy and
  1103. * revert to idle state.
  1104. *
  1105. * fi An instance of a channel statemachine.
  1106. * event The event, just happened.
  1107. * arg Generic pointer, casted from channel * upon call.
  1108. */
  1109. static void ctcmpc_chx_txdone(fsm_instance *fi, int event, void *arg)
  1110. {
  1111. struct channel *ch = arg;
  1112. struct net_device *dev = ch->netdev;
  1113. struct ctcm_priv *priv = dev->ml_priv;
  1114. struct mpc_group *grp = priv->mpcg;
  1115. struct sk_buff *skb;
  1116. int first = 1;
  1117. int i;
  1118. __u32 data_space;
  1119. unsigned long duration;
  1120. struct sk_buff *peekskb;
  1121. int rc;
  1122. struct th_header *header;
  1123. struct pdu *p_header;
  1124. struct timespec done_stamp = current_kernel_time(); /* xtime */
  1125. CTCM_PR_DEBUG("Enter %s: %s cp:%i\n",
  1126. __func__, dev->name, smp_processor_id());
  1127. duration =
  1128. (done_stamp.tv_sec - ch->prof.send_stamp.tv_sec) * 1000000 +
  1129. (done_stamp.tv_nsec - ch->prof.send_stamp.tv_nsec) / 1000;
  1130. if (duration > ch->prof.tx_time)
  1131. ch->prof.tx_time = duration;
  1132. if (ch->irb->scsw.cmd.count != 0)
  1133. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_DEBUG,
  1134. "%s(%s): TX not complete, remaining %d bytes",
  1135. CTCM_FUNTAIL, dev->name, ch->irb->scsw.cmd.count);
  1136. fsm_deltimer(&ch->timer);
  1137. while ((skb = skb_dequeue(&ch->io_queue))) {
  1138. priv->stats.tx_packets++;
  1139. priv->stats.tx_bytes += skb->len - TH_HEADER_LENGTH;
  1140. if (first) {
  1141. priv->stats.tx_bytes += 2;
  1142. first = 0;
  1143. }
  1144. atomic_dec(&skb->users);
  1145. dev_kfree_skb_irq(skb);
  1146. }
  1147. spin_lock(&ch->collect_lock);
  1148. clear_normalized_cda(&ch->ccw[4]);
  1149. if ((ch->collect_len <= 0) || (grp->in_sweep != 0)) {
  1150. spin_unlock(&ch->collect_lock);
  1151. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1152. goto done;
  1153. }
  1154. if (ctcm_checkalloc_buffer(ch)) {
  1155. spin_unlock(&ch->collect_lock);
  1156. goto done;
  1157. }
  1158. ch->trans_skb->data = ch->trans_skb_data;
  1159. skb_reset_tail_pointer(ch->trans_skb);
  1160. ch->trans_skb->len = 0;
  1161. if (ch->prof.maxmulti < (ch->collect_len + TH_HEADER_LENGTH))
  1162. ch->prof.maxmulti = ch->collect_len + TH_HEADER_LENGTH;
  1163. if (ch->prof.maxcqueue < skb_queue_len(&ch->collect_queue))
  1164. ch->prof.maxcqueue = skb_queue_len(&ch->collect_queue);
  1165. i = 0;
  1166. p_header = NULL;
  1167. data_space = grp->group_max_buflen - TH_HEADER_LENGTH;
  1168. CTCM_PR_DBGDATA("%s: building trans_skb from collect_q"
  1169. " data_space:%04x\n",
  1170. __func__, data_space);
  1171. while ((skb = skb_dequeue(&ch->collect_queue))) {
  1172. memcpy(skb_put(ch->trans_skb, skb->len), skb->data, skb->len);
  1173. p_header = (struct pdu *)
  1174. (skb_tail_pointer(ch->trans_skb) - skb->len);
  1175. p_header->pdu_flag = 0x00;
  1176. if (skb->protocol == ntohs(ETH_P_SNAP))
  1177. p_header->pdu_flag |= 0x60;
  1178. else
  1179. p_header->pdu_flag |= 0x20;
  1180. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1181. __func__, ch->trans_skb->len);
  1182. CTCM_PR_DBGDATA("%s: pdu header and data for up"
  1183. " to 32 bytes sent to vtam\n", __func__);
  1184. CTCM_D3_DUMP((char *)p_header, min_t(int, skb->len, 32));
  1185. ch->collect_len -= skb->len;
  1186. data_space -= skb->len;
  1187. priv->stats.tx_packets++;
  1188. priv->stats.tx_bytes += skb->len;
  1189. atomic_dec(&skb->users);
  1190. dev_kfree_skb_any(skb);
  1191. peekskb = skb_peek(&ch->collect_queue);
  1192. if (peekskb->len > data_space)
  1193. break;
  1194. i++;
  1195. }
  1196. /* p_header points to the last one we handled */
  1197. if (p_header)
  1198. p_header->pdu_flag |= PDU_LAST; /*Say it's the last one*/
  1199. header = kzalloc(TH_HEADER_LENGTH, gfp_type());
  1200. if (!header) {
  1201. spin_unlock(&ch->collect_lock);
  1202. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1203. goto done;
  1204. }
  1205. header->th_ch_flag = TH_HAS_PDU; /* Normal data */
  1206. ch->th_seq_num++;
  1207. header->th_seq_num = ch->th_seq_num;
  1208. CTCM_PR_DBGDATA("%s: ToVTAM_th_seq= %08x\n" ,
  1209. __func__, ch->th_seq_num);
  1210. memcpy(skb_push(ch->trans_skb, TH_HEADER_LENGTH), header,
  1211. TH_HEADER_LENGTH); /* put the TH on the packet */
  1212. kfree(header);
  1213. CTCM_PR_DBGDATA("%s: trans_skb len:%04x \n",
  1214. __func__, ch->trans_skb->len);
  1215. CTCM_PR_DBGDATA("%s: up-to-50 bytes of trans_skb "
  1216. "data to vtam from collect_q\n", __func__);
  1217. CTCM_D3_DUMP((char *)ch->trans_skb->data,
  1218. min_t(int, ch->trans_skb->len, 50));
  1219. spin_unlock(&ch->collect_lock);
  1220. clear_normalized_cda(&ch->ccw[1]);
  1221. if (set_normalized_cda(&ch->ccw[1], ch->trans_skb->data)) {
  1222. dev_kfree_skb_any(ch->trans_skb);
  1223. ch->trans_skb = NULL;
  1224. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_ERROR,
  1225. "%s: %s: IDAL alloc failed",
  1226. CTCM_FUNTAIL, ch->id);
  1227. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1228. return;
  1229. }
  1230. ch->ccw[1].count = ch->trans_skb->len;
  1231. fsm_addtimer(&ch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, ch);
  1232. ch->prof.send_stamp = current_kernel_time(); /* xtime */
  1233. if (do_debug_ccw)
  1234. ctcmpc_dumpit((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1235. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1236. (unsigned long)ch, 0xff, 0);
  1237. ch->prof.doios_multi++;
  1238. if (rc != 0) {
  1239. priv->stats.tx_dropped += i;
  1240. priv->stats.tx_errors += i;
  1241. fsm_deltimer(&ch->timer);
  1242. ctcm_ccw_check_rc(ch, rc, "chained TX");
  1243. }
  1244. done:
  1245. ctcm_clear_busy(dev);
  1246. return;
  1247. }
  1248. /**
  1249. * Got normal data, check for sanity, queue it up, allocate new buffer
  1250. * trigger bottom half, and initiate next read.
  1251. *
  1252. * fi An instance of a channel statemachine.
  1253. * event The event, just happened.
  1254. * arg Generic pointer, casted from channel * upon call.
  1255. */
  1256. static void ctcmpc_chx_rx(fsm_instance *fi, int event, void *arg)
  1257. {
  1258. struct channel *ch = arg;
  1259. struct net_device *dev = ch->netdev;
  1260. struct ctcm_priv *priv = dev->ml_priv;
  1261. struct mpc_group *grp = priv->mpcg;
  1262. struct sk_buff *skb = ch->trans_skb;
  1263. struct sk_buff *new_skb;
  1264. unsigned long saveflags = 0; /* avoids compiler warning */
  1265. int len = ch->max_bufsize - ch->irb->scsw.cmd.count;
  1266. CTCM_PR_DEBUG("%s: %s: cp:%i %s maxbuf : %04x, len: %04x\n",
  1267. CTCM_FUNTAIL, dev->name, smp_processor_id(),
  1268. ch->id, ch->max_bufsize, len);
  1269. fsm_deltimer(&ch->timer);
  1270. if (skb == NULL) {
  1271. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1272. "%s(%s): TRANS_SKB = NULL",
  1273. CTCM_FUNTAIL, dev->name);
  1274. goto again;
  1275. }
  1276. if (len < TH_HEADER_LENGTH) {
  1277. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1278. "%s(%s): packet length %d to short",
  1279. CTCM_FUNTAIL, dev->name, len);
  1280. priv->stats.rx_dropped++;
  1281. priv->stats.rx_length_errors++;
  1282. } else {
  1283. /* must have valid th header or game over */
  1284. __u32 block_len = len;
  1285. len = TH_HEADER_LENGTH + XID2_LENGTH + 4;
  1286. new_skb = __dev_alloc_skb(ch->max_bufsize, GFP_ATOMIC);
  1287. if (new_skb == NULL) {
  1288. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1289. "%s(%d): skb allocation failed",
  1290. CTCM_FUNTAIL, dev->name);
  1291. fsm_event(priv->mpcg->fsm, MPCG_EVENT_INOP, dev);
  1292. goto again;
  1293. }
  1294. switch (fsm_getstate(grp->fsm)) {
  1295. case MPCG_STATE_RESET:
  1296. case MPCG_STATE_INOP:
  1297. dev_kfree_skb_any(new_skb);
  1298. break;
  1299. case MPCG_STATE_FLOWC:
  1300. case MPCG_STATE_READY:
  1301. memcpy(skb_put(new_skb, block_len),
  1302. skb->data, block_len);
  1303. skb_queue_tail(&ch->io_queue, new_skb);
  1304. tasklet_schedule(&ch->ch_tasklet);
  1305. break;
  1306. default:
  1307. memcpy(skb_put(new_skb, len), skb->data, len);
  1308. skb_queue_tail(&ch->io_queue, new_skb);
  1309. tasklet_hi_schedule(&ch->ch_tasklet);
  1310. break;
  1311. }
  1312. }
  1313. again:
  1314. switch (fsm_getstate(grp->fsm)) {
  1315. int rc, dolock;
  1316. case MPCG_STATE_FLOWC:
  1317. case MPCG_STATE_READY:
  1318. if (ctcm_checkalloc_buffer(ch))
  1319. break;
  1320. ch->trans_skb->data = ch->trans_skb_data;
  1321. skb_reset_tail_pointer(ch->trans_skb);
  1322. ch->trans_skb->len = 0;
  1323. ch->ccw[1].count = ch->max_bufsize;
  1324. if (do_debug_ccw)
  1325. ctcmpc_dumpit((char *)&ch->ccw[0],
  1326. sizeof(struct ccw1) * 3);
  1327. dolock = !in_irq();
  1328. if (dolock)
  1329. spin_lock_irqsave(
  1330. get_ccwdev_lock(ch->cdev), saveflags);
  1331. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1332. (unsigned long)ch, 0xff, 0);
  1333. if (dolock) /* see remark about conditional locking */
  1334. spin_unlock_irqrestore(
  1335. get_ccwdev_lock(ch->cdev), saveflags);
  1336. if (rc != 0)
  1337. ctcm_ccw_check_rc(ch, rc, "normal RX");
  1338. default:
  1339. break;
  1340. }
  1341. CTCM_PR_DEBUG("Exit %s: %s, ch=0x%p, id=%s\n",
  1342. __func__, dev->name, ch, ch->id);
  1343. }
  1344. /**
  1345. * Initialize connection by sending a __u16 of value 0.
  1346. *
  1347. * fi An instance of a channel statemachine.
  1348. * event The event, just happened.
  1349. * arg Generic pointer, casted from channel * upon call.
  1350. */
  1351. static void ctcmpc_chx_firstio(fsm_instance *fi, int event, void *arg)
  1352. {
  1353. struct channel *ch = arg;
  1354. struct net_device *dev = ch->netdev;
  1355. struct ctcm_priv *priv = dev->ml_priv;
  1356. struct mpc_group *gptr = priv->mpcg;
  1357. CTCM_PR_DEBUG("Enter %s: id=%s, ch=0x%p\n",
  1358. __func__, ch->id, ch);
  1359. CTCM_DBF_TEXT_(MPC_TRACE, CTC_DBF_INFO,
  1360. "%s: %s: chstate:%i, grpstate:%i, prot:%i\n",
  1361. CTCM_FUNTAIL, ch->id, fsm_getstate(fi),
  1362. fsm_getstate(gptr->fsm), ch->protocol);
  1363. if (fsm_getstate(fi) == CTC_STATE_TXIDLE)
  1364. MPC_DBF_DEV_NAME(TRACE, dev, "remote side issued READ? ");
  1365. fsm_deltimer(&ch->timer);
  1366. if (ctcm_checkalloc_buffer(ch))
  1367. goto done;
  1368. switch (fsm_getstate(fi)) {
  1369. case CTC_STATE_STARTRETRY:
  1370. case CTC_STATE_SETUPWAIT:
  1371. if (CHANNEL_DIRECTION(ch->flags) == READ) {
  1372. ctcmpc_chx_rxidle(fi, event, arg);
  1373. } else {
  1374. fsm_newstate(fi, CTC_STATE_TXIDLE);
  1375. fsm_event(priv->fsm, DEV_EVENT_TXUP, dev);
  1376. }
  1377. goto done;
  1378. default:
  1379. break;
  1380. };
  1381. fsm_newstate(fi, (CHANNEL_DIRECTION(ch->flags) == READ)
  1382. ? CTC_STATE_RXINIT : CTC_STATE_TXINIT);
  1383. done:
  1384. CTCM_PR_DEBUG("Exit %s: id=%s, ch=0x%p\n",
  1385. __func__, ch->id, ch);
  1386. return;
  1387. }
  1388. /**
  1389. * Got initial data, check it. If OK,
  1390. * notify device statemachine that we are up and
  1391. * running.
  1392. *
  1393. * fi An instance of a channel statemachine.
  1394. * event The event, just happened.
  1395. * arg Generic pointer, casted from channel * upon call.
  1396. */
  1397. void ctcmpc_chx_rxidle(fsm_instance *fi, int event, void *arg)
  1398. {
  1399. struct channel *ch = arg;
  1400. struct net_device *dev = ch->netdev;
  1401. struct ctcm_priv *priv = dev->ml_priv;
  1402. struct mpc_group *grp = priv->mpcg;
  1403. int rc;
  1404. unsigned long saveflags = 0; /* avoids compiler warning */
  1405. fsm_deltimer(&ch->timer);
  1406. CTCM_PR_DEBUG("%s: %s: %s: cp:%i, chstate:%i grpstate:%i\n",
  1407. __func__, ch->id, dev->name, smp_processor_id(),
  1408. fsm_getstate(fi), fsm_getstate(grp->fsm));
  1409. fsm_newstate(fi, CTC_STATE_RXIDLE);
  1410. /* XID processing complete */
  1411. switch (fsm_getstate(grp->fsm)) {
  1412. case MPCG_STATE_FLOWC:
  1413. case MPCG_STATE_READY:
  1414. if (ctcm_checkalloc_buffer(ch))
  1415. goto done;
  1416. ch->trans_skb->data = ch->trans_skb_data;
  1417. skb_reset_tail_pointer(ch->trans_skb);
  1418. ch->trans_skb->len = 0;
  1419. ch->ccw[1].count = ch->max_bufsize;
  1420. CTCM_CCW_DUMP((char *)&ch->ccw[0], sizeof(struct ccw1) * 3);
  1421. if (event == CTC_EVENT_START)
  1422. /* see remark about conditional locking */
  1423. spin_lock_irqsave(get_ccwdev_lock(ch->cdev), saveflags);
  1424. rc = ccw_device_start(ch->cdev, &ch->ccw[0],
  1425. (unsigned long)ch, 0xff, 0);
  1426. if (event == CTC_EVENT_START)
  1427. spin_unlock_irqrestore(
  1428. get_ccwdev_lock(ch->cdev), saveflags);
  1429. if (rc != 0) {
  1430. fsm_newstate(fi, CTC_STATE_RXINIT);
  1431. ctcm_ccw_check_rc(ch, rc, "initial RX");
  1432. goto done;
  1433. }
  1434. break;
  1435. default:
  1436. break;
  1437. }
  1438. fsm_event(priv->fsm, DEV_EVENT_RXUP, dev);
  1439. done:
  1440. return;
  1441. }
  1442. /*
  1443. * ctcmpc channel FSM action
  1444. * called from several points in ctcmpc_ch_fsm
  1445. * ctcmpc only
  1446. */
  1447. static void ctcmpc_chx_attn(fsm_instance *fsm, int event, void *arg)
  1448. {
  1449. struct channel *ch = arg;
  1450. struct net_device *dev = ch->netdev;
  1451. struct ctcm_priv *priv = dev->ml_priv;
  1452. struct mpc_group *grp = priv->mpcg;
  1453. CTCM_PR_DEBUG("%s(%s): %s(ch=0x%p), cp=%i, ChStat:%s, GrpStat:%s\n",
  1454. __func__, dev->name, ch->id, ch, smp_processor_id(),
  1455. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1456. switch (fsm_getstate(grp->fsm)) {
  1457. case MPCG_STATE_XID2INITW:
  1458. /* ok..start yside xid exchanges */
  1459. if (!ch->in_mpcgroup)
  1460. break;
  1461. if (fsm_getstate(ch->fsm) == CH_XID0_PENDING) {
  1462. fsm_deltimer(&grp->timer);
  1463. fsm_addtimer(&grp->timer,
  1464. MPC_XID_TIMEOUT_VALUE,
  1465. MPCG_EVENT_TIMER, dev);
  1466. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1467. } else if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1468. /* attn rcvd before xid0 processed via bh */
  1469. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1470. break;
  1471. case MPCG_STATE_XID2INITX:
  1472. case MPCG_STATE_XID0IOWAIT:
  1473. case MPCG_STATE_XID0IOWAIX:
  1474. /* attn rcvd before xid0 processed on ch
  1475. but mid-xid0 processing for group */
  1476. if (fsm_getstate(ch->fsm) < CH_XID7_PENDING1)
  1477. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1478. break;
  1479. case MPCG_STATE_XID7INITW:
  1480. case MPCG_STATE_XID7INITX:
  1481. case MPCG_STATE_XID7INITI:
  1482. case MPCG_STATE_XID7INITZ:
  1483. switch (fsm_getstate(ch->fsm)) {
  1484. case CH_XID7_PENDING:
  1485. fsm_newstate(ch->fsm, CH_XID7_PENDING1);
  1486. break;
  1487. case CH_XID7_PENDING2:
  1488. fsm_newstate(ch->fsm, CH_XID7_PENDING3);
  1489. break;
  1490. }
  1491. fsm_event(grp->fsm, MPCG_EVENT_XID7DONE, dev);
  1492. break;
  1493. }
  1494. return;
  1495. }
  1496. /*
  1497. * ctcmpc channel FSM action
  1498. * called from one point in ctcmpc_ch_fsm
  1499. * ctcmpc only
  1500. */
  1501. static void ctcmpc_chx_attnbusy(fsm_instance *fsm, int event, void *arg)
  1502. {
  1503. struct channel *ch = arg;
  1504. struct net_device *dev = ch->netdev;
  1505. struct ctcm_priv *priv = dev->ml_priv;
  1506. struct mpc_group *grp = priv->mpcg;
  1507. CTCM_PR_DEBUG("%s(%s): %s\n ChState:%s GrpState:%s\n",
  1508. __func__, dev->name, ch->id,
  1509. fsm_getstate_str(ch->fsm), fsm_getstate_str(grp->fsm));
  1510. fsm_deltimer(&ch->timer);
  1511. switch (fsm_getstate(grp->fsm)) {
  1512. case MPCG_STATE_XID0IOWAIT:
  1513. /* vtam wants to be primary.start yside xid exchanges*/
  1514. /* only receive one attn-busy at a time so must not */
  1515. /* change state each time */
  1516. grp->changed_side = 1;
  1517. fsm_newstate(grp->fsm, MPCG_STATE_XID2INITW);
  1518. break;
  1519. case MPCG_STATE_XID2INITW:
  1520. if (grp->changed_side == 1) {
  1521. grp->changed_side = 2;
  1522. break;
  1523. }
  1524. /* process began via call to establish_conn */
  1525. /* so must report failure instead of reverting */
  1526. /* back to ready-for-xid passive state */
  1527. if (grp->estconnfunc)
  1528. goto done;
  1529. /* this attnbusy is NOT the result of xside xid */
  1530. /* collisions so yside must have been triggered */
  1531. /* by an ATTN that was not intended to start XID */
  1532. /* processing. Revert back to ready-for-xid and */
  1533. /* wait for ATTN interrupt to signal xid start */
  1534. if (fsm_getstate(ch->fsm) == CH_XID0_INPROGRESS) {
  1535. fsm_newstate(ch->fsm, CH_XID0_PENDING) ;
  1536. fsm_deltimer(&grp->timer);
  1537. goto done;
  1538. }
  1539. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1540. goto done;
  1541. case MPCG_STATE_XID2INITX:
  1542. /* XID2 was received before ATTN Busy for second
  1543. channel.Send yside xid for second channel.
  1544. */
  1545. if (grp->changed_side == 1) {
  1546. grp->changed_side = 2;
  1547. break;
  1548. }
  1549. case MPCG_STATE_XID0IOWAIX:
  1550. case MPCG_STATE_XID7INITW:
  1551. case MPCG_STATE_XID7INITX:
  1552. case MPCG_STATE_XID7INITI:
  1553. case MPCG_STATE_XID7INITZ:
  1554. default:
  1555. /* multiple attn-busy indicates too out-of-sync */
  1556. /* and they are certainly not being received as part */
  1557. /* of valid mpc group negotiations.. */
  1558. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1559. goto done;
  1560. }
  1561. if (grp->changed_side == 1) {
  1562. fsm_deltimer(&grp->timer);
  1563. fsm_addtimer(&grp->timer, MPC_XID_TIMEOUT_VALUE,
  1564. MPCG_EVENT_TIMER, dev);
  1565. }
  1566. if (ch->in_mpcgroup)
  1567. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1568. else
  1569. CTCM_DBF_TEXT_(MPC_ERROR, CTC_DBF_ERROR,
  1570. "%s(%s): channel %s not added to group",
  1571. CTCM_FUNTAIL, dev->name, ch->id);
  1572. done:
  1573. return;
  1574. }
  1575. /*
  1576. * ctcmpc channel FSM action
  1577. * called from several points in ctcmpc_ch_fsm
  1578. * ctcmpc only
  1579. */
  1580. static void ctcmpc_chx_resend(fsm_instance *fsm, int event, void *arg)
  1581. {
  1582. struct channel *ch = arg;
  1583. struct net_device *dev = ch->netdev;
  1584. struct ctcm_priv *priv = dev->ml_priv;
  1585. struct mpc_group *grp = priv->mpcg;
  1586. fsm_event(grp->fsm, MPCG_EVENT_XID0DO, ch);
  1587. return;
  1588. }
  1589. /*
  1590. * ctcmpc channel FSM action
  1591. * called from several points in ctcmpc_ch_fsm
  1592. * ctcmpc only
  1593. */
  1594. static void ctcmpc_chx_send_sweep(fsm_instance *fsm, int event, void *arg)
  1595. {
  1596. struct channel *ach = arg;
  1597. struct net_device *dev = ach->netdev;
  1598. struct ctcm_priv *priv = dev->ml_priv;
  1599. struct mpc_group *grp = priv->mpcg;
  1600. struct channel *wch = priv->channel[WRITE];
  1601. struct channel *rch = priv->channel[READ];
  1602. struct sk_buff *skb;
  1603. struct th_sweep *header;
  1604. int rc = 0;
  1605. unsigned long saveflags = 0;
  1606. CTCM_PR_DEBUG("ctcmpc enter: %s(): cp=%i ch=0x%p id=%s\n",
  1607. __func__, smp_processor_id(), ach, ach->id);
  1608. if (grp->in_sweep == 0)
  1609. goto done;
  1610. CTCM_PR_DBGDATA("%s: 1: ToVTAM_th_seq= %08x\n" ,
  1611. __func__, wch->th_seq_num);
  1612. CTCM_PR_DBGDATA("%s: 1: FromVTAM_th_seq= %08x\n" ,
  1613. __func__, rch->th_seq_num);
  1614. if (fsm_getstate(wch->fsm) != CTC_STATE_TXIDLE) {
  1615. /* give the previous IO time to complete */
  1616. fsm_addtimer(&wch->sweep_timer,
  1617. 200, CTC_EVENT_RSWEEP_TIMER, wch);
  1618. goto done;
  1619. }
  1620. skb = skb_dequeue(&wch->sweep_queue);
  1621. if (!skb)
  1622. goto done;
  1623. if (set_normalized_cda(&wch->ccw[4], skb->data)) {
  1624. grp->in_sweep = 0;
  1625. ctcm_clear_busy_do(dev);
  1626. dev_kfree_skb_any(skb);
  1627. fsm_event(grp->fsm, MPCG_EVENT_INOP, dev);
  1628. goto done;
  1629. } else {
  1630. atomic_inc(&skb->users);
  1631. skb_queue_tail(&wch->io_queue, skb);
  1632. }
  1633. /* send out the sweep */
  1634. wch->ccw[4].count = skb->len;
  1635. header = (struct th_sweep *)skb->data;
  1636. switch (header->th.th_ch_flag) {
  1637. case TH_SWEEP_REQ:
  1638. grp->sweep_req_pend_num--;
  1639. break;
  1640. case TH_SWEEP_RESP:
  1641. grp->sweep_rsp_pend_num--;
  1642. break;
  1643. }
  1644. header->sw.th_last_seq = wch->th_seq_num;
  1645. CTCM_CCW_DUMP((char *)&wch->ccw[3], sizeof(struct ccw1) * 3);
  1646. CTCM_PR_DBGDATA("%s: sweep packet\n", __func__);
  1647. CTCM_D3_DUMP((char *)header, TH_SWEEP_LENGTH);
  1648. fsm_addtimer(&wch->timer, CTCM_TIME_5_SEC, CTC_EVENT_TIMER, wch);
  1649. fsm_newstate(wch->fsm, CTC_STATE_TX);
  1650. spin_lock_irqsave(get_ccwdev_lock(wch->cdev), saveflags);
  1651. wch->prof.send_stamp = current_kernel_time(); /* xtime */
  1652. rc = ccw_device_start(wch->cdev, &wch->ccw[3],
  1653. (unsigned long) wch, 0xff, 0);
  1654. spin_unlock_irqrestore(get_ccwdev_lock(wch->cdev), saveflags);
  1655. if ((grp->sweep_req_pend_num == 0) &&
  1656. (grp->sweep_rsp_pend_num == 0)) {
  1657. grp->in_sweep = 0;
  1658. rch->th_seq_num = 0x00;
  1659. wch->th_seq_num = 0x00;
  1660. ctcm_clear_busy_do(dev);
  1661. }
  1662. CTCM_PR_DBGDATA("%s: To-/From-VTAM_th_seq = %08x/%08x\n" ,
  1663. __func__, wch->th_seq_num, rch->th_seq_num);
  1664. if (rc != 0)
  1665. ctcm_ccw_check_rc(wch, rc, "send sweep");
  1666. done:
  1667. return;
  1668. }
  1669. /*
  1670. * The ctcmpc statemachine for a channel.
  1671. */
  1672. const fsm_node ctcmpc_ch_fsm[] = {
  1673. { CTC_STATE_STOPPED, CTC_EVENT_STOP, ctcm_action_nop },
  1674. { CTC_STATE_STOPPED, CTC_EVENT_START, ctcm_chx_start },
  1675. { CTC_STATE_STOPPED, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1676. { CTC_STATE_STOPPED, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1677. { CTC_STATE_STOPPED, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1678. { CTC_STATE_NOTOP, CTC_EVENT_STOP, ctcm_chx_stop },
  1679. { CTC_STATE_NOTOP, CTC_EVENT_START, ctcm_action_nop },
  1680. { CTC_STATE_NOTOP, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1681. { CTC_STATE_NOTOP, CTC_EVENT_MC_FAIL, ctcm_action_nop },
  1682. { CTC_STATE_NOTOP, CTC_EVENT_MC_GOOD, ctcm_chx_start },
  1683. { CTC_STATE_NOTOP, CTC_EVENT_UC_RCRESET, ctcm_chx_stop },
  1684. { CTC_STATE_NOTOP, CTC_EVENT_UC_RSRESET, ctcm_chx_stop },
  1685. { CTC_STATE_NOTOP, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1686. { CTC_STATE_STARTWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1687. { CTC_STATE_STARTWAIT, CTC_EVENT_START, ctcm_action_nop },
  1688. { CTC_STATE_STARTWAIT, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1689. { CTC_STATE_STARTWAIT, CTC_EVENT_TIMER, ctcm_chx_setuperr },
  1690. { CTC_STATE_STARTWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1691. { CTC_STATE_STARTWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1692. { CTC_STATE_STARTRETRY, CTC_EVENT_STOP, ctcm_chx_haltio },
  1693. { CTC_STATE_STARTRETRY, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1694. { CTC_STATE_STARTRETRY, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1695. { CTC_STATE_STARTRETRY, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1696. { CTC_STATE_STARTRETRY, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1697. { CTC_STATE_SETUPWAIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1698. { CTC_STATE_SETUPWAIT, CTC_EVENT_START, ctcm_action_nop },
  1699. { CTC_STATE_SETUPWAIT, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1700. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1701. { CTC_STATE_SETUPWAIT, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1702. { CTC_STATE_SETUPWAIT, CTC_EVENT_TIMER, ctcm_chx_setmode },
  1703. { CTC_STATE_SETUPWAIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1704. { CTC_STATE_SETUPWAIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1705. { CTC_STATE_RXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1706. { CTC_STATE_RXINIT, CTC_EVENT_START, ctcm_action_nop },
  1707. { CTC_STATE_RXINIT, CTC_EVENT_FINSTAT, ctcmpc_chx_rxidle },
  1708. { CTC_STATE_RXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_rxiniterr },
  1709. { CTC_STATE_RXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_rxiniterr },
  1710. { CTC_STATE_RXINIT, CTC_EVENT_TIMER, ctcm_chx_rxiniterr },
  1711. { CTC_STATE_RXINIT, CTC_EVENT_ATTNBUSY, ctcm_chx_rxinitfail },
  1712. { CTC_STATE_RXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1713. { CTC_STATE_RXINIT, CTC_EVENT_UC_ZERO, ctcmpc_chx_firstio },
  1714. { CTC_STATE_RXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1715. { CH_XID0_PENDING, CTC_EVENT_FINSTAT, ctcm_action_nop },
  1716. { CH_XID0_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1717. { CH_XID0_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1718. { CH_XID0_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1719. { CH_XID0_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1720. { CH_XID0_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1721. { CH_XID0_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1722. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1723. { CH_XID0_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1724. { CH_XID0_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1725. { CH_XID0_INPROGRESS, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1726. { CH_XID0_INPROGRESS, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1727. { CH_XID0_INPROGRESS, CTC_EVENT_STOP, ctcm_chx_haltio },
  1728. { CH_XID0_INPROGRESS, CTC_EVENT_START, ctcm_action_nop },
  1729. { CH_XID0_INPROGRESS, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1730. { CH_XID0_INPROGRESS, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1731. { CH_XID0_INPROGRESS, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1732. { CH_XID0_INPROGRESS, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1733. { CH_XID0_INPROGRESS, CTC_EVENT_ATTNBUSY, ctcmpc_chx_attnbusy },
  1734. { CH_XID0_INPROGRESS, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1735. { CH_XID0_INPROGRESS, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1736. { CH_XID7_PENDING, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1737. { CH_XID7_PENDING, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1738. { CH_XID7_PENDING, CTC_EVENT_STOP, ctcm_chx_haltio },
  1739. { CH_XID7_PENDING, CTC_EVENT_START, ctcm_action_nop },
  1740. { CH_XID7_PENDING, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1741. { CH_XID7_PENDING, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1742. { CH_XID7_PENDING, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1743. { CH_XID7_PENDING, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1744. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1745. { CH_XID7_PENDING, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1746. { CH_XID7_PENDING, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1747. { CH_XID7_PENDING, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1748. { CH_XID7_PENDING, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1749. { CH_XID7_PENDING1, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1750. { CH_XID7_PENDING1, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1751. { CH_XID7_PENDING1, CTC_EVENT_STOP, ctcm_chx_haltio },
  1752. { CH_XID7_PENDING1, CTC_EVENT_START, ctcm_action_nop },
  1753. { CH_XID7_PENDING1, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1754. { CH_XID7_PENDING1, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1755. { CH_XID7_PENDING1, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1756. { CH_XID7_PENDING1, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1757. { CH_XID7_PENDING1, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1758. { CH_XID7_PENDING1, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1759. { CH_XID7_PENDING1, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1760. { CH_XID7_PENDING1, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1761. { CH_XID7_PENDING2, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1762. { CH_XID7_PENDING2, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1763. { CH_XID7_PENDING2, CTC_EVENT_STOP, ctcm_chx_haltio },
  1764. { CH_XID7_PENDING2, CTC_EVENT_START, ctcm_action_nop },
  1765. { CH_XID7_PENDING2, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1766. { CH_XID7_PENDING2, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1767. { CH_XID7_PENDING2, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1768. { CH_XID7_PENDING2, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1769. { CH_XID7_PENDING2, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1770. { CH_XID7_PENDING2, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1771. { CH_XID7_PENDING2, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1772. { CH_XID7_PENDING2, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1773. { CH_XID7_PENDING3, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1774. { CH_XID7_PENDING3, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1775. { CH_XID7_PENDING3, CTC_EVENT_STOP, ctcm_chx_haltio },
  1776. { CH_XID7_PENDING3, CTC_EVENT_START, ctcm_action_nop },
  1777. { CH_XID7_PENDING3, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1778. { CH_XID7_PENDING3, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1779. { CH_XID7_PENDING3, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1780. { CH_XID7_PENDING3, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1781. { CH_XID7_PENDING3, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1782. { CH_XID7_PENDING3, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1783. { CH_XID7_PENDING3, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1784. { CH_XID7_PENDING3, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1785. { CH_XID7_PENDING4, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1786. { CH_XID7_PENDING4, CTC_EVENT_ATTN, ctcmpc_chx_attn },
  1787. { CH_XID7_PENDING4, CTC_EVENT_STOP, ctcm_chx_haltio },
  1788. { CH_XID7_PENDING4, CTC_EVENT_START, ctcm_action_nop },
  1789. { CH_XID7_PENDING4, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1790. { CH_XID7_PENDING4, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1791. { CH_XID7_PENDING4, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1792. { CH_XID7_PENDING4, CTC_EVENT_UC_RCRESET, ctcm_chx_setuperr },
  1793. { CH_XID7_PENDING4, CTC_EVENT_UC_RSRESET, ctcm_chx_setuperr },
  1794. { CH_XID7_PENDING4, CTC_EVENT_ATTNBUSY, ctcm_chx_iofatal },
  1795. { CH_XID7_PENDING4, CTC_EVENT_TIMER, ctcmpc_chx_resend },
  1796. { CH_XID7_PENDING4, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1797. { CTC_STATE_RXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1798. { CTC_STATE_RXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1799. { CTC_STATE_RXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_rx },
  1800. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_rxdisc },
  1801. { CTC_STATE_RXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1802. { CTC_STATE_RXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1803. { CTC_STATE_RXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1804. { CTC_STATE_RXIDLE, CTC_EVENT_UC_ZERO, ctcmpc_chx_rx },
  1805. { CTC_STATE_TXINIT, CTC_EVENT_STOP, ctcm_chx_haltio },
  1806. { CTC_STATE_TXINIT, CTC_EVENT_START, ctcm_action_nop },
  1807. { CTC_STATE_TXINIT, CTC_EVENT_FINSTAT, ctcm_chx_txidle },
  1808. { CTC_STATE_TXINIT, CTC_EVENT_UC_RCRESET, ctcm_chx_txiniterr },
  1809. { CTC_STATE_TXINIT, CTC_EVENT_UC_RSRESET, ctcm_chx_txiniterr },
  1810. { CTC_STATE_TXINIT, CTC_EVENT_TIMER, ctcm_chx_txiniterr },
  1811. { CTC_STATE_TXINIT, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1812. { CTC_STATE_TXINIT, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1813. { CTC_STATE_TXINIT, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1814. { CTC_STATE_TXIDLE, CTC_EVENT_STOP, ctcm_chx_haltio },
  1815. { CTC_STATE_TXIDLE, CTC_EVENT_START, ctcm_action_nop },
  1816. { CTC_STATE_TXIDLE, CTC_EVENT_FINSTAT, ctcmpc_chx_firstio },
  1817. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1818. { CTC_STATE_TXIDLE, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1819. { CTC_STATE_TXIDLE, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1820. { CTC_STATE_TXIDLE, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1821. { CTC_STATE_TXIDLE, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1822. { CTC_STATE_TERM, CTC_EVENT_STOP, ctcm_action_nop },
  1823. { CTC_STATE_TERM, CTC_EVENT_START, ctcm_chx_restart },
  1824. { CTC_STATE_TERM, CTC_EVENT_FINSTAT, ctcm_chx_stopped },
  1825. { CTC_STATE_TERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1826. { CTC_STATE_TERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1827. { CTC_STATE_TERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1828. { CTC_STATE_TERM, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1829. { CTC_STATE_TERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1830. { CTC_STATE_DTERM, CTC_EVENT_STOP, ctcm_chx_haltio },
  1831. { CTC_STATE_DTERM, CTC_EVENT_START, ctcm_chx_restart },
  1832. { CTC_STATE_DTERM, CTC_EVENT_FINSTAT, ctcm_chx_setmode },
  1833. { CTC_STATE_DTERM, CTC_EVENT_UC_RCRESET, ctcm_action_nop },
  1834. { CTC_STATE_DTERM, CTC_EVENT_UC_RSRESET, ctcm_action_nop },
  1835. { CTC_STATE_DTERM, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1836. { CTC_STATE_DTERM, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1837. { CTC_STATE_TX, CTC_EVENT_STOP, ctcm_chx_haltio },
  1838. { CTC_STATE_TX, CTC_EVENT_START, ctcm_action_nop },
  1839. { CTC_STATE_TX, CTC_EVENT_FINSTAT, ctcmpc_chx_txdone },
  1840. { CTC_STATE_TX, CTC_EVENT_UC_RCRESET, ctcm_chx_fail },
  1841. { CTC_STATE_TX, CTC_EVENT_UC_RSRESET, ctcm_chx_fail },
  1842. { CTC_STATE_TX, CTC_EVENT_TIMER, ctcm_chx_txretry },
  1843. { CTC_STATE_TX, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1844. { CTC_STATE_TX, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1845. { CTC_STATE_TX, CTC_EVENT_RSWEEP_TIMER, ctcmpc_chx_send_sweep },
  1846. { CTC_STATE_TX, CTC_EVENT_IO_EBUSY, ctcm_chx_fail },
  1847. { CTC_STATE_RXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1848. { CTC_STATE_TXERR, CTC_EVENT_STOP, ctcm_chx_haltio },
  1849. { CTC_STATE_TXERR, CTC_EVENT_IO_ENODEV, ctcm_chx_iofatal },
  1850. { CTC_STATE_TXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1851. { CTC_STATE_RXERR, CTC_EVENT_MC_FAIL, ctcm_chx_fail },
  1852. };
  1853. int mpc_ch_fsm_len = ARRAY_SIZE(ctcmpc_ch_fsm);
  1854. /*
  1855. * Actions for interface - statemachine.
  1856. */
  1857. /**
  1858. * Startup channels by sending CTC_EVENT_START to each channel.
  1859. *
  1860. * fi An instance of an interface statemachine.
  1861. * event The event, just happened.
  1862. * arg Generic pointer, casted from struct net_device * upon call.
  1863. */
  1864. static void dev_action_start(fsm_instance *fi, int event, void *arg)
  1865. {
  1866. struct net_device *dev = arg;
  1867. struct ctcm_priv *priv = dev->ml_priv;
  1868. int direction;
  1869. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1870. fsm_deltimer(&priv->restart_timer);
  1871. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  1872. if (IS_MPC(priv))
  1873. priv->mpcg->channels_terminating = 0;
  1874. for (direction = READ; direction <= WRITE; direction++) {
  1875. struct channel *ch = priv->channel[direction];
  1876. fsm_event(ch->fsm, CTC_EVENT_START, ch);
  1877. }
  1878. }
  1879. /**
  1880. * Shutdown channels by sending CTC_EVENT_STOP to each channel.
  1881. *
  1882. * fi An instance of an interface statemachine.
  1883. * event The event, just happened.
  1884. * arg Generic pointer, casted from struct net_device * upon call.
  1885. */
  1886. static void dev_action_stop(fsm_instance *fi, int event, void *arg)
  1887. {
  1888. int direction;
  1889. struct net_device *dev = arg;
  1890. struct ctcm_priv *priv = dev->ml_priv;
  1891. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1892. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1893. for (direction = READ; direction <= WRITE; direction++) {
  1894. struct channel *ch = priv->channel[direction];
  1895. fsm_event(ch->fsm, CTC_EVENT_STOP, ch);
  1896. ch->th_seq_num = 0x00;
  1897. CTCM_PR_DEBUG("%s: CH_th_seq= %08x\n",
  1898. __func__, ch->th_seq_num);
  1899. }
  1900. if (IS_MPC(priv))
  1901. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1902. }
  1903. static void dev_action_restart(fsm_instance *fi, int event, void *arg)
  1904. {
  1905. int restart_timer;
  1906. struct net_device *dev = arg;
  1907. struct ctcm_priv *priv = dev->ml_priv;
  1908. CTCMY_DBF_DEV_NAME(TRACE, dev, "");
  1909. if (IS_MPC(priv)) {
  1910. restart_timer = CTCM_TIME_1_SEC;
  1911. } else {
  1912. restart_timer = CTCM_TIME_5_SEC;
  1913. }
  1914. dev_info(&dev->dev, "Restarting device\n");
  1915. dev_action_stop(fi, event, arg);
  1916. fsm_event(priv->fsm, DEV_EVENT_STOP, dev);
  1917. if (IS_MPC(priv))
  1918. fsm_newstate(priv->mpcg->fsm, MPCG_STATE_RESET);
  1919. /* going back into start sequence too quickly can */
  1920. /* result in the other side becoming unreachable due */
  1921. /* to sense reported when IO is aborted */
  1922. fsm_addtimer(&priv->restart_timer, restart_timer,
  1923. DEV_EVENT_START, dev);
  1924. }
  1925. /**
  1926. * Called from channel statemachine
  1927. * when a channel is up and running.
  1928. *
  1929. * fi An instance of an interface statemachine.
  1930. * event The event, just happened.
  1931. * arg Generic pointer, casted from struct net_device * upon call.
  1932. */
  1933. static void dev_action_chup(fsm_instance *fi, int event, void *arg)
  1934. {
  1935. struct net_device *dev = arg;
  1936. struct ctcm_priv *priv = dev->ml_priv;
  1937. int dev_stat = fsm_getstate(fi);
  1938. CTCM_DBF_TEXT_(SETUP, CTC_DBF_NOTICE,
  1939. "%s(%s): priv = %p [%d,%d]\n ", CTCM_FUNTAIL,
  1940. dev->name, dev->ml_priv, dev_stat, event);
  1941. switch (fsm_getstate(fi)) {
  1942. case DEV_STATE_STARTWAIT_RXTX:
  1943. if (event == DEV_EVENT_RXUP)
  1944. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1945. else
  1946. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  1947. break;
  1948. case DEV_STATE_STARTWAIT_RX:
  1949. if (event == DEV_EVENT_RXUP) {
  1950. fsm_newstate(fi, DEV_STATE_RUNNING);
  1951. dev_info(&dev->dev,
  1952. "Connected with remote side\n");
  1953. ctcm_clear_busy(dev);
  1954. }
  1955. break;
  1956. case DEV_STATE_STARTWAIT_TX:
  1957. if (event == DEV_EVENT_TXUP) {
  1958. fsm_newstate(fi, DEV_STATE_RUNNING);
  1959. dev_info(&dev->dev,
  1960. "Connected with remote side\n");
  1961. ctcm_clear_busy(dev);
  1962. }
  1963. break;
  1964. case DEV_STATE_STOPWAIT_TX:
  1965. if (event == DEV_EVENT_RXUP)
  1966. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1967. break;
  1968. case DEV_STATE_STOPWAIT_RX:
  1969. if (event == DEV_EVENT_TXUP)
  1970. fsm_newstate(fi, DEV_STATE_STOPWAIT_RXTX);
  1971. break;
  1972. }
  1973. if (IS_MPC(priv)) {
  1974. if (event == DEV_EVENT_RXUP)
  1975. mpc_channel_action(priv->channel[READ],
  1976. READ, MPC_CHANNEL_ADD);
  1977. else
  1978. mpc_channel_action(priv->channel[WRITE],
  1979. WRITE, MPC_CHANNEL_ADD);
  1980. }
  1981. }
  1982. /**
  1983. * Called from device statemachine
  1984. * when a channel has been shutdown.
  1985. *
  1986. * fi An instance of an interface statemachine.
  1987. * event The event, just happened.
  1988. * arg Generic pointer, casted from struct net_device * upon call.
  1989. */
  1990. static void dev_action_chdown(fsm_instance *fi, int event, void *arg)
  1991. {
  1992. struct net_device *dev = arg;
  1993. struct ctcm_priv *priv = dev->ml_priv;
  1994. CTCMY_DBF_DEV_NAME(SETUP, dev, "");
  1995. switch (fsm_getstate(fi)) {
  1996. case DEV_STATE_RUNNING:
  1997. if (event == DEV_EVENT_TXDOWN)
  1998. fsm_newstate(fi, DEV_STATE_STARTWAIT_TX);
  1999. else
  2000. fsm_newstate(fi, DEV_STATE_STARTWAIT_RX);
  2001. break;
  2002. case DEV_STATE_STARTWAIT_RX:
  2003. if (event == DEV_EVENT_TXDOWN)
  2004. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2005. break;
  2006. case DEV_STATE_STARTWAIT_TX:
  2007. if (event == DEV_EVENT_RXDOWN)
  2008. fsm_newstate(fi, DEV_STATE_STARTWAIT_RXTX);
  2009. break;
  2010. case DEV_STATE_STOPWAIT_RXTX:
  2011. if (event == DEV_EVENT_TXDOWN)
  2012. fsm_newstate(fi, DEV_STATE_STOPWAIT_RX);
  2013. else
  2014. fsm_newstate(fi, DEV_STATE_STOPWAIT_TX);
  2015. break;
  2016. case DEV_STATE_STOPWAIT_RX:
  2017. if (event == DEV_EVENT_RXDOWN)
  2018. fsm_newstate(fi, DEV_STATE_STOPPED);
  2019. break;
  2020. case DEV_STATE_STOPWAIT_TX:
  2021. if (event == DEV_EVENT_TXDOWN)
  2022. fsm_newstate(fi, DEV_STATE_STOPPED);
  2023. break;
  2024. }
  2025. if (IS_MPC(priv)) {
  2026. if (event == DEV_EVENT_RXDOWN)
  2027. mpc_channel_action(priv->channel[READ],
  2028. READ, MPC_CHANNEL_REMOVE);
  2029. else
  2030. mpc_channel_action(priv->channel[WRITE],
  2031. WRITE, MPC_CHANNEL_REMOVE);
  2032. }
  2033. }
  2034. const fsm_node dev_fsm[] = {
  2035. { DEV_STATE_STOPPED, DEV_EVENT_START, dev_action_start },
  2036. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_START, dev_action_start },
  2037. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2038. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2039. { DEV_STATE_STOPWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2040. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_START, dev_action_start },
  2041. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2042. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2043. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2044. { DEV_STATE_STOPWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2045. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_START, dev_action_start },
  2046. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2047. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2048. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2049. { DEV_STATE_STOPWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2050. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_STOP, dev_action_stop },
  2051. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXUP, dev_action_chup },
  2052. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXUP, dev_action_chup },
  2053. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2054. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2055. { DEV_STATE_STARTWAIT_RXTX, DEV_EVENT_RESTART, dev_action_restart },
  2056. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_STOP, dev_action_stop },
  2057. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXUP, dev_action_chup },
  2058. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_TXUP, dev_action_chup },
  2059. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RXDOWN, dev_action_chdown },
  2060. { DEV_STATE_STARTWAIT_TX, DEV_EVENT_RESTART, dev_action_restart },
  2061. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_STOP, dev_action_stop },
  2062. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RXUP, dev_action_chup },
  2063. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXUP, dev_action_chup },
  2064. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_TXDOWN, dev_action_chdown },
  2065. { DEV_STATE_STARTWAIT_RX, DEV_EVENT_RESTART, dev_action_restart },
  2066. { DEV_STATE_RUNNING, DEV_EVENT_STOP, dev_action_stop },
  2067. { DEV_STATE_RUNNING, DEV_EVENT_RXDOWN, dev_action_chdown },
  2068. { DEV_STATE_RUNNING, DEV_EVENT_TXDOWN, dev_action_chdown },
  2069. { DEV_STATE_RUNNING, DEV_EVENT_TXUP, ctcm_action_nop },
  2070. { DEV_STATE_RUNNING, DEV_EVENT_RXUP, ctcm_action_nop },
  2071. { DEV_STATE_RUNNING, DEV_EVENT_RESTART, dev_action_restart },
  2072. };
  2073. int dev_fsm_len = ARRAY_SIZE(dev_fsm);
  2074. /* --- This is the END my friend --- */