qdio_main.c 37 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573
  1. /*
  2. * linux/drivers/s390/cio/qdio_main.c
  3. *
  4. * Linux for s390 qdio support, buffer handling, qdio API and module support.
  5. *
  6. * Copyright 2000,2008 IBM Corp.
  7. * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
  8. * Jan Glauber <jang@linux.vnet.ibm.com>
  9. * 2.6 cio integration by Cornelia Huck <cornelia.huck@de.ibm.com>
  10. */
  11. #include <linux/module.h>
  12. #include <linux/init.h>
  13. #include <linux/kernel.h>
  14. #include <linux/timer.h>
  15. #include <linux/delay.h>
  16. #include <asm/atomic.h>
  17. #include <asm/debug.h>
  18. #include <asm/qdio.h>
  19. #include "cio.h"
  20. #include "css.h"
  21. #include "device.h"
  22. #include "qdio.h"
  23. #include "qdio_debug.h"
  24. #include "qdio_perf.h"
  25. MODULE_AUTHOR("Utz Bacher <utz.bacher@de.ibm.com>,"\
  26. "Jan Glauber <jang@linux.vnet.ibm.com>");
  27. MODULE_DESCRIPTION("QDIO base support");
  28. MODULE_LICENSE("GPL");
  29. static inline int do_siga_sync(struct subchannel_id schid,
  30. unsigned int out_mask, unsigned int in_mask)
  31. {
  32. register unsigned long __fc asm ("0") = 2;
  33. register struct subchannel_id __schid asm ("1") = schid;
  34. register unsigned long out asm ("2") = out_mask;
  35. register unsigned long in asm ("3") = in_mask;
  36. int cc;
  37. asm volatile(
  38. " siga 0\n"
  39. " ipm %0\n"
  40. " srl %0,28\n"
  41. : "=d" (cc)
  42. : "d" (__fc), "d" (__schid), "d" (out), "d" (in) : "cc");
  43. return cc;
  44. }
  45. static inline int do_siga_input(struct subchannel_id schid, unsigned int mask)
  46. {
  47. register unsigned long __fc asm ("0") = 1;
  48. register struct subchannel_id __schid asm ("1") = schid;
  49. register unsigned long __mask asm ("2") = mask;
  50. int cc;
  51. asm volatile(
  52. " siga 0\n"
  53. " ipm %0\n"
  54. " srl %0,28\n"
  55. : "=d" (cc)
  56. : "d" (__fc), "d" (__schid), "d" (__mask) : "cc", "memory");
  57. return cc;
  58. }
  59. /**
  60. * do_siga_output - perform SIGA-w/wt function
  61. * @schid: subchannel id or in case of QEBSM the subchannel token
  62. * @mask: which output queues to process
  63. * @bb: busy bit indicator, set only if SIGA-w/wt could not access a buffer
  64. * @fc: function code to perform
  65. *
  66. * Returns cc or QDIO_ERROR_SIGA_ACCESS_EXCEPTION.
  67. * Note: For IQDC unicast queues only the highest priority queue is processed.
  68. */
  69. static inline int do_siga_output(unsigned long schid, unsigned long mask,
  70. unsigned int *bb, unsigned int fc)
  71. {
  72. register unsigned long __fc asm("0") = fc;
  73. register unsigned long __schid asm("1") = schid;
  74. register unsigned long __mask asm("2") = mask;
  75. int cc = QDIO_ERROR_SIGA_ACCESS_EXCEPTION;
  76. asm volatile(
  77. " siga 0\n"
  78. "0: ipm %0\n"
  79. " srl %0,28\n"
  80. "1:\n"
  81. EX_TABLE(0b, 1b)
  82. : "+d" (cc), "+d" (__fc), "+d" (__schid), "+d" (__mask)
  83. : : "cc", "memory");
  84. *bb = ((unsigned int) __fc) >> 31;
  85. return cc;
  86. }
  87. static inline int qdio_check_ccq(struct qdio_q *q, unsigned int ccq)
  88. {
  89. /* all done or next buffer state different */
  90. if (ccq == 0 || ccq == 32)
  91. return 0;
  92. /* not all buffers processed */
  93. if (ccq == 96 || ccq == 97)
  94. return 1;
  95. /* notify devices immediately */
  96. DBF_ERROR("%4x ccq:%3d", SCH_NO(q), ccq);
  97. return -EIO;
  98. }
  99. /**
  100. * qdio_do_eqbs - extract buffer states for QEBSM
  101. * @q: queue to manipulate
  102. * @state: state of the extracted buffers
  103. * @start: buffer number to start at
  104. * @count: count of buffers to examine
  105. * @auto_ack: automatically acknowledge buffers
  106. *
  107. * Returns the number of successfully extracted equal buffer states.
  108. * Stops processing if a state is different from the last buffers state.
  109. */
  110. static int qdio_do_eqbs(struct qdio_q *q, unsigned char *state,
  111. int start, int count, int auto_ack)
  112. {
  113. unsigned int ccq = 0;
  114. int tmp_count = count, tmp_start = start;
  115. int nr = q->nr;
  116. int rc;
  117. BUG_ON(!q->irq_ptr->sch_token);
  118. qdio_perf_stat_inc(&perf_stats.debug_eqbs_all);
  119. if (!q->is_input_q)
  120. nr += q->irq_ptr->nr_input_qs;
  121. again:
  122. ccq = do_eqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count,
  123. auto_ack);
  124. rc = qdio_check_ccq(q, ccq);
  125. /* At least one buffer was processed, return and extract the remaining
  126. * buffers later.
  127. */
  128. if ((ccq == 96) && (count != tmp_count)) {
  129. qdio_perf_stat_inc(&perf_stats.debug_eqbs_incomplete);
  130. return (count - tmp_count);
  131. }
  132. if (rc == 1) {
  133. DBF_DEV_EVENT(DBF_WARN, q->irq_ptr, "EQBS again:%2d", ccq);
  134. goto again;
  135. }
  136. if (rc < 0) {
  137. DBF_ERROR("%4x EQBS ERROR", SCH_NO(q));
  138. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  139. q->handler(q->irq_ptr->cdev,
  140. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  141. 0, -1, -1, q->irq_ptr->int_parm);
  142. return 0;
  143. }
  144. return count - tmp_count;
  145. }
  146. /**
  147. * qdio_do_sqbs - set buffer states for QEBSM
  148. * @q: queue to manipulate
  149. * @state: new state of the buffers
  150. * @start: first buffer number to change
  151. * @count: how many buffers to change
  152. *
  153. * Returns the number of successfully changed buffers.
  154. * Does retrying until the specified count of buffer states is set or an
  155. * error occurs.
  156. */
  157. static int qdio_do_sqbs(struct qdio_q *q, unsigned char state, int start,
  158. int count)
  159. {
  160. unsigned int ccq = 0;
  161. int tmp_count = count, tmp_start = start;
  162. int nr = q->nr;
  163. int rc;
  164. if (!count)
  165. return 0;
  166. BUG_ON(!q->irq_ptr->sch_token);
  167. qdio_perf_stat_inc(&perf_stats.debug_sqbs_all);
  168. if (!q->is_input_q)
  169. nr += q->irq_ptr->nr_input_qs;
  170. again:
  171. ccq = do_sqbs(q->irq_ptr->sch_token, state, nr, &tmp_start, &tmp_count);
  172. rc = qdio_check_ccq(q, ccq);
  173. if (rc == 1) {
  174. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "SQBS again:%2d", ccq);
  175. qdio_perf_stat_inc(&perf_stats.debug_sqbs_incomplete);
  176. goto again;
  177. }
  178. if (rc < 0) {
  179. DBF_ERROR("%4x SQBS ERROR", SCH_NO(q));
  180. DBF_ERROR("%3d%3d%2d", count, tmp_count, nr);
  181. q->handler(q->irq_ptr->cdev,
  182. QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  183. 0, -1, -1, q->irq_ptr->int_parm);
  184. return 0;
  185. }
  186. WARN_ON(tmp_count);
  187. return count - tmp_count;
  188. }
  189. /* returns number of examined buffers and their common state in *state */
  190. static inline int get_buf_states(struct qdio_q *q, unsigned int bufnr,
  191. unsigned char *state, unsigned int count,
  192. int auto_ack)
  193. {
  194. unsigned char __state = 0;
  195. int i;
  196. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  197. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  198. if (is_qebsm(q))
  199. return qdio_do_eqbs(q, state, bufnr, count, auto_ack);
  200. for (i = 0; i < count; i++) {
  201. if (!__state)
  202. __state = q->slsb.val[bufnr];
  203. else if (q->slsb.val[bufnr] != __state)
  204. break;
  205. bufnr = next_buf(bufnr);
  206. }
  207. *state = __state;
  208. return i;
  209. }
  210. static inline int get_buf_state(struct qdio_q *q, unsigned int bufnr,
  211. unsigned char *state, int auto_ack)
  212. {
  213. return get_buf_states(q, bufnr, state, 1, auto_ack);
  214. }
  215. /* wrap-around safe setting of slsb states, returns number of changed buffers */
  216. static inline int set_buf_states(struct qdio_q *q, int bufnr,
  217. unsigned char state, int count)
  218. {
  219. int i;
  220. BUG_ON(bufnr > QDIO_MAX_BUFFERS_MASK);
  221. BUG_ON(count > QDIO_MAX_BUFFERS_PER_Q);
  222. if (is_qebsm(q))
  223. return qdio_do_sqbs(q, state, bufnr, count);
  224. for (i = 0; i < count; i++) {
  225. xchg(&q->slsb.val[bufnr], state);
  226. bufnr = next_buf(bufnr);
  227. }
  228. return count;
  229. }
  230. static inline int set_buf_state(struct qdio_q *q, int bufnr,
  231. unsigned char state)
  232. {
  233. return set_buf_states(q, bufnr, state, 1);
  234. }
  235. /* set slsb states to initial state */
  236. void qdio_init_buf_states(struct qdio_irq *irq_ptr)
  237. {
  238. struct qdio_q *q;
  239. int i;
  240. for_each_input_queue(irq_ptr, q, i)
  241. set_buf_states(q, 0, SLSB_P_INPUT_NOT_INIT,
  242. QDIO_MAX_BUFFERS_PER_Q);
  243. for_each_output_queue(irq_ptr, q, i)
  244. set_buf_states(q, 0, SLSB_P_OUTPUT_NOT_INIT,
  245. QDIO_MAX_BUFFERS_PER_Q);
  246. }
  247. static inline int qdio_siga_sync(struct qdio_q *q, unsigned int output,
  248. unsigned int input)
  249. {
  250. int cc;
  251. if (!need_siga_sync(q))
  252. return 0;
  253. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-s:%1d", q->nr);
  254. qdio_perf_stat_inc(&perf_stats.siga_sync);
  255. cc = do_siga_sync(q->irq_ptr->schid, output, input);
  256. if (cc)
  257. DBF_ERROR("%4x SIGA-S:%2d", SCH_NO(q), cc);
  258. return cc;
  259. }
  260. static inline int qdio_siga_sync_q(struct qdio_q *q)
  261. {
  262. if (q->is_input_q)
  263. return qdio_siga_sync(q, 0, q->mask);
  264. else
  265. return qdio_siga_sync(q, q->mask, 0);
  266. }
  267. static inline int qdio_siga_sync_out(struct qdio_q *q)
  268. {
  269. return qdio_siga_sync(q, ~0U, 0);
  270. }
  271. static inline int qdio_siga_sync_all(struct qdio_q *q)
  272. {
  273. return qdio_siga_sync(q, ~0U, ~0U);
  274. }
  275. static int qdio_siga_output(struct qdio_q *q, unsigned int *busy_bit)
  276. {
  277. unsigned long schid;
  278. unsigned int fc = 0;
  279. u64 start_time = 0;
  280. int cc;
  281. if (q->u.out.use_enh_siga)
  282. fc = 3;
  283. if (is_qebsm(q)) {
  284. schid = q->irq_ptr->sch_token;
  285. fc |= 0x80;
  286. }
  287. else
  288. schid = *((u32 *)&q->irq_ptr->schid);
  289. again:
  290. cc = do_siga_output(schid, q->mask, busy_bit, fc);
  291. /* hipersocket busy condition */
  292. if (*busy_bit) {
  293. WARN_ON(queue_type(q) != QDIO_IQDIO_QFMT || cc != 2);
  294. if (!start_time) {
  295. start_time = get_usecs();
  296. goto again;
  297. }
  298. if ((get_usecs() - start_time) < QDIO_BUSY_BIT_PATIENCE)
  299. goto again;
  300. }
  301. return cc;
  302. }
  303. static inline int qdio_siga_input(struct qdio_q *q)
  304. {
  305. int cc;
  306. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-r:%1d", q->nr);
  307. qdio_perf_stat_inc(&perf_stats.siga_in);
  308. cc = do_siga_input(q->irq_ptr->schid, q->mask);
  309. if (cc)
  310. DBF_ERROR("%4x SIGA-R:%2d", SCH_NO(q), cc);
  311. return cc;
  312. }
  313. static inline void qdio_sync_after_thinint(struct qdio_q *q)
  314. {
  315. if (pci_out_supported(q)) {
  316. if (need_siga_sync_thinint(q))
  317. qdio_siga_sync_all(q);
  318. else if (need_siga_sync_out_thinint(q))
  319. qdio_siga_sync_out(q);
  320. } else
  321. qdio_siga_sync_q(q);
  322. }
  323. int debug_get_buf_state(struct qdio_q *q, unsigned int bufnr,
  324. unsigned char *state)
  325. {
  326. qdio_siga_sync_q(q);
  327. return get_buf_states(q, bufnr, state, 1, 0);
  328. }
  329. static inline void qdio_stop_polling(struct qdio_q *q)
  330. {
  331. if (!q->u.in.polling)
  332. return;
  333. q->u.in.polling = 0;
  334. qdio_perf_stat_inc(&perf_stats.debug_stop_polling);
  335. /* show the card that we are not polling anymore */
  336. if (is_qebsm(q)) {
  337. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  338. q->u.in.ack_count);
  339. q->u.in.ack_count = 0;
  340. } else
  341. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  342. }
  343. static void announce_buffer_error(struct qdio_q *q, int count)
  344. {
  345. q->qdio_error |= QDIO_ERROR_SLSB_STATE;
  346. /* special handling for no target buffer empty */
  347. if ((!q->is_input_q &&
  348. (q->sbal[q->first_to_check]->element[15].flags & 0xff) == 0x10)) {
  349. qdio_perf_stat_inc(&perf_stats.outbound_target_full);
  350. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "OUTFULL FTC:%3d",
  351. q->first_to_check);
  352. return;
  353. }
  354. DBF_ERROR("%4x BUF ERROR", SCH_NO(q));
  355. DBF_ERROR((q->is_input_q) ? "IN:%2d" : "OUT:%2d", q->nr);
  356. DBF_ERROR("FTC:%3d C:%3d", q->first_to_check, count);
  357. DBF_ERROR("F14:%2x F15:%2x",
  358. q->sbal[q->first_to_check]->element[14].flags & 0xff,
  359. q->sbal[q->first_to_check]->element[15].flags & 0xff);
  360. }
  361. static inline void inbound_primed(struct qdio_q *q, int count)
  362. {
  363. int new;
  364. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in prim: %3d", count);
  365. /* for QEBSM the ACK was already set by EQBS */
  366. if (is_qebsm(q)) {
  367. if (!q->u.in.polling) {
  368. q->u.in.polling = 1;
  369. q->u.in.ack_count = count;
  370. q->u.in.ack_start = q->first_to_check;
  371. return;
  372. }
  373. /* delete the previous ACK's */
  374. set_buf_states(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT,
  375. q->u.in.ack_count);
  376. q->u.in.ack_count = count;
  377. q->u.in.ack_start = q->first_to_check;
  378. return;
  379. }
  380. /*
  381. * ACK the newest buffer. The ACK will be removed in qdio_stop_polling
  382. * or by the next inbound run.
  383. */
  384. new = add_buf(q->first_to_check, count - 1);
  385. if (q->u.in.polling) {
  386. /* reset the previous ACK but first set the new one */
  387. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  388. set_buf_state(q, q->u.in.ack_start, SLSB_P_INPUT_NOT_INIT);
  389. } else {
  390. q->u.in.polling = 1;
  391. set_buf_state(q, new, SLSB_P_INPUT_ACK);
  392. }
  393. q->u.in.ack_start = new;
  394. count--;
  395. if (!count)
  396. return;
  397. }
  398. static int get_inbound_buffer_frontier(struct qdio_q *q)
  399. {
  400. int count, stop;
  401. unsigned char state;
  402. /*
  403. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  404. * would return 0.
  405. */
  406. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  407. stop = add_buf(q->first_to_check, count);
  408. if (q->first_to_check == stop)
  409. goto out;
  410. /*
  411. * No siga sync here, as a PCI or we after a thin interrupt
  412. * already sync'ed the queues.
  413. */
  414. count = get_buf_states(q, q->first_to_check, &state, count, 1);
  415. if (!count)
  416. goto out;
  417. switch (state) {
  418. case SLSB_P_INPUT_PRIMED:
  419. inbound_primed(q, count);
  420. q->first_to_check = add_buf(q->first_to_check, count);
  421. atomic_sub(count, &q->nr_buf_used);
  422. break;
  423. case SLSB_P_INPUT_ERROR:
  424. announce_buffer_error(q, count);
  425. /* process the buffer, the upper layer will take care of it */
  426. q->first_to_check = add_buf(q->first_to_check, count);
  427. atomic_sub(count, &q->nr_buf_used);
  428. break;
  429. case SLSB_CU_INPUT_EMPTY:
  430. case SLSB_P_INPUT_NOT_INIT:
  431. case SLSB_P_INPUT_ACK:
  432. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in nop");
  433. break;
  434. default:
  435. BUG();
  436. }
  437. out:
  438. return q->first_to_check;
  439. }
  440. static int qdio_inbound_q_moved(struct qdio_q *q)
  441. {
  442. int bufnr;
  443. bufnr = get_inbound_buffer_frontier(q);
  444. if ((bufnr != q->last_move) || q->qdio_error) {
  445. q->last_move = bufnr;
  446. if (!is_thinint_irq(q->irq_ptr) && !MACHINE_IS_VM)
  447. q->u.in.timestamp = get_usecs();
  448. return 1;
  449. } else
  450. return 0;
  451. }
  452. static inline int qdio_inbound_q_done(struct qdio_q *q)
  453. {
  454. unsigned char state = 0;
  455. if (!atomic_read(&q->nr_buf_used))
  456. return 1;
  457. qdio_siga_sync_q(q);
  458. get_buf_state(q, q->first_to_check, &state, 0);
  459. if (state == SLSB_P_INPUT_PRIMED)
  460. /* more work coming */
  461. return 0;
  462. if (is_thinint_irq(q->irq_ptr))
  463. return 1;
  464. /* don't poll under z/VM */
  465. if (MACHINE_IS_VM)
  466. return 1;
  467. /*
  468. * At this point we know, that inbound first_to_check
  469. * has (probably) not moved (see qdio_inbound_processing).
  470. */
  471. if (get_usecs() > q->u.in.timestamp + QDIO_INPUT_THRESHOLD) {
  472. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "in done:%3d",
  473. q->first_to_check);
  474. return 1;
  475. } else
  476. return 0;
  477. }
  478. static void qdio_kick_handler(struct qdio_q *q)
  479. {
  480. int start = q->first_to_kick;
  481. int end = q->first_to_check;
  482. int count;
  483. if (unlikely(q->irq_ptr->state != QDIO_IRQ_STATE_ACTIVE))
  484. return;
  485. count = sub_buf(end, start);
  486. if (q->is_input_q) {
  487. qdio_perf_stat_inc(&perf_stats.inbound_handler);
  488. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "kih s:%3d c:%3d", start, count);
  489. } else {
  490. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "koh: nr:%1d", q->nr);
  491. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "s:%3d c:%3d", start, count);
  492. }
  493. q->handler(q->irq_ptr->cdev, q->qdio_error, q->nr, start, count,
  494. q->irq_ptr->int_parm);
  495. /* for the next time */
  496. q->first_to_kick = end;
  497. q->qdio_error = 0;
  498. }
  499. static void __qdio_inbound_processing(struct qdio_q *q)
  500. {
  501. qdio_perf_stat_inc(&perf_stats.tasklet_inbound);
  502. again:
  503. if (!qdio_inbound_q_moved(q))
  504. return;
  505. qdio_kick_handler(q);
  506. if (!qdio_inbound_q_done(q))
  507. /* means poll time is not yet over */
  508. goto again;
  509. qdio_stop_polling(q);
  510. /*
  511. * We need to check again to not lose initiative after
  512. * resetting the ACK state.
  513. */
  514. if (!qdio_inbound_q_done(q))
  515. goto again;
  516. }
  517. void qdio_inbound_processing(unsigned long data)
  518. {
  519. struct qdio_q *q = (struct qdio_q *)data;
  520. __qdio_inbound_processing(q);
  521. }
  522. static int get_outbound_buffer_frontier(struct qdio_q *q)
  523. {
  524. int count, stop;
  525. unsigned char state;
  526. if (((queue_type(q) != QDIO_IQDIO_QFMT) && !pci_out_supported(q)) ||
  527. (queue_type(q) == QDIO_IQDIO_QFMT && multicast_outbound(q)))
  528. qdio_siga_sync_q(q);
  529. /*
  530. * Don't check 128 buffers, as otherwise qdio_inbound_q_moved
  531. * would return 0.
  532. */
  533. count = min(atomic_read(&q->nr_buf_used), QDIO_MAX_BUFFERS_MASK);
  534. stop = add_buf(q->first_to_check, count);
  535. if (q->first_to_check == stop)
  536. return q->first_to_check;
  537. count = get_buf_states(q, q->first_to_check, &state, count, 0);
  538. if (!count)
  539. return q->first_to_check;
  540. switch (state) {
  541. case SLSB_P_OUTPUT_EMPTY:
  542. /* the adapter got it */
  543. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out empty:%1d %3d", q->nr, count);
  544. atomic_sub(count, &q->nr_buf_used);
  545. q->first_to_check = add_buf(q->first_to_check, count);
  546. break;
  547. case SLSB_P_OUTPUT_ERROR:
  548. announce_buffer_error(q, count);
  549. /* process the buffer, the upper layer will take care of it */
  550. q->first_to_check = add_buf(q->first_to_check, count);
  551. atomic_sub(count, &q->nr_buf_used);
  552. break;
  553. case SLSB_CU_OUTPUT_PRIMED:
  554. /* the adapter has not fetched the output yet */
  555. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out primed:%1d", q->nr);
  556. break;
  557. case SLSB_P_OUTPUT_NOT_INIT:
  558. case SLSB_P_OUTPUT_HALTED:
  559. break;
  560. default:
  561. BUG();
  562. }
  563. return q->first_to_check;
  564. }
  565. /* all buffers processed? */
  566. static inline int qdio_outbound_q_done(struct qdio_q *q)
  567. {
  568. return atomic_read(&q->nr_buf_used) == 0;
  569. }
  570. static inline int qdio_outbound_q_moved(struct qdio_q *q)
  571. {
  572. int bufnr;
  573. bufnr = get_outbound_buffer_frontier(q);
  574. if ((bufnr != q->last_move) || q->qdio_error) {
  575. q->last_move = bufnr;
  576. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "out moved:%1d", q->nr);
  577. return 1;
  578. } else
  579. return 0;
  580. }
  581. static int qdio_kick_outbound_q(struct qdio_q *q)
  582. {
  583. unsigned int busy_bit;
  584. int cc;
  585. if (!need_siga_out(q))
  586. return 0;
  587. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w:%1d", q->nr);
  588. qdio_perf_stat_inc(&perf_stats.siga_out);
  589. cc = qdio_siga_output(q, &busy_bit);
  590. switch (cc) {
  591. case 0:
  592. break;
  593. case 2:
  594. if (busy_bit) {
  595. DBF_ERROR("%4x cc2 REP:%1d", SCH_NO(q), q->nr);
  596. cc |= QDIO_ERROR_SIGA_BUSY;
  597. } else
  598. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "siga-w cc2:%1d", q->nr);
  599. break;
  600. case 1:
  601. case 3:
  602. DBF_ERROR("%4x SIGA-W:%1d", SCH_NO(q), cc);
  603. break;
  604. }
  605. return cc;
  606. }
  607. static void __qdio_outbound_processing(struct qdio_q *q)
  608. {
  609. qdio_perf_stat_inc(&perf_stats.tasklet_outbound);
  610. BUG_ON(atomic_read(&q->nr_buf_used) < 0);
  611. if (qdio_outbound_q_moved(q))
  612. qdio_kick_handler(q);
  613. if (queue_type(q) == QDIO_ZFCP_QFMT)
  614. if (!pci_out_supported(q) && !qdio_outbound_q_done(q))
  615. goto sched;
  616. /* bail out for HiperSockets unicast queues */
  617. if (queue_type(q) == QDIO_IQDIO_QFMT && !multicast_outbound(q))
  618. return;
  619. if ((queue_type(q) == QDIO_IQDIO_QFMT) &&
  620. (atomic_read(&q->nr_buf_used)) > QDIO_IQDIO_POLL_LVL)
  621. goto sched;
  622. if (q->u.out.pci_out_enabled)
  623. return;
  624. /*
  625. * Now we know that queue type is either qeth without pci enabled
  626. * or HiperSockets multicast. Make sure buffer switch from PRIMED to
  627. * EMPTY is noticed and outbound_handler is called after some time.
  628. */
  629. if (qdio_outbound_q_done(q))
  630. del_timer(&q->u.out.timer);
  631. else {
  632. if (!timer_pending(&q->u.out.timer)) {
  633. mod_timer(&q->u.out.timer, jiffies + 10 * HZ);
  634. qdio_perf_stat_inc(&perf_stats.debug_tl_out_timer);
  635. }
  636. }
  637. return;
  638. sched:
  639. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  640. return;
  641. tasklet_schedule(&q->tasklet);
  642. }
  643. /* outbound tasklet */
  644. void qdio_outbound_processing(unsigned long data)
  645. {
  646. struct qdio_q *q = (struct qdio_q *)data;
  647. __qdio_outbound_processing(q);
  648. }
  649. void qdio_outbound_timer(unsigned long data)
  650. {
  651. struct qdio_q *q = (struct qdio_q *)data;
  652. if (unlikely(q->irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  653. return;
  654. tasklet_schedule(&q->tasklet);
  655. }
  656. static inline void qdio_check_outbound_after_thinint(struct qdio_q *q)
  657. {
  658. struct qdio_q *out;
  659. int i;
  660. if (!pci_out_supported(q))
  661. return;
  662. for_each_output_queue(q->irq_ptr, out, i)
  663. if (!qdio_outbound_q_done(out))
  664. tasklet_schedule(&out->tasklet);
  665. }
  666. static void __tiqdio_inbound_processing(struct qdio_q *q)
  667. {
  668. qdio_perf_stat_inc(&perf_stats.thinint_inbound);
  669. qdio_sync_after_thinint(q);
  670. /*
  671. * The interrupt could be caused by a PCI request. Check the
  672. * PCI capable outbound queues.
  673. */
  674. qdio_check_outbound_after_thinint(q);
  675. if (!qdio_inbound_q_moved(q))
  676. return;
  677. qdio_kick_handler(q);
  678. if (!qdio_inbound_q_done(q)) {
  679. qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop);
  680. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  681. tasklet_schedule(&q->tasklet);
  682. }
  683. qdio_stop_polling(q);
  684. /*
  685. * We need to check again to not lose initiative after
  686. * resetting the ACK state.
  687. */
  688. if (!qdio_inbound_q_done(q)) {
  689. qdio_perf_stat_inc(&perf_stats.thinint_inbound_loop2);
  690. if (likely(q->irq_ptr->state != QDIO_IRQ_STATE_STOPPED))
  691. tasklet_schedule(&q->tasklet);
  692. }
  693. }
  694. void tiqdio_inbound_processing(unsigned long data)
  695. {
  696. struct qdio_q *q = (struct qdio_q *)data;
  697. __tiqdio_inbound_processing(q);
  698. }
  699. static inline void qdio_set_state(struct qdio_irq *irq_ptr,
  700. enum qdio_irq_states state)
  701. {
  702. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "newstate: %1d", state);
  703. irq_ptr->state = state;
  704. mb();
  705. }
  706. static void qdio_irq_check_sense(struct qdio_irq *irq_ptr, struct irb *irb)
  707. {
  708. if (irb->esw.esw0.erw.cons) {
  709. DBF_ERROR("%4x sense:", irq_ptr->schid.sch_no);
  710. DBF_ERROR_HEX(irb, 64);
  711. DBF_ERROR_HEX(irb->ecw, 64);
  712. }
  713. }
  714. /* PCI interrupt handler */
  715. static void qdio_int_handler_pci(struct qdio_irq *irq_ptr)
  716. {
  717. int i;
  718. struct qdio_q *q;
  719. if (unlikely(irq_ptr->state == QDIO_IRQ_STATE_STOPPED))
  720. return;
  721. qdio_perf_stat_inc(&perf_stats.pci_int);
  722. for_each_input_queue(irq_ptr, q, i)
  723. tasklet_schedule(&q->tasklet);
  724. if (!(irq_ptr->qib.ac & QIB_AC_OUTBOUND_PCI_SUPPORTED))
  725. return;
  726. for_each_output_queue(irq_ptr, q, i) {
  727. if (qdio_outbound_q_done(q))
  728. continue;
  729. if (!siga_syncs_out_pci(q))
  730. qdio_siga_sync_q(q);
  731. tasklet_schedule(&q->tasklet);
  732. }
  733. }
  734. static void qdio_handle_activate_check(struct ccw_device *cdev,
  735. unsigned long intparm, int cstat, int dstat)
  736. {
  737. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  738. struct qdio_q *q;
  739. DBF_ERROR("%4x ACT CHECK", irq_ptr->schid.sch_no);
  740. DBF_ERROR("intp :%lx", intparm);
  741. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  742. if (irq_ptr->nr_input_qs) {
  743. q = irq_ptr->input_qs[0];
  744. } else if (irq_ptr->nr_output_qs) {
  745. q = irq_ptr->output_qs[0];
  746. } else {
  747. dump_stack();
  748. goto no_handler;
  749. }
  750. q->handler(q->irq_ptr->cdev, QDIO_ERROR_ACTIVATE_CHECK_CONDITION,
  751. 0, -1, -1, irq_ptr->int_parm);
  752. no_handler:
  753. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  754. }
  755. static void qdio_establish_handle_irq(struct ccw_device *cdev, int cstat,
  756. int dstat)
  757. {
  758. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  759. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "qest irq");
  760. if (cstat)
  761. goto error;
  762. if (dstat & ~(DEV_STAT_DEV_END | DEV_STAT_CHN_END))
  763. goto error;
  764. if (!(dstat & DEV_STAT_DEV_END))
  765. goto error;
  766. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ESTABLISHED);
  767. return;
  768. error:
  769. DBF_ERROR("%4x EQ:error", irq_ptr->schid.sch_no);
  770. DBF_ERROR("ds: %2x cs:%2x", dstat, cstat);
  771. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  772. }
  773. /* qdio interrupt handler */
  774. void qdio_int_handler(struct ccw_device *cdev, unsigned long intparm,
  775. struct irb *irb)
  776. {
  777. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  778. int cstat, dstat;
  779. qdio_perf_stat_inc(&perf_stats.qdio_int);
  780. if (!intparm || !irq_ptr) {
  781. DBF_ERROR("qint:%4x", cdev->private->schid.sch_no);
  782. return;
  783. }
  784. if (IS_ERR(irb)) {
  785. switch (PTR_ERR(irb)) {
  786. case -EIO:
  787. DBF_ERROR("%4x IO error", irq_ptr->schid.sch_no);
  788. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ERR);
  789. wake_up(&cdev->private->wait_q);
  790. return;
  791. default:
  792. WARN_ON(1);
  793. return;
  794. }
  795. }
  796. qdio_irq_check_sense(irq_ptr, irb);
  797. cstat = irb->scsw.cmd.cstat;
  798. dstat = irb->scsw.cmd.dstat;
  799. switch (irq_ptr->state) {
  800. case QDIO_IRQ_STATE_INACTIVE:
  801. qdio_establish_handle_irq(cdev, cstat, dstat);
  802. break;
  803. case QDIO_IRQ_STATE_CLEANUP:
  804. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  805. break;
  806. case QDIO_IRQ_STATE_ESTABLISHED:
  807. case QDIO_IRQ_STATE_ACTIVE:
  808. if (cstat & SCHN_STAT_PCI) {
  809. qdio_int_handler_pci(irq_ptr);
  810. return;
  811. }
  812. if (cstat || dstat)
  813. qdio_handle_activate_check(cdev, intparm, cstat,
  814. dstat);
  815. break;
  816. default:
  817. WARN_ON(1);
  818. }
  819. wake_up(&cdev->private->wait_q);
  820. }
  821. /**
  822. * qdio_get_ssqd_desc - get qdio subchannel description
  823. * @cdev: ccw device to get description for
  824. * @data: where to store the ssqd
  825. *
  826. * Returns 0 or an error code. The results of the chsc are stored in the
  827. * specified structure.
  828. */
  829. int qdio_get_ssqd_desc(struct ccw_device *cdev,
  830. struct qdio_ssqd_desc *data)
  831. {
  832. if (!cdev || !cdev->private)
  833. return -EINVAL;
  834. DBF_EVENT("get ssqd:%4x", cdev->private->schid.sch_no);
  835. return qdio_setup_get_ssqd(NULL, &cdev->private->schid, data);
  836. }
  837. EXPORT_SYMBOL_GPL(qdio_get_ssqd_desc);
  838. /**
  839. * qdio_cleanup - shutdown queues and free data structures
  840. * @cdev: associated ccw device
  841. * @how: use halt or clear to shutdown
  842. *
  843. * This function calls qdio_shutdown() for @cdev with method @how.
  844. * and qdio_free(). The qdio_free() return value is ignored since
  845. * !irq_ptr is already checked.
  846. */
  847. int qdio_cleanup(struct ccw_device *cdev, int how)
  848. {
  849. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  850. int rc;
  851. if (!irq_ptr)
  852. return -ENODEV;
  853. rc = qdio_shutdown(cdev, how);
  854. qdio_free(cdev);
  855. return rc;
  856. }
  857. EXPORT_SYMBOL_GPL(qdio_cleanup);
  858. static void qdio_shutdown_queues(struct ccw_device *cdev)
  859. {
  860. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  861. struct qdio_q *q;
  862. int i;
  863. for_each_input_queue(irq_ptr, q, i)
  864. tasklet_kill(&q->tasklet);
  865. for_each_output_queue(irq_ptr, q, i) {
  866. del_timer(&q->u.out.timer);
  867. tasklet_kill(&q->tasklet);
  868. }
  869. }
  870. /**
  871. * qdio_shutdown - shut down a qdio subchannel
  872. * @cdev: associated ccw device
  873. * @how: use halt or clear to shutdown
  874. */
  875. int qdio_shutdown(struct ccw_device *cdev, int how)
  876. {
  877. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  878. int rc;
  879. unsigned long flags;
  880. if (!irq_ptr)
  881. return -ENODEV;
  882. BUG_ON(irqs_disabled());
  883. DBF_EVENT("qshutdown:%4x", cdev->private->schid.sch_no);
  884. mutex_lock(&irq_ptr->setup_mutex);
  885. /*
  886. * Subchannel was already shot down. We cannot prevent being called
  887. * twice since cio may trigger a shutdown asynchronously.
  888. */
  889. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  890. mutex_unlock(&irq_ptr->setup_mutex);
  891. return 0;
  892. }
  893. /*
  894. * Indicate that the device is going down. Scheduling the queue
  895. * tasklets is forbidden from here on.
  896. */
  897. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_STOPPED);
  898. tiqdio_remove_input_queues(irq_ptr);
  899. qdio_shutdown_queues(cdev);
  900. qdio_shutdown_debug_entries(irq_ptr, cdev);
  901. /* cleanup subchannel */
  902. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  903. if (how & QDIO_FLAG_CLEANUP_USING_CLEAR)
  904. rc = ccw_device_clear(cdev, QDIO_DOING_CLEANUP);
  905. else
  906. /* default behaviour is halt */
  907. rc = ccw_device_halt(cdev, QDIO_DOING_CLEANUP);
  908. if (rc) {
  909. DBF_ERROR("%4x SHUTD ERR", irq_ptr->schid.sch_no);
  910. DBF_ERROR("rc:%4d", rc);
  911. goto no_cleanup;
  912. }
  913. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_CLEANUP);
  914. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  915. wait_event_interruptible_timeout(cdev->private->wait_q,
  916. irq_ptr->state == QDIO_IRQ_STATE_INACTIVE ||
  917. irq_ptr->state == QDIO_IRQ_STATE_ERR,
  918. 10 * HZ);
  919. spin_lock_irqsave(get_ccwdev_lock(cdev), flags);
  920. no_cleanup:
  921. qdio_shutdown_thinint(irq_ptr);
  922. /* restore interrupt handler */
  923. if ((void *)cdev->handler == (void *)qdio_int_handler)
  924. cdev->handler = irq_ptr->orig_handler;
  925. spin_unlock_irqrestore(get_ccwdev_lock(cdev), flags);
  926. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  927. mutex_unlock(&irq_ptr->setup_mutex);
  928. if (rc)
  929. return rc;
  930. return 0;
  931. }
  932. EXPORT_SYMBOL_GPL(qdio_shutdown);
  933. /**
  934. * qdio_free - free data structures for a qdio subchannel
  935. * @cdev: associated ccw device
  936. */
  937. int qdio_free(struct ccw_device *cdev)
  938. {
  939. struct qdio_irq *irq_ptr = cdev->private->qdio_data;
  940. if (!irq_ptr)
  941. return -ENODEV;
  942. DBF_EVENT("qfree:%4x", cdev->private->schid.sch_no);
  943. mutex_lock(&irq_ptr->setup_mutex);
  944. if (irq_ptr->debug_area != NULL) {
  945. debug_unregister(irq_ptr->debug_area);
  946. irq_ptr->debug_area = NULL;
  947. }
  948. cdev->private->qdio_data = NULL;
  949. mutex_unlock(&irq_ptr->setup_mutex);
  950. qdio_release_memory(irq_ptr);
  951. return 0;
  952. }
  953. EXPORT_SYMBOL_GPL(qdio_free);
  954. /**
  955. * qdio_initialize - allocate and establish queues for a qdio subchannel
  956. * @init_data: initialization data
  957. *
  958. * This function first allocates queues via qdio_allocate() and on success
  959. * establishes them via qdio_establish().
  960. */
  961. int qdio_initialize(struct qdio_initialize *init_data)
  962. {
  963. int rc;
  964. rc = qdio_allocate(init_data);
  965. if (rc)
  966. return rc;
  967. rc = qdio_establish(init_data);
  968. if (rc)
  969. qdio_free(init_data->cdev);
  970. return rc;
  971. }
  972. EXPORT_SYMBOL_GPL(qdio_initialize);
  973. /**
  974. * qdio_allocate - allocate qdio queues and associated data
  975. * @init_data: initialization data
  976. */
  977. int qdio_allocate(struct qdio_initialize *init_data)
  978. {
  979. struct qdio_irq *irq_ptr;
  980. DBF_EVENT("qallocate:%4x", init_data->cdev->private->schid.sch_no);
  981. if ((init_data->no_input_qs && !init_data->input_handler) ||
  982. (init_data->no_output_qs && !init_data->output_handler))
  983. return -EINVAL;
  984. if ((init_data->no_input_qs > QDIO_MAX_QUEUES_PER_IRQ) ||
  985. (init_data->no_output_qs > QDIO_MAX_QUEUES_PER_IRQ))
  986. return -EINVAL;
  987. if ((!init_data->input_sbal_addr_array) ||
  988. (!init_data->output_sbal_addr_array))
  989. return -EINVAL;
  990. /* irq_ptr must be in GFP_DMA since it contains ccw1.cda */
  991. irq_ptr = (void *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  992. if (!irq_ptr)
  993. goto out_err;
  994. mutex_init(&irq_ptr->setup_mutex);
  995. qdio_allocate_dbf(init_data, irq_ptr);
  996. /*
  997. * Allocate a page for the chsc calls in qdio_establish.
  998. * Must be pre-allocated since a zfcp recovery will call
  999. * qdio_establish. In case of low memory and swap on a zfcp disk
  1000. * we may not be able to allocate memory otherwise.
  1001. */
  1002. irq_ptr->chsc_page = get_zeroed_page(GFP_KERNEL);
  1003. if (!irq_ptr->chsc_page)
  1004. goto out_rel;
  1005. /* qdr is used in ccw1.cda which is u32 */
  1006. irq_ptr->qdr = (struct qdr *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
  1007. if (!irq_ptr->qdr)
  1008. goto out_rel;
  1009. WARN_ON((unsigned long)irq_ptr->qdr & 0xfff);
  1010. if (qdio_allocate_qs(irq_ptr, init_data->no_input_qs,
  1011. init_data->no_output_qs))
  1012. goto out_rel;
  1013. init_data->cdev->private->qdio_data = irq_ptr;
  1014. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_INACTIVE);
  1015. return 0;
  1016. out_rel:
  1017. qdio_release_memory(irq_ptr);
  1018. out_err:
  1019. return -ENOMEM;
  1020. }
  1021. EXPORT_SYMBOL_GPL(qdio_allocate);
  1022. /**
  1023. * qdio_establish - establish queues on a qdio subchannel
  1024. * @init_data: initialization data
  1025. */
  1026. int qdio_establish(struct qdio_initialize *init_data)
  1027. {
  1028. struct qdio_irq *irq_ptr;
  1029. struct ccw_device *cdev = init_data->cdev;
  1030. unsigned long saveflags;
  1031. int rc;
  1032. DBF_EVENT("qestablish:%4x", cdev->private->schid.sch_no);
  1033. irq_ptr = cdev->private->qdio_data;
  1034. if (!irq_ptr)
  1035. return -ENODEV;
  1036. if (cdev->private->state != DEV_STATE_ONLINE)
  1037. return -EINVAL;
  1038. mutex_lock(&irq_ptr->setup_mutex);
  1039. qdio_setup_irq(init_data);
  1040. rc = qdio_establish_thinint(irq_ptr);
  1041. if (rc) {
  1042. mutex_unlock(&irq_ptr->setup_mutex);
  1043. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1044. return rc;
  1045. }
  1046. /* establish q */
  1047. irq_ptr->ccw.cmd_code = irq_ptr->equeue.cmd;
  1048. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1049. irq_ptr->ccw.count = irq_ptr->equeue.count;
  1050. irq_ptr->ccw.cda = (u32)((addr_t)irq_ptr->qdr);
  1051. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1052. ccw_device_set_options_mask(cdev, 0);
  1053. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ESTABLISH, 0, 0);
  1054. if (rc) {
  1055. DBF_ERROR("%4x est IO ERR", irq_ptr->schid.sch_no);
  1056. DBF_ERROR("rc:%4x", rc);
  1057. }
  1058. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1059. if (rc) {
  1060. mutex_unlock(&irq_ptr->setup_mutex);
  1061. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1062. return rc;
  1063. }
  1064. wait_event_interruptible_timeout(cdev->private->wait_q,
  1065. irq_ptr->state == QDIO_IRQ_STATE_ESTABLISHED ||
  1066. irq_ptr->state == QDIO_IRQ_STATE_ERR, HZ);
  1067. if (irq_ptr->state != QDIO_IRQ_STATE_ESTABLISHED) {
  1068. mutex_unlock(&irq_ptr->setup_mutex);
  1069. qdio_shutdown(cdev, QDIO_FLAG_CLEANUP_USING_CLEAR);
  1070. return -EIO;
  1071. }
  1072. qdio_setup_ssqd_info(irq_ptr);
  1073. DBF_EVENT("qDmmwc:%2x", irq_ptr->ssqd_desc.mmwc);
  1074. DBF_EVENT("qib ac:%4x", irq_ptr->qib.ac);
  1075. /* qebsm is now setup if available, initialize buffer states */
  1076. qdio_init_buf_states(irq_ptr);
  1077. mutex_unlock(&irq_ptr->setup_mutex);
  1078. qdio_print_subchannel_info(irq_ptr, cdev);
  1079. qdio_setup_debug_entries(irq_ptr, cdev);
  1080. return 0;
  1081. }
  1082. EXPORT_SYMBOL_GPL(qdio_establish);
  1083. /**
  1084. * qdio_activate - activate queues on a qdio subchannel
  1085. * @cdev: associated cdev
  1086. */
  1087. int qdio_activate(struct ccw_device *cdev)
  1088. {
  1089. struct qdio_irq *irq_ptr;
  1090. int rc;
  1091. unsigned long saveflags;
  1092. DBF_EVENT("qactivate:%4x", cdev->private->schid.sch_no);
  1093. irq_ptr = cdev->private->qdio_data;
  1094. if (!irq_ptr)
  1095. return -ENODEV;
  1096. if (cdev->private->state != DEV_STATE_ONLINE)
  1097. return -EINVAL;
  1098. mutex_lock(&irq_ptr->setup_mutex);
  1099. if (irq_ptr->state == QDIO_IRQ_STATE_INACTIVE) {
  1100. rc = -EBUSY;
  1101. goto out;
  1102. }
  1103. irq_ptr->ccw.cmd_code = irq_ptr->aqueue.cmd;
  1104. irq_ptr->ccw.flags = CCW_FLAG_SLI;
  1105. irq_ptr->ccw.count = irq_ptr->aqueue.count;
  1106. irq_ptr->ccw.cda = 0;
  1107. spin_lock_irqsave(get_ccwdev_lock(cdev), saveflags);
  1108. ccw_device_set_options(cdev, CCWDEV_REPORT_ALL);
  1109. rc = ccw_device_start(cdev, &irq_ptr->ccw, QDIO_DOING_ACTIVATE,
  1110. 0, DOIO_DENY_PREFETCH);
  1111. if (rc) {
  1112. DBF_ERROR("%4x act IO ERR", irq_ptr->schid.sch_no);
  1113. DBF_ERROR("rc:%4x", rc);
  1114. }
  1115. spin_unlock_irqrestore(get_ccwdev_lock(cdev), saveflags);
  1116. if (rc)
  1117. goto out;
  1118. if (is_thinint_irq(irq_ptr))
  1119. tiqdio_add_input_queues(irq_ptr);
  1120. /* wait for subchannel to become active */
  1121. msleep(5);
  1122. switch (irq_ptr->state) {
  1123. case QDIO_IRQ_STATE_STOPPED:
  1124. case QDIO_IRQ_STATE_ERR:
  1125. rc = -EIO;
  1126. break;
  1127. default:
  1128. qdio_set_state(irq_ptr, QDIO_IRQ_STATE_ACTIVE);
  1129. rc = 0;
  1130. }
  1131. out:
  1132. mutex_unlock(&irq_ptr->setup_mutex);
  1133. return rc;
  1134. }
  1135. EXPORT_SYMBOL_GPL(qdio_activate);
  1136. static inline int buf_in_between(int bufnr, int start, int count)
  1137. {
  1138. int end = add_buf(start, count);
  1139. if (end > start) {
  1140. if (bufnr >= start && bufnr < end)
  1141. return 1;
  1142. else
  1143. return 0;
  1144. }
  1145. /* wrap-around case */
  1146. if ((bufnr >= start && bufnr <= QDIO_MAX_BUFFERS_PER_Q) ||
  1147. (bufnr < end))
  1148. return 1;
  1149. else
  1150. return 0;
  1151. }
  1152. /**
  1153. * handle_inbound - reset processed input buffers
  1154. * @q: queue containing the buffers
  1155. * @callflags: flags
  1156. * @bufnr: first buffer to process
  1157. * @count: how many buffers are emptied
  1158. */
  1159. static int handle_inbound(struct qdio_q *q, unsigned int callflags,
  1160. int bufnr, int count)
  1161. {
  1162. int used, diff;
  1163. if (!q->u.in.polling)
  1164. goto set;
  1165. /* protect against stop polling setting an ACK for an emptied slsb */
  1166. if (count == QDIO_MAX_BUFFERS_PER_Q) {
  1167. /* overwriting everything, just delete polling status */
  1168. q->u.in.polling = 0;
  1169. q->u.in.ack_count = 0;
  1170. goto set;
  1171. } else if (buf_in_between(q->u.in.ack_start, bufnr, count)) {
  1172. if (is_qebsm(q)) {
  1173. /* partial overwrite, just update ack_start */
  1174. diff = add_buf(bufnr, count);
  1175. diff = sub_buf(diff, q->u.in.ack_start);
  1176. q->u.in.ack_count -= diff;
  1177. if (q->u.in.ack_count <= 0) {
  1178. q->u.in.polling = 0;
  1179. q->u.in.ack_count = 0;
  1180. goto set;
  1181. }
  1182. q->u.in.ack_start = add_buf(q->u.in.ack_start, diff);
  1183. }
  1184. else
  1185. /* the only ACK will be deleted, so stop polling */
  1186. q->u.in.polling = 0;
  1187. }
  1188. set:
  1189. count = set_buf_states(q, bufnr, SLSB_CU_INPUT_EMPTY, count);
  1190. used = atomic_add_return(count, &q->nr_buf_used) - count;
  1191. BUG_ON(used + count > QDIO_MAX_BUFFERS_PER_Q);
  1192. /* no need to signal as long as the adapter had free buffers */
  1193. if (used)
  1194. return 0;
  1195. if (need_siga_in(q))
  1196. return qdio_siga_input(q);
  1197. return 0;
  1198. }
  1199. /**
  1200. * handle_outbound - process filled outbound buffers
  1201. * @q: queue containing the buffers
  1202. * @callflags: flags
  1203. * @bufnr: first buffer to process
  1204. * @count: how many buffers are filled
  1205. */
  1206. static int handle_outbound(struct qdio_q *q, unsigned int callflags,
  1207. int bufnr, int count)
  1208. {
  1209. unsigned char state;
  1210. int used, rc = 0;
  1211. qdio_perf_stat_inc(&perf_stats.outbound_handler);
  1212. count = set_buf_states(q, bufnr, SLSB_CU_OUTPUT_PRIMED, count);
  1213. used = atomic_add_return(count, &q->nr_buf_used);
  1214. BUG_ON(used > QDIO_MAX_BUFFERS_PER_Q);
  1215. if (callflags & QDIO_FLAG_PCI_OUT)
  1216. q->u.out.pci_out_enabled = 1;
  1217. else
  1218. q->u.out.pci_out_enabled = 0;
  1219. if (queue_type(q) == QDIO_IQDIO_QFMT) {
  1220. if (multicast_outbound(q))
  1221. rc = qdio_kick_outbound_q(q);
  1222. else
  1223. if ((q->irq_ptr->ssqd_desc.mmwc > 1) &&
  1224. (count > 1) &&
  1225. (count <= q->irq_ptr->ssqd_desc.mmwc)) {
  1226. /* exploit enhanced SIGA */
  1227. q->u.out.use_enh_siga = 1;
  1228. rc = qdio_kick_outbound_q(q);
  1229. } else {
  1230. /*
  1231. * One siga-w per buffer required for unicast
  1232. * HiperSockets.
  1233. */
  1234. q->u.out.use_enh_siga = 0;
  1235. while (count--) {
  1236. rc = qdio_kick_outbound_q(q);
  1237. if (rc)
  1238. goto out;
  1239. }
  1240. }
  1241. goto out;
  1242. }
  1243. if (need_siga_sync(q)) {
  1244. qdio_siga_sync_q(q);
  1245. goto out;
  1246. }
  1247. /* try to fast requeue buffers */
  1248. get_buf_state(q, prev_buf(bufnr), &state, 0);
  1249. if (state != SLSB_CU_OUTPUT_PRIMED)
  1250. rc = qdio_kick_outbound_q(q);
  1251. else {
  1252. DBF_DEV_EVENT(DBF_INFO, q->irq_ptr, "fast-req");
  1253. qdio_perf_stat_inc(&perf_stats.fast_requeue);
  1254. }
  1255. out:
  1256. tasklet_schedule(&q->tasklet);
  1257. return rc;
  1258. }
  1259. /**
  1260. * do_QDIO - process input or output buffers
  1261. * @cdev: associated ccw_device for the qdio subchannel
  1262. * @callflags: input or output and special flags from the program
  1263. * @q_nr: queue number
  1264. * @bufnr: buffer number
  1265. * @count: how many buffers to process
  1266. */
  1267. int do_QDIO(struct ccw_device *cdev, unsigned int callflags,
  1268. int q_nr, unsigned int bufnr, unsigned int count)
  1269. {
  1270. struct qdio_irq *irq_ptr;
  1271. if (bufnr >= QDIO_MAX_BUFFERS_PER_Q || count > QDIO_MAX_BUFFERS_PER_Q)
  1272. return -EINVAL;
  1273. irq_ptr = cdev->private->qdio_data;
  1274. if (!irq_ptr)
  1275. return -ENODEV;
  1276. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1277. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO input");
  1278. else
  1279. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "doQDIO output");
  1280. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "q:%1d flag:%4x", q_nr, callflags);
  1281. DBF_DEV_EVENT(DBF_INFO, irq_ptr, "buf:%2d cnt:%3d", bufnr, count);
  1282. if (irq_ptr->state != QDIO_IRQ_STATE_ACTIVE)
  1283. return -EBUSY;
  1284. if (callflags & QDIO_FLAG_SYNC_INPUT)
  1285. return handle_inbound(irq_ptr->input_qs[q_nr],
  1286. callflags, bufnr, count);
  1287. else if (callflags & QDIO_FLAG_SYNC_OUTPUT)
  1288. return handle_outbound(irq_ptr->output_qs[q_nr],
  1289. callflags, bufnr, count);
  1290. return -EINVAL;
  1291. }
  1292. EXPORT_SYMBOL_GPL(do_QDIO);
  1293. static int __init init_QDIO(void)
  1294. {
  1295. int rc;
  1296. rc = qdio_setup_init();
  1297. if (rc)
  1298. return rc;
  1299. rc = tiqdio_allocate_memory();
  1300. if (rc)
  1301. goto out_cache;
  1302. rc = qdio_debug_init();
  1303. if (rc)
  1304. goto out_ti;
  1305. rc = qdio_setup_perf_stats();
  1306. if (rc)
  1307. goto out_debug;
  1308. rc = tiqdio_register_thinints();
  1309. if (rc)
  1310. goto out_perf;
  1311. return 0;
  1312. out_perf:
  1313. qdio_remove_perf_stats();
  1314. out_debug:
  1315. qdio_debug_exit();
  1316. out_ti:
  1317. tiqdio_free_memory();
  1318. out_cache:
  1319. qdio_setup_exit();
  1320. return rc;
  1321. }
  1322. static void __exit exit_QDIO(void)
  1323. {
  1324. tiqdio_unregister_thinints();
  1325. tiqdio_free_memory();
  1326. qdio_remove_perf_stats();
  1327. qdio_debug_exit();
  1328. qdio_setup_exit();
  1329. }
  1330. module_init(init_QDIO);
  1331. module_exit(exit_QDIO);