rtc-twl4030.c 14 KB

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  1. /*
  2. * rtc-twl4030.c -- TWL4030 Real Time Clock interface
  3. *
  4. * Copyright (C) 2007 MontaVista Software, Inc
  5. * Author: Alexandre Rusev <source@mvista.com>
  6. *
  7. * Based on original TI driver twl4030-rtc.c
  8. * Copyright (C) 2006 Texas Instruments, Inc.
  9. *
  10. * Based on rtc-omap.c
  11. * Copyright (C) 2003 MontaVista Software, Inc.
  12. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  13. * Copyright (C) 2006 David Brownell
  14. *
  15. * This program is free software; you can redistribute it and/or
  16. * modify it under the terms of the GNU General Public License
  17. * as published by the Free Software Foundation; either version
  18. * 2 of the License, or (at your option) any later version.
  19. */
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/types.h>
  25. #include <linux/rtc.h>
  26. #include <linux/bcd.h>
  27. #include <linux/platform_device.h>
  28. #include <linux/interrupt.h>
  29. #include <linux/i2c/twl4030.h>
  30. /*
  31. * RTC block register offsets (use TWL_MODULE_RTC)
  32. */
  33. #define REG_SECONDS_REG 0x00
  34. #define REG_MINUTES_REG 0x01
  35. #define REG_HOURS_REG 0x02
  36. #define REG_DAYS_REG 0x03
  37. #define REG_MONTHS_REG 0x04
  38. #define REG_YEARS_REG 0x05
  39. #define REG_WEEKS_REG 0x06
  40. #define REG_ALARM_SECONDS_REG 0x07
  41. #define REG_ALARM_MINUTES_REG 0x08
  42. #define REG_ALARM_HOURS_REG 0x09
  43. #define REG_ALARM_DAYS_REG 0x0A
  44. #define REG_ALARM_MONTHS_REG 0x0B
  45. #define REG_ALARM_YEARS_REG 0x0C
  46. #define REG_RTC_CTRL_REG 0x0D
  47. #define REG_RTC_STATUS_REG 0x0E
  48. #define REG_RTC_INTERRUPTS_REG 0x0F
  49. #define REG_RTC_COMP_LSB_REG 0x10
  50. #define REG_RTC_COMP_MSB_REG 0x11
  51. /* RTC_CTRL_REG bitfields */
  52. #define BIT_RTC_CTRL_REG_STOP_RTC_M 0x01
  53. #define BIT_RTC_CTRL_REG_ROUND_30S_M 0x02
  54. #define BIT_RTC_CTRL_REG_AUTO_COMP_M 0x04
  55. #define BIT_RTC_CTRL_REG_MODE_12_24_M 0x08
  56. #define BIT_RTC_CTRL_REG_TEST_MODE_M 0x10
  57. #define BIT_RTC_CTRL_REG_SET_32_COUNTER_M 0x20
  58. #define BIT_RTC_CTRL_REG_GET_TIME_M 0x40
  59. /* RTC_STATUS_REG bitfields */
  60. #define BIT_RTC_STATUS_REG_RUN_M 0x02
  61. #define BIT_RTC_STATUS_REG_1S_EVENT_M 0x04
  62. #define BIT_RTC_STATUS_REG_1M_EVENT_M 0x08
  63. #define BIT_RTC_STATUS_REG_1H_EVENT_M 0x10
  64. #define BIT_RTC_STATUS_REG_1D_EVENT_M 0x20
  65. #define BIT_RTC_STATUS_REG_ALARM_M 0x40
  66. #define BIT_RTC_STATUS_REG_POWER_UP_M 0x80
  67. /* RTC_INTERRUPTS_REG bitfields */
  68. #define BIT_RTC_INTERRUPTS_REG_EVERY_M 0x03
  69. #define BIT_RTC_INTERRUPTS_REG_IT_TIMER_M 0x04
  70. #define BIT_RTC_INTERRUPTS_REG_IT_ALARM_M 0x08
  71. /* REG_SECONDS_REG through REG_YEARS_REG is how many registers? */
  72. #define ALL_TIME_REGS 6
  73. /*----------------------------------------------------------------------*/
  74. /*
  75. * Supports 1 byte read from TWL4030 RTC register.
  76. */
  77. static int twl4030_rtc_read_u8(u8 *data, u8 reg)
  78. {
  79. int ret;
  80. ret = twl4030_i2c_read_u8(TWL4030_MODULE_RTC, data, reg);
  81. if (ret < 0)
  82. pr_err("twl4030_rtc: Could not read TWL4030"
  83. "register %X - error %d\n", reg, ret);
  84. return ret;
  85. }
  86. /*
  87. * Supports 1 byte write to TWL4030 RTC registers.
  88. */
  89. static int twl4030_rtc_write_u8(u8 data, u8 reg)
  90. {
  91. int ret;
  92. ret = twl4030_i2c_write_u8(TWL4030_MODULE_RTC, data, reg);
  93. if (ret < 0)
  94. pr_err("twl4030_rtc: Could not write TWL4030"
  95. "register %X - error %d\n", reg, ret);
  96. return ret;
  97. }
  98. /*
  99. * Cache the value for timer/alarm interrupts register; this is
  100. * only changed by callers holding rtc ops lock (or resume).
  101. */
  102. static unsigned char rtc_irq_bits;
  103. /*
  104. * Enable 1/second update and/or alarm interrupts.
  105. */
  106. static int set_rtc_irq_bit(unsigned char bit)
  107. {
  108. unsigned char val;
  109. int ret;
  110. val = rtc_irq_bits | bit;
  111. val &= ~BIT_RTC_INTERRUPTS_REG_EVERY_M;
  112. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  113. if (ret == 0)
  114. rtc_irq_bits = val;
  115. return ret;
  116. }
  117. /*
  118. * Disable update and/or alarm interrupts.
  119. */
  120. static int mask_rtc_irq_bit(unsigned char bit)
  121. {
  122. unsigned char val;
  123. int ret;
  124. val = rtc_irq_bits & ~bit;
  125. ret = twl4030_rtc_write_u8(val, REG_RTC_INTERRUPTS_REG);
  126. if (ret == 0)
  127. rtc_irq_bits = val;
  128. return ret;
  129. }
  130. static int twl4030_rtc_alarm_irq_enable(struct device *dev, unsigned enabled)
  131. {
  132. int ret;
  133. if (enabled)
  134. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  135. else
  136. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  137. return ret;
  138. }
  139. static int twl4030_rtc_update_irq_enable(struct device *dev, unsigned enabled)
  140. {
  141. int ret;
  142. if (enabled)
  143. ret = set_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  144. else
  145. ret = mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  146. return ret;
  147. }
  148. /*
  149. * Gets current TWL4030 RTC time and date parameters.
  150. *
  151. * The RTC's time/alarm representation is not what gmtime(3) requires
  152. * Linux to use:
  153. *
  154. * - Months are 1..12 vs Linux 0-11
  155. * - Years are 0..99 vs Linux 1900..N (we assume 21st century)
  156. */
  157. static int twl4030_rtc_read_time(struct device *dev, struct rtc_time *tm)
  158. {
  159. unsigned char rtc_data[ALL_TIME_REGS + 1];
  160. int ret;
  161. u8 save_control;
  162. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  163. if (ret < 0)
  164. return ret;
  165. save_control |= BIT_RTC_CTRL_REG_GET_TIME_M;
  166. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  167. if (ret < 0)
  168. return ret;
  169. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  170. REG_SECONDS_REG, ALL_TIME_REGS);
  171. if (ret < 0) {
  172. dev_err(dev, "rtc_read_time error %d\n", ret);
  173. return ret;
  174. }
  175. tm->tm_sec = bcd2bin(rtc_data[0]);
  176. tm->tm_min = bcd2bin(rtc_data[1]);
  177. tm->tm_hour = bcd2bin(rtc_data[2]);
  178. tm->tm_mday = bcd2bin(rtc_data[3]);
  179. tm->tm_mon = bcd2bin(rtc_data[4]) - 1;
  180. tm->tm_year = bcd2bin(rtc_data[5]) + 100;
  181. return ret;
  182. }
  183. static int twl4030_rtc_set_time(struct device *dev, struct rtc_time *tm)
  184. {
  185. unsigned char save_control;
  186. unsigned char rtc_data[ALL_TIME_REGS + 1];
  187. int ret;
  188. rtc_data[1] = bin2bcd(tm->tm_sec);
  189. rtc_data[2] = bin2bcd(tm->tm_min);
  190. rtc_data[3] = bin2bcd(tm->tm_hour);
  191. rtc_data[4] = bin2bcd(tm->tm_mday);
  192. rtc_data[5] = bin2bcd(tm->tm_mon + 1);
  193. rtc_data[6] = bin2bcd(tm->tm_year - 100);
  194. /* Stop RTC while updating the TC registers */
  195. ret = twl4030_rtc_read_u8(&save_control, REG_RTC_CTRL_REG);
  196. if (ret < 0)
  197. goto out;
  198. save_control &= ~BIT_RTC_CTRL_REG_STOP_RTC_M;
  199. twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  200. if (ret < 0)
  201. goto out;
  202. /* update all the time registers in one shot */
  203. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, rtc_data,
  204. REG_SECONDS_REG, ALL_TIME_REGS);
  205. if (ret < 0) {
  206. dev_err(dev, "rtc_set_time error %d\n", ret);
  207. goto out;
  208. }
  209. /* Start back RTC */
  210. save_control |= BIT_RTC_CTRL_REG_STOP_RTC_M;
  211. ret = twl4030_rtc_write_u8(save_control, REG_RTC_CTRL_REG);
  212. out:
  213. return ret;
  214. }
  215. /*
  216. * Gets current TWL4030 RTC alarm time.
  217. */
  218. static int twl4030_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  219. {
  220. unsigned char rtc_data[ALL_TIME_REGS + 1];
  221. int ret;
  222. ret = twl4030_i2c_read(TWL4030_MODULE_RTC, rtc_data,
  223. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  224. if (ret < 0) {
  225. dev_err(dev, "rtc_read_alarm error %d\n", ret);
  226. return ret;
  227. }
  228. /* some of these fields may be wildcard/"match all" */
  229. alm->time.tm_sec = bcd2bin(rtc_data[0]);
  230. alm->time.tm_min = bcd2bin(rtc_data[1]);
  231. alm->time.tm_hour = bcd2bin(rtc_data[2]);
  232. alm->time.tm_mday = bcd2bin(rtc_data[3]);
  233. alm->time.tm_mon = bcd2bin(rtc_data[4]) - 1;
  234. alm->time.tm_year = bcd2bin(rtc_data[5]) + 100;
  235. /* report cached alarm enable state */
  236. if (rtc_irq_bits & BIT_RTC_INTERRUPTS_REG_IT_ALARM_M)
  237. alm->enabled = 1;
  238. return ret;
  239. }
  240. static int twl4030_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  241. {
  242. unsigned char alarm_data[ALL_TIME_REGS + 1];
  243. int ret;
  244. ret = twl4030_rtc_alarm_irq_enable(dev, 0);
  245. if (ret)
  246. goto out;
  247. alarm_data[1] = bin2bcd(alm->time.tm_sec);
  248. alarm_data[2] = bin2bcd(alm->time.tm_min);
  249. alarm_data[3] = bin2bcd(alm->time.tm_hour);
  250. alarm_data[4] = bin2bcd(alm->time.tm_mday);
  251. alarm_data[5] = bin2bcd(alm->time.tm_mon + 1);
  252. alarm_data[6] = bin2bcd(alm->time.tm_year - 100);
  253. /* update all the alarm registers in one shot */
  254. ret = twl4030_i2c_write(TWL4030_MODULE_RTC, alarm_data,
  255. REG_ALARM_SECONDS_REG, ALL_TIME_REGS);
  256. if (ret) {
  257. dev_err(dev, "rtc_set_alarm error %d\n", ret);
  258. goto out;
  259. }
  260. if (alm->enabled)
  261. ret = twl4030_rtc_alarm_irq_enable(dev, 1);
  262. out:
  263. return ret;
  264. }
  265. static irqreturn_t twl4030_rtc_interrupt(int irq, void *rtc)
  266. {
  267. unsigned long events = 0;
  268. int ret = IRQ_NONE;
  269. int res;
  270. u8 rd_reg;
  271. #ifdef CONFIG_LOCKDEP
  272. /* WORKAROUND for lockdep forcing IRQF_DISABLED on us, which
  273. * we don't want and can't tolerate. Although it might be
  274. * friendlier not to borrow this thread context...
  275. */
  276. local_irq_enable();
  277. #endif
  278. res = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  279. if (res)
  280. goto out;
  281. /*
  282. * Figure out source of interrupt: ALARM or TIMER in RTC_STATUS_REG.
  283. * only one (ALARM or RTC) interrupt source may be enabled
  284. * at time, we also could check our results
  285. * by reading RTS_INTERRUPTS_REGISTER[IT_TIMER,IT_ALARM]
  286. */
  287. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  288. events |= RTC_IRQF | RTC_AF;
  289. else
  290. events |= RTC_IRQF | RTC_UF;
  291. res = twl4030_rtc_write_u8(rd_reg | BIT_RTC_STATUS_REG_ALARM_M,
  292. REG_RTC_STATUS_REG);
  293. if (res)
  294. goto out;
  295. /* Clear on Read enabled. RTC_IT bit of TWL4030_INT_PWR_ISR1
  296. * needs 2 reads to clear the interrupt. One read is done in
  297. * do_twl4030_pwrirq(). Doing the second read, to clear
  298. * the bit.
  299. *
  300. * FIXME the reason PWR_ISR1 needs an extra read is that
  301. * RTC_IF retriggered until we cleared REG_ALARM_M above.
  302. * But re-reading like this is a bad hack; by doing so we
  303. * risk wrongly clearing status for some other IRQ (losing
  304. * the interrupt). Be smarter about handling RTC_UF ...
  305. */
  306. res = twl4030_i2c_read_u8(TWL4030_MODULE_INT,
  307. &rd_reg, TWL4030_INT_PWR_ISR1);
  308. if (res)
  309. goto out;
  310. /* Notify RTC core on event */
  311. rtc_update_irq(rtc, 1, events);
  312. ret = IRQ_HANDLED;
  313. out:
  314. return ret;
  315. }
  316. static struct rtc_class_ops twl4030_rtc_ops = {
  317. .read_time = twl4030_rtc_read_time,
  318. .set_time = twl4030_rtc_set_time,
  319. .read_alarm = twl4030_rtc_read_alarm,
  320. .set_alarm = twl4030_rtc_set_alarm,
  321. .alarm_irq_enable = twl4030_rtc_alarm_irq_enable,
  322. .update_irq_enable = twl4030_rtc_update_irq_enable,
  323. };
  324. /*----------------------------------------------------------------------*/
  325. static int __devinit twl4030_rtc_probe(struct platform_device *pdev)
  326. {
  327. struct rtc_device *rtc;
  328. int ret = 0;
  329. int irq = platform_get_irq(pdev, 0);
  330. u8 rd_reg;
  331. if (irq <= 0)
  332. return -EINVAL;
  333. rtc = rtc_device_register(pdev->name,
  334. &pdev->dev, &twl4030_rtc_ops, THIS_MODULE);
  335. if (IS_ERR(rtc)) {
  336. ret = PTR_ERR(rtc);
  337. dev_err(&pdev->dev, "can't register RTC device, err %ld\n",
  338. PTR_ERR(rtc));
  339. goto out0;
  340. }
  341. platform_set_drvdata(pdev, rtc);
  342. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_STATUS_REG);
  343. if (ret < 0)
  344. goto out1;
  345. if (rd_reg & BIT_RTC_STATUS_REG_POWER_UP_M)
  346. dev_warn(&pdev->dev, "Power up reset detected.\n");
  347. if (rd_reg & BIT_RTC_STATUS_REG_ALARM_M)
  348. dev_warn(&pdev->dev, "Pending Alarm interrupt detected.\n");
  349. /* Clear RTC Power up reset and pending alarm interrupts */
  350. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_STATUS_REG);
  351. if (ret < 0)
  352. goto out1;
  353. ret = request_irq(irq, twl4030_rtc_interrupt,
  354. IRQF_TRIGGER_RISING,
  355. dev_name(&rtc->dev), rtc);
  356. if (ret < 0) {
  357. dev_err(&pdev->dev, "IRQ is not free.\n");
  358. goto out1;
  359. }
  360. /* Check RTC module status, Enable if it is off */
  361. ret = twl4030_rtc_read_u8(&rd_reg, REG_RTC_CTRL_REG);
  362. if (ret < 0)
  363. goto out2;
  364. if (!(rd_reg & BIT_RTC_CTRL_REG_STOP_RTC_M)) {
  365. dev_info(&pdev->dev, "Enabling TWL4030-RTC.\n");
  366. rd_reg = BIT_RTC_CTRL_REG_STOP_RTC_M;
  367. ret = twl4030_rtc_write_u8(rd_reg, REG_RTC_CTRL_REG);
  368. if (ret < 0)
  369. goto out2;
  370. }
  371. /* init cached IRQ enable bits */
  372. ret = twl4030_rtc_read_u8(&rtc_irq_bits, REG_RTC_INTERRUPTS_REG);
  373. if (ret < 0)
  374. goto out2;
  375. return ret;
  376. out2:
  377. free_irq(irq, rtc);
  378. out1:
  379. rtc_device_unregister(rtc);
  380. out0:
  381. return ret;
  382. }
  383. /*
  384. * Disable all TWL4030 RTC module interrupts.
  385. * Sets status flag to free.
  386. */
  387. static int __devexit twl4030_rtc_remove(struct platform_device *pdev)
  388. {
  389. /* leave rtc running, but disable irqs */
  390. struct rtc_device *rtc = platform_get_drvdata(pdev);
  391. int irq = platform_get_irq(pdev, 0);
  392. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_ALARM_M);
  393. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  394. free_irq(irq, rtc);
  395. rtc_device_unregister(rtc);
  396. platform_set_drvdata(pdev, NULL);
  397. return 0;
  398. }
  399. static void twl4030_rtc_shutdown(struct platform_device *pdev)
  400. {
  401. /* mask timer interrupts, but leave alarm interrupts on to enable
  402. power-on when alarm is triggered */
  403. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  404. }
  405. #ifdef CONFIG_PM
  406. static unsigned char irqstat;
  407. static int twl4030_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  408. {
  409. irqstat = rtc_irq_bits;
  410. mask_rtc_irq_bit(BIT_RTC_INTERRUPTS_REG_IT_TIMER_M);
  411. return 0;
  412. }
  413. static int twl4030_rtc_resume(struct platform_device *pdev)
  414. {
  415. set_rtc_irq_bit(irqstat);
  416. return 0;
  417. }
  418. #else
  419. #define twl4030_rtc_suspend NULL
  420. #define twl4030_rtc_resume NULL
  421. #endif
  422. MODULE_ALIAS("platform:twl4030_rtc");
  423. static struct platform_driver twl4030rtc_driver = {
  424. .probe = twl4030_rtc_probe,
  425. .remove = __devexit_p(twl4030_rtc_remove),
  426. .shutdown = twl4030_rtc_shutdown,
  427. .suspend = twl4030_rtc_suspend,
  428. .resume = twl4030_rtc_resume,
  429. .driver = {
  430. .owner = THIS_MODULE,
  431. .name = "twl4030_rtc",
  432. },
  433. };
  434. static int __init twl4030_rtc_init(void)
  435. {
  436. return platform_driver_register(&twl4030rtc_driver);
  437. }
  438. module_init(twl4030_rtc_init);
  439. static void __exit twl4030_rtc_exit(void)
  440. {
  441. platform_driver_unregister(&twl4030rtc_driver);
  442. }
  443. module_exit(twl4030_rtc_exit);
  444. MODULE_AUTHOR("Texas Instruments, MontaVista Software");
  445. MODULE_LICENSE("GPL");