rtc-rs5c372.c 18 KB

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  1. /*
  2. * An I2C driver for Ricoh RS5C372, R2025S/D and RV5C38[67] RTCs
  3. *
  4. * Copyright (C) 2005 Pavel Mironchik <pmironchik@optifacio.net>
  5. * Copyright (C) 2006 Tower Technologies
  6. * Copyright (C) 2008 Paul Mundt
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/i2c.h>
  13. #include <linux/rtc.h>
  14. #include <linux/bcd.h>
  15. #define DRV_VERSION "0.6"
  16. /*
  17. * Ricoh has a family of I2C based RTCs, which differ only slightly from
  18. * each other. Differences center on pinout (e.g. how many interrupts,
  19. * output clock, etc) and how the control registers are used. The '372
  20. * is significant only because that's the one this driver first supported.
  21. */
  22. #define RS5C372_REG_SECS 0
  23. #define RS5C372_REG_MINS 1
  24. #define RS5C372_REG_HOURS 2
  25. #define RS5C372_REG_WDAY 3
  26. #define RS5C372_REG_DAY 4
  27. #define RS5C372_REG_MONTH 5
  28. #define RS5C372_REG_YEAR 6
  29. #define RS5C372_REG_TRIM 7
  30. # define RS5C372_TRIM_XSL 0x80
  31. # define RS5C372_TRIM_MASK 0x7F
  32. #define RS5C_REG_ALARM_A_MIN 8 /* or ALARM_W */
  33. #define RS5C_REG_ALARM_A_HOURS 9
  34. #define RS5C_REG_ALARM_A_WDAY 10
  35. #define RS5C_REG_ALARM_B_MIN 11 /* or ALARM_D */
  36. #define RS5C_REG_ALARM_B_HOURS 12
  37. #define RS5C_REG_ALARM_B_WDAY 13 /* (ALARM_B only) */
  38. #define RS5C_REG_CTRL1 14
  39. # define RS5C_CTRL1_AALE (1 << 7) /* or WALE */
  40. # define RS5C_CTRL1_BALE (1 << 6) /* or DALE */
  41. # define RV5C387_CTRL1_24 (1 << 5)
  42. # define RS5C372A_CTRL1_SL1 (1 << 5)
  43. # define RS5C_CTRL1_CT_MASK (7 << 0)
  44. # define RS5C_CTRL1_CT0 (0 << 0) /* no periodic irq */
  45. # define RS5C_CTRL1_CT4 (4 << 0) /* 1 Hz level irq */
  46. #define RS5C_REG_CTRL2 15
  47. # define RS5C372_CTRL2_24 (1 << 5)
  48. # define R2025_CTRL2_XST (1 << 5)
  49. # define RS5C_CTRL2_XSTP (1 << 4) /* only if !R2025S/D */
  50. # define RS5C_CTRL2_CTFG (1 << 2)
  51. # define RS5C_CTRL2_AAFG (1 << 1) /* or WAFG */
  52. # define RS5C_CTRL2_BAFG (1 << 0) /* or DAFG */
  53. /* to read (style 1) or write registers starting at R */
  54. #define RS5C_ADDR(R) (((R) << 4) | 0)
  55. enum rtc_type {
  56. rtc_undef = 0,
  57. rtc_r2025sd,
  58. rtc_rs5c372a,
  59. rtc_rs5c372b,
  60. rtc_rv5c386,
  61. rtc_rv5c387a,
  62. };
  63. static const struct i2c_device_id rs5c372_id[] = {
  64. { "r2025sd", rtc_r2025sd },
  65. { "rs5c372a", rtc_rs5c372a },
  66. { "rs5c372b", rtc_rs5c372b },
  67. { "rv5c386", rtc_rv5c386 },
  68. { "rv5c387a", rtc_rv5c387a },
  69. { }
  70. };
  71. MODULE_DEVICE_TABLE(i2c, rs5c372_id);
  72. /* REVISIT: this assumes that:
  73. * - we're in the 21st century, so it's safe to ignore the century
  74. * bit for rv5c38[67] (REG_MONTH bit 7);
  75. * - we should use ALARM_A not ALARM_B (may be wrong on some boards)
  76. */
  77. struct rs5c372 {
  78. struct i2c_client *client;
  79. struct rtc_device *rtc;
  80. enum rtc_type type;
  81. unsigned time24:1;
  82. unsigned has_irq:1;
  83. unsigned smbus:1;
  84. char buf[17];
  85. char *regs;
  86. };
  87. static int rs5c_get_regs(struct rs5c372 *rs5c)
  88. {
  89. struct i2c_client *client = rs5c->client;
  90. struct i2c_msg msgs[] = {
  91. { client->addr, I2C_M_RD, sizeof rs5c->buf, rs5c->buf },
  92. };
  93. /* This implements the third reading method from the datasheet, using
  94. * an internal address that's reset after each transaction (by STOP)
  95. * to 0x0f ... so we read extra registers, and skip the first one.
  96. *
  97. * The first method doesn't work with the iop3xx adapter driver, on at
  98. * least 80219 chips; this works around that bug.
  99. *
  100. * The third method on the other hand doesn't work for the SMBus-only
  101. * configurations, so we use the the first method there, stripping off
  102. * the extra register in the process.
  103. */
  104. if (rs5c->smbus) {
  105. int addr = RS5C_ADDR(RS5C372_REG_SECS);
  106. int size = sizeof(rs5c->buf) - 1;
  107. if (i2c_smbus_read_i2c_block_data(client, addr, size,
  108. rs5c->buf + 1) != size) {
  109. dev_warn(&client->dev, "can't read registers\n");
  110. return -EIO;
  111. }
  112. } else {
  113. if ((i2c_transfer(client->adapter, msgs, 1)) != 1) {
  114. dev_warn(&client->dev, "can't read registers\n");
  115. return -EIO;
  116. }
  117. }
  118. dev_dbg(&client->dev,
  119. "%02x %02x %02x (%02x) %02x %02x %02x (%02x), "
  120. "%02x %02x %02x, %02x %02x %02x; %02x %02x\n",
  121. rs5c->regs[0], rs5c->regs[1], rs5c->regs[2], rs5c->regs[3],
  122. rs5c->regs[4], rs5c->regs[5], rs5c->regs[6], rs5c->regs[7],
  123. rs5c->regs[8], rs5c->regs[9], rs5c->regs[10], rs5c->regs[11],
  124. rs5c->regs[12], rs5c->regs[13], rs5c->regs[14], rs5c->regs[15]);
  125. return 0;
  126. }
  127. static unsigned rs5c_reg2hr(struct rs5c372 *rs5c, unsigned reg)
  128. {
  129. unsigned hour;
  130. if (rs5c->time24)
  131. return bcd2bin(reg & 0x3f);
  132. hour = bcd2bin(reg & 0x1f);
  133. if (hour == 12)
  134. hour = 0;
  135. if (reg & 0x20)
  136. hour += 12;
  137. return hour;
  138. }
  139. static unsigned rs5c_hr2reg(struct rs5c372 *rs5c, unsigned hour)
  140. {
  141. if (rs5c->time24)
  142. return bin2bcd(hour);
  143. if (hour > 12)
  144. return 0x20 | bin2bcd(hour - 12);
  145. if (hour == 12)
  146. return 0x20 | bin2bcd(12);
  147. if (hour == 0)
  148. return bin2bcd(12);
  149. return bin2bcd(hour);
  150. }
  151. static int rs5c372_get_datetime(struct i2c_client *client, struct rtc_time *tm)
  152. {
  153. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  154. int status = rs5c_get_regs(rs5c);
  155. if (status < 0)
  156. return status;
  157. tm->tm_sec = bcd2bin(rs5c->regs[RS5C372_REG_SECS] & 0x7f);
  158. tm->tm_min = bcd2bin(rs5c->regs[RS5C372_REG_MINS] & 0x7f);
  159. tm->tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C372_REG_HOURS]);
  160. tm->tm_wday = bcd2bin(rs5c->regs[RS5C372_REG_WDAY] & 0x07);
  161. tm->tm_mday = bcd2bin(rs5c->regs[RS5C372_REG_DAY] & 0x3f);
  162. /* tm->tm_mon is zero-based */
  163. tm->tm_mon = bcd2bin(rs5c->regs[RS5C372_REG_MONTH] & 0x1f) - 1;
  164. /* year is 1900 + tm->tm_year */
  165. tm->tm_year = bcd2bin(rs5c->regs[RS5C372_REG_YEAR]) + 100;
  166. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d, "
  167. "mday=%d, mon=%d, year=%d, wday=%d\n",
  168. __func__,
  169. tm->tm_sec, tm->tm_min, tm->tm_hour,
  170. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  171. /* rtc might need initialization */
  172. return rtc_valid_tm(tm);
  173. }
  174. static int rs5c372_set_datetime(struct i2c_client *client, struct rtc_time *tm)
  175. {
  176. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  177. unsigned char buf[8];
  178. int addr;
  179. dev_dbg(&client->dev, "%s: tm is secs=%d, mins=%d, hours=%d "
  180. "mday=%d, mon=%d, year=%d, wday=%d\n",
  181. __func__,
  182. tm->tm_sec, tm->tm_min, tm->tm_hour,
  183. tm->tm_mday, tm->tm_mon, tm->tm_year, tm->tm_wday);
  184. addr = RS5C_ADDR(RS5C372_REG_SECS);
  185. buf[0] = bin2bcd(tm->tm_sec);
  186. buf[1] = bin2bcd(tm->tm_min);
  187. buf[2] = rs5c_hr2reg(rs5c, tm->tm_hour);
  188. buf[3] = bin2bcd(tm->tm_wday);
  189. buf[4] = bin2bcd(tm->tm_mday);
  190. buf[5] = bin2bcd(tm->tm_mon + 1);
  191. buf[6] = bin2bcd(tm->tm_year - 100);
  192. if (i2c_smbus_write_i2c_block_data(client, addr, sizeof(buf), buf) < 0) {
  193. dev_err(&client->dev, "%s: write error\n", __func__);
  194. return -EIO;
  195. }
  196. return 0;
  197. }
  198. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  199. #define NEED_TRIM
  200. #endif
  201. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  202. #define NEED_TRIM
  203. #endif
  204. #ifdef NEED_TRIM
  205. static int rs5c372_get_trim(struct i2c_client *client, int *osc, int *trim)
  206. {
  207. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  208. u8 tmp = rs5c372->regs[RS5C372_REG_TRIM];
  209. if (osc)
  210. *osc = (tmp & RS5C372_TRIM_XSL) ? 32000 : 32768;
  211. if (trim) {
  212. dev_dbg(&client->dev, "%s: raw trim=%x\n", __func__, tmp);
  213. tmp &= RS5C372_TRIM_MASK;
  214. if (tmp & 0x3e) {
  215. int t = tmp & 0x3f;
  216. if (tmp & 0x40)
  217. t = (~t | (s8)0xc0) + 1;
  218. else
  219. t = t - 1;
  220. tmp = t * 2;
  221. } else
  222. tmp = 0;
  223. *trim = tmp;
  224. }
  225. return 0;
  226. }
  227. #endif
  228. static int rs5c372_rtc_read_time(struct device *dev, struct rtc_time *tm)
  229. {
  230. return rs5c372_get_datetime(to_i2c_client(dev), tm);
  231. }
  232. static int rs5c372_rtc_set_time(struct device *dev, struct rtc_time *tm)
  233. {
  234. return rs5c372_set_datetime(to_i2c_client(dev), tm);
  235. }
  236. #if defined(CONFIG_RTC_INTF_DEV) || defined(CONFIG_RTC_INTF_DEV_MODULE)
  237. static int
  238. rs5c_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  239. {
  240. struct i2c_client *client = to_i2c_client(dev);
  241. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  242. unsigned char buf;
  243. int status, addr;
  244. buf = rs5c->regs[RS5C_REG_CTRL1];
  245. switch (cmd) {
  246. case RTC_UIE_OFF:
  247. case RTC_UIE_ON:
  248. /* some 327a modes use a different IRQ pin for 1Hz irqs */
  249. if (rs5c->type == rtc_rs5c372a
  250. && (buf & RS5C372A_CTRL1_SL1))
  251. return -ENOIOCTLCMD;
  252. case RTC_AIE_OFF:
  253. case RTC_AIE_ON:
  254. /* these irq management calls only make sense for chips
  255. * which are wired up to an IRQ.
  256. */
  257. if (!rs5c->has_irq)
  258. return -ENOIOCTLCMD;
  259. break;
  260. default:
  261. return -ENOIOCTLCMD;
  262. }
  263. status = rs5c_get_regs(rs5c);
  264. if (status < 0)
  265. return status;
  266. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  267. switch (cmd) {
  268. case RTC_AIE_OFF: /* alarm off */
  269. buf &= ~RS5C_CTRL1_AALE;
  270. break;
  271. case RTC_AIE_ON: /* alarm on */
  272. buf |= RS5C_CTRL1_AALE;
  273. break;
  274. case RTC_UIE_OFF: /* update off */
  275. buf &= ~RS5C_CTRL1_CT_MASK;
  276. break;
  277. case RTC_UIE_ON: /* update on */
  278. buf &= ~RS5C_CTRL1_CT_MASK;
  279. buf |= RS5C_CTRL1_CT4;
  280. break;
  281. }
  282. if (i2c_smbus_write_byte_data(client, addr, buf) < 0) {
  283. printk(KERN_WARNING "%s: can't update alarm\n",
  284. rs5c->rtc->name);
  285. status = -EIO;
  286. } else
  287. rs5c->regs[RS5C_REG_CTRL1] = buf;
  288. return status;
  289. }
  290. #else
  291. #define rs5c_rtc_ioctl NULL
  292. #endif
  293. /* NOTE: Since RTC_WKALM_{RD,SET} were originally defined for EFI,
  294. * which only exposes a polled programming interface; and since
  295. * these calls map directly to those EFI requests; we don't demand
  296. * we have an IRQ for this chip when we go through this API.
  297. *
  298. * The older x86_pc derived RTC_ALM_{READ,SET} calls require irqs
  299. * though, managed through RTC_AIE_{ON,OFF} requests.
  300. */
  301. static int rs5c_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  302. {
  303. struct i2c_client *client = to_i2c_client(dev);
  304. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  305. int status;
  306. status = rs5c_get_regs(rs5c);
  307. if (status < 0)
  308. return status;
  309. /* report alarm time */
  310. t->time.tm_sec = 0;
  311. t->time.tm_min = bcd2bin(rs5c->regs[RS5C_REG_ALARM_A_MIN] & 0x7f);
  312. t->time.tm_hour = rs5c_reg2hr(rs5c, rs5c->regs[RS5C_REG_ALARM_A_HOURS]);
  313. t->time.tm_mday = -1;
  314. t->time.tm_mon = -1;
  315. t->time.tm_year = -1;
  316. t->time.tm_wday = -1;
  317. t->time.tm_yday = -1;
  318. t->time.tm_isdst = -1;
  319. /* ... and status */
  320. t->enabled = !!(rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE);
  321. t->pending = !!(rs5c->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_AAFG);
  322. return 0;
  323. }
  324. static int rs5c_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  325. {
  326. struct i2c_client *client = to_i2c_client(dev);
  327. struct rs5c372 *rs5c = i2c_get_clientdata(client);
  328. int status, addr, i;
  329. unsigned char buf[3];
  330. /* only handle up to 24 hours in the future, like RTC_ALM_SET */
  331. if (t->time.tm_mday != -1
  332. || t->time.tm_mon != -1
  333. || t->time.tm_year != -1)
  334. return -EINVAL;
  335. /* REVISIT: round up tm_sec */
  336. /* if needed, disable irq (clears pending status) */
  337. status = rs5c_get_regs(rs5c);
  338. if (status < 0)
  339. return status;
  340. if (rs5c->regs[RS5C_REG_CTRL1] & RS5C_CTRL1_AALE) {
  341. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  342. buf[0] = rs5c->regs[RS5C_REG_CTRL1] & ~RS5C_CTRL1_AALE;
  343. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0) {
  344. pr_debug("%s: can't disable alarm\n", rs5c->rtc->name);
  345. return -EIO;
  346. }
  347. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  348. }
  349. /* set alarm */
  350. buf[0] = bin2bcd(t->time.tm_min);
  351. buf[1] = rs5c_hr2reg(rs5c, t->time.tm_hour);
  352. buf[2] = 0x7f; /* any/all days */
  353. for (i = 0; i < sizeof(buf); i++) {
  354. addr = RS5C_ADDR(RS5C_REG_ALARM_A_MIN + i);
  355. if (i2c_smbus_write_byte_data(client, addr, buf[i]) < 0) {
  356. pr_debug("%s: can't set alarm time\n", rs5c->rtc->name);
  357. return -EIO;
  358. }
  359. }
  360. /* ... and maybe enable its irq */
  361. if (t->enabled) {
  362. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  363. buf[0] = rs5c->regs[RS5C_REG_CTRL1] | RS5C_CTRL1_AALE;
  364. if (i2c_smbus_write_byte_data(client, addr, buf[0]) < 0)
  365. printk(KERN_WARNING "%s: can't enable alarm\n",
  366. rs5c->rtc->name);
  367. rs5c->regs[RS5C_REG_CTRL1] = buf[0];
  368. }
  369. return 0;
  370. }
  371. #if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
  372. static int rs5c372_rtc_proc(struct device *dev, struct seq_file *seq)
  373. {
  374. int err, osc, trim;
  375. err = rs5c372_get_trim(to_i2c_client(dev), &osc, &trim);
  376. if (err == 0) {
  377. seq_printf(seq, "crystal\t\t: %d.%03d KHz\n",
  378. osc / 1000, osc % 1000);
  379. seq_printf(seq, "trim\t\t: %d\n", trim);
  380. }
  381. return 0;
  382. }
  383. #else
  384. #define rs5c372_rtc_proc NULL
  385. #endif
  386. static const struct rtc_class_ops rs5c372_rtc_ops = {
  387. .proc = rs5c372_rtc_proc,
  388. .ioctl = rs5c_rtc_ioctl,
  389. .read_time = rs5c372_rtc_read_time,
  390. .set_time = rs5c372_rtc_set_time,
  391. .read_alarm = rs5c_read_alarm,
  392. .set_alarm = rs5c_set_alarm,
  393. };
  394. #if defined(CONFIG_RTC_INTF_SYSFS) || defined(CONFIG_RTC_INTF_SYSFS_MODULE)
  395. static ssize_t rs5c372_sysfs_show_trim(struct device *dev,
  396. struct device_attribute *attr, char *buf)
  397. {
  398. int err, trim;
  399. err = rs5c372_get_trim(to_i2c_client(dev), NULL, &trim);
  400. if (err)
  401. return err;
  402. return sprintf(buf, "%d\n", trim);
  403. }
  404. static DEVICE_ATTR(trim, S_IRUGO, rs5c372_sysfs_show_trim, NULL);
  405. static ssize_t rs5c372_sysfs_show_osc(struct device *dev,
  406. struct device_attribute *attr, char *buf)
  407. {
  408. int err, osc;
  409. err = rs5c372_get_trim(to_i2c_client(dev), &osc, NULL);
  410. if (err)
  411. return err;
  412. return sprintf(buf, "%d.%03d KHz\n", osc / 1000, osc % 1000);
  413. }
  414. static DEVICE_ATTR(osc, S_IRUGO, rs5c372_sysfs_show_osc, NULL);
  415. static int rs5c_sysfs_register(struct device *dev)
  416. {
  417. int err;
  418. err = device_create_file(dev, &dev_attr_trim);
  419. if (err)
  420. return err;
  421. err = device_create_file(dev, &dev_attr_osc);
  422. if (err)
  423. device_remove_file(dev, &dev_attr_trim);
  424. return err;
  425. }
  426. static void rs5c_sysfs_unregister(struct device *dev)
  427. {
  428. device_remove_file(dev, &dev_attr_trim);
  429. device_remove_file(dev, &dev_attr_osc);
  430. }
  431. #else
  432. static int rs5c_sysfs_register(struct device *dev)
  433. {
  434. return 0;
  435. }
  436. static void rs5c_sysfs_unregister(struct device *dev)
  437. {
  438. /* nothing */
  439. }
  440. #endif /* SYSFS */
  441. static struct i2c_driver rs5c372_driver;
  442. static int rs5c_oscillator_setup(struct rs5c372 *rs5c372)
  443. {
  444. unsigned char buf[2];
  445. int addr, i, ret = 0;
  446. if (rs5c372->type == rtc_r2025sd) {
  447. if (!(rs5c372->regs[RS5C_REG_CTRL2] & R2025_CTRL2_XST))
  448. return ret;
  449. rs5c372->regs[RS5C_REG_CTRL2] &= ~R2025_CTRL2_XST;
  450. } else {
  451. if (!(rs5c372->regs[RS5C_REG_CTRL2] & RS5C_CTRL2_XSTP))
  452. return ret;
  453. rs5c372->regs[RS5C_REG_CTRL2] &= ~RS5C_CTRL2_XSTP;
  454. }
  455. addr = RS5C_ADDR(RS5C_REG_CTRL1);
  456. buf[0] = rs5c372->regs[RS5C_REG_CTRL1];
  457. buf[1] = rs5c372->regs[RS5C_REG_CTRL2];
  458. /* use 24hr mode */
  459. switch (rs5c372->type) {
  460. case rtc_rs5c372a:
  461. case rtc_rs5c372b:
  462. buf[1] |= RS5C372_CTRL2_24;
  463. rs5c372->time24 = 1;
  464. break;
  465. case rtc_r2025sd:
  466. case rtc_rv5c386:
  467. case rtc_rv5c387a:
  468. buf[0] |= RV5C387_CTRL1_24;
  469. rs5c372->time24 = 1;
  470. break;
  471. default:
  472. /* impossible */
  473. break;
  474. }
  475. for (i = 0; i < sizeof(buf); i++) {
  476. addr = RS5C_ADDR(RS5C_REG_CTRL1 + i);
  477. ret = i2c_smbus_write_byte_data(rs5c372->client, addr, buf[i]);
  478. if (unlikely(ret < 0))
  479. return ret;
  480. }
  481. rs5c372->regs[RS5C_REG_CTRL1] = buf[0];
  482. rs5c372->regs[RS5C_REG_CTRL2] = buf[1];
  483. return 0;
  484. }
  485. static int rs5c372_probe(struct i2c_client *client,
  486. const struct i2c_device_id *id)
  487. {
  488. int err = 0;
  489. int smbus_mode = 0;
  490. struct rs5c372 *rs5c372;
  491. struct rtc_time tm;
  492. dev_dbg(&client->dev, "%s\n", __func__);
  493. if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C |
  494. I2C_FUNC_SMBUS_BYTE_DATA | I2C_FUNC_SMBUS_I2C_BLOCK)) {
  495. /*
  496. * If we don't have any master mode adapter, try breaking
  497. * it down in to the barest of capabilities.
  498. */
  499. if (i2c_check_functionality(client->adapter,
  500. I2C_FUNC_SMBUS_BYTE_DATA |
  501. I2C_FUNC_SMBUS_I2C_BLOCK))
  502. smbus_mode = 1;
  503. else {
  504. /* Still no good, give up */
  505. err = -ENODEV;
  506. goto exit;
  507. }
  508. }
  509. if (!(rs5c372 = kzalloc(sizeof(struct rs5c372), GFP_KERNEL))) {
  510. err = -ENOMEM;
  511. goto exit;
  512. }
  513. rs5c372->client = client;
  514. i2c_set_clientdata(client, rs5c372);
  515. rs5c372->type = id->driver_data;
  516. /* we read registers 0x0f then 0x00-0x0f; skip the first one */
  517. rs5c372->regs = &rs5c372->buf[1];
  518. rs5c372->smbus = smbus_mode;
  519. err = rs5c_get_regs(rs5c372);
  520. if (err < 0)
  521. goto exit_kfree;
  522. /* clock may be set for am/pm or 24 hr time */
  523. switch (rs5c372->type) {
  524. case rtc_rs5c372a:
  525. case rtc_rs5c372b:
  526. /* alarm uses ALARM_A; and nINTRA on 372a, nINTR on 372b.
  527. * so does periodic irq, except some 327a modes.
  528. */
  529. if (rs5c372->regs[RS5C_REG_CTRL2] & RS5C372_CTRL2_24)
  530. rs5c372->time24 = 1;
  531. break;
  532. case rtc_r2025sd:
  533. case rtc_rv5c386:
  534. case rtc_rv5c387a:
  535. if (rs5c372->regs[RS5C_REG_CTRL1] & RV5C387_CTRL1_24)
  536. rs5c372->time24 = 1;
  537. /* alarm uses ALARM_W; and nINTRB for alarm and periodic
  538. * irq, on both 386 and 387
  539. */
  540. break;
  541. default:
  542. dev_err(&client->dev, "unknown RTC type\n");
  543. goto exit_kfree;
  544. }
  545. /* if the oscillator lost power and no other software (like
  546. * the bootloader) set it up, do it here.
  547. *
  548. * The R2025S/D does this a little differently than the other
  549. * parts, so we special case that..
  550. */
  551. err = rs5c_oscillator_setup(rs5c372);
  552. if (unlikely(err < 0)) {
  553. dev_err(&client->dev, "setup error\n");
  554. goto exit_kfree;
  555. }
  556. if (rs5c372_get_datetime(client, &tm) < 0)
  557. dev_warn(&client->dev, "clock needs to be set\n");
  558. dev_info(&client->dev, "%s found, %s, driver version " DRV_VERSION "\n",
  559. ({ char *s; switch (rs5c372->type) {
  560. case rtc_r2025sd: s = "r2025sd"; break;
  561. case rtc_rs5c372a: s = "rs5c372a"; break;
  562. case rtc_rs5c372b: s = "rs5c372b"; break;
  563. case rtc_rv5c386: s = "rv5c386"; break;
  564. case rtc_rv5c387a: s = "rv5c387a"; break;
  565. default: s = "chip"; break;
  566. }; s;}),
  567. rs5c372->time24 ? "24hr" : "am/pm"
  568. );
  569. /* REVISIT use client->irq to register alarm irq ... */
  570. rs5c372->rtc = rtc_device_register(rs5c372_driver.driver.name,
  571. &client->dev, &rs5c372_rtc_ops, THIS_MODULE);
  572. if (IS_ERR(rs5c372->rtc)) {
  573. err = PTR_ERR(rs5c372->rtc);
  574. goto exit_kfree;
  575. }
  576. err = rs5c_sysfs_register(&client->dev);
  577. if (err)
  578. goto exit_devreg;
  579. return 0;
  580. exit_devreg:
  581. rtc_device_unregister(rs5c372->rtc);
  582. exit_kfree:
  583. kfree(rs5c372);
  584. exit:
  585. return err;
  586. }
  587. static int rs5c372_remove(struct i2c_client *client)
  588. {
  589. struct rs5c372 *rs5c372 = i2c_get_clientdata(client);
  590. rtc_device_unregister(rs5c372->rtc);
  591. rs5c_sysfs_unregister(&client->dev);
  592. kfree(rs5c372);
  593. return 0;
  594. }
  595. static struct i2c_driver rs5c372_driver = {
  596. .driver = {
  597. .name = "rtc-rs5c372",
  598. },
  599. .probe = rs5c372_probe,
  600. .remove = rs5c372_remove,
  601. .id_table = rs5c372_id,
  602. };
  603. static __init int rs5c372_init(void)
  604. {
  605. return i2c_add_driver(&rs5c372_driver);
  606. }
  607. static __exit void rs5c372_exit(void)
  608. {
  609. i2c_del_driver(&rs5c372_driver);
  610. }
  611. module_init(rs5c372_init);
  612. module_exit(rs5c372_exit);
  613. MODULE_AUTHOR(
  614. "Pavel Mironchik <pmironchik@optifacio.net>, "
  615. "Alessandro Zummo <a.zummo@towertech.it>, "
  616. "Paul Mundt <lethal@linux-sh.org>");
  617. MODULE_DESCRIPTION("Ricoh RS5C372 RTC driver");
  618. MODULE_LICENSE("GPL");
  619. MODULE_VERSION(DRV_VERSION);