rtc-omap.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512
  1. /*
  2. * TI OMAP1 Real Time Clock interface for Linux
  3. *
  4. * Copyright (C) 2003 MontaVista Software, Inc.
  5. * Author: George G. Davis <gdavis@mvista.com> or <source@mvista.com>
  6. *
  7. * Copyright (C) 2006 David Brownell (new RTC framework)
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #include <linux/kernel.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <linux/ioport.h>
  18. #include <linux/delay.h>
  19. #include <linux/rtc.h>
  20. #include <linux/bcd.h>
  21. #include <linux/platform_device.h>
  22. #include <asm/io.h>
  23. /* The OMAP1 RTC is a year/month/day/hours/minutes/seconds BCD clock
  24. * with century-range alarm matching, driven by the 32kHz clock.
  25. *
  26. * The main user-visible ways it differs from PC RTCs are by omitting
  27. * "don't care" alarm fields and sub-second periodic IRQs, and having
  28. * an autoadjust mechanism to calibrate to the true oscillator rate.
  29. *
  30. * Board-specific wiring options include using split power mode with
  31. * RTC_OFF_NOFF used as the reset signal (so the RTC won't be reset),
  32. * and wiring RTC_WAKE_INT (so the RTC alarm can wake the system from
  33. * low power modes). See the BOARD-SPECIFIC CUSTOMIZATION comment.
  34. */
  35. #define OMAP_RTC_BASE 0xfffb4800
  36. /* RTC registers */
  37. #define OMAP_RTC_SECONDS_REG 0x00
  38. #define OMAP_RTC_MINUTES_REG 0x04
  39. #define OMAP_RTC_HOURS_REG 0x08
  40. #define OMAP_RTC_DAYS_REG 0x0C
  41. #define OMAP_RTC_MONTHS_REG 0x10
  42. #define OMAP_RTC_YEARS_REG 0x14
  43. #define OMAP_RTC_WEEKS_REG 0x18
  44. #define OMAP_RTC_ALARM_SECONDS_REG 0x20
  45. #define OMAP_RTC_ALARM_MINUTES_REG 0x24
  46. #define OMAP_RTC_ALARM_HOURS_REG 0x28
  47. #define OMAP_RTC_ALARM_DAYS_REG 0x2c
  48. #define OMAP_RTC_ALARM_MONTHS_REG 0x30
  49. #define OMAP_RTC_ALARM_YEARS_REG 0x34
  50. #define OMAP_RTC_CTRL_REG 0x40
  51. #define OMAP_RTC_STATUS_REG 0x44
  52. #define OMAP_RTC_INTERRUPTS_REG 0x48
  53. #define OMAP_RTC_COMP_LSB_REG 0x4c
  54. #define OMAP_RTC_COMP_MSB_REG 0x50
  55. #define OMAP_RTC_OSC_REG 0x54
  56. /* OMAP_RTC_CTRL_REG bit fields: */
  57. #define OMAP_RTC_CTRL_SPLIT (1<<7)
  58. #define OMAP_RTC_CTRL_DISABLE (1<<6)
  59. #define OMAP_RTC_CTRL_SET_32_COUNTER (1<<5)
  60. #define OMAP_RTC_CTRL_TEST (1<<4)
  61. #define OMAP_RTC_CTRL_MODE_12_24 (1<<3)
  62. #define OMAP_RTC_CTRL_AUTO_COMP (1<<2)
  63. #define OMAP_RTC_CTRL_ROUND_30S (1<<1)
  64. #define OMAP_RTC_CTRL_STOP (1<<0)
  65. /* OMAP_RTC_STATUS_REG bit fields: */
  66. #define OMAP_RTC_STATUS_POWER_UP (1<<7)
  67. #define OMAP_RTC_STATUS_ALARM (1<<6)
  68. #define OMAP_RTC_STATUS_1D_EVENT (1<<5)
  69. #define OMAP_RTC_STATUS_1H_EVENT (1<<4)
  70. #define OMAP_RTC_STATUS_1M_EVENT (1<<3)
  71. #define OMAP_RTC_STATUS_1S_EVENT (1<<2)
  72. #define OMAP_RTC_STATUS_RUN (1<<1)
  73. #define OMAP_RTC_STATUS_BUSY (1<<0)
  74. /* OMAP_RTC_INTERRUPTS_REG bit fields: */
  75. #define OMAP_RTC_INTERRUPTS_IT_ALARM (1<<3)
  76. #define OMAP_RTC_INTERRUPTS_IT_TIMER (1<<2)
  77. #define rtc_read(addr) omap_readb(OMAP_RTC_BASE + (addr))
  78. #define rtc_write(val, addr) omap_writeb(val, OMAP_RTC_BASE + (addr))
  79. /* we rely on the rtc framework to handle locking (rtc->ops_lock),
  80. * so the only other requirement is that register accesses which
  81. * require BUSY to be clear are made with IRQs locally disabled
  82. */
  83. static void rtc_wait_not_busy(void)
  84. {
  85. int count = 0;
  86. u8 status;
  87. /* BUSY may stay active for 1/32768 second (~30 usec) */
  88. for (count = 0; count < 50; count++) {
  89. status = rtc_read(OMAP_RTC_STATUS_REG);
  90. if ((status & (u8)OMAP_RTC_STATUS_BUSY) == 0)
  91. break;
  92. udelay(1);
  93. }
  94. /* now we have ~15 usec to read/write various registers */
  95. }
  96. static irqreturn_t rtc_irq(int irq, void *rtc)
  97. {
  98. unsigned long events = 0;
  99. u8 irq_data;
  100. irq_data = rtc_read(OMAP_RTC_STATUS_REG);
  101. /* alarm irq? */
  102. if (irq_data & OMAP_RTC_STATUS_ALARM) {
  103. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  104. events |= RTC_IRQF | RTC_AF;
  105. }
  106. /* 1/sec periodic/update irq? */
  107. if (irq_data & OMAP_RTC_STATUS_1S_EVENT)
  108. events |= RTC_IRQF | RTC_UF;
  109. rtc_update_irq(rtc, 1, events);
  110. return IRQ_HANDLED;
  111. }
  112. #ifdef CONFIG_RTC_INTF_DEV
  113. static int
  114. omap_rtc_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  115. {
  116. u8 reg;
  117. switch (cmd) {
  118. case RTC_AIE_OFF:
  119. case RTC_AIE_ON:
  120. case RTC_UIE_OFF:
  121. case RTC_UIE_ON:
  122. break;
  123. default:
  124. return -ENOIOCTLCMD;
  125. }
  126. local_irq_disable();
  127. rtc_wait_not_busy();
  128. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  129. switch (cmd) {
  130. /* AIE = Alarm Interrupt Enable */
  131. case RTC_AIE_OFF:
  132. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  133. break;
  134. case RTC_AIE_ON:
  135. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  136. break;
  137. /* UIE = Update Interrupt Enable (1/second) */
  138. case RTC_UIE_OFF:
  139. reg &= ~OMAP_RTC_INTERRUPTS_IT_TIMER;
  140. break;
  141. case RTC_UIE_ON:
  142. reg |= OMAP_RTC_INTERRUPTS_IT_TIMER;
  143. break;
  144. }
  145. rtc_wait_not_busy();
  146. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  147. local_irq_enable();
  148. return 0;
  149. }
  150. #else
  151. #define omap_rtc_ioctl NULL
  152. #endif
  153. /* this hardware doesn't support "don't care" alarm fields */
  154. static int tm2bcd(struct rtc_time *tm)
  155. {
  156. if (rtc_valid_tm(tm) != 0)
  157. return -EINVAL;
  158. tm->tm_sec = bin2bcd(tm->tm_sec);
  159. tm->tm_min = bin2bcd(tm->tm_min);
  160. tm->tm_hour = bin2bcd(tm->tm_hour);
  161. tm->tm_mday = bin2bcd(tm->tm_mday);
  162. tm->tm_mon = bin2bcd(tm->tm_mon + 1);
  163. /* epoch == 1900 */
  164. if (tm->tm_year < 100 || tm->tm_year > 199)
  165. return -EINVAL;
  166. tm->tm_year = bin2bcd(tm->tm_year - 100);
  167. return 0;
  168. }
  169. static void bcd2tm(struct rtc_time *tm)
  170. {
  171. tm->tm_sec = bcd2bin(tm->tm_sec);
  172. tm->tm_min = bcd2bin(tm->tm_min);
  173. tm->tm_hour = bcd2bin(tm->tm_hour);
  174. tm->tm_mday = bcd2bin(tm->tm_mday);
  175. tm->tm_mon = bcd2bin(tm->tm_mon) - 1;
  176. /* epoch == 1900 */
  177. tm->tm_year = bcd2bin(tm->tm_year) + 100;
  178. }
  179. static int omap_rtc_read_time(struct device *dev, struct rtc_time *tm)
  180. {
  181. /* we don't report wday/yday/isdst ... */
  182. local_irq_disable();
  183. rtc_wait_not_busy();
  184. tm->tm_sec = rtc_read(OMAP_RTC_SECONDS_REG);
  185. tm->tm_min = rtc_read(OMAP_RTC_MINUTES_REG);
  186. tm->tm_hour = rtc_read(OMAP_RTC_HOURS_REG);
  187. tm->tm_mday = rtc_read(OMAP_RTC_DAYS_REG);
  188. tm->tm_mon = rtc_read(OMAP_RTC_MONTHS_REG);
  189. tm->tm_year = rtc_read(OMAP_RTC_YEARS_REG);
  190. local_irq_enable();
  191. bcd2tm(tm);
  192. return 0;
  193. }
  194. static int omap_rtc_set_time(struct device *dev, struct rtc_time *tm)
  195. {
  196. if (tm2bcd(tm) < 0)
  197. return -EINVAL;
  198. local_irq_disable();
  199. rtc_wait_not_busy();
  200. rtc_write(tm->tm_year, OMAP_RTC_YEARS_REG);
  201. rtc_write(tm->tm_mon, OMAP_RTC_MONTHS_REG);
  202. rtc_write(tm->tm_mday, OMAP_RTC_DAYS_REG);
  203. rtc_write(tm->tm_hour, OMAP_RTC_HOURS_REG);
  204. rtc_write(tm->tm_min, OMAP_RTC_MINUTES_REG);
  205. rtc_write(tm->tm_sec, OMAP_RTC_SECONDS_REG);
  206. local_irq_enable();
  207. return 0;
  208. }
  209. static int omap_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alm)
  210. {
  211. local_irq_disable();
  212. rtc_wait_not_busy();
  213. alm->time.tm_sec = rtc_read(OMAP_RTC_ALARM_SECONDS_REG);
  214. alm->time.tm_min = rtc_read(OMAP_RTC_ALARM_MINUTES_REG);
  215. alm->time.tm_hour = rtc_read(OMAP_RTC_ALARM_HOURS_REG);
  216. alm->time.tm_mday = rtc_read(OMAP_RTC_ALARM_DAYS_REG);
  217. alm->time.tm_mon = rtc_read(OMAP_RTC_ALARM_MONTHS_REG);
  218. alm->time.tm_year = rtc_read(OMAP_RTC_ALARM_YEARS_REG);
  219. local_irq_enable();
  220. bcd2tm(&alm->time);
  221. alm->enabled = !!(rtc_read(OMAP_RTC_INTERRUPTS_REG)
  222. & OMAP_RTC_INTERRUPTS_IT_ALARM);
  223. return 0;
  224. }
  225. static int omap_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alm)
  226. {
  227. u8 reg;
  228. if (tm2bcd(&alm->time) < 0)
  229. return -EINVAL;
  230. local_irq_disable();
  231. rtc_wait_not_busy();
  232. rtc_write(alm->time.tm_year, OMAP_RTC_ALARM_YEARS_REG);
  233. rtc_write(alm->time.tm_mon, OMAP_RTC_ALARM_MONTHS_REG);
  234. rtc_write(alm->time.tm_mday, OMAP_RTC_ALARM_DAYS_REG);
  235. rtc_write(alm->time.tm_hour, OMAP_RTC_ALARM_HOURS_REG);
  236. rtc_write(alm->time.tm_min, OMAP_RTC_ALARM_MINUTES_REG);
  237. rtc_write(alm->time.tm_sec, OMAP_RTC_ALARM_SECONDS_REG);
  238. reg = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  239. if (alm->enabled)
  240. reg |= OMAP_RTC_INTERRUPTS_IT_ALARM;
  241. else
  242. reg &= ~OMAP_RTC_INTERRUPTS_IT_ALARM;
  243. rtc_write(reg, OMAP_RTC_INTERRUPTS_REG);
  244. local_irq_enable();
  245. return 0;
  246. }
  247. static struct rtc_class_ops omap_rtc_ops = {
  248. .ioctl = omap_rtc_ioctl,
  249. .read_time = omap_rtc_read_time,
  250. .set_time = omap_rtc_set_time,
  251. .read_alarm = omap_rtc_read_alarm,
  252. .set_alarm = omap_rtc_set_alarm,
  253. };
  254. static int omap_rtc_alarm;
  255. static int omap_rtc_timer;
  256. static int __init omap_rtc_probe(struct platform_device *pdev)
  257. {
  258. struct resource *res, *mem;
  259. struct rtc_device *rtc;
  260. u8 reg, new_ctrl;
  261. omap_rtc_timer = platform_get_irq(pdev, 0);
  262. if (omap_rtc_timer <= 0) {
  263. pr_debug("%s: no update irq?\n", pdev->name);
  264. return -ENOENT;
  265. }
  266. omap_rtc_alarm = platform_get_irq(pdev, 1);
  267. if (omap_rtc_alarm <= 0) {
  268. pr_debug("%s: no alarm irq?\n", pdev->name);
  269. return -ENOENT;
  270. }
  271. /* NOTE: using static mapping for RTC registers */
  272. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  273. if (res && res->start != OMAP_RTC_BASE) {
  274. pr_debug("%s: RTC registers at %08x, expected %08x\n",
  275. pdev->name, (unsigned) res->start, OMAP_RTC_BASE);
  276. return -ENOENT;
  277. }
  278. if (res)
  279. mem = request_mem_region(res->start,
  280. res->end - res->start + 1,
  281. pdev->name);
  282. else
  283. mem = NULL;
  284. if (!mem) {
  285. pr_debug("%s: RTC registers at %08x are not free\n",
  286. pdev->name, OMAP_RTC_BASE);
  287. return -EBUSY;
  288. }
  289. rtc = rtc_device_register(pdev->name, &pdev->dev,
  290. &omap_rtc_ops, THIS_MODULE);
  291. if (IS_ERR(rtc)) {
  292. pr_debug("%s: can't register RTC device, err %ld\n",
  293. pdev->name, PTR_ERR(rtc));
  294. goto fail;
  295. }
  296. platform_set_drvdata(pdev, rtc);
  297. dev_set_drvdata(&rtc->dev, mem);
  298. /* clear pending irqs, and set 1/second periodic,
  299. * which we'll use instead of update irqs
  300. */
  301. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  302. /* clear old status */
  303. reg = rtc_read(OMAP_RTC_STATUS_REG);
  304. if (reg & (u8) OMAP_RTC_STATUS_POWER_UP) {
  305. pr_info("%s: RTC power up reset detected\n",
  306. pdev->name);
  307. rtc_write(OMAP_RTC_STATUS_POWER_UP, OMAP_RTC_STATUS_REG);
  308. }
  309. if (reg & (u8) OMAP_RTC_STATUS_ALARM)
  310. rtc_write(OMAP_RTC_STATUS_ALARM, OMAP_RTC_STATUS_REG);
  311. /* handle periodic and alarm irqs */
  312. if (request_irq(omap_rtc_timer, rtc_irq, IRQF_DISABLED,
  313. dev_name(&rtc->dev), rtc)) {
  314. pr_debug("%s: RTC timer interrupt IRQ%d already claimed\n",
  315. pdev->name, omap_rtc_timer);
  316. goto fail0;
  317. }
  318. if (request_irq(omap_rtc_alarm, rtc_irq, IRQF_DISABLED,
  319. dev_name(&rtc->dev), rtc)) {
  320. pr_debug("%s: RTC alarm interrupt IRQ%d already claimed\n",
  321. pdev->name, omap_rtc_alarm);
  322. goto fail1;
  323. }
  324. /* On boards with split power, RTC_ON_NOFF won't reset the RTC */
  325. reg = rtc_read(OMAP_RTC_CTRL_REG);
  326. if (reg & (u8) OMAP_RTC_CTRL_STOP)
  327. pr_info("%s: already running\n", pdev->name);
  328. /* force to 24 hour mode */
  329. new_ctrl = reg & ~(OMAP_RTC_CTRL_SPLIT|OMAP_RTC_CTRL_AUTO_COMP);
  330. new_ctrl |= OMAP_RTC_CTRL_STOP;
  331. /* BOARD-SPECIFIC CUSTOMIZATION CAN GO HERE:
  332. *
  333. * - Boards wired so that RTC_WAKE_INT does something, and muxed
  334. * right (W13_1610_RTC_WAKE_INT is the default after chip reset),
  335. * should initialize the device wakeup flag appropriately.
  336. *
  337. * - Boards wired so RTC_ON_nOFF is used as the reset signal,
  338. * rather than nPWRON_RESET, should forcibly enable split
  339. * power mode. (Some chip errata report that RTC_CTRL_SPLIT
  340. * is write-only, and always reads as zero...)
  341. */
  342. device_init_wakeup(&pdev->dev, 0);
  343. if (new_ctrl & (u8) OMAP_RTC_CTRL_SPLIT)
  344. pr_info("%s: split power mode\n", pdev->name);
  345. if (reg != new_ctrl)
  346. rtc_write(new_ctrl, OMAP_RTC_CTRL_REG);
  347. return 0;
  348. fail1:
  349. free_irq(omap_rtc_timer, NULL);
  350. fail0:
  351. rtc_device_unregister(rtc);
  352. fail:
  353. release_resource(mem);
  354. return -EIO;
  355. }
  356. static int __exit omap_rtc_remove(struct platform_device *pdev)
  357. {
  358. struct rtc_device *rtc = platform_get_drvdata(pdev);;
  359. device_init_wakeup(&pdev->dev, 0);
  360. /* leave rtc running, but disable irqs */
  361. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  362. free_irq(omap_rtc_timer, rtc);
  363. free_irq(omap_rtc_alarm, rtc);
  364. release_resource(dev_get_drvdata(&rtc->dev));
  365. rtc_device_unregister(rtc);
  366. return 0;
  367. }
  368. #ifdef CONFIG_PM
  369. static u8 irqstat;
  370. static int omap_rtc_suspend(struct platform_device *pdev, pm_message_t state)
  371. {
  372. irqstat = rtc_read(OMAP_RTC_INTERRUPTS_REG);
  373. /* FIXME the RTC alarm is not currently acting as a wakeup event
  374. * source, and in fact this enable() call is just saving a flag
  375. * that's never used...
  376. */
  377. if (device_may_wakeup(&pdev->dev))
  378. enable_irq_wake(omap_rtc_alarm);
  379. else
  380. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  381. return 0;
  382. }
  383. static int omap_rtc_resume(struct platform_device *pdev)
  384. {
  385. if (device_may_wakeup(&pdev->dev))
  386. disable_irq_wake(omap_rtc_alarm);
  387. else
  388. rtc_write(irqstat, OMAP_RTC_INTERRUPTS_REG);
  389. return 0;
  390. }
  391. #else
  392. #define omap_rtc_suspend NULL
  393. #define omap_rtc_resume NULL
  394. #endif
  395. static void omap_rtc_shutdown(struct platform_device *pdev)
  396. {
  397. rtc_write(0, OMAP_RTC_INTERRUPTS_REG);
  398. }
  399. MODULE_ALIAS("platform:omap_rtc");
  400. static struct platform_driver omap_rtc_driver = {
  401. .remove = __exit_p(omap_rtc_remove),
  402. .suspend = omap_rtc_suspend,
  403. .resume = omap_rtc_resume,
  404. .shutdown = omap_rtc_shutdown,
  405. .driver = {
  406. .name = "omap_rtc",
  407. .owner = THIS_MODULE,
  408. },
  409. };
  410. static int __init rtc_init(void)
  411. {
  412. return platform_driver_probe(&omap_rtc_driver, omap_rtc_probe);
  413. }
  414. module_init(rtc_init);
  415. static void __exit rtc_exit(void)
  416. {
  417. platform_driver_unregister(&omap_rtc_driver);
  418. }
  419. module_exit(rtc_exit);
  420. MODULE_AUTHOR("George G. Davis (and others)");
  421. MODULE_LICENSE("GPL");