rtc-ds1307.c 24 KB

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  1. /*
  2. * rtc-ds1307.c - RTC driver for some mostly-compatible I2C chips.
  3. *
  4. * Copyright (C) 2005 James Chapman (ds1337 core)
  5. * Copyright (C) 2006 David Brownell
  6. * Copyright (C) 2009 Matthias Fuchs (rx8025 support)
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/module.h>
  13. #include <linux/init.h>
  14. #include <linux/slab.h>
  15. #include <linux/i2c.h>
  16. #include <linux/string.h>
  17. #include <linux/rtc.h>
  18. #include <linux/bcd.h>
  19. /* We can't determine type by probing, but if we expect pre-Linux code
  20. * to have set the chip up as a clock (turning on the oscillator and
  21. * setting the date and time), Linux can ignore the non-clock features.
  22. * That's a natural job for a factory or repair bench.
  23. */
  24. enum ds_type {
  25. ds_1307,
  26. ds_1337,
  27. ds_1338,
  28. ds_1339,
  29. ds_1340,
  30. ds_1388,
  31. ds_3231,
  32. m41t00,
  33. rx_8025,
  34. // rs5c372 too? different address...
  35. };
  36. /* RTC registers don't differ much, except for the century flag */
  37. #define DS1307_REG_SECS 0x00 /* 00-59 */
  38. # define DS1307_BIT_CH 0x80
  39. # define DS1340_BIT_nEOSC 0x80
  40. #define DS1307_REG_MIN 0x01 /* 00-59 */
  41. #define DS1307_REG_HOUR 0x02 /* 00-23, or 1-12{am,pm} */
  42. # define DS1307_BIT_12HR 0x40 /* in REG_HOUR */
  43. # define DS1307_BIT_PM 0x20 /* in REG_HOUR */
  44. # define DS1340_BIT_CENTURY_EN 0x80 /* in REG_HOUR */
  45. # define DS1340_BIT_CENTURY 0x40 /* in REG_HOUR */
  46. #define DS1307_REG_WDAY 0x03 /* 01-07 */
  47. #define DS1307_REG_MDAY 0x04 /* 01-31 */
  48. #define DS1307_REG_MONTH 0x05 /* 01-12 */
  49. # define DS1337_BIT_CENTURY 0x80 /* in REG_MONTH */
  50. #define DS1307_REG_YEAR 0x06 /* 00-99 */
  51. /* Other registers (control, status, alarms, trickle charge, NVRAM, etc)
  52. * start at 7, and they differ a LOT. Only control and status matter for
  53. * basic RTC date and time functionality; be careful using them.
  54. */
  55. #define DS1307_REG_CONTROL 0x07 /* or ds1338 */
  56. # define DS1307_BIT_OUT 0x80
  57. # define DS1338_BIT_OSF 0x20
  58. # define DS1307_BIT_SQWE 0x10
  59. # define DS1307_BIT_RS1 0x02
  60. # define DS1307_BIT_RS0 0x01
  61. #define DS1337_REG_CONTROL 0x0e
  62. # define DS1337_BIT_nEOSC 0x80
  63. # define DS1339_BIT_BBSQI 0x20
  64. # define DS3231_BIT_BBSQW 0x40 /* same as BBSQI */
  65. # define DS1337_BIT_RS2 0x10
  66. # define DS1337_BIT_RS1 0x08
  67. # define DS1337_BIT_INTCN 0x04
  68. # define DS1337_BIT_A2IE 0x02
  69. # define DS1337_BIT_A1IE 0x01
  70. #define DS1340_REG_CONTROL 0x07
  71. # define DS1340_BIT_OUT 0x80
  72. # define DS1340_BIT_FT 0x40
  73. # define DS1340_BIT_CALIB_SIGN 0x20
  74. # define DS1340_M_CALIBRATION 0x1f
  75. #define DS1340_REG_FLAG 0x09
  76. # define DS1340_BIT_OSF 0x80
  77. #define DS1337_REG_STATUS 0x0f
  78. # define DS1337_BIT_OSF 0x80
  79. # define DS1337_BIT_A2I 0x02
  80. # define DS1337_BIT_A1I 0x01
  81. #define DS1339_REG_ALARM1_SECS 0x07
  82. #define DS1339_REG_TRICKLE 0x10
  83. #define RX8025_REG_CTRL1 0x0e
  84. # define RX8025_BIT_2412 0x20
  85. #define RX8025_REG_CTRL2 0x0f
  86. # define RX8025_BIT_PON 0x10
  87. # define RX8025_BIT_VDET 0x40
  88. # define RX8025_BIT_XST 0x20
  89. struct ds1307 {
  90. u8 offset; /* register's offset */
  91. u8 regs[11];
  92. enum ds_type type;
  93. unsigned long flags;
  94. #define HAS_NVRAM 0 /* bit 0 == sysfs file active */
  95. #define HAS_ALARM 1 /* bit 1 == irq claimed */
  96. struct i2c_client *client;
  97. struct rtc_device *rtc;
  98. struct work_struct work;
  99. s32 (*read_block_data)(struct i2c_client *client, u8 command,
  100. u8 length, u8 *values);
  101. s32 (*write_block_data)(struct i2c_client *client, u8 command,
  102. u8 length, const u8 *values);
  103. };
  104. struct chip_desc {
  105. unsigned nvram56:1;
  106. unsigned alarm:1;
  107. };
  108. static const struct chip_desc chips[] = {
  109. [ds_1307] = {
  110. .nvram56 = 1,
  111. },
  112. [ds_1337] = {
  113. .alarm = 1,
  114. },
  115. [ds_1338] = {
  116. .nvram56 = 1,
  117. },
  118. [ds_1339] = {
  119. .alarm = 1,
  120. },
  121. [ds_1340] = {
  122. },
  123. [ds_3231] = {
  124. .alarm = 1,
  125. },
  126. [m41t00] = {
  127. },
  128. [rx_8025] = {
  129. }, };
  130. static const struct i2c_device_id ds1307_id[] = {
  131. { "ds1307", ds_1307 },
  132. { "ds1337", ds_1337 },
  133. { "ds1338", ds_1338 },
  134. { "ds1339", ds_1339 },
  135. { "ds1388", ds_1388 },
  136. { "ds1340", ds_1340 },
  137. { "ds3231", ds_3231 },
  138. { "m41t00", m41t00 },
  139. { "rx8025", rx_8025 },
  140. { }
  141. };
  142. MODULE_DEVICE_TABLE(i2c, ds1307_id);
  143. /*----------------------------------------------------------------------*/
  144. #define BLOCK_DATA_MAX_TRIES 10
  145. static s32 ds1307_read_block_data_once(struct i2c_client *client, u8 command,
  146. u8 length, u8 *values)
  147. {
  148. s32 i, data;
  149. for (i = 0; i < length; i++) {
  150. data = i2c_smbus_read_byte_data(client, command + i);
  151. if (data < 0)
  152. return data;
  153. values[i] = data;
  154. }
  155. return i;
  156. }
  157. static s32 ds1307_read_block_data(struct i2c_client *client, u8 command,
  158. u8 length, u8 *values)
  159. {
  160. u8 oldvalues[I2C_SMBUS_BLOCK_MAX];
  161. s32 ret;
  162. int tries = 0;
  163. dev_dbg(&client->dev, "ds1307_read_block_data (length=%d)\n", length);
  164. ret = ds1307_read_block_data_once(client, command, length, values);
  165. if (ret < 0)
  166. return ret;
  167. do {
  168. if (++tries > BLOCK_DATA_MAX_TRIES) {
  169. dev_err(&client->dev,
  170. "ds1307_read_block_data failed\n");
  171. return -EIO;
  172. }
  173. memcpy(oldvalues, values, length);
  174. ret = ds1307_read_block_data_once(client, command, length,
  175. values);
  176. if (ret < 0)
  177. return ret;
  178. } while (memcmp(oldvalues, values, length));
  179. return length;
  180. }
  181. static s32 ds1307_write_block_data(struct i2c_client *client, u8 command,
  182. u8 length, const u8 *values)
  183. {
  184. u8 currvalues[I2C_SMBUS_BLOCK_MAX];
  185. int tries = 0;
  186. dev_dbg(&client->dev, "ds1307_write_block_data (length=%d)\n", length);
  187. do {
  188. s32 i, ret;
  189. if (++tries > BLOCK_DATA_MAX_TRIES) {
  190. dev_err(&client->dev,
  191. "ds1307_write_block_data failed\n");
  192. return -EIO;
  193. }
  194. for (i = 0; i < length; i++) {
  195. ret = i2c_smbus_write_byte_data(client, command + i,
  196. values[i]);
  197. if (ret < 0)
  198. return ret;
  199. }
  200. ret = ds1307_read_block_data_once(client, command, length,
  201. currvalues);
  202. if (ret < 0)
  203. return ret;
  204. } while (memcmp(currvalues, values, length));
  205. return length;
  206. }
  207. /*----------------------------------------------------------------------*/
  208. /*
  209. * The IRQ logic includes a "real" handler running in IRQ context just
  210. * long enough to schedule this workqueue entry. We need a task context
  211. * to talk to the RTC, since I2C I/O calls require that; and disable the
  212. * IRQ until we clear its status on the chip, so that this handler can
  213. * work with any type of triggering (not just falling edge).
  214. *
  215. * The ds1337 and ds1339 both have two alarms, but we only use the first
  216. * one (with a "seconds" field). For ds1337 we expect nINTA is our alarm
  217. * signal; ds1339 chips have only one alarm signal.
  218. */
  219. static void ds1307_work(struct work_struct *work)
  220. {
  221. struct ds1307 *ds1307;
  222. struct i2c_client *client;
  223. struct mutex *lock;
  224. int stat, control;
  225. ds1307 = container_of(work, struct ds1307, work);
  226. client = ds1307->client;
  227. lock = &ds1307->rtc->ops_lock;
  228. mutex_lock(lock);
  229. stat = i2c_smbus_read_byte_data(client, DS1337_REG_STATUS);
  230. if (stat < 0)
  231. goto out;
  232. if (stat & DS1337_BIT_A1I) {
  233. stat &= ~DS1337_BIT_A1I;
  234. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS, stat);
  235. control = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  236. if (control < 0)
  237. goto out;
  238. control &= ~DS1337_BIT_A1IE;
  239. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL, control);
  240. rtc_update_irq(ds1307->rtc, 1, RTC_AF | RTC_IRQF);
  241. }
  242. out:
  243. if (test_bit(HAS_ALARM, &ds1307->flags))
  244. enable_irq(client->irq);
  245. mutex_unlock(lock);
  246. }
  247. static irqreturn_t ds1307_irq(int irq, void *dev_id)
  248. {
  249. struct i2c_client *client = dev_id;
  250. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  251. disable_irq_nosync(irq);
  252. schedule_work(&ds1307->work);
  253. return IRQ_HANDLED;
  254. }
  255. /*----------------------------------------------------------------------*/
  256. static int ds1307_get_time(struct device *dev, struct rtc_time *t)
  257. {
  258. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  259. int tmp;
  260. /* read the RTC date and time registers all at once */
  261. tmp = ds1307->read_block_data(ds1307->client,
  262. ds1307->offset, 7, ds1307->regs);
  263. if (tmp != 7) {
  264. dev_err(dev, "%s error %d\n", "read", tmp);
  265. return -EIO;
  266. }
  267. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  268. "read",
  269. ds1307->regs[0], ds1307->regs[1],
  270. ds1307->regs[2], ds1307->regs[3],
  271. ds1307->regs[4], ds1307->regs[5],
  272. ds1307->regs[6]);
  273. t->tm_sec = bcd2bin(ds1307->regs[DS1307_REG_SECS] & 0x7f);
  274. t->tm_min = bcd2bin(ds1307->regs[DS1307_REG_MIN] & 0x7f);
  275. tmp = ds1307->regs[DS1307_REG_HOUR] & 0x3f;
  276. t->tm_hour = bcd2bin(tmp);
  277. t->tm_wday = bcd2bin(ds1307->regs[DS1307_REG_WDAY] & 0x07) - 1;
  278. t->tm_mday = bcd2bin(ds1307->regs[DS1307_REG_MDAY] & 0x3f);
  279. tmp = ds1307->regs[DS1307_REG_MONTH] & 0x1f;
  280. t->tm_mon = bcd2bin(tmp) - 1;
  281. /* assume 20YY not 19YY, and ignore DS1337_BIT_CENTURY */
  282. t->tm_year = bcd2bin(ds1307->regs[DS1307_REG_YEAR]) + 100;
  283. dev_dbg(dev, "%s secs=%d, mins=%d, "
  284. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  285. "read", t->tm_sec, t->tm_min,
  286. t->tm_hour, t->tm_mday,
  287. t->tm_mon, t->tm_year, t->tm_wday);
  288. /* initial clock setting can be undefined */
  289. return rtc_valid_tm(t);
  290. }
  291. static int ds1307_set_time(struct device *dev, struct rtc_time *t)
  292. {
  293. struct ds1307 *ds1307 = dev_get_drvdata(dev);
  294. int result;
  295. int tmp;
  296. u8 *buf = ds1307->regs;
  297. dev_dbg(dev, "%s secs=%d, mins=%d, "
  298. "hours=%d, mday=%d, mon=%d, year=%d, wday=%d\n",
  299. "write", t->tm_sec, t->tm_min,
  300. t->tm_hour, t->tm_mday,
  301. t->tm_mon, t->tm_year, t->tm_wday);
  302. buf[DS1307_REG_SECS] = bin2bcd(t->tm_sec);
  303. buf[DS1307_REG_MIN] = bin2bcd(t->tm_min);
  304. buf[DS1307_REG_HOUR] = bin2bcd(t->tm_hour);
  305. buf[DS1307_REG_WDAY] = bin2bcd(t->tm_wday + 1);
  306. buf[DS1307_REG_MDAY] = bin2bcd(t->tm_mday);
  307. buf[DS1307_REG_MONTH] = bin2bcd(t->tm_mon + 1);
  308. /* assume 20YY not 19YY */
  309. tmp = t->tm_year - 100;
  310. buf[DS1307_REG_YEAR] = bin2bcd(tmp);
  311. switch (ds1307->type) {
  312. case ds_1337:
  313. case ds_1339:
  314. case ds_3231:
  315. buf[DS1307_REG_MONTH] |= DS1337_BIT_CENTURY;
  316. break;
  317. case ds_1340:
  318. buf[DS1307_REG_HOUR] |= DS1340_BIT_CENTURY_EN
  319. | DS1340_BIT_CENTURY;
  320. break;
  321. default:
  322. break;
  323. }
  324. dev_dbg(dev, "%s: %02x %02x %02x %02x %02x %02x %02x\n",
  325. "write", buf[0], buf[1], buf[2], buf[3],
  326. buf[4], buf[5], buf[6]);
  327. result = ds1307->write_block_data(ds1307->client,
  328. ds1307->offset, 7, buf);
  329. if (result < 0) {
  330. dev_err(dev, "%s error %d\n", "write", result);
  331. return result;
  332. }
  333. return 0;
  334. }
  335. static int ds1337_read_alarm(struct device *dev, struct rtc_wkalrm *t)
  336. {
  337. struct i2c_client *client = to_i2c_client(dev);
  338. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  339. int ret;
  340. if (!test_bit(HAS_ALARM, &ds1307->flags))
  341. return -EINVAL;
  342. /* read all ALARM1, ALARM2, and status registers at once */
  343. ret = ds1307->read_block_data(client,
  344. DS1339_REG_ALARM1_SECS, 9, ds1307->regs);
  345. if (ret != 9) {
  346. dev_err(dev, "%s error %d\n", "alarm read", ret);
  347. return -EIO;
  348. }
  349. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  350. "alarm read",
  351. ds1307->regs[0], ds1307->regs[1],
  352. ds1307->regs[2], ds1307->regs[3],
  353. ds1307->regs[4], ds1307->regs[5],
  354. ds1307->regs[6], ds1307->regs[7],
  355. ds1307->regs[8]);
  356. /* report alarm time (ALARM1); assume 24 hour and day-of-month modes,
  357. * and that all four fields are checked matches
  358. */
  359. t->time.tm_sec = bcd2bin(ds1307->regs[0] & 0x7f);
  360. t->time.tm_min = bcd2bin(ds1307->regs[1] & 0x7f);
  361. t->time.tm_hour = bcd2bin(ds1307->regs[2] & 0x3f);
  362. t->time.tm_mday = bcd2bin(ds1307->regs[3] & 0x3f);
  363. t->time.tm_mon = -1;
  364. t->time.tm_year = -1;
  365. t->time.tm_wday = -1;
  366. t->time.tm_yday = -1;
  367. t->time.tm_isdst = -1;
  368. /* ... and status */
  369. t->enabled = !!(ds1307->regs[7] & DS1337_BIT_A1IE);
  370. t->pending = !!(ds1307->regs[8] & DS1337_BIT_A1I);
  371. dev_dbg(dev, "%s secs=%d, mins=%d, "
  372. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  373. "alarm read", t->time.tm_sec, t->time.tm_min,
  374. t->time.tm_hour, t->time.tm_mday,
  375. t->enabled, t->pending);
  376. return 0;
  377. }
  378. static int ds1337_set_alarm(struct device *dev, struct rtc_wkalrm *t)
  379. {
  380. struct i2c_client *client = to_i2c_client(dev);
  381. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  382. unsigned char *buf = ds1307->regs;
  383. u8 control, status;
  384. int ret;
  385. if (!test_bit(HAS_ALARM, &ds1307->flags))
  386. return -EINVAL;
  387. dev_dbg(dev, "%s secs=%d, mins=%d, "
  388. "hours=%d, mday=%d, enabled=%d, pending=%d\n",
  389. "alarm set", t->time.tm_sec, t->time.tm_min,
  390. t->time.tm_hour, t->time.tm_mday,
  391. t->enabled, t->pending);
  392. /* read current status of both alarms and the chip */
  393. ret = ds1307->read_block_data(client,
  394. DS1339_REG_ALARM1_SECS, 9, buf);
  395. if (ret != 9) {
  396. dev_err(dev, "%s error %d\n", "alarm write", ret);
  397. return -EIO;
  398. }
  399. control = ds1307->regs[7];
  400. status = ds1307->regs[8];
  401. dev_dbg(dev, "%s: %02x %02x %02x %02x, %02x %02x %02x, %02x %02x\n",
  402. "alarm set (old status)",
  403. ds1307->regs[0], ds1307->regs[1],
  404. ds1307->regs[2], ds1307->regs[3],
  405. ds1307->regs[4], ds1307->regs[5],
  406. ds1307->regs[6], control, status);
  407. /* set ALARM1, using 24 hour and day-of-month modes */
  408. buf[0] = bin2bcd(t->time.tm_sec);
  409. buf[1] = bin2bcd(t->time.tm_min);
  410. buf[2] = bin2bcd(t->time.tm_hour);
  411. buf[3] = bin2bcd(t->time.tm_mday);
  412. /* set ALARM2 to non-garbage */
  413. buf[4] = 0;
  414. buf[5] = 0;
  415. buf[6] = 0;
  416. /* optionally enable ALARM1 */
  417. buf[7] = control & ~(DS1337_BIT_A1IE | DS1337_BIT_A2IE);
  418. if (t->enabled) {
  419. dev_dbg(dev, "alarm IRQ armed\n");
  420. buf[7] |= DS1337_BIT_A1IE; /* only ALARM1 is used */
  421. }
  422. buf[8] = status & ~(DS1337_BIT_A1I | DS1337_BIT_A2I);
  423. ret = ds1307->write_block_data(client,
  424. DS1339_REG_ALARM1_SECS, 9, buf);
  425. if (ret < 0) {
  426. dev_err(dev, "can't set alarm time\n");
  427. return ret;
  428. }
  429. return 0;
  430. }
  431. static int ds1307_ioctl(struct device *dev, unsigned int cmd, unsigned long arg)
  432. {
  433. struct i2c_client *client = to_i2c_client(dev);
  434. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  435. int ret;
  436. switch (cmd) {
  437. case RTC_AIE_OFF:
  438. if (!test_bit(HAS_ALARM, &ds1307->flags))
  439. return -ENOTTY;
  440. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  441. if (ret < 0)
  442. return ret;
  443. ret &= ~DS1337_BIT_A1IE;
  444. ret = i2c_smbus_write_byte_data(client,
  445. DS1337_REG_CONTROL, ret);
  446. if (ret < 0)
  447. return ret;
  448. break;
  449. case RTC_AIE_ON:
  450. if (!test_bit(HAS_ALARM, &ds1307->flags))
  451. return -ENOTTY;
  452. ret = i2c_smbus_read_byte_data(client, DS1337_REG_CONTROL);
  453. if (ret < 0)
  454. return ret;
  455. ret |= DS1337_BIT_A1IE;
  456. ret = i2c_smbus_write_byte_data(client,
  457. DS1337_REG_CONTROL, ret);
  458. if (ret < 0)
  459. return ret;
  460. break;
  461. default:
  462. return -ENOIOCTLCMD;
  463. }
  464. return 0;
  465. }
  466. static const struct rtc_class_ops ds13xx_rtc_ops = {
  467. .read_time = ds1307_get_time,
  468. .set_time = ds1307_set_time,
  469. .read_alarm = ds1337_read_alarm,
  470. .set_alarm = ds1337_set_alarm,
  471. .ioctl = ds1307_ioctl,
  472. };
  473. /*----------------------------------------------------------------------*/
  474. #define NVRAM_SIZE 56
  475. static ssize_t
  476. ds1307_nvram_read(struct kobject *kobj, struct bin_attribute *attr,
  477. char *buf, loff_t off, size_t count)
  478. {
  479. struct i2c_client *client;
  480. struct ds1307 *ds1307;
  481. int result;
  482. client = kobj_to_i2c_client(kobj);
  483. ds1307 = i2c_get_clientdata(client);
  484. if (unlikely(off >= NVRAM_SIZE))
  485. return 0;
  486. if ((off + count) > NVRAM_SIZE)
  487. count = NVRAM_SIZE - off;
  488. if (unlikely(!count))
  489. return count;
  490. result = ds1307->read_block_data(client, 8 + off, count, buf);
  491. if (result < 0)
  492. dev_err(&client->dev, "%s error %d\n", "nvram read", result);
  493. return result;
  494. }
  495. static ssize_t
  496. ds1307_nvram_write(struct kobject *kobj, struct bin_attribute *attr,
  497. char *buf, loff_t off, size_t count)
  498. {
  499. struct i2c_client *client;
  500. struct ds1307 *ds1307;
  501. int result;
  502. client = kobj_to_i2c_client(kobj);
  503. ds1307 = i2c_get_clientdata(client);
  504. if (unlikely(off >= NVRAM_SIZE))
  505. return -EFBIG;
  506. if ((off + count) > NVRAM_SIZE)
  507. count = NVRAM_SIZE - off;
  508. if (unlikely(!count))
  509. return count;
  510. result = ds1307->write_block_data(client, 8 + off, count, buf);
  511. if (result < 0) {
  512. dev_err(&client->dev, "%s error %d\n", "nvram write", result);
  513. return result;
  514. }
  515. return count;
  516. }
  517. static struct bin_attribute nvram = {
  518. .attr = {
  519. .name = "nvram",
  520. .mode = S_IRUGO | S_IWUSR,
  521. },
  522. .read = ds1307_nvram_read,
  523. .write = ds1307_nvram_write,
  524. .size = NVRAM_SIZE,
  525. };
  526. /*----------------------------------------------------------------------*/
  527. static struct i2c_driver ds1307_driver;
  528. static int __devinit ds1307_probe(struct i2c_client *client,
  529. const struct i2c_device_id *id)
  530. {
  531. struct ds1307 *ds1307;
  532. int err = -ENODEV;
  533. int tmp;
  534. const struct chip_desc *chip = &chips[id->driver_data];
  535. struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
  536. int want_irq = false;
  537. unsigned char *buf;
  538. static const int bbsqi_bitpos[] = {
  539. [ds_1337] = 0,
  540. [ds_1339] = DS1339_BIT_BBSQI,
  541. [ds_3231] = DS3231_BIT_BBSQW,
  542. };
  543. if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)
  544. && !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK))
  545. return -EIO;
  546. if (!(ds1307 = kzalloc(sizeof(struct ds1307), GFP_KERNEL)))
  547. return -ENOMEM;
  548. i2c_set_clientdata(client, ds1307);
  549. ds1307->client = client;
  550. ds1307->type = id->driver_data;
  551. ds1307->offset = 0;
  552. buf = ds1307->regs;
  553. if (i2c_check_functionality(adapter, I2C_FUNC_SMBUS_I2C_BLOCK)) {
  554. ds1307->read_block_data = i2c_smbus_read_i2c_block_data;
  555. ds1307->write_block_data = i2c_smbus_write_i2c_block_data;
  556. } else {
  557. ds1307->read_block_data = ds1307_read_block_data;
  558. ds1307->write_block_data = ds1307_write_block_data;
  559. }
  560. switch (ds1307->type) {
  561. case ds_1337:
  562. case ds_1339:
  563. case ds_3231:
  564. /* has IRQ? */
  565. if (ds1307->client->irq > 0 && chip->alarm) {
  566. INIT_WORK(&ds1307->work, ds1307_work);
  567. want_irq = true;
  568. }
  569. /* get registers that the "rtc" read below won't read... */
  570. tmp = ds1307->read_block_data(ds1307->client,
  571. DS1337_REG_CONTROL, 2, buf);
  572. if (tmp != 2) {
  573. pr_debug("read error %d\n", tmp);
  574. err = -EIO;
  575. goto exit_free;
  576. }
  577. /* oscillator off? turn it on, so clock can tick. */
  578. if (ds1307->regs[0] & DS1337_BIT_nEOSC)
  579. ds1307->regs[0] &= ~DS1337_BIT_nEOSC;
  580. /* Using IRQ? Disable the square wave and both alarms.
  581. * For some variants, be sure alarms can trigger when we're
  582. * running on Vbackup (BBSQI/BBSQW)
  583. */
  584. if (want_irq) {
  585. ds1307->regs[0] |= DS1337_BIT_INTCN
  586. | bbsqi_bitpos[ds1307->type];
  587. ds1307->regs[0] &= ~(DS1337_BIT_A2IE | DS1337_BIT_A1IE);
  588. }
  589. i2c_smbus_write_byte_data(client, DS1337_REG_CONTROL,
  590. ds1307->regs[0]);
  591. /* oscillator fault? clear flag, and warn */
  592. if (ds1307->regs[1] & DS1337_BIT_OSF) {
  593. i2c_smbus_write_byte_data(client, DS1337_REG_STATUS,
  594. ds1307->regs[1] & ~DS1337_BIT_OSF);
  595. dev_warn(&client->dev, "SET TIME!\n");
  596. }
  597. break;
  598. case rx_8025:
  599. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  600. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  601. if (tmp != 2) {
  602. pr_debug("read error %d\n", tmp);
  603. err = -EIO;
  604. goto exit_free;
  605. }
  606. /* oscillator off? turn it on, so clock can tick. */
  607. if (!(ds1307->regs[1] & RX8025_BIT_XST)) {
  608. ds1307->regs[1] |= RX8025_BIT_XST;
  609. i2c_smbus_write_byte_data(client,
  610. RX8025_REG_CTRL2 << 4 | 0x08,
  611. ds1307->regs[1]);
  612. dev_warn(&client->dev,
  613. "oscillator stop detected - SET TIME!\n");
  614. }
  615. if (ds1307->regs[1] & RX8025_BIT_PON) {
  616. ds1307->regs[1] &= ~RX8025_BIT_PON;
  617. i2c_smbus_write_byte_data(client,
  618. RX8025_REG_CTRL2 << 4 | 0x08,
  619. ds1307->regs[1]);
  620. dev_warn(&client->dev, "power-on detected\n");
  621. }
  622. if (ds1307->regs[1] & RX8025_BIT_VDET) {
  623. ds1307->regs[1] &= ~RX8025_BIT_VDET;
  624. i2c_smbus_write_byte_data(client,
  625. RX8025_REG_CTRL2 << 4 | 0x08,
  626. ds1307->regs[1]);
  627. dev_warn(&client->dev, "voltage drop detected\n");
  628. }
  629. /* make sure we are running in 24hour mode */
  630. if (!(ds1307->regs[0] & RX8025_BIT_2412)) {
  631. u8 hour;
  632. /* switch to 24 hour mode */
  633. i2c_smbus_write_byte_data(client,
  634. RX8025_REG_CTRL1 << 4 | 0x08,
  635. ds1307->regs[0] |
  636. RX8025_BIT_2412);
  637. tmp = i2c_smbus_read_i2c_block_data(ds1307->client,
  638. RX8025_REG_CTRL1 << 4 | 0x08, 2, buf);
  639. if (tmp != 2) {
  640. pr_debug("read error %d\n", tmp);
  641. err = -EIO;
  642. goto exit_free;
  643. }
  644. /* correct hour */
  645. hour = bcd2bin(ds1307->regs[DS1307_REG_HOUR]);
  646. if (hour == 12)
  647. hour = 0;
  648. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  649. hour += 12;
  650. i2c_smbus_write_byte_data(client,
  651. DS1307_REG_HOUR << 4 | 0x08,
  652. hour);
  653. }
  654. break;
  655. case ds_1388:
  656. ds1307->offset = 1; /* Seconds starts at 1 */
  657. break;
  658. default:
  659. break;
  660. }
  661. read_rtc:
  662. /* read RTC registers */
  663. tmp = ds1307->read_block_data(ds1307->client, 0, 8, buf);
  664. if (tmp != 8) {
  665. pr_debug("read error %d\n", tmp);
  666. err = -EIO;
  667. goto exit_free;
  668. }
  669. /* minimal sanity checking; some chips (like DS1340) don't
  670. * specify the extra bits as must-be-zero, but there are
  671. * still a few values that are clearly out-of-range.
  672. */
  673. tmp = ds1307->regs[DS1307_REG_SECS];
  674. switch (ds1307->type) {
  675. case ds_1307:
  676. case m41t00:
  677. /* clock halted? turn it on, so clock can tick. */
  678. if (tmp & DS1307_BIT_CH) {
  679. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  680. dev_warn(&client->dev, "SET TIME!\n");
  681. goto read_rtc;
  682. }
  683. break;
  684. case ds_1338:
  685. /* clock halted? turn it on, so clock can tick. */
  686. if (tmp & DS1307_BIT_CH)
  687. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  688. /* oscillator fault? clear flag, and warn */
  689. if (ds1307->regs[DS1307_REG_CONTROL] & DS1338_BIT_OSF) {
  690. i2c_smbus_write_byte_data(client, DS1307_REG_CONTROL,
  691. ds1307->regs[DS1307_REG_CONTROL]
  692. & ~DS1338_BIT_OSF);
  693. dev_warn(&client->dev, "SET TIME!\n");
  694. goto read_rtc;
  695. }
  696. break;
  697. case ds_1340:
  698. /* clock halted? turn it on, so clock can tick. */
  699. if (tmp & DS1340_BIT_nEOSC)
  700. i2c_smbus_write_byte_data(client, DS1307_REG_SECS, 0);
  701. tmp = i2c_smbus_read_byte_data(client, DS1340_REG_FLAG);
  702. if (tmp < 0) {
  703. pr_debug("read error %d\n", tmp);
  704. err = -EIO;
  705. goto exit_free;
  706. }
  707. /* oscillator fault? clear flag, and warn */
  708. if (tmp & DS1340_BIT_OSF) {
  709. i2c_smbus_write_byte_data(client, DS1340_REG_FLAG, 0);
  710. dev_warn(&client->dev, "SET TIME!\n");
  711. }
  712. break;
  713. case rx_8025:
  714. case ds_1337:
  715. case ds_1339:
  716. case ds_1388:
  717. case ds_3231:
  718. break;
  719. }
  720. tmp = ds1307->regs[DS1307_REG_HOUR];
  721. switch (ds1307->type) {
  722. case ds_1340:
  723. case m41t00:
  724. /* NOTE: ignores century bits; fix before deploying
  725. * systems that will run through year 2100.
  726. */
  727. break;
  728. case rx_8025:
  729. break;
  730. default:
  731. if (!(tmp & DS1307_BIT_12HR))
  732. break;
  733. /* Be sure we're in 24 hour mode. Multi-master systems
  734. * take note...
  735. */
  736. tmp = bcd2bin(tmp & 0x1f);
  737. if (tmp == 12)
  738. tmp = 0;
  739. if (ds1307->regs[DS1307_REG_HOUR] & DS1307_BIT_PM)
  740. tmp += 12;
  741. i2c_smbus_write_byte_data(client,
  742. DS1307_REG_HOUR,
  743. bin2bcd(tmp));
  744. }
  745. ds1307->rtc = rtc_device_register(client->name, &client->dev,
  746. &ds13xx_rtc_ops, THIS_MODULE);
  747. if (IS_ERR(ds1307->rtc)) {
  748. err = PTR_ERR(ds1307->rtc);
  749. dev_err(&client->dev,
  750. "unable to register the class device\n");
  751. goto exit_free;
  752. }
  753. if (want_irq) {
  754. err = request_irq(client->irq, ds1307_irq, 0,
  755. ds1307->rtc->name, client);
  756. if (err) {
  757. dev_err(&client->dev,
  758. "unable to request IRQ!\n");
  759. goto exit_irq;
  760. }
  761. set_bit(HAS_ALARM, &ds1307->flags);
  762. dev_dbg(&client->dev, "got IRQ %d\n", client->irq);
  763. }
  764. if (chip->nvram56) {
  765. err = sysfs_create_bin_file(&client->dev.kobj, &nvram);
  766. if (err == 0) {
  767. set_bit(HAS_NVRAM, &ds1307->flags);
  768. dev_info(&client->dev, "56 bytes nvram\n");
  769. }
  770. }
  771. return 0;
  772. exit_irq:
  773. if (ds1307->rtc)
  774. rtc_device_unregister(ds1307->rtc);
  775. exit_free:
  776. kfree(ds1307);
  777. return err;
  778. }
  779. static int __devexit ds1307_remove(struct i2c_client *client)
  780. {
  781. struct ds1307 *ds1307 = i2c_get_clientdata(client);
  782. if (test_and_clear_bit(HAS_ALARM, &ds1307->flags)) {
  783. free_irq(client->irq, client);
  784. cancel_work_sync(&ds1307->work);
  785. }
  786. if (test_and_clear_bit(HAS_NVRAM, &ds1307->flags))
  787. sysfs_remove_bin_file(&client->dev.kobj, &nvram);
  788. rtc_device_unregister(ds1307->rtc);
  789. kfree(ds1307);
  790. return 0;
  791. }
  792. static struct i2c_driver ds1307_driver = {
  793. .driver = {
  794. .name = "rtc-ds1307",
  795. .owner = THIS_MODULE,
  796. },
  797. .probe = ds1307_probe,
  798. .remove = __devexit_p(ds1307_remove),
  799. .id_table = ds1307_id,
  800. };
  801. static int __init ds1307_init(void)
  802. {
  803. return i2c_add_driver(&ds1307_driver);
  804. }
  805. module_init(ds1307_init);
  806. static void __exit ds1307_exit(void)
  807. {
  808. i2c_del_driver(&ds1307_driver);
  809. }
  810. module_exit(ds1307_exit);
  811. MODULE_DESCRIPTION("RTC driver for DS1307 and similar chips");
  812. MODULE_LICENSE("GPL");