aerdrv_core.c 22 KB

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  1. /*
  2. * drivers/pci/pcie/aer/aerdrv_core.c
  3. *
  4. * This file is subject to the terms and conditions of the GNU General Public
  5. * License. See the file "COPYING" in the main directory of this archive
  6. * for more details.
  7. *
  8. * This file implements the core part of PCI-Express AER. When an pci-express
  9. * error is delivered, an error message will be collected and printed to
  10. * console, then, an error recovery procedure will be executed by following
  11. * the pci error recovery rules.
  12. *
  13. * Copyright (C) 2006 Intel Corp.
  14. * Tom Long Nguyen (tom.l.nguyen@intel.com)
  15. * Zhang Yanmin (yanmin.zhang@intel.com)
  16. *
  17. */
  18. #include <linux/module.h>
  19. #include <linux/pci.h>
  20. #include <linux/kernel.h>
  21. #include <linux/errno.h>
  22. #include <linux/pm.h>
  23. #include <linux/suspend.h>
  24. #include <linux/delay.h>
  25. #include "aerdrv.h"
  26. static int forceload;
  27. static int nosourceid;
  28. module_param(forceload, bool, 0);
  29. module_param(nosourceid, bool, 0);
  30. int pci_enable_pcie_error_reporting(struct pci_dev *dev)
  31. {
  32. u16 reg16 = 0;
  33. int pos;
  34. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  35. if (!pos)
  36. return -EIO;
  37. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  38. if (!pos)
  39. return -EIO;
  40. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  41. reg16 = reg16 |
  42. PCI_EXP_DEVCTL_CERE |
  43. PCI_EXP_DEVCTL_NFERE |
  44. PCI_EXP_DEVCTL_FERE |
  45. PCI_EXP_DEVCTL_URRE;
  46. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  47. reg16);
  48. return 0;
  49. }
  50. int pci_disable_pcie_error_reporting(struct pci_dev *dev)
  51. {
  52. u16 reg16 = 0;
  53. int pos;
  54. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  55. if (!pos)
  56. return -EIO;
  57. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  58. reg16 = reg16 & ~(PCI_EXP_DEVCTL_CERE |
  59. PCI_EXP_DEVCTL_NFERE |
  60. PCI_EXP_DEVCTL_FERE |
  61. PCI_EXP_DEVCTL_URRE);
  62. pci_write_config_word(dev, pos+PCI_EXP_DEVCTL,
  63. reg16);
  64. return 0;
  65. }
  66. int pci_cleanup_aer_uncorrect_error_status(struct pci_dev *dev)
  67. {
  68. int pos;
  69. u32 status, mask;
  70. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  71. if (!pos)
  72. return -EIO;
  73. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, &status);
  74. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_SEVER, &mask);
  75. if (dev->error_state == pci_channel_io_normal)
  76. status &= ~mask; /* Clear corresponding nonfatal bits */
  77. else
  78. status &= mask; /* Clear corresponding fatal bits */
  79. pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, status);
  80. return 0;
  81. }
  82. #if 0
  83. int pci_cleanup_aer_correct_error_status(struct pci_dev *dev)
  84. {
  85. int pos;
  86. u32 status;
  87. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  88. if (!pos)
  89. return -EIO;
  90. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &status);
  91. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, status);
  92. return 0;
  93. }
  94. #endif /* 0 */
  95. static int set_device_error_reporting(struct pci_dev *dev, void *data)
  96. {
  97. bool enable = *((bool *)data);
  98. if (dev->pcie_type == PCIE_RC_PORT ||
  99. dev->pcie_type == PCIE_SW_UPSTREAM_PORT ||
  100. dev->pcie_type == PCIE_SW_DOWNSTREAM_PORT) {
  101. if (enable)
  102. pci_enable_pcie_error_reporting(dev);
  103. else
  104. pci_disable_pcie_error_reporting(dev);
  105. }
  106. if (enable)
  107. pcie_set_ecrc_checking(dev);
  108. return 0;
  109. }
  110. /**
  111. * set_downstream_devices_error_reporting - enable/disable the error reporting bits on the root port and its downstream ports.
  112. * @dev: pointer to root port's pci_dev data structure
  113. * @enable: true = enable error reporting, false = disable error reporting.
  114. */
  115. static void set_downstream_devices_error_reporting(struct pci_dev *dev,
  116. bool enable)
  117. {
  118. set_device_error_reporting(dev, &enable);
  119. if (!dev->subordinate)
  120. return;
  121. pci_walk_bus(dev->subordinate, set_device_error_reporting, &enable);
  122. }
  123. static inline int compare_device_id(struct pci_dev *dev,
  124. struct aer_err_info *e_info)
  125. {
  126. if (e_info->id == ((dev->bus->number << 8) | dev->devfn)) {
  127. /*
  128. * Device ID match
  129. */
  130. return 1;
  131. }
  132. return 0;
  133. }
  134. static int add_error_device(struct aer_err_info *e_info, struct pci_dev *dev)
  135. {
  136. if (e_info->error_dev_num < AER_MAX_MULTI_ERR_DEVICES) {
  137. e_info->dev[e_info->error_dev_num] = dev;
  138. e_info->error_dev_num++;
  139. return 1;
  140. } else
  141. return 0;
  142. }
  143. #define PCI_BUS(x) (((x) >> 8) & 0xff)
  144. static int find_device_iter(struct pci_dev *dev, void *data)
  145. {
  146. int pos;
  147. u32 status;
  148. u32 mask;
  149. u16 reg16;
  150. int result;
  151. struct aer_err_info *e_info = (struct aer_err_info *)data;
  152. /*
  153. * When bus id is equal to 0, it might be a bad id
  154. * reported by root port.
  155. */
  156. if (!nosourceid && (PCI_BUS(e_info->id) != 0)) {
  157. result = compare_device_id(dev, e_info);
  158. if (result)
  159. add_error_device(e_info, dev);
  160. /*
  161. * If there is no multiple error, we stop
  162. * or continue based on the id comparing.
  163. */
  164. if (!(e_info->flags & AER_MULTI_ERROR_VALID_FLAG))
  165. return result;
  166. /*
  167. * If there are multiple errors and id does match,
  168. * We need continue to search other devices under
  169. * the root port. Return 0 means that.
  170. */
  171. if (result)
  172. return 0;
  173. }
  174. /*
  175. * When either
  176. * 1) nosourceid==y;
  177. * 2) bus id is equal to 0. Some ports might lose the bus
  178. * id of error source id;
  179. * 3) There are multiple errors and prior id comparing fails;
  180. * We check AER status registers to find the initial reporter.
  181. */
  182. if (atomic_read(&dev->enable_cnt) == 0)
  183. return 0;
  184. pos = pci_find_capability(dev, PCI_CAP_ID_EXP);
  185. if (!pos)
  186. return 0;
  187. /* Check if AER is enabled */
  188. pci_read_config_word(dev, pos+PCI_EXP_DEVCTL, &reg16);
  189. if (!(reg16 & (
  190. PCI_EXP_DEVCTL_CERE |
  191. PCI_EXP_DEVCTL_NFERE |
  192. PCI_EXP_DEVCTL_FERE |
  193. PCI_EXP_DEVCTL_URRE)))
  194. return 0;
  195. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  196. if (!pos)
  197. return 0;
  198. status = 0;
  199. mask = 0;
  200. if (e_info->severity == AER_CORRECTABLE) {
  201. pci_read_config_dword(dev,
  202. pos + PCI_ERR_COR_STATUS,
  203. &status);
  204. pci_read_config_dword(dev,
  205. pos + PCI_ERR_COR_MASK,
  206. &mask);
  207. if (status & ERR_CORRECTABLE_ERROR_MASK & ~mask) {
  208. add_error_device(e_info, dev);
  209. goto added;
  210. }
  211. } else {
  212. pci_read_config_dword(dev,
  213. pos + PCI_ERR_UNCOR_STATUS,
  214. &status);
  215. pci_read_config_dword(dev,
  216. pos + PCI_ERR_UNCOR_MASK,
  217. &mask);
  218. if (status & ERR_UNCORRECTABLE_ERROR_MASK & ~mask) {
  219. add_error_device(e_info, dev);
  220. goto added;
  221. }
  222. }
  223. return 0;
  224. added:
  225. if (e_info->flags & AER_MULTI_ERROR_VALID_FLAG)
  226. return 0;
  227. else
  228. return 1;
  229. }
  230. /**
  231. * find_source_device - search through device hierarchy for source device
  232. * @parent: pointer to Root Port pci_dev data structure
  233. * @err_info: including detailed error information such like id
  234. *
  235. * Invoked when error is detected at the Root Port.
  236. */
  237. static void find_source_device(struct pci_dev *parent,
  238. struct aer_err_info *e_info)
  239. {
  240. struct pci_dev *dev = parent;
  241. int result;
  242. /* Is Root Port an agent that sends error message? */
  243. result = find_device_iter(dev, e_info);
  244. if (result)
  245. return;
  246. pci_walk_bus(parent->subordinate, find_device_iter, e_info);
  247. }
  248. static int report_error_detected(struct pci_dev *dev, void *data)
  249. {
  250. pci_ers_result_t vote;
  251. struct pci_error_handlers *err_handler;
  252. struct aer_broadcast_data *result_data;
  253. result_data = (struct aer_broadcast_data *) data;
  254. dev->error_state = result_data->state;
  255. if (!dev->driver ||
  256. !dev->driver->err_handler ||
  257. !dev->driver->err_handler->error_detected) {
  258. if (result_data->state == pci_channel_io_frozen &&
  259. !(dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)) {
  260. /*
  261. * In case of fatal recovery, if one of down-
  262. * stream device has no driver. We might be
  263. * unable to recover because a later insmod
  264. * of a driver for this device is unaware of
  265. * its hw state.
  266. */
  267. dev_printk(KERN_DEBUG, &dev->dev, "device has %s\n",
  268. dev->driver ?
  269. "no AER-aware driver" : "no driver");
  270. }
  271. return 0;
  272. }
  273. err_handler = dev->driver->err_handler;
  274. vote = err_handler->error_detected(dev, result_data->state);
  275. result_data->result = merge_result(result_data->result, vote);
  276. return 0;
  277. }
  278. static int report_mmio_enabled(struct pci_dev *dev, void *data)
  279. {
  280. pci_ers_result_t vote;
  281. struct pci_error_handlers *err_handler;
  282. struct aer_broadcast_data *result_data;
  283. result_data = (struct aer_broadcast_data *) data;
  284. if (!dev->driver ||
  285. !dev->driver->err_handler ||
  286. !dev->driver->err_handler->mmio_enabled)
  287. return 0;
  288. err_handler = dev->driver->err_handler;
  289. vote = err_handler->mmio_enabled(dev);
  290. result_data->result = merge_result(result_data->result, vote);
  291. return 0;
  292. }
  293. static int report_slot_reset(struct pci_dev *dev, void *data)
  294. {
  295. pci_ers_result_t vote;
  296. struct pci_error_handlers *err_handler;
  297. struct aer_broadcast_data *result_data;
  298. result_data = (struct aer_broadcast_data *) data;
  299. if (!dev->driver ||
  300. !dev->driver->err_handler ||
  301. !dev->driver->err_handler->slot_reset)
  302. return 0;
  303. err_handler = dev->driver->err_handler;
  304. vote = err_handler->slot_reset(dev);
  305. result_data->result = merge_result(result_data->result, vote);
  306. return 0;
  307. }
  308. static int report_resume(struct pci_dev *dev, void *data)
  309. {
  310. struct pci_error_handlers *err_handler;
  311. dev->error_state = pci_channel_io_normal;
  312. if (!dev->driver ||
  313. !dev->driver->err_handler ||
  314. !dev->driver->err_handler->resume)
  315. return 0;
  316. err_handler = dev->driver->err_handler;
  317. err_handler->resume(dev);
  318. return 0;
  319. }
  320. /**
  321. * broadcast_error_message - handle message broadcast to downstream drivers
  322. * @dev: pointer to from where in a hierarchy message is broadcasted down
  323. * @state: error state
  324. * @error_mesg: message to print
  325. * @cb: callback to be broadcasted
  326. *
  327. * Invoked during error recovery process. Once being invoked, the content
  328. * of error severity will be broadcasted to all downstream drivers in a
  329. * hierarchy in question.
  330. */
  331. static pci_ers_result_t broadcast_error_message(struct pci_dev *dev,
  332. enum pci_channel_state state,
  333. char *error_mesg,
  334. int (*cb)(struct pci_dev *, void *))
  335. {
  336. struct aer_broadcast_data result_data;
  337. dev_printk(KERN_DEBUG, &dev->dev, "broadcast %s message\n", error_mesg);
  338. result_data.state = state;
  339. if (cb == report_error_detected)
  340. result_data.result = PCI_ERS_RESULT_CAN_RECOVER;
  341. else
  342. result_data.result = PCI_ERS_RESULT_RECOVERED;
  343. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE) {
  344. /*
  345. * If the error is reported by a bridge, we think this error
  346. * is related to the downstream link of the bridge, so we
  347. * do error recovery on all subordinates of the bridge instead
  348. * of the bridge and clear the error status of the bridge.
  349. */
  350. if (cb == report_error_detected)
  351. dev->error_state = state;
  352. pci_walk_bus(dev->subordinate, cb, &result_data);
  353. if (cb == report_resume) {
  354. pci_cleanup_aer_uncorrect_error_status(dev);
  355. dev->error_state = pci_channel_io_normal;
  356. }
  357. }
  358. else {
  359. /*
  360. * If the error is reported by an end point, we think this
  361. * error is related to the upstream link of the end point.
  362. */
  363. pci_walk_bus(dev->bus, cb, &result_data);
  364. }
  365. return result_data.result;
  366. }
  367. struct find_aer_service_data {
  368. struct pcie_port_service_driver *aer_driver;
  369. int is_downstream;
  370. };
  371. static int find_aer_service_iter(struct device *device, void *data)
  372. {
  373. struct device_driver *driver;
  374. struct pcie_port_service_driver *service_driver;
  375. struct find_aer_service_data *result;
  376. result = (struct find_aer_service_data *) data;
  377. if (device->bus == &pcie_port_bus_type) {
  378. struct pcie_port_data *port_data;
  379. port_data = pci_get_drvdata(to_pcie_device(device)->port);
  380. if (port_data->port_type == PCIE_SW_DOWNSTREAM_PORT)
  381. result->is_downstream = 1;
  382. driver = device->driver;
  383. if (driver) {
  384. service_driver = to_service_driver(driver);
  385. if (service_driver->service == PCIE_PORT_SERVICE_AER) {
  386. result->aer_driver = service_driver;
  387. return 1;
  388. }
  389. }
  390. }
  391. return 0;
  392. }
  393. static void find_aer_service(struct pci_dev *dev,
  394. struct find_aer_service_data *data)
  395. {
  396. int retval;
  397. retval = device_for_each_child(&dev->dev, data, find_aer_service_iter);
  398. }
  399. static pci_ers_result_t reset_link(struct pcie_device *aerdev,
  400. struct pci_dev *dev)
  401. {
  402. struct pci_dev *udev;
  403. pci_ers_result_t status;
  404. struct find_aer_service_data data;
  405. if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE)
  406. udev = dev;
  407. else
  408. udev= dev->bus->self;
  409. data.is_downstream = 0;
  410. data.aer_driver = NULL;
  411. find_aer_service(udev, &data);
  412. /*
  413. * Use the aer driver of the error agent firstly.
  414. * If it hasn't the aer driver, use the root port's
  415. */
  416. if (!data.aer_driver || !data.aer_driver->reset_link) {
  417. if (data.is_downstream &&
  418. aerdev->device.driver &&
  419. to_service_driver(aerdev->device.driver)->reset_link) {
  420. data.aer_driver =
  421. to_service_driver(aerdev->device.driver);
  422. } else {
  423. dev_printk(KERN_DEBUG, &dev->dev, "no link-reset "
  424. "support\n");
  425. return PCI_ERS_RESULT_DISCONNECT;
  426. }
  427. }
  428. status = data.aer_driver->reset_link(udev);
  429. if (status != PCI_ERS_RESULT_RECOVERED) {
  430. dev_printk(KERN_DEBUG, &dev->dev, "link reset at upstream "
  431. "device %s failed\n", pci_name(udev));
  432. return PCI_ERS_RESULT_DISCONNECT;
  433. }
  434. return status;
  435. }
  436. /**
  437. * do_recovery - handle nonfatal/fatal error recovery process
  438. * @aerdev: pointer to a pcie_device data structure of root port
  439. * @dev: pointer to a pci_dev data structure of agent detecting an error
  440. * @severity: error severity type
  441. *
  442. * Invoked when an error is nonfatal/fatal. Once being invoked, broadcast
  443. * error detected message to all downstream drivers within a hierarchy in
  444. * question and return the returned code.
  445. */
  446. static pci_ers_result_t do_recovery(struct pcie_device *aerdev,
  447. struct pci_dev *dev,
  448. int severity)
  449. {
  450. pci_ers_result_t status, result = PCI_ERS_RESULT_RECOVERED;
  451. enum pci_channel_state state;
  452. if (severity == AER_FATAL)
  453. state = pci_channel_io_frozen;
  454. else
  455. state = pci_channel_io_normal;
  456. status = broadcast_error_message(dev,
  457. state,
  458. "error_detected",
  459. report_error_detected);
  460. if (severity == AER_FATAL) {
  461. result = reset_link(aerdev, dev);
  462. if (result != PCI_ERS_RESULT_RECOVERED) {
  463. /* TODO: Should panic here? */
  464. return result;
  465. }
  466. }
  467. if (status == PCI_ERS_RESULT_CAN_RECOVER)
  468. status = broadcast_error_message(dev,
  469. state,
  470. "mmio_enabled",
  471. report_mmio_enabled);
  472. if (status == PCI_ERS_RESULT_NEED_RESET) {
  473. /*
  474. * TODO: Should call platform-specific
  475. * functions to reset slot before calling
  476. * drivers' slot_reset callbacks?
  477. */
  478. status = broadcast_error_message(dev,
  479. state,
  480. "slot_reset",
  481. report_slot_reset);
  482. }
  483. if (status == PCI_ERS_RESULT_RECOVERED)
  484. broadcast_error_message(dev,
  485. state,
  486. "resume",
  487. report_resume);
  488. return status;
  489. }
  490. /**
  491. * handle_error_source - handle logging error into an event log
  492. * @aerdev: pointer to pcie_device data structure of the root port
  493. * @dev: pointer to pci_dev data structure of error source device
  494. * @info: comprehensive error information
  495. *
  496. * Invoked when an error being detected by Root Port.
  497. */
  498. static void handle_error_source(struct pcie_device * aerdev,
  499. struct pci_dev *dev,
  500. struct aer_err_info *info)
  501. {
  502. pci_ers_result_t status = 0;
  503. int pos;
  504. if (info->severity == AER_CORRECTABLE) {
  505. /*
  506. * Correctable error does not need software intevention.
  507. * No need to go through error recovery process.
  508. */
  509. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  510. if (pos)
  511. pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  512. info->status);
  513. } else {
  514. status = do_recovery(aerdev, dev, info->severity);
  515. if (status == PCI_ERS_RESULT_RECOVERED) {
  516. dev_printk(KERN_DEBUG, &dev->dev, "AER driver "
  517. "successfully recovered\n");
  518. } else {
  519. /* TODO: Should kernel panic here? */
  520. dev_printk(KERN_DEBUG, &dev->dev, "AER driver didn't "
  521. "recover\n");
  522. }
  523. }
  524. }
  525. /**
  526. * aer_enable_rootport - enable Root Port's interrupts when receiving messages
  527. * @rpc: pointer to a Root Port data structure
  528. *
  529. * Invoked when PCIE bus loads AER service driver.
  530. */
  531. void aer_enable_rootport(struct aer_rpc *rpc)
  532. {
  533. struct pci_dev *pdev = rpc->rpd->port;
  534. int pos, aer_pos;
  535. u16 reg16;
  536. u32 reg32;
  537. pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
  538. /* Clear PCIE Capability's Device Status */
  539. pci_read_config_word(pdev, pos+PCI_EXP_DEVSTA, &reg16);
  540. pci_write_config_word(pdev, pos+PCI_EXP_DEVSTA, reg16);
  541. /* Disable system error generation in response to error messages */
  542. pci_read_config_word(pdev, pos + PCI_EXP_RTCTL, &reg16);
  543. reg16 &= ~(SYSTEM_ERROR_INTR_ON_MESG_MASK);
  544. pci_write_config_word(pdev, pos + PCI_EXP_RTCTL, reg16);
  545. aer_pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  546. /* Clear error status */
  547. pci_read_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, &reg32);
  548. pci_write_config_dword(pdev, aer_pos + PCI_ERR_ROOT_STATUS, reg32);
  549. pci_read_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, &reg32);
  550. pci_write_config_dword(pdev, aer_pos + PCI_ERR_COR_STATUS, reg32);
  551. pci_read_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, &reg32);
  552. pci_write_config_dword(pdev, aer_pos + PCI_ERR_UNCOR_STATUS, reg32);
  553. /*
  554. * Enable error reporting for the root port device and downstream port
  555. * devices.
  556. */
  557. set_downstream_devices_error_reporting(pdev, true);
  558. /* Enable Root Port's interrupt in response to error messages */
  559. pci_write_config_dword(pdev,
  560. aer_pos + PCI_ERR_ROOT_COMMAND,
  561. ROOT_PORT_INTR_ON_MESG_MASK);
  562. }
  563. /**
  564. * disable_root_aer - disable Root Port's interrupts when receiving messages
  565. * @rpc: pointer to a Root Port data structure
  566. *
  567. * Invoked when PCIE bus unloads AER service driver.
  568. */
  569. static void disable_root_aer(struct aer_rpc *rpc)
  570. {
  571. struct pci_dev *pdev = rpc->rpd->port;
  572. u32 reg32;
  573. int pos;
  574. /*
  575. * Disable error reporting for the root port device and downstream port
  576. * devices.
  577. */
  578. set_downstream_devices_error_reporting(pdev, false);
  579. pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_ERR);
  580. /* Disable Root's interrupt in response to error messages */
  581. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_COMMAND, 0);
  582. /* Clear Root's error status reg */
  583. pci_read_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, &reg32);
  584. pci_write_config_dword(pdev, pos + PCI_ERR_ROOT_STATUS, reg32);
  585. }
  586. /**
  587. * get_e_source - retrieve an error source
  588. * @rpc: pointer to the root port which holds an error
  589. *
  590. * Invoked by DPC handler to consume an error.
  591. */
  592. static struct aer_err_source* get_e_source(struct aer_rpc *rpc)
  593. {
  594. struct aer_err_source *e_source;
  595. unsigned long flags;
  596. /* Lock access to Root error producer/consumer index */
  597. spin_lock_irqsave(&rpc->e_lock, flags);
  598. if (rpc->prod_idx == rpc->cons_idx) {
  599. spin_unlock_irqrestore(&rpc->e_lock, flags);
  600. return NULL;
  601. }
  602. e_source = &rpc->e_sources[rpc->cons_idx];
  603. rpc->cons_idx++;
  604. if (rpc->cons_idx == AER_ERROR_SOURCES_MAX)
  605. rpc->cons_idx = 0;
  606. spin_unlock_irqrestore(&rpc->e_lock, flags);
  607. return e_source;
  608. }
  609. static int get_device_error_info(struct pci_dev *dev, struct aer_err_info *info)
  610. {
  611. int pos;
  612. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR);
  613. /* The device might not support AER */
  614. if (!pos)
  615. return AER_SUCCESS;
  616. if (info->severity == AER_CORRECTABLE) {
  617. pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS,
  618. &info->status);
  619. if (!(info->status & ERR_CORRECTABLE_ERROR_MASK))
  620. return AER_UNSUCCESS;
  621. } else if (dev->hdr_type & PCI_HEADER_TYPE_BRIDGE ||
  622. info->severity == AER_NONFATAL) {
  623. /* Link is still healthy for IO reads */
  624. pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS,
  625. &info->status);
  626. if (!(info->status & ERR_UNCORRECTABLE_ERROR_MASK))
  627. return AER_UNSUCCESS;
  628. if (info->status & AER_LOG_TLP_MASKS) {
  629. info->flags |= AER_TLP_HEADER_VALID_FLAG;
  630. pci_read_config_dword(dev,
  631. pos + PCI_ERR_HEADER_LOG, &info->tlp.dw0);
  632. pci_read_config_dword(dev,
  633. pos + PCI_ERR_HEADER_LOG + 4, &info->tlp.dw1);
  634. pci_read_config_dword(dev,
  635. pos + PCI_ERR_HEADER_LOG + 8, &info->tlp.dw2);
  636. pci_read_config_dword(dev,
  637. pos + PCI_ERR_HEADER_LOG + 12, &info->tlp.dw3);
  638. }
  639. }
  640. return AER_SUCCESS;
  641. }
  642. static inline void aer_process_err_devices(struct pcie_device *p_device,
  643. struct aer_err_info *e_info)
  644. {
  645. int i;
  646. if (!e_info->dev[0]) {
  647. dev_printk(KERN_DEBUG, &p_device->port->dev,
  648. "can't find device of ID%04x\n",
  649. e_info->id);
  650. }
  651. for (i = 0; i < e_info->error_dev_num && e_info->dev[i]; i++) {
  652. if (get_device_error_info(e_info->dev[i], e_info) ==
  653. AER_SUCCESS) {
  654. aer_print_error(e_info->dev[i], e_info);
  655. handle_error_source(p_device,
  656. e_info->dev[i],
  657. e_info);
  658. }
  659. }
  660. }
  661. /**
  662. * aer_isr_one_error - consume an error detected by root port
  663. * @p_device: pointer to error root port service device
  664. * @e_src: pointer to an error source
  665. */
  666. static void aer_isr_one_error(struct pcie_device *p_device,
  667. struct aer_err_source *e_src)
  668. {
  669. struct aer_err_info *e_info;
  670. int i;
  671. /* struct aer_err_info might be big, so we allocate it with slab */
  672. e_info = kmalloc(sizeof(struct aer_err_info), GFP_KERNEL);
  673. if (e_info == NULL) {
  674. dev_printk(KERN_DEBUG, &p_device->port->dev,
  675. "Can't allocate mem when processing AER errors\n");
  676. return;
  677. }
  678. /*
  679. * There is a possibility that both correctable error and
  680. * uncorrectable error being logged. Report correctable error first.
  681. */
  682. for (i = 1; i & ROOT_ERR_STATUS_MASKS ; i <<= 2) {
  683. if (i > 4)
  684. break;
  685. if (!(e_src->status & i))
  686. continue;
  687. memset(e_info, 0, sizeof(struct aer_err_info));
  688. /* Init comprehensive error information */
  689. if (i & PCI_ERR_ROOT_COR_RCV) {
  690. e_info->id = ERR_COR_ID(e_src->id);
  691. e_info->severity = AER_CORRECTABLE;
  692. } else {
  693. e_info->id = ERR_UNCOR_ID(e_src->id);
  694. e_info->severity = ((e_src->status >> 6) & 1);
  695. }
  696. if (e_src->status &
  697. (PCI_ERR_ROOT_MULTI_COR_RCV |
  698. PCI_ERR_ROOT_MULTI_UNCOR_RCV))
  699. e_info->flags |= AER_MULTI_ERROR_VALID_FLAG;
  700. find_source_device(p_device->port, e_info);
  701. aer_process_err_devices(p_device, e_info);
  702. }
  703. kfree(e_info);
  704. }
  705. /**
  706. * aer_isr - consume errors detected by root port
  707. * @work: definition of this work item
  708. *
  709. * Invoked, as DPC, when root port records new detected error
  710. */
  711. void aer_isr(struct work_struct *work)
  712. {
  713. struct aer_rpc *rpc = container_of(work, struct aer_rpc, dpc_handler);
  714. struct pcie_device *p_device = rpc->rpd;
  715. struct aer_err_source *e_src;
  716. mutex_lock(&rpc->rpc_mutex);
  717. e_src = get_e_source(rpc);
  718. while (e_src) {
  719. aer_isr_one_error(p_device, e_src);
  720. e_src = get_e_source(rpc);
  721. }
  722. mutex_unlock(&rpc->rpc_mutex);
  723. wake_up(&rpc->wait_release);
  724. }
  725. /**
  726. * aer_delete_rootport - disable root port aer and delete service data
  727. * @rpc: pointer to a root port device being deleted
  728. *
  729. * Invoked when AER service unloaded on a specific Root Port
  730. */
  731. void aer_delete_rootport(struct aer_rpc *rpc)
  732. {
  733. /* Disable root port AER itself */
  734. disable_root_aer(rpc);
  735. kfree(rpc);
  736. }
  737. /**
  738. * aer_init - provide AER initialization
  739. * @dev: pointer to AER pcie device
  740. *
  741. * Invoked when AER service driver is loaded.
  742. */
  743. int aer_init(struct pcie_device *dev)
  744. {
  745. if (aer_osc_setup(dev) && !forceload)
  746. return -ENXIO;
  747. return AER_SUCCESS;
  748. }
  749. EXPORT_SYMBOL_GPL(pci_enable_pcie_error_reporting);
  750. EXPORT_SYMBOL_GPL(pci_disable_pcie_error_reporting);
  751. EXPORT_SYMBOL_GPL(pci_cleanup_aer_uncorrect_error_status);