mwl8k.c 90 KB

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  1. /*
  2. * drivers/net/wireless/mwl8k.c driver for Marvell TOPDOG 802.11 Wireless cards
  3. *
  4. * Copyright (C) 2008 Marvell Semiconductor Inc.
  5. *
  6. * This file is licensed under the terms of the GNU General Public
  7. * License version 2. This program is licensed "as is" without any
  8. * warranty of any kind, whether express or implied.
  9. */
  10. #include <linux/init.h>
  11. #include <linux/module.h>
  12. #include <linux/kernel.h>
  13. #include <linux/spinlock.h>
  14. #include <linux/list.h>
  15. #include <linux/pci.h>
  16. #include <linux/delay.h>
  17. #include <linux/completion.h>
  18. #include <linux/etherdevice.h>
  19. #include <net/mac80211.h>
  20. #include <linux/moduleparam.h>
  21. #include <linux/firmware.h>
  22. #include <linux/workqueue.h>
  23. #define MWL8K_DESC "Marvell TOPDOG(R) 802.11 Wireless Network Driver"
  24. #define MWL8K_NAME KBUILD_MODNAME
  25. #define MWL8K_VERSION "0.9.1"
  26. MODULE_DESCRIPTION(MWL8K_DESC);
  27. MODULE_VERSION(MWL8K_VERSION);
  28. MODULE_AUTHOR("Lennert Buytenhek <buytenh@marvell.com>");
  29. MODULE_LICENSE("GPL");
  30. static DEFINE_PCI_DEVICE_TABLE(mwl8k_table) = {
  31. { PCI_VDEVICE(MARVELL, 0x2a2b), .driver_data = 8687, },
  32. { PCI_VDEVICE(MARVELL, 0x2a30), .driver_data = 8687, },
  33. { }
  34. };
  35. MODULE_DEVICE_TABLE(pci, mwl8k_table);
  36. #define IEEE80211_ADDR_LEN ETH_ALEN
  37. /* Register definitions */
  38. #define MWL8K_HIU_GEN_PTR 0x00000c10
  39. #define MWL8K_MODE_STA 0x0000005a
  40. #define MWL8K_MODE_AP 0x000000a5
  41. #define MWL8K_HIU_INT_CODE 0x00000c14
  42. #define MWL8K_FWSTA_READY 0xf0f1f2f4
  43. #define MWL8K_FWAP_READY 0xf1f2f4a5
  44. #define MWL8K_INT_CODE_CMD_FINISHED 0x00000005
  45. #define MWL8K_HIU_SCRATCH 0x00000c40
  46. /* Host->device communications */
  47. #define MWL8K_HIU_H2A_INTERRUPT_EVENTS 0x00000c18
  48. #define MWL8K_HIU_H2A_INTERRUPT_STATUS 0x00000c1c
  49. #define MWL8K_HIU_H2A_INTERRUPT_MASK 0x00000c20
  50. #define MWL8K_HIU_H2A_INTERRUPT_CLEAR_SEL 0x00000c24
  51. #define MWL8K_HIU_H2A_INTERRUPT_STATUS_MASK 0x00000c28
  52. #define MWL8K_H2A_INT_DUMMY (1 << 20)
  53. #define MWL8K_H2A_INT_RESET (1 << 15)
  54. #define MWL8K_H2A_INT_PS (1 << 2)
  55. #define MWL8K_H2A_INT_DOORBELL (1 << 1)
  56. #define MWL8K_H2A_INT_PPA_READY (1 << 0)
  57. /* Device->host communications */
  58. #define MWL8K_HIU_A2H_INTERRUPT_EVENTS 0x00000c2c
  59. #define MWL8K_HIU_A2H_INTERRUPT_STATUS 0x00000c30
  60. #define MWL8K_HIU_A2H_INTERRUPT_MASK 0x00000c34
  61. #define MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL 0x00000c38
  62. #define MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK 0x00000c3c
  63. #define MWL8K_A2H_INT_DUMMY (1 << 20)
  64. #define MWL8K_A2H_INT_CHNL_SWITCHED (1 << 11)
  65. #define MWL8K_A2H_INT_QUEUE_EMPTY (1 << 10)
  66. #define MWL8K_A2H_INT_RADAR_DETECT (1 << 7)
  67. #define MWL8K_A2H_INT_RADIO_ON (1 << 6)
  68. #define MWL8K_A2H_INT_RADIO_OFF (1 << 5)
  69. #define MWL8K_A2H_INT_MAC_EVENT (1 << 3)
  70. #define MWL8K_A2H_INT_OPC_DONE (1 << 2)
  71. #define MWL8K_A2H_INT_RX_READY (1 << 1)
  72. #define MWL8K_A2H_INT_TX_DONE (1 << 0)
  73. #define MWL8K_A2H_EVENTS (MWL8K_A2H_INT_DUMMY | \
  74. MWL8K_A2H_INT_CHNL_SWITCHED | \
  75. MWL8K_A2H_INT_QUEUE_EMPTY | \
  76. MWL8K_A2H_INT_RADAR_DETECT | \
  77. MWL8K_A2H_INT_RADIO_ON | \
  78. MWL8K_A2H_INT_RADIO_OFF | \
  79. MWL8K_A2H_INT_MAC_EVENT | \
  80. MWL8K_A2H_INT_OPC_DONE | \
  81. MWL8K_A2H_INT_RX_READY | \
  82. MWL8K_A2H_INT_TX_DONE)
  83. /* WME stream classes */
  84. #define WME_AC_BE 0 /* best effort */
  85. #define WME_AC_BK 1 /* background */
  86. #define WME_AC_VI 2 /* video */
  87. #define WME_AC_VO 3 /* voice */
  88. #define MWL8K_RX_QUEUES 1
  89. #define MWL8K_TX_QUEUES 4
  90. struct mwl8k_rx_queue {
  91. int rx_desc_count;
  92. /* hw receives here */
  93. int rx_head;
  94. /* refill descs here */
  95. int rx_tail;
  96. struct mwl8k_rx_desc *rx_desc_area;
  97. dma_addr_t rx_desc_dma;
  98. struct sk_buff **rx_skb;
  99. };
  100. struct mwl8k_skb {
  101. /*
  102. * The DMA engine requires a modification to the payload.
  103. * If the skbuff is shared/cloned, it needs to be unshared.
  104. * This method is used to ensure the stack always gets back
  105. * the skbuff it sent for transmission.
  106. */
  107. struct sk_buff *clone;
  108. struct sk_buff *skb;
  109. };
  110. struct mwl8k_tx_queue {
  111. /* hw transmits here */
  112. int tx_head;
  113. /* sw appends here */
  114. int tx_tail;
  115. struct ieee80211_tx_queue_stats tx_stats;
  116. struct mwl8k_tx_desc *tx_desc_area;
  117. dma_addr_t tx_desc_dma;
  118. struct mwl8k_skb *tx_skb;
  119. };
  120. /* Pointers to the firmware data and meta information about it. */
  121. struct mwl8k_firmware {
  122. /* Microcode */
  123. struct firmware *ucode;
  124. /* Boot helper code */
  125. struct firmware *helper;
  126. };
  127. struct mwl8k_priv {
  128. void __iomem *regs;
  129. struct ieee80211_hw *hw;
  130. struct pci_dev *pdev;
  131. u8 name[16];
  132. /* firmware access lock */
  133. spinlock_t fw_lock;
  134. /* firmware files and meta data */
  135. struct mwl8k_firmware fw;
  136. u32 part_num;
  137. /* lock held over TX and TX reap */
  138. spinlock_t tx_lock;
  139. u32 int_mask;
  140. struct ieee80211_vif *vif;
  141. struct list_head vif_list;
  142. struct ieee80211_channel *current_channel;
  143. /* power management status cookie from firmware */
  144. u32 *cookie;
  145. dma_addr_t cookie_dma;
  146. u16 num_mcaddrs;
  147. u16 region_code;
  148. u8 hw_rev;
  149. __le32 fw_rev;
  150. u32 wep_enabled;
  151. /*
  152. * Running count of TX packets in flight, to avoid
  153. * iterating over the transmit rings each time.
  154. */
  155. int pending_tx_pkts;
  156. struct mwl8k_rx_queue rxq[MWL8K_RX_QUEUES];
  157. struct mwl8k_tx_queue txq[MWL8K_TX_QUEUES];
  158. /* PHY parameters */
  159. struct ieee80211_supported_band band;
  160. struct ieee80211_channel channels[14];
  161. struct ieee80211_rate rates[12];
  162. /* RF preamble: Short, Long or Auto */
  163. u8 radio_preamble;
  164. u8 radio_state;
  165. /* WMM MODE 1 for enabled; 0 for disabled */
  166. bool wmm_mode;
  167. /* Set if PHY config is in progress */
  168. bool inconfig;
  169. /* XXX need to convert this to handle multiple interfaces */
  170. bool capture_beacon;
  171. u8 capture_bssid[IEEE80211_ADDR_LEN];
  172. struct sk_buff *beacon_skb;
  173. /*
  174. * This FJ worker has to be global as it is scheduled from the
  175. * RX handler. At this point we don't know which interface it
  176. * belongs to until the list of bssids waiting to complete join
  177. * is checked.
  178. */
  179. struct work_struct finalize_join_worker;
  180. /* Tasklet to reclaim TX descriptors and buffers after tx */
  181. struct tasklet_struct tx_reclaim_task;
  182. /* Work thread to serialize configuration requests */
  183. struct workqueue_struct *config_wq;
  184. struct completion *hostcmd_wait;
  185. struct completion *tx_wait;
  186. };
  187. /* Per interface specific private data */
  188. struct mwl8k_vif {
  189. struct list_head node;
  190. /* backpointer to parent config block */
  191. struct mwl8k_priv *priv;
  192. /* BSS config of AP or IBSS from mac80211*/
  193. struct ieee80211_bss_conf bss_info;
  194. /* BSSID of AP or IBSS */
  195. u8 bssid[IEEE80211_ADDR_LEN];
  196. u8 mac_addr[IEEE80211_ADDR_LEN];
  197. /*
  198. * Subset of supported legacy rates.
  199. * Intersection of AP and STA supported rates.
  200. */
  201. struct ieee80211_rate legacy_rates[12];
  202. /* number of supported legacy rates */
  203. u8 legacy_nrates;
  204. /* Number of supported MCS rates. Work in progress */
  205. u8 mcs_nrates;
  206. /* Index into station database.Returned by update_sta_db call */
  207. u8 peer_id;
  208. /* Non AMPDU sequence number assigned by driver */
  209. u16 seqno;
  210. /* Note:There is no channel info,
  211. * refer to the master channel info in priv
  212. */
  213. };
  214. #define MWL8K_VIF(_vif) (struct mwl8k_vif *)(&((_vif)->drv_priv))
  215. static const struct ieee80211_channel mwl8k_channels[] = {
  216. { .center_freq = 2412, .hw_value = 1, },
  217. { .center_freq = 2417, .hw_value = 2, },
  218. { .center_freq = 2422, .hw_value = 3, },
  219. { .center_freq = 2427, .hw_value = 4, },
  220. { .center_freq = 2432, .hw_value = 5, },
  221. { .center_freq = 2437, .hw_value = 6, },
  222. { .center_freq = 2442, .hw_value = 7, },
  223. { .center_freq = 2447, .hw_value = 8, },
  224. { .center_freq = 2452, .hw_value = 9, },
  225. { .center_freq = 2457, .hw_value = 10, },
  226. { .center_freq = 2462, .hw_value = 11, },
  227. };
  228. static const struct ieee80211_rate mwl8k_rates[] = {
  229. { .bitrate = 10, .hw_value = 2, },
  230. { .bitrate = 20, .hw_value = 4, },
  231. { .bitrate = 55, .hw_value = 11, },
  232. { .bitrate = 60, .hw_value = 12, },
  233. { .bitrate = 90, .hw_value = 18, },
  234. { .bitrate = 110, .hw_value = 22, },
  235. { .bitrate = 120, .hw_value = 24, },
  236. { .bitrate = 180, .hw_value = 36, },
  237. { .bitrate = 240, .hw_value = 48, },
  238. { .bitrate = 360, .hw_value = 72, },
  239. { .bitrate = 480, .hw_value = 96, },
  240. { .bitrate = 540, .hw_value = 108, },
  241. };
  242. /* Radio settings */
  243. #define MWL8K_RADIO_FORCE 0x2
  244. #define MWL8K_RADIO_ENABLE 0x1
  245. #define MWL8K_RADIO_DISABLE 0x0
  246. #define MWL8K_RADIO_AUTO_PREAMBLE 0x0005
  247. #define MWL8K_RADIO_SHORT_PREAMBLE 0x0003
  248. #define MWL8K_RADIO_LONG_PREAMBLE 0x0001
  249. /* WMM */
  250. #define MWL8K_WMM_ENABLE 1
  251. #define MWL8K_WMM_DISABLE 0
  252. #define MWL8K_RADIO_DEFAULT_PREAMBLE MWL8K_RADIO_LONG_PREAMBLE
  253. /* Slot time */
  254. /* Short Slot: 9us slot time */
  255. #define MWL8K_SHORT_SLOTTIME 1
  256. /* Long slot: 20us slot time */
  257. #define MWL8K_LONG_SLOTTIME 0
  258. /* Set or get info from Firmware */
  259. #define MWL8K_CMD_SET 0x0001
  260. #define MWL8K_CMD_GET 0x0000
  261. /* Firmware command codes */
  262. #define MWL8K_CMD_CODE_DNLD 0x0001
  263. #define MWL8K_CMD_GET_HW_SPEC 0x0003
  264. #define MWL8K_CMD_MAC_MULTICAST_ADR 0x0010
  265. #define MWL8K_CMD_GET_STAT 0x0014
  266. #define MWL8K_CMD_RADIO_CONTROL 0x001C
  267. #define MWL8K_CMD_RF_TX_POWER 0x001E
  268. #define MWL8K_CMD_SET_PRE_SCAN 0x0107
  269. #define MWL8K_CMD_SET_POST_SCAN 0x0108
  270. #define MWL8K_CMD_SET_RF_CHANNEL 0x010A
  271. #define MWL8K_CMD_SET_SLOT 0x0114
  272. #define MWL8K_CMD_MIMO_CONFIG 0x0125
  273. #define MWL8K_CMD_ENABLE_SNIFFER 0x0150
  274. #define MWL8K_CMD_SET_WMM_MODE 0x0123
  275. #define MWL8K_CMD_SET_EDCA_PARAMS 0x0115
  276. #define MWL8K_CMD_SET_FINALIZE_JOIN 0x0111
  277. #define MWL8K_CMD_UPDATE_STADB 0x1123
  278. #define MWL8K_CMD_SET_RATEADAPT_MODE 0x0203
  279. #define MWL8K_CMD_SET_LINKADAPT_MODE 0x0129
  280. #define MWL8K_CMD_SET_AID 0x010d
  281. #define MWL8K_CMD_SET_RATE 0x0110
  282. #define MWL8K_CMD_USE_FIXED_RATE 0x0126
  283. #define MWL8K_CMD_RTS_THRESHOLD 0x0113
  284. #define MWL8K_CMD_ENCRYPTION 0x1122
  285. static const char *mwl8k_cmd_name(u16 cmd, char *buf, int bufsize)
  286. {
  287. #define MWL8K_CMDNAME(x) case MWL8K_CMD_##x: do {\
  288. snprintf(buf, bufsize, "%s", #x);\
  289. return buf;\
  290. } while (0)
  291. switch (cmd & (~0x8000)) {
  292. MWL8K_CMDNAME(CODE_DNLD);
  293. MWL8K_CMDNAME(GET_HW_SPEC);
  294. MWL8K_CMDNAME(MAC_MULTICAST_ADR);
  295. MWL8K_CMDNAME(GET_STAT);
  296. MWL8K_CMDNAME(RADIO_CONTROL);
  297. MWL8K_CMDNAME(RF_TX_POWER);
  298. MWL8K_CMDNAME(SET_PRE_SCAN);
  299. MWL8K_CMDNAME(SET_POST_SCAN);
  300. MWL8K_CMDNAME(SET_RF_CHANNEL);
  301. MWL8K_CMDNAME(SET_SLOT);
  302. MWL8K_CMDNAME(MIMO_CONFIG);
  303. MWL8K_CMDNAME(ENABLE_SNIFFER);
  304. MWL8K_CMDNAME(SET_WMM_MODE);
  305. MWL8K_CMDNAME(SET_EDCA_PARAMS);
  306. MWL8K_CMDNAME(SET_FINALIZE_JOIN);
  307. MWL8K_CMDNAME(UPDATE_STADB);
  308. MWL8K_CMDNAME(SET_RATEADAPT_MODE);
  309. MWL8K_CMDNAME(SET_LINKADAPT_MODE);
  310. MWL8K_CMDNAME(SET_AID);
  311. MWL8K_CMDNAME(SET_RATE);
  312. MWL8K_CMDNAME(USE_FIXED_RATE);
  313. MWL8K_CMDNAME(RTS_THRESHOLD);
  314. MWL8K_CMDNAME(ENCRYPTION);
  315. default:
  316. snprintf(buf, bufsize, "0x%x", cmd);
  317. }
  318. #undef MWL8K_CMDNAME
  319. return buf;
  320. }
  321. /* Hardware and firmware reset */
  322. static void mwl8k_hw_reset(struct mwl8k_priv *priv)
  323. {
  324. iowrite32(MWL8K_H2A_INT_RESET,
  325. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  326. iowrite32(MWL8K_H2A_INT_RESET,
  327. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  328. msleep(20);
  329. }
  330. /* Release fw image */
  331. static void mwl8k_release_fw(struct firmware **fw)
  332. {
  333. if (*fw == NULL)
  334. return;
  335. release_firmware(*fw);
  336. *fw = NULL;
  337. }
  338. static void mwl8k_release_firmware(struct mwl8k_priv *priv)
  339. {
  340. mwl8k_release_fw(&priv->fw.ucode);
  341. mwl8k_release_fw(&priv->fw.helper);
  342. }
  343. /* Request fw image */
  344. static int mwl8k_request_fw(struct mwl8k_priv *priv,
  345. const char *fname, struct firmware **fw)
  346. {
  347. /* release current image */
  348. if (*fw != NULL)
  349. mwl8k_release_fw(fw);
  350. return request_firmware((const struct firmware **)fw,
  351. fname, &priv->pdev->dev);
  352. }
  353. static int mwl8k_request_firmware(struct mwl8k_priv *priv, u32 part_num)
  354. {
  355. u8 filename[64];
  356. int rc;
  357. priv->part_num = part_num;
  358. snprintf(filename, sizeof(filename),
  359. "mwl8k/helper_%u.fw", priv->part_num);
  360. rc = mwl8k_request_fw(priv, filename, &priv->fw.helper);
  361. if (rc) {
  362. printk(KERN_ERR
  363. "%s Error requesting helper firmware file %s\n",
  364. pci_name(priv->pdev), filename);
  365. return rc;
  366. }
  367. snprintf(filename, sizeof(filename),
  368. "mwl8k/fmimage_%u.fw", priv->part_num);
  369. rc = mwl8k_request_fw(priv, filename, &priv->fw.ucode);
  370. if (rc) {
  371. printk(KERN_ERR "%s Error requesting firmware file %s\n",
  372. pci_name(priv->pdev), filename);
  373. mwl8k_release_fw(&priv->fw.helper);
  374. return rc;
  375. }
  376. return 0;
  377. }
  378. struct mwl8k_cmd_pkt {
  379. __le16 code;
  380. __le16 length;
  381. __le16 seq_num;
  382. __le16 result;
  383. char payload[0];
  384. } __attribute__((packed));
  385. /*
  386. * Firmware loading.
  387. */
  388. static int
  389. mwl8k_send_fw_load_cmd(struct mwl8k_priv *priv, void *data, int length)
  390. {
  391. void __iomem *regs = priv->regs;
  392. dma_addr_t dma_addr;
  393. int rc;
  394. int loops;
  395. dma_addr = pci_map_single(priv->pdev, data, length, PCI_DMA_TODEVICE);
  396. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  397. return -ENOMEM;
  398. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  399. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  400. iowrite32(MWL8K_H2A_INT_DOORBELL,
  401. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  402. iowrite32(MWL8K_H2A_INT_DUMMY,
  403. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  404. rc = -ETIMEDOUT;
  405. loops = 1000;
  406. do {
  407. u32 int_code;
  408. int_code = ioread32(regs + MWL8K_HIU_INT_CODE);
  409. if (int_code == MWL8K_INT_CODE_CMD_FINISHED) {
  410. iowrite32(0, regs + MWL8K_HIU_INT_CODE);
  411. rc = 0;
  412. break;
  413. }
  414. udelay(1);
  415. } while (--loops);
  416. pci_unmap_single(priv->pdev, dma_addr, length, PCI_DMA_TODEVICE);
  417. /*
  418. * Clear 'command done' interrupt bit.
  419. */
  420. loops = 1000;
  421. do {
  422. u32 status;
  423. status = ioread32(priv->regs +
  424. MWL8K_HIU_A2H_INTERRUPT_STATUS);
  425. if (status & MWL8K_A2H_INT_OPC_DONE) {
  426. iowrite32(~MWL8K_A2H_INT_OPC_DONE,
  427. priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  428. ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  429. break;
  430. }
  431. udelay(1);
  432. } while (--loops);
  433. return rc;
  434. }
  435. static int mwl8k_load_fw_image(struct mwl8k_priv *priv,
  436. const u8 *data, size_t length)
  437. {
  438. struct mwl8k_cmd_pkt *cmd;
  439. int done;
  440. int rc = 0;
  441. cmd = kmalloc(sizeof(*cmd) + 256, GFP_KERNEL);
  442. if (cmd == NULL)
  443. return -ENOMEM;
  444. cmd->code = cpu_to_le16(MWL8K_CMD_CODE_DNLD);
  445. cmd->seq_num = 0;
  446. cmd->result = 0;
  447. done = 0;
  448. while (length) {
  449. int block_size = length > 256 ? 256 : length;
  450. memcpy(cmd->payload, data + done, block_size);
  451. cmd->length = cpu_to_le16(block_size);
  452. rc = mwl8k_send_fw_load_cmd(priv, cmd,
  453. sizeof(*cmd) + block_size);
  454. if (rc)
  455. break;
  456. done += block_size;
  457. length -= block_size;
  458. }
  459. if (!rc) {
  460. cmd->length = 0;
  461. rc = mwl8k_send_fw_load_cmd(priv, cmd, sizeof(*cmd));
  462. }
  463. kfree(cmd);
  464. return rc;
  465. }
  466. static int mwl8k_feed_fw_image(struct mwl8k_priv *priv,
  467. const u8 *data, size_t length)
  468. {
  469. unsigned char *buffer;
  470. int may_continue, rc = 0;
  471. u32 done, prev_block_size;
  472. buffer = kmalloc(1024, GFP_KERNEL);
  473. if (buffer == NULL)
  474. return -ENOMEM;
  475. done = 0;
  476. prev_block_size = 0;
  477. may_continue = 1000;
  478. while (may_continue > 0) {
  479. u32 block_size;
  480. block_size = ioread32(priv->regs + MWL8K_HIU_SCRATCH);
  481. if (block_size & 1) {
  482. block_size &= ~1;
  483. may_continue--;
  484. } else {
  485. done += prev_block_size;
  486. length -= prev_block_size;
  487. }
  488. if (block_size > 1024 || block_size > length) {
  489. rc = -EOVERFLOW;
  490. break;
  491. }
  492. if (length == 0) {
  493. rc = 0;
  494. break;
  495. }
  496. if (block_size == 0) {
  497. rc = -EPROTO;
  498. may_continue--;
  499. udelay(1);
  500. continue;
  501. }
  502. prev_block_size = block_size;
  503. memcpy(buffer, data + done, block_size);
  504. rc = mwl8k_send_fw_load_cmd(priv, buffer, block_size);
  505. if (rc)
  506. break;
  507. }
  508. if (!rc && length != 0)
  509. rc = -EREMOTEIO;
  510. kfree(buffer);
  511. return rc;
  512. }
  513. static int mwl8k_load_firmware(struct mwl8k_priv *priv)
  514. {
  515. int loops, rc;
  516. const u8 *ucode = priv->fw.ucode->data;
  517. size_t ucode_len = priv->fw.ucode->size;
  518. const u8 *helper = priv->fw.helper->data;
  519. size_t helper_len = priv->fw.helper->size;
  520. if (!memcmp(ucode, "\x01\x00\x00\x00", 4)) {
  521. rc = mwl8k_load_fw_image(priv, helper, helper_len);
  522. if (rc) {
  523. printk(KERN_ERR "%s: unable to load firmware "
  524. "helper image\n", pci_name(priv->pdev));
  525. return rc;
  526. }
  527. msleep(1);
  528. rc = mwl8k_feed_fw_image(priv, ucode, ucode_len);
  529. } else {
  530. rc = mwl8k_load_fw_image(priv, ucode, ucode_len);
  531. }
  532. if (rc) {
  533. printk(KERN_ERR "%s: unable to load firmware data\n",
  534. pci_name(priv->pdev));
  535. return rc;
  536. }
  537. iowrite32(MWL8K_MODE_STA, priv->regs + MWL8K_HIU_GEN_PTR);
  538. msleep(1);
  539. loops = 200000;
  540. do {
  541. if (ioread32(priv->regs + MWL8K_HIU_INT_CODE)
  542. == MWL8K_FWSTA_READY)
  543. break;
  544. udelay(1);
  545. } while (--loops);
  546. return loops ? 0 : -ETIMEDOUT;
  547. }
  548. /*
  549. * Defines shared between transmission and reception.
  550. */
  551. /* HT control fields for firmware */
  552. struct ewc_ht_info {
  553. __le16 control1;
  554. __le16 control2;
  555. __le16 control3;
  556. } __attribute__((packed));
  557. /* Firmware Station database operations */
  558. #define MWL8K_STA_DB_ADD_ENTRY 0
  559. #define MWL8K_STA_DB_MODIFY_ENTRY 1
  560. #define MWL8K_STA_DB_DEL_ENTRY 2
  561. #define MWL8K_STA_DB_FLUSH 3
  562. /* Peer Entry flags - used to define the type of the peer node */
  563. #define MWL8K_PEER_TYPE_ACCESSPOINT 2
  564. #define MWL8K_PEER_TYPE_ADHOC_STATION 4
  565. #define MWL8K_IEEE_LEGACY_DATA_RATES 12
  566. #define MWL8K_MCS_BITMAP_SIZE 16
  567. #define pad_size 16
  568. struct peer_capability_info {
  569. /* Peer type - AP vs. STA. */
  570. __u8 peer_type;
  571. /* Basic 802.11 capabilities from assoc resp. */
  572. __le16 basic_caps;
  573. /* Set if peer supports 802.11n high throughput (HT). */
  574. __u8 ht_support;
  575. /* Valid if HT is supported. */
  576. __le16 ht_caps;
  577. __u8 extended_ht_caps;
  578. struct ewc_ht_info ewc_info;
  579. /* Legacy rate table. Intersection of our rates and peer rates. */
  580. __u8 legacy_rates[MWL8K_IEEE_LEGACY_DATA_RATES];
  581. /* HT rate table. Intersection of our rates and peer rates. */
  582. __u8 ht_rates[MWL8K_MCS_BITMAP_SIZE];
  583. __u8 pad[pad_size];
  584. /* If set, interoperability mode, no proprietary extensions. */
  585. __u8 interop;
  586. __u8 pad2;
  587. __u8 station_id;
  588. __le16 amsdu_enabled;
  589. } __attribute__((packed));
  590. /* Inline functions to manipulate QoS field in data descriptor. */
  591. static inline u16 mwl8k_qos_setbit_tid(u16 qos, u8 tid)
  592. {
  593. u16 val_mask = 0x000f;
  594. u16 qos_mask = ~val_mask;
  595. /* TID bits 0-3 */
  596. return (qos & qos_mask) | (tid & val_mask);
  597. }
  598. static inline u16 mwl8k_qos_setbit_eosp(u16 qos)
  599. {
  600. u16 val_mask = 1 << 4;
  601. /* End of Service Period Bit 4 */
  602. return qos | val_mask;
  603. }
  604. static inline u16 mwl8k_qos_setbit_ack(u16 qos, u8 ack_policy)
  605. {
  606. u16 val_mask = 0x3;
  607. u8 shift = 5;
  608. u16 qos_mask = ~(val_mask << shift);
  609. /* Ack Policy Bit 5-6 */
  610. return (qos & qos_mask) | ((ack_policy & val_mask) << shift);
  611. }
  612. static inline u16 mwl8k_qos_setbit_amsdu(u16 qos)
  613. {
  614. u16 val_mask = 1 << 7;
  615. /* AMSDU present Bit 7 */
  616. return qos | val_mask;
  617. }
  618. static inline u16 mwl8k_qos_setbit_qlen(u16 qos, u8 len)
  619. {
  620. u16 val_mask = 0xff;
  621. u8 shift = 8;
  622. u16 qos_mask = ~(val_mask << shift);
  623. /* Queue Length Bits 8-15 */
  624. return (qos & qos_mask) | ((len & val_mask) << shift);
  625. }
  626. /* DMA header used by firmware and hardware. */
  627. struct mwl8k_dma_data {
  628. __le16 fwlen;
  629. struct ieee80211_hdr wh;
  630. } __attribute__((packed));
  631. /* Routines to add/remove DMA header from skb. */
  632. static inline int mwl8k_remove_dma_header(struct sk_buff *skb)
  633. {
  634. struct mwl8k_dma_data *tr = (struct mwl8k_dma_data *)(skb->data);
  635. void *dst, *src = &tr->wh;
  636. __le16 fc = tr->wh.frame_control;
  637. int hdrlen = ieee80211_hdrlen(fc);
  638. u16 space = sizeof(struct mwl8k_dma_data) - hdrlen;
  639. dst = (void *)tr + space;
  640. if (dst != src) {
  641. memmove(dst, src, hdrlen);
  642. skb_pull(skb, space);
  643. }
  644. return 0;
  645. }
  646. static inline struct sk_buff *mwl8k_add_dma_header(struct sk_buff *skb)
  647. {
  648. struct ieee80211_hdr *wh;
  649. u32 hdrlen, pktlen;
  650. struct mwl8k_dma_data *tr;
  651. wh = (struct ieee80211_hdr *)skb->data;
  652. hdrlen = ieee80211_hdrlen(wh->frame_control);
  653. pktlen = skb->len;
  654. /*
  655. * Copy up/down the 802.11 header; the firmware requires
  656. * we present a 2-byte payload length followed by a
  657. * 4-address header (w/o QoS), followed (optionally) by
  658. * any WEP/ExtIV header (but only filled in for CCMP).
  659. */
  660. if (hdrlen != sizeof(struct mwl8k_dma_data))
  661. skb_push(skb, sizeof(struct mwl8k_dma_data) - hdrlen);
  662. tr = (struct mwl8k_dma_data *)skb->data;
  663. if (wh != &tr->wh)
  664. memmove(&tr->wh, wh, hdrlen);
  665. /* Clear addr4 */
  666. memset(tr->wh.addr4, 0, IEEE80211_ADDR_LEN);
  667. /*
  668. * Firmware length is the length of the fully formed "802.11
  669. * payload". That is, everything except for the 802.11 header.
  670. * This includes all crypto material including the MIC.
  671. */
  672. tr->fwlen = cpu_to_le16(pktlen - hdrlen);
  673. return skb;
  674. }
  675. /*
  676. * Packet reception.
  677. */
  678. #define MWL8K_RX_CTRL_KEY_INDEX_MASK 0x30
  679. #define MWL8K_RX_CTRL_OWNED_BY_HOST 0x02
  680. #define MWL8K_RX_CTRL_AMPDU 0x01
  681. struct mwl8k_rx_desc {
  682. __le16 pkt_len;
  683. __u8 link_quality;
  684. __u8 noise_level;
  685. __le32 pkt_phys_addr;
  686. __le32 next_rx_desc_phys_addr;
  687. __le16 qos_control;
  688. __le16 rate_info;
  689. __le32 pad0[4];
  690. __u8 rssi;
  691. __u8 channel;
  692. __le16 pad1;
  693. __u8 rx_ctrl;
  694. __u8 rx_status;
  695. __u8 pad2[2];
  696. } __attribute__((packed));
  697. #define MWL8K_RX_DESCS 256
  698. #define MWL8K_RX_MAXSZ 3800
  699. static int mwl8k_rxq_init(struct ieee80211_hw *hw, int index)
  700. {
  701. struct mwl8k_priv *priv = hw->priv;
  702. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  703. int size;
  704. int i;
  705. rxq->rx_desc_count = 0;
  706. rxq->rx_head = 0;
  707. rxq->rx_tail = 0;
  708. size = MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc);
  709. rxq->rx_desc_area =
  710. pci_alloc_consistent(priv->pdev, size, &rxq->rx_desc_dma);
  711. if (rxq->rx_desc_area == NULL) {
  712. printk(KERN_ERR "%s: failed to alloc RX descriptors\n",
  713. priv->name);
  714. return -ENOMEM;
  715. }
  716. memset(rxq->rx_desc_area, 0, size);
  717. rxq->rx_skb = kmalloc(MWL8K_RX_DESCS *
  718. sizeof(*rxq->rx_skb), GFP_KERNEL);
  719. if (rxq->rx_skb == NULL) {
  720. printk(KERN_ERR "%s: failed to alloc RX skbuff list\n",
  721. priv->name);
  722. pci_free_consistent(priv->pdev, size,
  723. rxq->rx_desc_area, rxq->rx_desc_dma);
  724. return -ENOMEM;
  725. }
  726. memset(rxq->rx_skb, 0, MWL8K_RX_DESCS * sizeof(*rxq->rx_skb));
  727. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  728. struct mwl8k_rx_desc *rx_desc;
  729. int nexti;
  730. rx_desc = rxq->rx_desc_area + i;
  731. nexti = (i + 1) % MWL8K_RX_DESCS;
  732. rx_desc->next_rx_desc_phys_addr =
  733. cpu_to_le32(rxq->rx_desc_dma
  734. + nexti * sizeof(*rx_desc));
  735. rx_desc->rx_ctrl = MWL8K_RX_CTRL_OWNED_BY_HOST;
  736. }
  737. return 0;
  738. }
  739. static int rxq_refill(struct ieee80211_hw *hw, int index, int limit)
  740. {
  741. struct mwl8k_priv *priv = hw->priv;
  742. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  743. int refilled;
  744. refilled = 0;
  745. while (rxq->rx_desc_count < MWL8K_RX_DESCS && limit--) {
  746. struct sk_buff *skb;
  747. int rx;
  748. skb = dev_alloc_skb(MWL8K_RX_MAXSZ);
  749. if (skb == NULL)
  750. break;
  751. rxq->rx_desc_count++;
  752. rx = rxq->rx_tail;
  753. rxq->rx_tail = (rx + 1) % MWL8K_RX_DESCS;
  754. rxq->rx_desc_area[rx].pkt_phys_addr =
  755. cpu_to_le32(pci_map_single(priv->pdev, skb->data,
  756. MWL8K_RX_MAXSZ, DMA_FROM_DEVICE));
  757. rxq->rx_desc_area[rx].pkt_len = cpu_to_le16(MWL8K_RX_MAXSZ);
  758. rxq->rx_skb[rx] = skb;
  759. wmb();
  760. rxq->rx_desc_area[rx].rx_ctrl = 0;
  761. refilled++;
  762. }
  763. return refilled;
  764. }
  765. /* Must be called only when the card's reception is completely halted */
  766. static void mwl8k_rxq_deinit(struct ieee80211_hw *hw, int index)
  767. {
  768. struct mwl8k_priv *priv = hw->priv;
  769. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  770. int i;
  771. for (i = 0; i < MWL8K_RX_DESCS; i++) {
  772. if (rxq->rx_skb[i] != NULL) {
  773. unsigned long addr;
  774. addr = le32_to_cpu(rxq->rx_desc_area[i].pkt_phys_addr);
  775. pci_unmap_single(priv->pdev, addr, MWL8K_RX_MAXSZ,
  776. PCI_DMA_FROMDEVICE);
  777. kfree_skb(rxq->rx_skb[i]);
  778. rxq->rx_skb[i] = NULL;
  779. }
  780. }
  781. kfree(rxq->rx_skb);
  782. rxq->rx_skb = NULL;
  783. pci_free_consistent(priv->pdev,
  784. MWL8K_RX_DESCS * sizeof(struct mwl8k_rx_desc),
  785. rxq->rx_desc_area, rxq->rx_desc_dma);
  786. rxq->rx_desc_area = NULL;
  787. }
  788. /*
  789. * Scan a list of BSSIDs to process for finalize join.
  790. * Allows for extension to process multiple BSSIDs.
  791. */
  792. static inline int
  793. mwl8k_capture_bssid(struct mwl8k_priv *priv, struct ieee80211_hdr *wh)
  794. {
  795. return priv->capture_beacon &&
  796. ieee80211_is_beacon(wh->frame_control) &&
  797. !compare_ether_addr(wh->addr3, priv->capture_bssid);
  798. }
  799. static inline void mwl8k_save_beacon(struct mwl8k_priv *priv,
  800. struct sk_buff *skb)
  801. {
  802. priv->capture_beacon = false;
  803. memset(priv->capture_bssid, 0, IEEE80211_ADDR_LEN);
  804. /*
  805. * Use GFP_ATOMIC as rxq_process is called from
  806. * the primary interrupt handler, memory allocation call
  807. * must not sleep.
  808. */
  809. priv->beacon_skb = skb_copy(skb, GFP_ATOMIC);
  810. if (priv->beacon_skb != NULL)
  811. queue_work(priv->config_wq,
  812. &priv->finalize_join_worker);
  813. }
  814. static int rxq_process(struct ieee80211_hw *hw, int index, int limit)
  815. {
  816. struct mwl8k_priv *priv = hw->priv;
  817. struct mwl8k_rx_queue *rxq = priv->rxq + index;
  818. int processed;
  819. processed = 0;
  820. while (rxq->rx_desc_count && limit--) {
  821. struct mwl8k_rx_desc *rx_desc;
  822. struct sk_buff *skb;
  823. struct ieee80211_rx_status status;
  824. unsigned long addr;
  825. struct ieee80211_hdr *wh;
  826. rx_desc = rxq->rx_desc_area + rxq->rx_head;
  827. if (!(rx_desc->rx_ctrl & MWL8K_RX_CTRL_OWNED_BY_HOST))
  828. break;
  829. rmb();
  830. skb = rxq->rx_skb[rxq->rx_head];
  831. rxq->rx_skb[rxq->rx_head] = NULL;
  832. rxq->rx_head = (rxq->rx_head + 1) % MWL8K_RX_DESCS;
  833. rxq->rx_desc_count--;
  834. addr = le32_to_cpu(rx_desc->pkt_phys_addr);
  835. pci_unmap_single(priv->pdev, addr,
  836. MWL8K_RX_MAXSZ, PCI_DMA_FROMDEVICE);
  837. skb_put(skb, le16_to_cpu(rx_desc->pkt_len));
  838. if (mwl8k_remove_dma_header(skb)) {
  839. dev_kfree_skb(skb);
  840. continue;
  841. }
  842. wh = (struct ieee80211_hdr *)skb->data;
  843. /*
  844. * Check for pending join operation. save a copy of
  845. * the beacon and schedule a tasklet to send finalize
  846. * join command to the firmware.
  847. */
  848. if (mwl8k_capture_bssid(priv, wh))
  849. mwl8k_save_beacon(priv, skb);
  850. memset(&status, 0, sizeof(status));
  851. status.mactime = 0;
  852. status.signal = -rx_desc->rssi;
  853. status.noise = -rx_desc->noise_level;
  854. status.qual = rx_desc->link_quality;
  855. status.antenna = 1;
  856. status.rate_idx = 1;
  857. status.flag = 0;
  858. status.band = IEEE80211_BAND_2GHZ;
  859. status.freq = ieee80211_channel_to_frequency(rx_desc->channel);
  860. ieee80211_rx_irqsafe(hw, skb, &status);
  861. processed++;
  862. }
  863. return processed;
  864. }
  865. /*
  866. * Packet transmission.
  867. */
  868. /* Transmit queue assignment. */
  869. enum {
  870. MWL8K_WME_AC_BK = 0, /* background access */
  871. MWL8K_WME_AC_BE = 1, /* best effort access */
  872. MWL8K_WME_AC_VI = 2, /* video access */
  873. MWL8K_WME_AC_VO = 3, /* voice access */
  874. };
  875. /* Transmit packet ACK policy */
  876. #define MWL8K_TXD_ACK_POLICY_NORMAL 0
  877. #define MWL8K_TXD_ACK_POLICY_NONE 1
  878. #define MWL8K_TXD_ACK_POLICY_NO_EXPLICIT 2
  879. #define MWL8K_TXD_ACK_POLICY_BLOCKACK 3
  880. #define GET_TXQ(_ac) (\
  881. ((_ac) == WME_AC_VO) ? MWL8K_WME_AC_VO : \
  882. ((_ac) == WME_AC_VI) ? MWL8K_WME_AC_VI : \
  883. ((_ac) == WME_AC_BK) ? MWL8K_WME_AC_BK : \
  884. MWL8K_WME_AC_BE)
  885. #define MWL8K_TXD_STATUS_IDLE 0x00000000
  886. #define MWL8K_TXD_STATUS_USED 0x00000001
  887. #define MWL8K_TXD_STATUS_OK 0x00000001
  888. #define MWL8K_TXD_STATUS_OK_RETRY 0x00000002
  889. #define MWL8K_TXD_STATUS_OK_MORE_RETRY 0x00000004
  890. #define MWL8K_TXD_STATUS_MULTICAST_TX 0x00000008
  891. #define MWL8K_TXD_STATUS_BROADCAST_TX 0x00000010
  892. #define MWL8K_TXD_STATUS_FAILED_LINK_ERROR 0x00000020
  893. #define MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT 0x00000040
  894. #define MWL8K_TXD_STATUS_FAILED_AGING 0x00000080
  895. #define MWL8K_TXD_STATUS_HOST_CMD 0x40000000
  896. #define MWL8K_TXD_STATUS_FW_OWNED 0x80000000
  897. #define MWL8K_TXD_SOFTSTALE 0x80
  898. #define MWL8K_TXD_SOFTSTALE_MGMT_RETRY 0x01
  899. struct mwl8k_tx_desc {
  900. __le32 status;
  901. __u8 data_rate;
  902. __u8 tx_priority;
  903. __le16 qos_control;
  904. __le32 pkt_phys_addr;
  905. __le16 pkt_len;
  906. __u8 dest_MAC_addr[IEEE80211_ADDR_LEN];
  907. __le32 next_tx_desc_phys_addr;
  908. __le32 reserved;
  909. __le16 rate_info;
  910. __u8 peer_id;
  911. __u8 tx_frag_cnt;
  912. } __attribute__((packed));
  913. #define MWL8K_TX_DESCS 128
  914. static int mwl8k_txq_init(struct ieee80211_hw *hw, int index)
  915. {
  916. struct mwl8k_priv *priv = hw->priv;
  917. struct mwl8k_tx_queue *txq = priv->txq + index;
  918. int size;
  919. int i;
  920. memset(&txq->tx_stats, 0,
  921. sizeof(struct ieee80211_tx_queue_stats));
  922. txq->tx_stats.limit = MWL8K_TX_DESCS;
  923. txq->tx_head = 0;
  924. txq->tx_tail = 0;
  925. size = MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc);
  926. txq->tx_desc_area =
  927. pci_alloc_consistent(priv->pdev, size, &txq->tx_desc_dma);
  928. if (txq->tx_desc_area == NULL) {
  929. printk(KERN_ERR "%s: failed to alloc TX descriptors\n",
  930. priv->name);
  931. return -ENOMEM;
  932. }
  933. memset(txq->tx_desc_area, 0, size);
  934. txq->tx_skb = kmalloc(MWL8K_TX_DESCS * sizeof(*txq->tx_skb),
  935. GFP_KERNEL);
  936. if (txq->tx_skb == NULL) {
  937. printk(KERN_ERR "%s: failed to alloc TX skbuff list\n",
  938. priv->name);
  939. pci_free_consistent(priv->pdev, size,
  940. txq->tx_desc_area, txq->tx_desc_dma);
  941. return -ENOMEM;
  942. }
  943. memset(txq->tx_skb, 0, MWL8K_TX_DESCS * sizeof(*txq->tx_skb));
  944. for (i = 0; i < MWL8K_TX_DESCS; i++) {
  945. struct mwl8k_tx_desc *tx_desc;
  946. int nexti;
  947. tx_desc = txq->tx_desc_area + i;
  948. nexti = (i + 1) % MWL8K_TX_DESCS;
  949. tx_desc->status = 0;
  950. tx_desc->next_tx_desc_phys_addr =
  951. cpu_to_le32(txq->tx_desc_dma +
  952. nexti * sizeof(*tx_desc));
  953. }
  954. return 0;
  955. }
  956. static inline void mwl8k_tx_start(struct mwl8k_priv *priv)
  957. {
  958. iowrite32(MWL8K_H2A_INT_PPA_READY,
  959. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  960. iowrite32(MWL8K_H2A_INT_DUMMY,
  961. priv->regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  962. ioread32(priv->regs + MWL8K_HIU_INT_CODE);
  963. }
  964. static inline int mwl8k_txq_busy(struct mwl8k_priv *priv)
  965. {
  966. return priv->pending_tx_pkts;
  967. }
  968. struct mwl8k_txq_info {
  969. u32 fw_owned;
  970. u32 drv_owned;
  971. u32 unused;
  972. u32 len;
  973. u32 head;
  974. u32 tail;
  975. };
  976. static int mwl8k_scan_tx_ring(struct mwl8k_priv *priv,
  977. struct mwl8k_txq_info txinfo[],
  978. u32 num_queues)
  979. {
  980. int count, desc, status;
  981. struct mwl8k_tx_queue *txq;
  982. struct mwl8k_tx_desc *tx_desc;
  983. int ndescs = 0;
  984. memset(txinfo, 0, num_queues * sizeof(struct mwl8k_txq_info));
  985. spin_lock_bh(&priv->tx_lock);
  986. for (count = 0; count < num_queues; count++) {
  987. txq = priv->txq + count;
  988. txinfo[count].len = txq->tx_stats.len;
  989. txinfo[count].head = txq->tx_head;
  990. txinfo[count].tail = txq->tx_tail;
  991. for (desc = 0; desc < MWL8K_TX_DESCS; desc++) {
  992. tx_desc = txq->tx_desc_area + desc;
  993. status = le32_to_cpu(tx_desc->status);
  994. if (status & MWL8K_TXD_STATUS_FW_OWNED)
  995. txinfo[count].fw_owned++;
  996. else
  997. txinfo[count].drv_owned++;
  998. if (tx_desc->pkt_len == 0)
  999. txinfo[count].unused++;
  1000. }
  1001. }
  1002. spin_unlock_bh(&priv->tx_lock);
  1003. return ndescs;
  1004. }
  1005. static int mwl8k_tx_wait_empty(struct ieee80211_hw *hw, u32 delay_ms)
  1006. {
  1007. u32 count = 0;
  1008. unsigned long timeout = 0;
  1009. struct mwl8k_priv *priv = hw->priv;
  1010. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1011. might_sleep();
  1012. if (priv->tx_wait != NULL)
  1013. printk(KERN_ERR "WARNING Previous TXWaitEmpty instance\n");
  1014. spin_lock_bh(&priv->tx_lock);
  1015. count = mwl8k_txq_busy(priv);
  1016. if (count) {
  1017. priv->tx_wait = &cmd_wait;
  1018. if (priv->radio_state)
  1019. mwl8k_tx_start(priv);
  1020. }
  1021. spin_unlock_bh(&priv->tx_lock);
  1022. if (count) {
  1023. struct mwl8k_txq_info txinfo[4];
  1024. int index;
  1025. int newcount;
  1026. timeout = wait_for_completion_timeout(&cmd_wait,
  1027. msecs_to_jiffies(delay_ms));
  1028. if (timeout)
  1029. return 0;
  1030. spin_lock_bh(&priv->tx_lock);
  1031. priv->tx_wait = NULL;
  1032. newcount = mwl8k_txq_busy(priv);
  1033. spin_unlock_bh(&priv->tx_lock);
  1034. printk(KERN_ERR "%s(%u) TIMEDOUT:%ums Pend:%u-->%u\n",
  1035. __func__, __LINE__, delay_ms, count, newcount);
  1036. mwl8k_scan_tx_ring(priv, txinfo, 4);
  1037. for (index = 0 ; index < 4; index++)
  1038. printk(KERN_ERR
  1039. "TXQ:%u L:%u H:%u T:%u FW:%u DRV:%u U:%u\n",
  1040. index,
  1041. txinfo[index].len,
  1042. txinfo[index].head,
  1043. txinfo[index].tail,
  1044. txinfo[index].fw_owned,
  1045. txinfo[index].drv_owned,
  1046. txinfo[index].unused);
  1047. return -ETIMEDOUT;
  1048. }
  1049. return 0;
  1050. }
  1051. #define MWL8K_TXD_OK (MWL8K_TXD_STATUS_OK | \
  1052. MWL8K_TXD_STATUS_OK_RETRY | \
  1053. MWL8K_TXD_STATUS_OK_MORE_RETRY)
  1054. #define MWL8K_TXD_SUCCESS(stat) ((stat) & MWL8K_TXD_OK)
  1055. #define MWL8K_TXD_FAIL_RETRY(stat) \
  1056. ((stat) & (MWL8K_TXD_STATUS_FAILED_EXCEED_LIMIT))
  1057. static void mwl8k_txq_reclaim(struct ieee80211_hw *hw, int index, int force)
  1058. {
  1059. struct mwl8k_priv *priv = hw->priv;
  1060. struct mwl8k_tx_queue *txq = priv->txq + index;
  1061. int wake = 0;
  1062. while (txq->tx_stats.len > 0) {
  1063. int tx;
  1064. int rc;
  1065. struct mwl8k_tx_desc *tx_desc;
  1066. unsigned long addr;
  1067. size_t size;
  1068. struct sk_buff *skb;
  1069. struct ieee80211_tx_info *info;
  1070. u32 status;
  1071. rc = 0;
  1072. tx = txq->tx_head;
  1073. tx_desc = txq->tx_desc_area + tx;
  1074. status = le32_to_cpu(tx_desc->status);
  1075. if (status & MWL8K_TXD_STATUS_FW_OWNED) {
  1076. if (!force)
  1077. break;
  1078. tx_desc->status &=
  1079. ~cpu_to_le32(MWL8K_TXD_STATUS_FW_OWNED);
  1080. }
  1081. txq->tx_head = (tx + 1) % MWL8K_TX_DESCS;
  1082. BUG_ON(txq->tx_stats.len == 0);
  1083. txq->tx_stats.len--;
  1084. priv->pending_tx_pkts--;
  1085. addr = le32_to_cpu(tx_desc->pkt_phys_addr);
  1086. size = (u32)(le16_to_cpu(tx_desc->pkt_len));
  1087. skb = txq->tx_skb[tx].skb;
  1088. txq->tx_skb[tx].skb = NULL;
  1089. BUG_ON(skb == NULL);
  1090. pci_unmap_single(priv->pdev, addr, size, PCI_DMA_TODEVICE);
  1091. rc = mwl8k_remove_dma_header(skb);
  1092. /* Mark descriptor as unused */
  1093. tx_desc->pkt_phys_addr = 0;
  1094. tx_desc->pkt_len = 0;
  1095. if (txq->tx_skb[tx].clone) {
  1096. /* Replace with original skb
  1097. * before returning to stack
  1098. * as buffer has been cloned
  1099. */
  1100. dev_kfree_skb(skb);
  1101. skb = txq->tx_skb[tx].clone;
  1102. txq->tx_skb[tx].clone = NULL;
  1103. }
  1104. if (rc) {
  1105. /* Something has gone wrong here.
  1106. * Failed to remove DMA header.
  1107. * Print error message and drop packet.
  1108. */
  1109. printk(KERN_ERR "%s: Error removing DMA header from "
  1110. "tx skb 0x%p.\n", priv->name, skb);
  1111. dev_kfree_skb(skb);
  1112. continue;
  1113. }
  1114. info = IEEE80211_SKB_CB(skb);
  1115. ieee80211_tx_info_clear_status(info);
  1116. /* Convert firmware status stuff into tx_status */
  1117. if (MWL8K_TXD_SUCCESS(status)) {
  1118. /* Transmit OK */
  1119. info->flags |= IEEE80211_TX_STAT_ACK;
  1120. }
  1121. ieee80211_tx_status_irqsafe(hw, skb);
  1122. wake = !priv->inconfig && priv->radio_state;
  1123. }
  1124. if (wake)
  1125. ieee80211_wake_queue(hw, index);
  1126. }
  1127. /* must be called only when the card's transmit is completely halted */
  1128. static void mwl8k_txq_deinit(struct ieee80211_hw *hw, int index)
  1129. {
  1130. struct mwl8k_priv *priv = hw->priv;
  1131. struct mwl8k_tx_queue *txq = priv->txq + index;
  1132. mwl8k_txq_reclaim(hw, index, 1);
  1133. kfree(txq->tx_skb);
  1134. txq->tx_skb = NULL;
  1135. pci_free_consistent(priv->pdev,
  1136. MWL8K_TX_DESCS * sizeof(struct mwl8k_tx_desc),
  1137. txq->tx_desc_area, txq->tx_desc_dma);
  1138. txq->tx_desc_area = NULL;
  1139. }
  1140. static int
  1141. mwl8k_txq_xmit(struct ieee80211_hw *hw, int index, struct sk_buff *skb)
  1142. {
  1143. struct mwl8k_priv *priv = hw->priv;
  1144. struct ieee80211_tx_info *tx_info;
  1145. struct ieee80211_hdr *wh;
  1146. struct mwl8k_tx_queue *txq;
  1147. struct mwl8k_tx_desc *tx;
  1148. struct mwl8k_dma_data *tr;
  1149. struct mwl8k_vif *mwl8k_vif;
  1150. struct sk_buff *org_skb = skb;
  1151. dma_addr_t dma;
  1152. u16 qos = 0;
  1153. bool qosframe = false, ampduframe = false;
  1154. bool mcframe = false, eapolframe = false;
  1155. bool amsduframe = false;
  1156. __le16 fc;
  1157. txq = priv->txq + index;
  1158. tx = txq->tx_desc_area + txq->tx_tail;
  1159. BUG_ON(txq->tx_skb[txq->tx_tail].skb != NULL);
  1160. /*
  1161. * Append HW DMA header to start of packet. Drop packet if
  1162. * there is not enough space or a failure to unshare/unclone
  1163. * the skb.
  1164. */
  1165. skb = mwl8k_add_dma_header(skb);
  1166. if (skb == NULL) {
  1167. printk(KERN_DEBUG "%s: failed to prepend HW DMA "
  1168. "header, dropping TX frame.\n", priv->name);
  1169. dev_kfree_skb(org_skb);
  1170. return NETDEV_TX_OK;
  1171. }
  1172. tx_info = IEEE80211_SKB_CB(skb);
  1173. mwl8k_vif = MWL8K_VIF(tx_info->control.vif);
  1174. tr = (struct mwl8k_dma_data *)skb->data;
  1175. wh = &tr->wh;
  1176. fc = wh->frame_control;
  1177. qosframe = ieee80211_is_data_qos(fc);
  1178. mcframe = is_multicast_ether_addr(wh->addr1);
  1179. ampduframe = !!(tx_info->flags & IEEE80211_TX_CTL_AMPDU);
  1180. if (tx_info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1181. u16 seqno = mwl8k_vif->seqno;
  1182. wh->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1183. wh->seq_ctrl |= cpu_to_le16(seqno << 4);
  1184. mwl8k_vif->seqno = seqno++ % 4096;
  1185. }
  1186. if (qosframe)
  1187. qos = le16_to_cpu(*((__le16 *)ieee80211_get_qos_ctl(wh)));
  1188. dma = pci_map_single(priv->pdev, skb->data,
  1189. skb->len, PCI_DMA_TODEVICE);
  1190. if (pci_dma_mapping_error(priv->pdev, dma)) {
  1191. printk(KERN_DEBUG "%s: failed to dma map skb, "
  1192. "dropping TX frame.\n", priv->name);
  1193. if (org_skb != NULL)
  1194. dev_kfree_skb(org_skb);
  1195. if (skb != NULL)
  1196. dev_kfree_skb(skb);
  1197. return NETDEV_TX_OK;
  1198. }
  1199. /* Set desc header, cpu bit order. */
  1200. tx->status = 0;
  1201. tx->data_rate = 0;
  1202. tx->tx_priority = index;
  1203. tx->qos_control = 0;
  1204. tx->rate_info = 0;
  1205. tx->peer_id = mwl8k_vif->peer_id;
  1206. amsduframe = !!(qos & IEEE80211_QOS_CONTROL_A_MSDU_PRESENT);
  1207. /* Setup firmware control bit fields for each frame type. */
  1208. if (ieee80211_is_mgmt(fc) || ieee80211_is_ctl(fc)) {
  1209. tx->data_rate = 0;
  1210. qos = mwl8k_qos_setbit_eosp(qos);
  1211. /* Set Queue size to unspecified */
  1212. qos = mwl8k_qos_setbit_qlen(qos, 0xff);
  1213. } else if (ieee80211_is_data(fc)) {
  1214. tx->data_rate = 1;
  1215. if (mcframe)
  1216. tx->status |= MWL8K_TXD_STATUS_MULTICAST_TX;
  1217. /*
  1218. * Tell firmware to not send EAPOL pkts in an
  1219. * aggregate. Verify against mac80211 tx path. If
  1220. * stack turns off AMPDU for an EAPOL frame this
  1221. * check will be removed.
  1222. */
  1223. if (eapolframe) {
  1224. qos = mwl8k_qos_setbit_ack(qos,
  1225. MWL8K_TXD_ACK_POLICY_NORMAL);
  1226. } else {
  1227. /* Send pkt in an aggregate if AMPDU frame. */
  1228. if (ampduframe)
  1229. qos = mwl8k_qos_setbit_ack(qos,
  1230. MWL8K_TXD_ACK_POLICY_BLOCKACK);
  1231. else
  1232. qos = mwl8k_qos_setbit_ack(qos,
  1233. MWL8K_TXD_ACK_POLICY_NORMAL);
  1234. if (amsduframe)
  1235. qos = mwl8k_qos_setbit_amsdu(qos);
  1236. }
  1237. }
  1238. /* Convert to little endian */
  1239. tx->qos_control = cpu_to_le16(qos);
  1240. tx->status = cpu_to_le32(tx->status);
  1241. tx->pkt_phys_addr = cpu_to_le32(dma);
  1242. tx->pkt_len = cpu_to_le16(skb->len);
  1243. txq->tx_skb[txq->tx_tail].skb = skb;
  1244. txq->tx_skb[txq->tx_tail].clone =
  1245. skb == org_skb ? NULL : org_skb;
  1246. spin_lock_bh(&priv->tx_lock);
  1247. tx->status = cpu_to_le32(MWL8K_TXD_STATUS_OK |
  1248. MWL8K_TXD_STATUS_FW_OWNED);
  1249. wmb();
  1250. txq->tx_stats.len++;
  1251. priv->pending_tx_pkts++;
  1252. txq->tx_stats.count++;
  1253. txq->tx_tail++;
  1254. if (txq->tx_tail == MWL8K_TX_DESCS)
  1255. txq->tx_tail = 0;
  1256. if (txq->tx_head == txq->tx_tail)
  1257. ieee80211_stop_queue(hw, index);
  1258. if (priv->inconfig) {
  1259. /*
  1260. * Silently queue packet when we are in the middle of
  1261. * a config cycle. Notify firmware only if we are
  1262. * waiting for TXQs to empty. If a packet is sent
  1263. * before .config() is complete, perhaps it is better
  1264. * to drop the packet, as the channel is being changed
  1265. * and the packet will end up on the wrong channel.
  1266. */
  1267. printk(KERN_ERR "%s(): WARNING TX activity while "
  1268. "in config\n", __func__);
  1269. if (priv->tx_wait != NULL)
  1270. mwl8k_tx_start(priv);
  1271. } else
  1272. mwl8k_tx_start(priv);
  1273. spin_unlock_bh(&priv->tx_lock);
  1274. return NETDEV_TX_OK;
  1275. }
  1276. /*
  1277. * Command processing.
  1278. */
  1279. /* Timeout firmware commands after 2000ms */
  1280. #define MWL8K_CMD_TIMEOUT_MS 2000
  1281. static int mwl8k_post_cmd(struct ieee80211_hw *hw, struct mwl8k_cmd_pkt *cmd)
  1282. {
  1283. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  1284. struct mwl8k_priv *priv = hw->priv;
  1285. void __iomem *regs = priv->regs;
  1286. dma_addr_t dma_addr;
  1287. unsigned int dma_size;
  1288. int rc;
  1289. u16 __iomem *result;
  1290. unsigned long timeout = 0;
  1291. u8 buf[32];
  1292. cmd->result = 0xFFFF;
  1293. dma_size = le16_to_cpu(cmd->length);
  1294. dma_addr = pci_map_single(priv->pdev, cmd, dma_size,
  1295. PCI_DMA_BIDIRECTIONAL);
  1296. if (pci_dma_mapping_error(priv->pdev, dma_addr))
  1297. return -ENOMEM;
  1298. if (priv->hostcmd_wait != NULL)
  1299. printk(KERN_ERR "WARNING host command in progress\n");
  1300. spin_lock_irq(&priv->fw_lock);
  1301. priv->hostcmd_wait = &cmd_wait;
  1302. iowrite32(dma_addr, regs + MWL8K_HIU_GEN_PTR);
  1303. iowrite32(MWL8K_H2A_INT_DOORBELL,
  1304. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1305. iowrite32(MWL8K_H2A_INT_DUMMY,
  1306. regs + MWL8K_HIU_H2A_INTERRUPT_EVENTS);
  1307. spin_unlock_irq(&priv->fw_lock);
  1308. timeout = wait_for_completion_timeout(&cmd_wait,
  1309. msecs_to_jiffies(MWL8K_CMD_TIMEOUT_MS));
  1310. result = &cmd->result;
  1311. if (!timeout) {
  1312. spin_lock_irq(&priv->fw_lock);
  1313. priv->hostcmd_wait = NULL;
  1314. spin_unlock_irq(&priv->fw_lock);
  1315. printk(KERN_ERR "%s: Command %s timeout after %u ms\n",
  1316. priv->name,
  1317. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1318. MWL8K_CMD_TIMEOUT_MS);
  1319. rc = -ETIMEDOUT;
  1320. } else {
  1321. rc = *result ? -EINVAL : 0;
  1322. if (rc)
  1323. printk(KERN_ERR "%s: Command %s error 0x%x\n",
  1324. priv->name,
  1325. mwl8k_cmd_name(cmd->code, buf, sizeof(buf)),
  1326. *result);
  1327. }
  1328. pci_unmap_single(priv->pdev, dma_addr, dma_size,
  1329. PCI_DMA_BIDIRECTIONAL);
  1330. return rc;
  1331. }
  1332. /*
  1333. * GET_HW_SPEC.
  1334. */
  1335. struct mwl8k_cmd_get_hw_spec {
  1336. struct mwl8k_cmd_pkt header;
  1337. __u8 hw_rev;
  1338. __u8 host_interface;
  1339. __le16 num_mcaddrs;
  1340. __u8 perm_addr[IEEE80211_ADDR_LEN];
  1341. __le16 region_code;
  1342. __le32 fw_rev;
  1343. __le32 ps_cookie;
  1344. __le32 caps;
  1345. __u8 mcs_bitmap[16];
  1346. __le32 rx_queue_ptr;
  1347. __le32 num_tx_queues;
  1348. __le32 tx_queue_ptrs[MWL8K_TX_QUEUES];
  1349. __le32 caps2;
  1350. __le32 num_tx_desc_per_queue;
  1351. __le32 total_rx_desc;
  1352. } __attribute__((packed));
  1353. static int mwl8k_cmd_get_hw_spec(struct ieee80211_hw *hw)
  1354. {
  1355. struct mwl8k_priv *priv = hw->priv;
  1356. struct mwl8k_cmd_get_hw_spec *cmd;
  1357. int rc;
  1358. int i;
  1359. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1360. if (cmd == NULL)
  1361. return -ENOMEM;
  1362. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_HW_SPEC);
  1363. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1364. memset(cmd->perm_addr, 0xff, sizeof(cmd->perm_addr));
  1365. cmd->ps_cookie = cpu_to_le32(priv->cookie_dma);
  1366. cmd->rx_queue_ptr = cpu_to_le32(priv->rxq[0].rx_desc_dma);
  1367. cmd->num_tx_queues = MWL8K_TX_QUEUES;
  1368. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  1369. cmd->tx_queue_ptrs[i] = cpu_to_le32(priv->txq[i].tx_desc_dma);
  1370. cmd->num_tx_desc_per_queue = MWL8K_TX_DESCS;
  1371. cmd->total_rx_desc = MWL8K_RX_DESCS;
  1372. rc = mwl8k_post_cmd(hw, &cmd->header);
  1373. if (!rc) {
  1374. SET_IEEE80211_PERM_ADDR(hw, cmd->perm_addr);
  1375. priv->num_mcaddrs = le16_to_cpu(cmd->num_mcaddrs);
  1376. priv->fw_rev = cmd->fw_rev;
  1377. priv->hw_rev = cmd->hw_rev;
  1378. priv->region_code = le16_to_cpu(cmd->region_code);
  1379. }
  1380. kfree(cmd);
  1381. return rc;
  1382. }
  1383. /*
  1384. * CMD_MAC_MULTICAST_ADR.
  1385. */
  1386. struct mwl8k_cmd_mac_multicast_adr {
  1387. struct mwl8k_cmd_pkt header;
  1388. __le16 action;
  1389. __le16 numaddr;
  1390. __u8 addr[1][IEEE80211_ADDR_LEN];
  1391. };
  1392. #define MWL8K_ENABLE_RX_MULTICAST 0x000F
  1393. static int mwl8k_cmd_mac_multicast_adr(struct ieee80211_hw *hw,
  1394. int mc_count,
  1395. struct dev_addr_list *mclist)
  1396. {
  1397. struct mwl8k_cmd_mac_multicast_adr *cmd;
  1398. int index = 0;
  1399. int rc;
  1400. int size = sizeof(*cmd) + ((mc_count - 1) * IEEE80211_ADDR_LEN);
  1401. cmd = kzalloc(size, GFP_KERNEL);
  1402. if (cmd == NULL)
  1403. return -ENOMEM;
  1404. cmd->header.code = cpu_to_le16(MWL8K_CMD_MAC_MULTICAST_ADR);
  1405. cmd->header.length = cpu_to_le16(size);
  1406. cmd->action = cpu_to_le16(MWL8K_ENABLE_RX_MULTICAST);
  1407. cmd->numaddr = cpu_to_le16(mc_count);
  1408. while ((index < mc_count) && mclist) {
  1409. if (mclist->da_addrlen != IEEE80211_ADDR_LEN) {
  1410. rc = -EINVAL;
  1411. goto mwl8k_cmd_mac_multicast_adr_exit;
  1412. }
  1413. memcpy(cmd->addr[index], mclist->da_addr, IEEE80211_ADDR_LEN);
  1414. index++;
  1415. mclist = mclist->next;
  1416. }
  1417. rc = mwl8k_post_cmd(hw, &cmd->header);
  1418. mwl8k_cmd_mac_multicast_adr_exit:
  1419. kfree(cmd);
  1420. return rc;
  1421. }
  1422. /*
  1423. * CMD_802_11_GET_STAT.
  1424. */
  1425. struct mwl8k_cmd_802_11_get_stat {
  1426. struct mwl8k_cmd_pkt header;
  1427. __le16 action;
  1428. __le32 stats[64];
  1429. } __attribute__((packed));
  1430. #define MWL8K_STAT_ACK_FAILURE 9
  1431. #define MWL8K_STAT_RTS_FAILURE 12
  1432. #define MWL8K_STAT_FCS_ERROR 24
  1433. #define MWL8K_STAT_RTS_SUCCESS 11
  1434. static int mwl8k_cmd_802_11_get_stat(struct ieee80211_hw *hw,
  1435. struct ieee80211_low_level_stats *stats)
  1436. {
  1437. struct mwl8k_cmd_802_11_get_stat *cmd;
  1438. int rc;
  1439. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1440. if (cmd == NULL)
  1441. return -ENOMEM;
  1442. cmd->header.code = cpu_to_le16(MWL8K_CMD_GET_STAT);
  1443. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1444. cmd->action = cpu_to_le16(MWL8K_CMD_GET);
  1445. rc = mwl8k_post_cmd(hw, &cmd->header);
  1446. if (!rc) {
  1447. stats->dot11ACKFailureCount =
  1448. le32_to_cpu(cmd->stats[MWL8K_STAT_ACK_FAILURE]);
  1449. stats->dot11RTSFailureCount =
  1450. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_FAILURE]);
  1451. stats->dot11FCSErrorCount =
  1452. le32_to_cpu(cmd->stats[MWL8K_STAT_FCS_ERROR]);
  1453. stats->dot11RTSSuccessCount =
  1454. le32_to_cpu(cmd->stats[MWL8K_STAT_RTS_SUCCESS]);
  1455. }
  1456. kfree(cmd);
  1457. return rc;
  1458. }
  1459. /*
  1460. * CMD_802_11_RADIO_CONTROL.
  1461. */
  1462. struct mwl8k_cmd_802_11_radio_control {
  1463. struct mwl8k_cmd_pkt header;
  1464. __le16 action;
  1465. __le16 control;
  1466. __le16 radio_on;
  1467. } __attribute__((packed));
  1468. static int mwl8k_cmd_802_11_radio_control(struct ieee80211_hw *hw, int enable)
  1469. {
  1470. struct mwl8k_priv *priv = hw->priv;
  1471. struct mwl8k_cmd_802_11_radio_control *cmd;
  1472. int rc;
  1473. if (((enable & MWL8K_RADIO_ENABLE) == priv->radio_state) &&
  1474. !(enable & MWL8K_RADIO_FORCE))
  1475. return 0;
  1476. enable &= MWL8K_RADIO_ENABLE;
  1477. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1478. if (cmd == NULL)
  1479. return -ENOMEM;
  1480. cmd->header.code = cpu_to_le16(MWL8K_CMD_RADIO_CONTROL);
  1481. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1482. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1483. cmd->control = cpu_to_le16(priv->radio_preamble);
  1484. cmd->radio_on = cpu_to_le16(enable ? 0x0001 : 0x0000);
  1485. rc = mwl8k_post_cmd(hw, &cmd->header);
  1486. kfree(cmd);
  1487. if (!rc)
  1488. priv->radio_state = enable;
  1489. return rc;
  1490. }
  1491. static int
  1492. mwl8k_set_radio_preamble(struct ieee80211_hw *hw, bool short_preamble)
  1493. {
  1494. struct mwl8k_priv *priv;
  1495. if (hw == NULL || hw->priv == NULL)
  1496. return -EINVAL;
  1497. priv = hw->priv;
  1498. priv->radio_preamble = (short_preamble ?
  1499. MWL8K_RADIO_SHORT_PREAMBLE :
  1500. MWL8K_RADIO_LONG_PREAMBLE);
  1501. return mwl8k_cmd_802_11_radio_control(hw,
  1502. MWL8K_RADIO_ENABLE | MWL8K_RADIO_FORCE);
  1503. }
  1504. /*
  1505. * CMD_802_11_RF_TX_POWER.
  1506. */
  1507. #define MWL8K_TX_POWER_LEVEL_TOTAL 8
  1508. struct mwl8k_cmd_802_11_rf_tx_power {
  1509. struct mwl8k_cmd_pkt header;
  1510. __le16 action;
  1511. __le16 support_level;
  1512. __le16 current_level;
  1513. __le16 reserved;
  1514. __le16 power_level_list[MWL8K_TX_POWER_LEVEL_TOTAL];
  1515. } __attribute__((packed));
  1516. static int mwl8k_cmd_802_11_rf_tx_power(struct ieee80211_hw *hw, int dBm)
  1517. {
  1518. struct mwl8k_cmd_802_11_rf_tx_power *cmd;
  1519. int rc;
  1520. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1521. if (cmd == NULL)
  1522. return -ENOMEM;
  1523. cmd->header.code = cpu_to_le16(MWL8K_CMD_RF_TX_POWER);
  1524. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1525. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1526. cmd->support_level = cpu_to_le16(dBm);
  1527. rc = mwl8k_post_cmd(hw, &cmd->header);
  1528. kfree(cmd);
  1529. return rc;
  1530. }
  1531. /*
  1532. * CMD_SET_PRE_SCAN.
  1533. */
  1534. struct mwl8k_cmd_set_pre_scan {
  1535. struct mwl8k_cmd_pkt header;
  1536. } __attribute__((packed));
  1537. static int mwl8k_cmd_set_pre_scan(struct ieee80211_hw *hw)
  1538. {
  1539. struct mwl8k_cmd_set_pre_scan *cmd;
  1540. int rc;
  1541. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1542. if (cmd == NULL)
  1543. return -ENOMEM;
  1544. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_PRE_SCAN);
  1545. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1546. rc = mwl8k_post_cmd(hw, &cmd->header);
  1547. kfree(cmd);
  1548. return rc;
  1549. }
  1550. /*
  1551. * CMD_SET_POST_SCAN.
  1552. */
  1553. struct mwl8k_cmd_set_post_scan {
  1554. struct mwl8k_cmd_pkt header;
  1555. __le32 isibss;
  1556. __u8 bssid[IEEE80211_ADDR_LEN];
  1557. } __attribute__((packed));
  1558. static int
  1559. mwl8k_cmd_set_post_scan(struct ieee80211_hw *hw, __u8 mac[IEEE80211_ADDR_LEN])
  1560. {
  1561. struct mwl8k_cmd_set_post_scan *cmd;
  1562. int rc;
  1563. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1564. if (cmd == NULL)
  1565. return -ENOMEM;
  1566. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_POST_SCAN);
  1567. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1568. cmd->isibss = 0;
  1569. memcpy(cmd->bssid, mac, IEEE80211_ADDR_LEN);
  1570. rc = mwl8k_post_cmd(hw, &cmd->header);
  1571. kfree(cmd);
  1572. return rc;
  1573. }
  1574. /*
  1575. * CMD_SET_RF_CHANNEL.
  1576. */
  1577. struct mwl8k_cmd_set_rf_channel {
  1578. struct mwl8k_cmd_pkt header;
  1579. __le16 action;
  1580. __u8 current_channel;
  1581. __le32 channel_flags;
  1582. } __attribute__((packed));
  1583. static int mwl8k_cmd_set_rf_channel(struct ieee80211_hw *hw,
  1584. struct ieee80211_channel *channel)
  1585. {
  1586. struct mwl8k_cmd_set_rf_channel *cmd;
  1587. int rc;
  1588. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1589. if (cmd == NULL)
  1590. return -ENOMEM;
  1591. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RF_CHANNEL);
  1592. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1593. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1594. cmd->current_channel = channel->hw_value;
  1595. if (channel->band == IEEE80211_BAND_2GHZ)
  1596. cmd->channel_flags = cpu_to_le32(0x00000081);
  1597. else
  1598. cmd->channel_flags = cpu_to_le32(0x00000000);
  1599. rc = mwl8k_post_cmd(hw, &cmd->header);
  1600. kfree(cmd);
  1601. return rc;
  1602. }
  1603. /*
  1604. * CMD_SET_SLOT.
  1605. */
  1606. struct mwl8k_cmd_set_slot {
  1607. struct mwl8k_cmd_pkt header;
  1608. __le16 action;
  1609. __u8 short_slot;
  1610. } __attribute__((packed));
  1611. static int mwl8k_cmd_set_slot(struct ieee80211_hw *hw, int slot_time)
  1612. {
  1613. struct mwl8k_cmd_set_slot *cmd;
  1614. int rc;
  1615. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1616. if (cmd == NULL)
  1617. return -ENOMEM;
  1618. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_SLOT);
  1619. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1620. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1621. cmd->short_slot = slot_time == MWL8K_SHORT_SLOTTIME ? 1 : 0;
  1622. rc = mwl8k_post_cmd(hw, &cmd->header);
  1623. kfree(cmd);
  1624. return rc;
  1625. }
  1626. /*
  1627. * CMD_MIMO_CONFIG.
  1628. */
  1629. struct mwl8k_cmd_mimo_config {
  1630. struct mwl8k_cmd_pkt header;
  1631. __le32 action;
  1632. __u8 rx_antenna_map;
  1633. __u8 tx_antenna_map;
  1634. } __attribute__((packed));
  1635. static int mwl8k_cmd_mimo_config(struct ieee80211_hw *hw, __u8 rx, __u8 tx)
  1636. {
  1637. struct mwl8k_cmd_mimo_config *cmd;
  1638. int rc;
  1639. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1640. if (cmd == NULL)
  1641. return -ENOMEM;
  1642. cmd->header.code = cpu_to_le16(MWL8K_CMD_MIMO_CONFIG);
  1643. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1644. cmd->action = cpu_to_le32((u32)MWL8K_CMD_SET);
  1645. cmd->rx_antenna_map = rx;
  1646. cmd->tx_antenna_map = tx;
  1647. rc = mwl8k_post_cmd(hw, &cmd->header);
  1648. kfree(cmd);
  1649. return rc;
  1650. }
  1651. /*
  1652. * CMD_ENABLE_SNIFFER.
  1653. */
  1654. struct mwl8k_cmd_enable_sniffer {
  1655. struct mwl8k_cmd_pkt header;
  1656. __le32 action;
  1657. } __attribute__((packed));
  1658. static int mwl8k_enable_sniffer(struct ieee80211_hw *hw, bool enable)
  1659. {
  1660. struct mwl8k_cmd_enable_sniffer *cmd;
  1661. int rc;
  1662. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1663. if (cmd == NULL)
  1664. return -ENOMEM;
  1665. cmd->header.code = cpu_to_le16(MWL8K_CMD_ENABLE_SNIFFER);
  1666. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1667. cmd->action = enable ? cpu_to_le32((u32)MWL8K_CMD_SET) : 0;
  1668. rc = mwl8k_post_cmd(hw, &cmd->header);
  1669. kfree(cmd);
  1670. return rc;
  1671. }
  1672. /*
  1673. * CMD_SET_RATE_ADAPT_MODE.
  1674. */
  1675. struct mwl8k_cmd_set_rate_adapt_mode {
  1676. struct mwl8k_cmd_pkt header;
  1677. __le16 action;
  1678. __le16 mode;
  1679. } __attribute__((packed));
  1680. static int mwl8k_cmd_setrateadaptmode(struct ieee80211_hw *hw, __u16 mode)
  1681. {
  1682. struct mwl8k_cmd_set_rate_adapt_mode *cmd;
  1683. int rc;
  1684. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1685. if (cmd == NULL)
  1686. return -ENOMEM;
  1687. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATEADAPT_MODE);
  1688. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1689. cmd->action = cpu_to_le16(MWL8K_CMD_SET);
  1690. cmd->mode = cpu_to_le16(mode);
  1691. rc = mwl8k_post_cmd(hw, &cmd->header);
  1692. kfree(cmd);
  1693. return rc;
  1694. }
  1695. /*
  1696. * CMD_SET_WMM_MODE.
  1697. */
  1698. struct mwl8k_cmd_set_wmm {
  1699. struct mwl8k_cmd_pkt header;
  1700. __le16 action;
  1701. } __attribute__((packed));
  1702. static int mwl8k_set_wmm(struct ieee80211_hw *hw, bool enable)
  1703. {
  1704. struct mwl8k_priv *priv = hw->priv;
  1705. struct mwl8k_cmd_set_wmm *cmd;
  1706. int rc;
  1707. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1708. if (cmd == NULL)
  1709. return -ENOMEM;
  1710. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_WMM_MODE);
  1711. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1712. cmd->action = enable ? cpu_to_le16(MWL8K_CMD_SET) : 0;
  1713. rc = mwl8k_post_cmd(hw, &cmd->header);
  1714. kfree(cmd);
  1715. if (!rc)
  1716. priv->wmm_mode = enable;
  1717. return rc;
  1718. }
  1719. /*
  1720. * CMD_SET_RTS_THRESHOLD.
  1721. */
  1722. struct mwl8k_cmd_rts_threshold {
  1723. struct mwl8k_cmd_pkt header;
  1724. __le16 action;
  1725. __le16 threshold;
  1726. } __attribute__((packed));
  1727. static int mwl8k_rts_threshold(struct ieee80211_hw *hw,
  1728. u16 action, u16 *threshold)
  1729. {
  1730. struct mwl8k_cmd_rts_threshold *cmd;
  1731. int rc;
  1732. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1733. if (cmd == NULL)
  1734. return -ENOMEM;
  1735. cmd->header.code = cpu_to_le16(MWL8K_CMD_RTS_THRESHOLD);
  1736. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1737. cmd->action = cpu_to_le16(action);
  1738. cmd->threshold = cpu_to_le16(*threshold);
  1739. rc = mwl8k_post_cmd(hw, &cmd->header);
  1740. kfree(cmd);
  1741. return rc;
  1742. }
  1743. /*
  1744. * CMD_SET_EDCA_PARAMS.
  1745. */
  1746. struct mwl8k_cmd_set_edca_params {
  1747. struct mwl8k_cmd_pkt header;
  1748. /* See MWL8K_SET_EDCA_XXX below */
  1749. __le16 action;
  1750. /* TX opportunity in units of 32 us */
  1751. __le16 txop;
  1752. /* Log exponent of max contention period: 0...15*/
  1753. __u8 log_cw_max;
  1754. /* Log exponent of min contention period: 0...15 */
  1755. __u8 log_cw_min;
  1756. /* Adaptive interframe spacing in units of 32us */
  1757. __u8 aifs;
  1758. /* TX queue to configure */
  1759. __u8 txq;
  1760. } __attribute__((packed));
  1761. #define MWL8K_GET_EDCA_ALL 0
  1762. #define MWL8K_SET_EDCA_CW 0x01
  1763. #define MWL8K_SET_EDCA_TXOP 0x02
  1764. #define MWL8K_SET_EDCA_AIFS 0x04
  1765. #define MWL8K_SET_EDCA_ALL (MWL8K_SET_EDCA_CW | \
  1766. MWL8K_SET_EDCA_TXOP | \
  1767. MWL8K_SET_EDCA_AIFS)
  1768. static int
  1769. mwl8k_set_edca_params(struct ieee80211_hw *hw, __u8 qnum,
  1770. __u16 cw_min, __u16 cw_max,
  1771. __u8 aifs, __u16 txop)
  1772. {
  1773. struct mwl8k_cmd_set_edca_params *cmd;
  1774. u32 log_cw_min, log_cw_max;
  1775. int rc;
  1776. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1777. if (cmd == NULL)
  1778. return -ENOMEM;
  1779. log_cw_min = ilog2(cw_min+1);
  1780. log_cw_max = ilog2(cw_max+1);
  1781. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_EDCA_PARAMS);
  1782. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1783. cmd->action = cpu_to_le16(MWL8K_SET_EDCA_ALL);
  1784. cmd->txop = cpu_to_le16(txop);
  1785. cmd->log_cw_max = (u8)log_cw_max;
  1786. cmd->log_cw_min = (u8)log_cw_min;
  1787. cmd->aifs = aifs;
  1788. cmd->txq = qnum;
  1789. rc = mwl8k_post_cmd(hw, &cmd->header);
  1790. kfree(cmd);
  1791. return rc;
  1792. }
  1793. /*
  1794. * CMD_FINALIZE_JOIN.
  1795. */
  1796. /* FJ beacon buffer size is compiled into the firmware. */
  1797. #define MWL8K_FJ_BEACON_MAXLEN 128
  1798. struct mwl8k_cmd_finalize_join {
  1799. struct mwl8k_cmd_pkt header;
  1800. __le32 sleep_interval; /* Number of beacon periods to sleep */
  1801. __u8 beacon_data[MWL8K_FJ_BEACON_MAXLEN];
  1802. } __attribute__((packed));
  1803. static int mwl8k_finalize_join(struct ieee80211_hw *hw, void *frame,
  1804. __u16 framelen, __u16 dtim)
  1805. {
  1806. struct mwl8k_cmd_finalize_join *cmd;
  1807. struct ieee80211_mgmt *payload = frame;
  1808. u16 hdrlen;
  1809. u32 payload_len;
  1810. int rc;
  1811. if (frame == NULL)
  1812. return -EINVAL;
  1813. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1814. if (cmd == NULL)
  1815. return -ENOMEM;
  1816. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_FINALIZE_JOIN);
  1817. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1818. if (dtim)
  1819. cmd->sleep_interval = cpu_to_le32(dtim);
  1820. else
  1821. cmd->sleep_interval = cpu_to_le32(1);
  1822. hdrlen = ieee80211_hdrlen(payload->frame_control);
  1823. payload_len = framelen > hdrlen ? framelen - hdrlen : 0;
  1824. /* XXX TBD Might just have to abort and return an error */
  1825. if (payload_len > MWL8K_FJ_BEACON_MAXLEN)
  1826. printk(KERN_ERR "%s(): WARNING: Incomplete beacon "
  1827. "sent to firmware. Sz=%u MAX=%u\n", __func__,
  1828. payload_len, MWL8K_FJ_BEACON_MAXLEN);
  1829. payload_len = payload_len > MWL8K_FJ_BEACON_MAXLEN ?
  1830. MWL8K_FJ_BEACON_MAXLEN : payload_len;
  1831. if (payload && payload_len)
  1832. memcpy(cmd->beacon_data, &payload->u.beacon, payload_len);
  1833. rc = mwl8k_post_cmd(hw, &cmd->header);
  1834. kfree(cmd);
  1835. return rc;
  1836. }
  1837. /*
  1838. * CMD_UPDATE_STADB.
  1839. */
  1840. struct mwl8k_cmd_update_sta_db {
  1841. struct mwl8k_cmd_pkt header;
  1842. /* See STADB_ACTION_TYPE */
  1843. __le32 action;
  1844. /* Peer MAC address */
  1845. __u8 peer_addr[IEEE80211_ADDR_LEN];
  1846. __le32 reserved;
  1847. /* Peer info - valid during add/update. */
  1848. struct peer_capability_info peer_info;
  1849. } __attribute__((packed));
  1850. static int mwl8k_cmd_update_sta_db(struct ieee80211_hw *hw,
  1851. struct ieee80211_vif *vif, __u32 action)
  1852. {
  1853. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1854. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1855. struct mwl8k_cmd_update_sta_db *cmd;
  1856. struct peer_capability_info *peer_info;
  1857. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1858. DECLARE_MAC_BUF(mac);
  1859. int rc;
  1860. __u8 count, *rates;
  1861. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1862. if (cmd == NULL)
  1863. return -ENOMEM;
  1864. cmd->header.code = cpu_to_le16(MWL8K_CMD_UPDATE_STADB);
  1865. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1866. cmd->action = cpu_to_le32(action);
  1867. peer_info = &cmd->peer_info;
  1868. memcpy(cmd->peer_addr, mv_vif->bssid, IEEE80211_ADDR_LEN);
  1869. switch (action) {
  1870. case MWL8K_STA_DB_ADD_ENTRY:
  1871. case MWL8K_STA_DB_MODIFY_ENTRY:
  1872. /* Build peer_info block */
  1873. peer_info->peer_type = MWL8K_PEER_TYPE_ACCESSPOINT;
  1874. peer_info->basic_caps = cpu_to_le16(info->assoc_capability);
  1875. peer_info->interop = 1;
  1876. peer_info->amsdu_enabled = 0;
  1877. rates = peer_info->legacy_rates;
  1878. for (count = 0 ; count < mv_vif->legacy_nrates; count++)
  1879. rates[count] = bitrates[count].hw_value;
  1880. rc = mwl8k_post_cmd(hw, &cmd->header);
  1881. if (rc == 0)
  1882. mv_vif->peer_id = peer_info->station_id;
  1883. break;
  1884. case MWL8K_STA_DB_DEL_ENTRY:
  1885. case MWL8K_STA_DB_FLUSH:
  1886. default:
  1887. rc = mwl8k_post_cmd(hw, &cmd->header);
  1888. if (rc == 0)
  1889. mv_vif->peer_id = 0;
  1890. break;
  1891. }
  1892. kfree(cmd);
  1893. return rc;
  1894. }
  1895. /*
  1896. * CMD_SET_AID.
  1897. */
  1898. #define IEEE80211_OPMODE_DISABLED 0x00
  1899. #define IEEE80211_OPMODE_NON_MEMBER_PROT_MODE 0x01
  1900. #define IEEE80211_OPMODE_ONE_20MHZ_STA_PROT_MODE 0x02
  1901. #define IEEE80211_OPMODE_HTMIXED_PROT_MODE 0x03
  1902. #define MWL8K_RATE_INDEX_MAX_ARRAY 14
  1903. #define MWL8K_FRAME_PROT_DISABLED 0x00
  1904. #define MWL8K_FRAME_PROT_11G 0x07
  1905. #define MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY 0x02
  1906. #define MWL8K_FRAME_PROT_11N_HT_ALL 0x06
  1907. #define MWL8K_FRAME_PROT_MASK 0x07
  1908. struct mwl8k_cmd_update_set_aid {
  1909. struct mwl8k_cmd_pkt header;
  1910. __le16 aid;
  1911. /* AP's MAC address (BSSID) */
  1912. __u8 bssid[IEEE80211_ADDR_LEN];
  1913. __le16 protection_mode;
  1914. __u8 supp_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1915. } __attribute__((packed));
  1916. static int mwl8k_cmd_set_aid(struct ieee80211_hw *hw,
  1917. struct ieee80211_vif *vif)
  1918. {
  1919. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1920. struct ieee80211_bss_conf *info = &mv_vif->bss_info;
  1921. struct mwl8k_cmd_update_set_aid *cmd;
  1922. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1923. int count;
  1924. u16 prot_mode;
  1925. int rc;
  1926. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1927. if (cmd == NULL)
  1928. return -ENOMEM;
  1929. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_AID);
  1930. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1931. cmd->aid = cpu_to_le16(info->aid);
  1932. memcpy(cmd->bssid, mv_vif->bssid, IEEE80211_ADDR_LEN);
  1933. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1934. if (info->use_cts_prot) {
  1935. prot_mode = MWL8K_FRAME_PROT_11G;
  1936. } else {
  1937. switch (info->ht_operation_mode &
  1938. IEEE80211_HT_OP_MODE_PROTECTION) {
  1939. case IEEE80211_HT_OP_MODE_PROTECTION_20MHZ:
  1940. prot_mode = MWL8K_FRAME_PROT_11N_HT_40MHZ_ONLY;
  1941. break;
  1942. case IEEE80211_HT_OP_MODE_PROTECTION_NONHT_MIXED:
  1943. prot_mode = MWL8K_FRAME_PROT_11N_HT_ALL;
  1944. break;
  1945. default:
  1946. prot_mode = MWL8K_FRAME_PROT_DISABLED;
  1947. break;
  1948. }
  1949. }
  1950. cmd->protection_mode = cpu_to_le16(prot_mode);
  1951. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1952. cmd->supp_rates[count] = bitrates[count].hw_value;
  1953. rc = mwl8k_post_cmd(hw, &cmd->header);
  1954. kfree(cmd);
  1955. return rc;
  1956. }
  1957. /*
  1958. * CMD_SET_RATE.
  1959. */
  1960. struct mwl8k_cmd_update_rateset {
  1961. struct mwl8k_cmd_pkt header;
  1962. __u8 legacy_rates[MWL8K_RATE_INDEX_MAX_ARRAY];
  1963. /* Bitmap for supported MCS codes. */
  1964. __u8 mcs_set[MWL8K_IEEE_LEGACY_DATA_RATES];
  1965. __u8 reserved[MWL8K_IEEE_LEGACY_DATA_RATES];
  1966. } __attribute__((packed));
  1967. static int mwl8k_update_rateset(struct ieee80211_hw *hw,
  1968. struct ieee80211_vif *vif)
  1969. {
  1970. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  1971. struct mwl8k_cmd_update_rateset *cmd;
  1972. struct ieee80211_rate *bitrates = mv_vif->legacy_rates;
  1973. int count;
  1974. int rc;
  1975. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  1976. if (cmd == NULL)
  1977. return -ENOMEM;
  1978. cmd->header.code = cpu_to_le16(MWL8K_CMD_SET_RATE);
  1979. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  1980. for (count = 0; count < mv_vif->legacy_nrates; count++)
  1981. cmd->legacy_rates[count] = bitrates[count].hw_value;
  1982. rc = mwl8k_post_cmd(hw, &cmd->header);
  1983. kfree(cmd);
  1984. return rc;
  1985. }
  1986. /*
  1987. * CMD_USE_FIXED_RATE.
  1988. */
  1989. #define MWL8K_RATE_TABLE_SIZE 8
  1990. #define MWL8K_UCAST_RATE 0
  1991. #define MWL8K_MCAST_RATE 1
  1992. #define MWL8K_BCAST_RATE 2
  1993. #define MWL8K_USE_FIXED_RATE 0x0001
  1994. #define MWL8K_USE_AUTO_RATE 0x0002
  1995. struct mwl8k_rate_entry {
  1996. /* Set to 1 if HT rate, 0 if legacy. */
  1997. __le32 is_ht_rate;
  1998. /* Set to 1 to use retry_count field. */
  1999. __le32 enable_retry;
  2000. /* Specified legacy rate or MCS. */
  2001. __le32 rate;
  2002. /* Number of allowed retries. */
  2003. __le32 retry_count;
  2004. } __attribute__((packed));
  2005. struct mwl8k_rate_table {
  2006. /* 1 to allow specified rate and below */
  2007. __le32 allow_rate_drop;
  2008. __le32 num_rates;
  2009. struct mwl8k_rate_entry rate_entry[MWL8K_RATE_TABLE_SIZE];
  2010. } __attribute__((packed));
  2011. struct mwl8k_cmd_use_fixed_rate {
  2012. struct mwl8k_cmd_pkt header;
  2013. __le32 action;
  2014. struct mwl8k_rate_table rate_table;
  2015. /* Unicast, Broadcast or Multicast */
  2016. __le32 rate_type;
  2017. __le32 reserved1;
  2018. __le32 reserved2;
  2019. } __attribute__((packed));
  2020. static int mwl8k_cmd_use_fixed_rate(struct ieee80211_hw *hw,
  2021. u32 action, u32 rate_type, struct mwl8k_rate_table *rate_table)
  2022. {
  2023. struct mwl8k_cmd_use_fixed_rate *cmd;
  2024. int count;
  2025. int rc;
  2026. cmd = kzalloc(sizeof(*cmd), GFP_KERNEL);
  2027. if (cmd == NULL)
  2028. return -ENOMEM;
  2029. cmd->header.code = cpu_to_le16(MWL8K_CMD_USE_FIXED_RATE);
  2030. cmd->header.length = cpu_to_le16(sizeof(*cmd));
  2031. cmd->action = cpu_to_le32(action);
  2032. cmd->rate_type = cpu_to_le32(rate_type);
  2033. if (rate_table != NULL) {
  2034. /* Copy over each field manually so
  2035. * that bitflipping can be done
  2036. */
  2037. cmd->rate_table.allow_rate_drop =
  2038. cpu_to_le32(rate_table->allow_rate_drop);
  2039. cmd->rate_table.num_rates =
  2040. cpu_to_le32(rate_table->num_rates);
  2041. for (count = 0; count < rate_table->num_rates; count++) {
  2042. struct mwl8k_rate_entry *dst =
  2043. &cmd->rate_table.rate_entry[count];
  2044. struct mwl8k_rate_entry *src =
  2045. &rate_table->rate_entry[count];
  2046. dst->is_ht_rate = cpu_to_le32(src->is_ht_rate);
  2047. dst->enable_retry = cpu_to_le32(src->enable_retry);
  2048. dst->rate = cpu_to_le32(src->rate);
  2049. dst->retry_count = cpu_to_le32(src->retry_count);
  2050. }
  2051. }
  2052. rc = mwl8k_post_cmd(hw, &cmd->header);
  2053. kfree(cmd);
  2054. return rc;
  2055. }
  2056. /*
  2057. * Interrupt handling.
  2058. */
  2059. static irqreturn_t mwl8k_interrupt(int irq, void *dev_id)
  2060. {
  2061. struct ieee80211_hw *hw = dev_id;
  2062. struct mwl8k_priv *priv = hw->priv;
  2063. u32 status;
  2064. status = ioread32(priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2065. iowrite32(~status, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2066. status &= priv->int_mask;
  2067. if (!status)
  2068. return IRQ_NONE;
  2069. if (status & MWL8K_A2H_INT_TX_DONE)
  2070. tasklet_schedule(&priv->tx_reclaim_task);
  2071. if (status & MWL8K_A2H_INT_RX_READY) {
  2072. while (rxq_process(hw, 0, 1))
  2073. rxq_refill(hw, 0, 1);
  2074. }
  2075. if (status & MWL8K_A2H_INT_OPC_DONE) {
  2076. if (priv->hostcmd_wait != NULL) {
  2077. complete(priv->hostcmd_wait);
  2078. priv->hostcmd_wait = NULL;
  2079. }
  2080. }
  2081. if (status & MWL8K_A2H_INT_QUEUE_EMPTY) {
  2082. if (!priv->inconfig &&
  2083. priv->radio_state &&
  2084. mwl8k_txq_busy(priv))
  2085. mwl8k_tx_start(priv);
  2086. }
  2087. return IRQ_HANDLED;
  2088. }
  2089. /*
  2090. * Core driver operations.
  2091. */
  2092. static int mwl8k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2093. {
  2094. struct mwl8k_priv *priv = hw->priv;
  2095. int index = skb_get_queue_mapping(skb);
  2096. int rc;
  2097. if (priv->current_channel == NULL) {
  2098. printk(KERN_DEBUG "%s: dropped TX frame since radio "
  2099. "disabled\n", priv->name);
  2100. dev_kfree_skb(skb);
  2101. return NETDEV_TX_OK;
  2102. }
  2103. rc = mwl8k_txq_xmit(hw, index, skb);
  2104. return rc;
  2105. }
  2106. struct mwl8k_work_struct {
  2107. /* Initialized by mwl8k_queue_work(). */
  2108. struct work_struct wt;
  2109. /* Required field passed in to mwl8k_queue_work(). */
  2110. struct ieee80211_hw *hw;
  2111. /* Required field passed in to mwl8k_queue_work(). */
  2112. int (*wfunc)(struct work_struct *w);
  2113. /* Initialized by mwl8k_queue_work(). */
  2114. struct completion *cmd_wait;
  2115. /* Result code. */
  2116. int rc;
  2117. /*
  2118. * Optional field. Refer to explanation of MWL8K_WQ_XXX_XXX
  2119. * flags for explanation. Defaults to MWL8K_WQ_DEFAULT_OPTIONS.
  2120. */
  2121. u32 options;
  2122. /* Optional field. Defaults to MWL8K_CONFIG_TIMEOUT_MS. */
  2123. unsigned long timeout_ms;
  2124. /* Optional field. Defaults to MWL8K_WQ_TXWAIT_ATTEMPTS. */
  2125. u32 txwait_attempts;
  2126. /* Optional field. Defaults to MWL8K_TXWAIT_MS. */
  2127. u32 tx_timeout_ms;
  2128. u32 step;
  2129. };
  2130. /* Flags controlling behavior of config queue requests */
  2131. /* Caller spins while waiting for completion. */
  2132. #define MWL8K_WQ_SPIN 0x00000001
  2133. /* Wait for TX queues to empty before proceeding with configuration. */
  2134. #define MWL8K_WQ_TX_WAIT_EMPTY 0x00000002
  2135. /* Queue request and return immediately. */
  2136. #define MWL8K_WQ_POST_REQUEST 0x00000004
  2137. /*
  2138. * Caller sleeps and waits for task complete notification.
  2139. * Do not use in atomic context.
  2140. */
  2141. #define MWL8K_WQ_SLEEP 0x00000008
  2142. /* Free work struct when task is done. */
  2143. #define MWL8K_WQ_FREE_WORKSTRUCT 0x00000010
  2144. /*
  2145. * Config request is queued and returns to caller imediately. Use
  2146. * this in atomic context. Work struct is freed by mwl8k_queue_work()
  2147. * when this flag is set.
  2148. */
  2149. #define MWL8K_WQ_QUEUE_ONLY (MWL8K_WQ_POST_REQUEST | \
  2150. MWL8K_WQ_FREE_WORKSTRUCT)
  2151. /* Default work queue behavior is to sleep and wait for tx completion. */
  2152. #define MWL8K_WQ_DEFAULT_OPTIONS (MWL8K_WQ_SLEEP | MWL8K_WQ_TX_WAIT_EMPTY)
  2153. /*
  2154. * Default config request timeout. Add adjustments to make sure the
  2155. * config thread waits long enough for both tx wait and cmd wait before
  2156. * timing out.
  2157. */
  2158. /* Time to wait for all TXQs to drain. TX Doorbell is pressed each time. */
  2159. #define MWL8K_TXWAIT_TIMEOUT_MS 1000
  2160. /* Default number of TX wait attempts. */
  2161. #define MWL8K_WQ_TXWAIT_ATTEMPTS 4
  2162. /* Total time to wait for TXQ to drain. */
  2163. #define MWL8K_TXWAIT_MS (MWL8K_TXWAIT_TIMEOUT_MS * \
  2164. MWL8K_WQ_TXWAIT_ATTEMPTS)
  2165. /* Scheduling slop. */
  2166. #define MWL8K_OS_SCHEDULE_OVERHEAD_MS 200
  2167. #define MWL8K_CONFIG_TIMEOUT_MS (MWL8K_CMD_TIMEOUT_MS + \
  2168. MWL8K_TXWAIT_MS + \
  2169. MWL8K_OS_SCHEDULE_OVERHEAD_MS)
  2170. static void mwl8k_config_thread(struct work_struct *wt)
  2171. {
  2172. struct mwl8k_work_struct *worker = (struct mwl8k_work_struct *)wt;
  2173. struct ieee80211_hw *hw = worker->hw;
  2174. struct mwl8k_priv *priv = hw->priv;
  2175. int rc = 0;
  2176. spin_lock_irq(&priv->tx_lock);
  2177. priv->inconfig = true;
  2178. spin_unlock_irq(&priv->tx_lock);
  2179. ieee80211_stop_queues(hw);
  2180. /*
  2181. * Wait for host queues to drain before doing PHY
  2182. * reconfiguration. This avoids interrupting any in-flight
  2183. * DMA transfers to the hardware.
  2184. */
  2185. if (worker->options & MWL8K_WQ_TX_WAIT_EMPTY) {
  2186. u32 timeout;
  2187. u32 time_remaining;
  2188. u32 iter;
  2189. u32 tx_wait_attempts = worker->txwait_attempts;
  2190. time_remaining = worker->tx_timeout_ms;
  2191. if (!tx_wait_attempts)
  2192. tx_wait_attempts = 1;
  2193. timeout = worker->tx_timeout_ms/tx_wait_attempts;
  2194. if (!timeout)
  2195. timeout = 1;
  2196. iter = tx_wait_attempts;
  2197. do {
  2198. int wait_time;
  2199. if (time_remaining > timeout) {
  2200. time_remaining -= timeout;
  2201. wait_time = timeout;
  2202. } else
  2203. wait_time = time_remaining;
  2204. if (!wait_time)
  2205. wait_time = 1;
  2206. rc = mwl8k_tx_wait_empty(hw, wait_time);
  2207. if (rc)
  2208. printk(KERN_ERR "%s() txwait timeout=%ums "
  2209. "Retry:%u/%u\n", __func__, timeout,
  2210. tx_wait_attempts - iter + 1,
  2211. tx_wait_attempts);
  2212. } while (rc && --iter);
  2213. rc = iter ? 0 : -ETIMEDOUT;
  2214. }
  2215. if (!rc)
  2216. rc = worker->wfunc(wt);
  2217. spin_lock_irq(&priv->tx_lock);
  2218. priv->inconfig = false;
  2219. if (priv->pending_tx_pkts && priv->radio_state)
  2220. mwl8k_tx_start(priv);
  2221. spin_unlock_irq(&priv->tx_lock);
  2222. ieee80211_wake_queues(hw);
  2223. worker->rc = rc;
  2224. if (worker->options & MWL8K_WQ_SLEEP)
  2225. complete(worker->cmd_wait);
  2226. if (worker->options & MWL8K_WQ_FREE_WORKSTRUCT)
  2227. kfree(wt);
  2228. }
  2229. static int mwl8k_queue_work(struct ieee80211_hw *hw,
  2230. struct mwl8k_work_struct *worker,
  2231. struct workqueue_struct *wqueue,
  2232. int (*wfunc)(struct work_struct *w))
  2233. {
  2234. unsigned long timeout = 0;
  2235. int rc = 0;
  2236. DECLARE_COMPLETION_ONSTACK(cmd_wait);
  2237. if (!worker->timeout_ms)
  2238. worker->timeout_ms = MWL8K_CONFIG_TIMEOUT_MS;
  2239. if (!worker->options)
  2240. worker->options = MWL8K_WQ_DEFAULT_OPTIONS;
  2241. if (!worker->txwait_attempts)
  2242. worker->txwait_attempts = MWL8K_WQ_TXWAIT_ATTEMPTS;
  2243. if (!worker->tx_timeout_ms)
  2244. worker->tx_timeout_ms = MWL8K_TXWAIT_MS;
  2245. worker->hw = hw;
  2246. worker->cmd_wait = &cmd_wait;
  2247. worker->rc = 1;
  2248. worker->wfunc = wfunc;
  2249. INIT_WORK(&worker->wt, mwl8k_config_thread);
  2250. queue_work(wqueue, &worker->wt);
  2251. if (worker->options & MWL8K_WQ_POST_REQUEST) {
  2252. rc = 0;
  2253. } else {
  2254. if (worker->options & MWL8K_WQ_SPIN) {
  2255. timeout = worker->timeout_ms;
  2256. while (timeout && (worker->rc > 0)) {
  2257. mdelay(1);
  2258. timeout--;
  2259. }
  2260. } else if (worker->options & MWL8K_WQ_SLEEP)
  2261. timeout = wait_for_completion_timeout(&cmd_wait,
  2262. msecs_to_jiffies(worker->timeout_ms));
  2263. if (timeout)
  2264. rc = worker->rc;
  2265. else {
  2266. cancel_work_sync(&worker->wt);
  2267. rc = -ETIMEDOUT;
  2268. }
  2269. }
  2270. return rc;
  2271. }
  2272. struct mwl8k_start_worker {
  2273. struct mwl8k_work_struct header;
  2274. };
  2275. static int mwl8k_start_wt(struct work_struct *wt)
  2276. {
  2277. struct mwl8k_start_worker *worker = (struct mwl8k_start_worker *)wt;
  2278. struct ieee80211_hw *hw = worker->header.hw;
  2279. struct mwl8k_priv *priv = hw->priv;
  2280. int rc = 0;
  2281. if (priv->vif != NULL) {
  2282. rc = -EIO;
  2283. goto mwl8k_start_exit;
  2284. }
  2285. /* Turn on radio */
  2286. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2287. rc = -EIO;
  2288. goto mwl8k_start_exit;
  2289. }
  2290. /* Purge TX/RX HW queues */
  2291. if (mwl8k_cmd_set_pre_scan(hw)) {
  2292. rc = -EIO;
  2293. goto mwl8k_start_exit;
  2294. }
  2295. if (mwl8k_cmd_set_post_scan(hw, "\x00\x00\x00\x00\x00\x00")) {
  2296. rc = -EIO;
  2297. goto mwl8k_start_exit;
  2298. }
  2299. /* Enable firmware rate adaptation */
  2300. if (mwl8k_cmd_setrateadaptmode(hw, 0)) {
  2301. rc = -EIO;
  2302. goto mwl8k_start_exit;
  2303. }
  2304. /* Disable WMM. WMM gets enabled when stack sends WMM parms */
  2305. if (mwl8k_set_wmm(hw, MWL8K_WMM_DISABLE)) {
  2306. rc = -EIO;
  2307. goto mwl8k_start_exit;
  2308. }
  2309. /* Disable sniffer mode */
  2310. if (mwl8k_enable_sniffer(hw, 0))
  2311. rc = -EIO;
  2312. mwl8k_start_exit:
  2313. return rc;
  2314. }
  2315. static int mwl8k_start(struct ieee80211_hw *hw)
  2316. {
  2317. struct mwl8k_start_worker *worker;
  2318. struct mwl8k_priv *priv = hw->priv;
  2319. int rc;
  2320. /* Enable tx reclaim tasklet */
  2321. tasklet_enable(&priv->tx_reclaim_task);
  2322. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2323. IRQF_SHARED, MWL8K_NAME, hw);
  2324. if (rc) {
  2325. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2326. priv->name);
  2327. rc = -EIO;
  2328. goto mwl8k_start_disable_tasklet;
  2329. }
  2330. /* Enable interrupts */
  2331. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2332. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2333. if (worker == NULL) {
  2334. rc = -ENOMEM;
  2335. goto mwl8k_start_disable_irq;
  2336. }
  2337. rc = mwl8k_queue_work(hw, &worker->header,
  2338. priv->config_wq, mwl8k_start_wt);
  2339. kfree(worker);
  2340. if (!rc)
  2341. return rc;
  2342. if (rc == -ETIMEDOUT)
  2343. printk(KERN_ERR "%s() timed out\n", __func__);
  2344. rc = -EIO;
  2345. mwl8k_start_disable_irq:
  2346. spin_lock_irq(&priv->tx_lock);
  2347. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2348. spin_unlock_irq(&priv->tx_lock);
  2349. free_irq(priv->pdev->irq, hw);
  2350. mwl8k_start_disable_tasklet:
  2351. tasklet_disable(&priv->tx_reclaim_task);
  2352. return rc;
  2353. }
  2354. struct mwl8k_stop_worker {
  2355. struct mwl8k_work_struct header;
  2356. };
  2357. static int mwl8k_stop_wt(struct work_struct *wt)
  2358. {
  2359. struct mwl8k_stop_worker *worker = (struct mwl8k_stop_worker *)wt;
  2360. struct ieee80211_hw *hw = worker->header.hw;
  2361. int rc;
  2362. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2363. return rc;
  2364. }
  2365. static void mwl8k_stop(struct ieee80211_hw *hw)
  2366. {
  2367. int rc;
  2368. struct mwl8k_stop_worker *worker;
  2369. struct mwl8k_priv *priv = hw->priv;
  2370. int i;
  2371. if (priv->vif != NULL)
  2372. return;
  2373. ieee80211_stop_queues(hw);
  2374. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2375. if (worker == NULL)
  2376. return;
  2377. rc = mwl8k_queue_work(hw, &worker->header,
  2378. priv->config_wq, mwl8k_stop_wt);
  2379. kfree(worker);
  2380. if (rc == -ETIMEDOUT)
  2381. printk(KERN_ERR "%s() timed out\n", __func__);
  2382. /* Disable interrupts */
  2383. spin_lock_irq(&priv->tx_lock);
  2384. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2385. spin_unlock_irq(&priv->tx_lock);
  2386. free_irq(priv->pdev->irq, hw);
  2387. /* Stop finalize join worker */
  2388. cancel_work_sync(&priv->finalize_join_worker);
  2389. if (priv->beacon_skb != NULL)
  2390. dev_kfree_skb(priv->beacon_skb);
  2391. /* Stop tx reclaim tasklet */
  2392. tasklet_disable(&priv->tx_reclaim_task);
  2393. /* Stop config thread */
  2394. flush_workqueue(priv->config_wq);
  2395. /* Return all skbs to mac80211 */
  2396. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2397. mwl8k_txq_reclaim(hw, i, 1);
  2398. }
  2399. static int mwl8k_add_interface(struct ieee80211_hw *hw,
  2400. struct ieee80211_if_init_conf *conf)
  2401. {
  2402. struct mwl8k_priv *priv = hw->priv;
  2403. struct mwl8k_vif *mwl8k_vif;
  2404. /*
  2405. * We only support one active interface at a time.
  2406. */
  2407. if (priv->vif != NULL)
  2408. return -EBUSY;
  2409. /*
  2410. * We only support managed interfaces for now.
  2411. */
  2412. if (conf->type != NL80211_IFTYPE_STATION &&
  2413. conf->type != NL80211_IFTYPE_MONITOR)
  2414. return -EINVAL;
  2415. /* Clean out driver private area */
  2416. mwl8k_vif = MWL8K_VIF(conf->vif);
  2417. memset(mwl8k_vif, 0, sizeof(*mwl8k_vif));
  2418. /* Save the mac address */
  2419. memcpy(mwl8k_vif->mac_addr, conf->mac_addr, IEEE80211_ADDR_LEN);
  2420. /* Back pointer to parent config block */
  2421. mwl8k_vif->priv = priv;
  2422. /* Setup initial PHY parameters */
  2423. memcpy(mwl8k_vif->legacy_rates ,
  2424. priv->rates, sizeof(mwl8k_vif->legacy_rates));
  2425. mwl8k_vif->legacy_nrates = ARRAY_SIZE(priv->rates);
  2426. /* Set Initial sequence number to zero */
  2427. mwl8k_vif->seqno = 0;
  2428. priv->vif = conf->vif;
  2429. priv->current_channel = NULL;
  2430. return 0;
  2431. }
  2432. static void mwl8k_remove_interface(struct ieee80211_hw *hw,
  2433. struct ieee80211_if_init_conf *conf)
  2434. {
  2435. struct mwl8k_priv *priv = hw->priv;
  2436. if (priv->vif == NULL)
  2437. return;
  2438. priv->vif = NULL;
  2439. }
  2440. struct mwl8k_config_worker {
  2441. struct mwl8k_work_struct header;
  2442. u32 changed;
  2443. };
  2444. static int mwl8k_config_wt(struct work_struct *wt)
  2445. {
  2446. struct mwl8k_config_worker *worker =
  2447. (struct mwl8k_config_worker *)wt;
  2448. struct ieee80211_hw *hw = worker->header.hw;
  2449. struct ieee80211_conf *conf = &hw->conf;
  2450. struct mwl8k_priv *priv = hw->priv;
  2451. int rc = 0;
  2452. if (!conf->radio_enabled) {
  2453. mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2454. priv->current_channel = NULL;
  2455. rc = 0;
  2456. goto mwl8k_config_exit;
  2457. }
  2458. if (mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_ENABLE)) {
  2459. rc = -EINVAL;
  2460. goto mwl8k_config_exit;
  2461. }
  2462. priv->current_channel = conf->channel;
  2463. if (mwl8k_cmd_set_rf_channel(hw, conf->channel)) {
  2464. rc = -EINVAL;
  2465. goto mwl8k_config_exit;
  2466. }
  2467. if (conf->power_level > 18)
  2468. conf->power_level = 18;
  2469. if (mwl8k_cmd_802_11_rf_tx_power(hw, conf->power_level)) {
  2470. rc = -EINVAL;
  2471. goto mwl8k_config_exit;
  2472. }
  2473. if (mwl8k_cmd_mimo_config(hw, 0x7, 0x7))
  2474. rc = -EINVAL;
  2475. mwl8k_config_exit:
  2476. return rc;
  2477. }
  2478. static int mwl8k_config(struct ieee80211_hw *hw, u32 changed)
  2479. {
  2480. int rc = 0;
  2481. struct mwl8k_config_worker *worker;
  2482. struct mwl8k_priv *priv = hw->priv;
  2483. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2484. if (worker == NULL)
  2485. return -ENOMEM;
  2486. worker->changed = changed;
  2487. rc = mwl8k_queue_work(hw, &worker->header,
  2488. priv->config_wq, mwl8k_config_wt);
  2489. if (rc == -ETIMEDOUT) {
  2490. printk(KERN_ERR "%s() timed out.\n", __func__);
  2491. rc = -EINVAL;
  2492. }
  2493. kfree(worker);
  2494. /*
  2495. * mac80211 will crash on anything other than -EINVAL on
  2496. * error. Looks like wireless extensions which calls mac80211
  2497. * may be the actual culprit...
  2498. */
  2499. return rc ? -EINVAL : 0;
  2500. }
  2501. struct mwl8k_bss_info_changed_worker {
  2502. struct mwl8k_work_struct header;
  2503. struct ieee80211_vif *vif;
  2504. struct ieee80211_bss_conf *info;
  2505. u32 changed;
  2506. };
  2507. static int mwl8k_bss_info_changed_wt(struct work_struct *wt)
  2508. {
  2509. struct mwl8k_bss_info_changed_worker *worker =
  2510. (struct mwl8k_bss_info_changed_worker *)wt;
  2511. struct ieee80211_hw *hw = worker->header.hw;
  2512. struct ieee80211_vif *vif = worker->vif;
  2513. struct ieee80211_bss_conf *info = worker->info;
  2514. u32 changed;
  2515. int rc;
  2516. struct mwl8k_priv *priv = hw->priv;
  2517. struct mwl8k_vif *mwl8k_vif = MWL8K_VIF(vif);
  2518. changed = worker->changed;
  2519. priv->capture_beacon = false;
  2520. if (info->assoc) {
  2521. memcpy(&mwl8k_vif->bss_info, info,
  2522. sizeof(struct ieee80211_bss_conf));
  2523. /* Install rates */
  2524. if (mwl8k_update_rateset(hw, vif))
  2525. goto mwl8k_bss_info_changed_exit;
  2526. /* Turn on rate adaptation */
  2527. if (mwl8k_cmd_use_fixed_rate(hw, MWL8K_USE_AUTO_RATE,
  2528. MWL8K_UCAST_RATE, NULL))
  2529. goto mwl8k_bss_info_changed_exit;
  2530. /* Set radio preamble */
  2531. if (mwl8k_set_radio_preamble(hw,
  2532. info->use_short_preamble))
  2533. goto mwl8k_bss_info_changed_exit;
  2534. /* Set slot time */
  2535. if (mwl8k_cmd_set_slot(hw, info->use_short_slot ?
  2536. MWL8K_SHORT_SLOTTIME : MWL8K_LONG_SLOTTIME))
  2537. goto mwl8k_bss_info_changed_exit;
  2538. /* Update peer rate info */
  2539. if (mwl8k_cmd_update_sta_db(hw, vif,
  2540. MWL8K_STA_DB_MODIFY_ENTRY))
  2541. goto mwl8k_bss_info_changed_exit;
  2542. /* Set AID */
  2543. if (mwl8k_cmd_set_aid(hw, vif))
  2544. goto mwl8k_bss_info_changed_exit;
  2545. /*
  2546. * Finalize the join. Tell rx handler to process
  2547. * next beacon from our BSSID.
  2548. */
  2549. memcpy(priv->capture_bssid,
  2550. mwl8k_vif->bssid, IEEE80211_ADDR_LEN);
  2551. priv->capture_beacon = true;
  2552. } else {
  2553. mwl8k_cmd_update_sta_db(hw, vif, MWL8K_STA_DB_DEL_ENTRY);
  2554. memset(&mwl8k_vif->bss_info, 0,
  2555. sizeof(struct ieee80211_bss_conf));
  2556. memset(mwl8k_vif->bssid, 0, IEEE80211_ADDR_LEN);
  2557. }
  2558. mwl8k_bss_info_changed_exit:
  2559. rc = 0;
  2560. return rc;
  2561. }
  2562. static void mwl8k_bss_info_changed(struct ieee80211_hw *hw,
  2563. struct ieee80211_vif *vif,
  2564. struct ieee80211_bss_conf *info,
  2565. u32 changed)
  2566. {
  2567. struct mwl8k_bss_info_changed_worker *worker;
  2568. struct mwl8k_priv *priv = hw->priv;
  2569. struct mwl8k_vif *mv_vif = MWL8K_VIF(vif);
  2570. int rc;
  2571. if (changed & BSS_CHANGED_BSSID)
  2572. memcpy(mv_vif->bssid, info->bssid, IEEE80211_ADDR_LEN);
  2573. if ((changed & BSS_CHANGED_ASSOC) == 0)
  2574. return;
  2575. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2576. if (worker == NULL)
  2577. return;
  2578. worker->vif = vif;
  2579. worker->info = info;
  2580. worker->changed = changed;
  2581. rc = mwl8k_queue_work(hw, &worker->header,
  2582. priv->config_wq,
  2583. mwl8k_bss_info_changed_wt);
  2584. kfree(worker);
  2585. if (rc == -ETIMEDOUT)
  2586. printk(KERN_ERR "%s() timed out\n", __func__);
  2587. }
  2588. struct mwl8k_configure_filter_worker {
  2589. struct mwl8k_work_struct header;
  2590. unsigned int changed_flags;
  2591. unsigned int *total_flags;
  2592. int mc_count;
  2593. struct dev_addr_list *mclist;
  2594. };
  2595. #define MWL8K_SUPPORTED_IF_FLAGS FIF_BCN_PRBRESP_PROMISC
  2596. static int mwl8k_configure_filter_wt(struct work_struct *wt)
  2597. {
  2598. struct mwl8k_configure_filter_worker *worker =
  2599. (struct mwl8k_configure_filter_worker *)wt;
  2600. struct ieee80211_hw *hw = worker->header.hw;
  2601. unsigned int changed_flags = worker->changed_flags;
  2602. unsigned int *total_flags = worker->total_flags;
  2603. int mc_count = worker->mc_count;
  2604. struct dev_addr_list *mclist = worker->mclist;
  2605. struct mwl8k_priv *priv = hw->priv;
  2606. struct mwl8k_vif *mv_vif;
  2607. int rc = 0;
  2608. if (changed_flags & FIF_BCN_PRBRESP_PROMISC) {
  2609. if (*total_flags & FIF_BCN_PRBRESP_PROMISC)
  2610. rc = mwl8k_cmd_set_pre_scan(hw);
  2611. else {
  2612. mv_vif = MWL8K_VIF(priv->vif);
  2613. rc = mwl8k_cmd_set_post_scan(hw, mv_vif->bssid);
  2614. }
  2615. }
  2616. if (rc)
  2617. goto mwl8k_configure_filter_exit;
  2618. if (mc_count) {
  2619. mc_count = mc_count < priv->num_mcaddrs ?
  2620. mc_count : priv->num_mcaddrs;
  2621. rc = mwl8k_cmd_mac_multicast_adr(hw, mc_count, mclist);
  2622. if (rc)
  2623. printk(KERN_ERR
  2624. "%s()Error setting multicast addresses\n",
  2625. __func__);
  2626. }
  2627. mwl8k_configure_filter_exit:
  2628. return rc;
  2629. }
  2630. static void mwl8k_configure_filter(struct ieee80211_hw *hw,
  2631. unsigned int changed_flags,
  2632. unsigned int *total_flags,
  2633. int mc_count,
  2634. struct dev_addr_list *mclist)
  2635. {
  2636. struct mwl8k_configure_filter_worker *worker;
  2637. struct mwl8k_priv *priv = hw->priv;
  2638. /* Clear unsupported feature flags */
  2639. *total_flags &= MWL8K_SUPPORTED_IF_FLAGS;
  2640. if (!(changed_flags & MWL8K_SUPPORTED_IF_FLAGS) && !mc_count)
  2641. return;
  2642. worker = kzalloc(sizeof(*worker), GFP_ATOMIC);
  2643. if (worker == NULL)
  2644. return;
  2645. worker->header.options = MWL8K_WQ_QUEUE_ONLY | MWL8K_WQ_TX_WAIT_EMPTY;
  2646. worker->changed_flags = changed_flags;
  2647. worker->total_flags = total_flags;
  2648. worker->mc_count = mc_count;
  2649. worker->mclist = mclist;
  2650. mwl8k_queue_work(hw, &worker->header, priv->config_wq,
  2651. mwl8k_configure_filter_wt);
  2652. }
  2653. struct mwl8k_set_rts_threshold_worker {
  2654. struct mwl8k_work_struct header;
  2655. u32 value;
  2656. };
  2657. static int mwl8k_set_rts_threshold_wt(struct work_struct *wt)
  2658. {
  2659. struct mwl8k_set_rts_threshold_worker *worker =
  2660. (struct mwl8k_set_rts_threshold_worker *)wt;
  2661. struct ieee80211_hw *hw = worker->header.hw;
  2662. u16 threshold = (u16)(worker->value);
  2663. int rc;
  2664. rc = mwl8k_rts_threshold(hw, MWL8K_CMD_SET, &threshold);
  2665. return rc;
  2666. }
  2667. static int mwl8k_set_rts_threshold(struct ieee80211_hw *hw, u32 value)
  2668. {
  2669. int rc;
  2670. struct mwl8k_set_rts_threshold_worker *worker;
  2671. struct mwl8k_priv *priv = hw->priv;
  2672. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2673. if (worker == NULL)
  2674. return -ENOMEM;
  2675. worker->value = value;
  2676. rc = mwl8k_queue_work(hw, &worker->header,
  2677. priv->config_wq,
  2678. mwl8k_set_rts_threshold_wt);
  2679. kfree(worker);
  2680. if (rc == -ETIMEDOUT) {
  2681. printk(KERN_ERR "%s() timed out\n", __func__);
  2682. rc = -EINVAL;
  2683. }
  2684. return rc;
  2685. }
  2686. struct mwl8k_conf_tx_worker {
  2687. struct mwl8k_work_struct header;
  2688. u16 queue;
  2689. const struct ieee80211_tx_queue_params *params;
  2690. };
  2691. static int mwl8k_conf_tx_wt(struct work_struct *wt)
  2692. {
  2693. struct mwl8k_conf_tx_worker *worker =
  2694. (struct mwl8k_conf_tx_worker *)wt;
  2695. struct ieee80211_hw *hw = worker->header.hw;
  2696. u16 queue = worker->queue;
  2697. const struct ieee80211_tx_queue_params *params = worker->params;
  2698. struct mwl8k_priv *priv = hw->priv;
  2699. int rc = 0;
  2700. if (priv->wmm_mode == MWL8K_WMM_DISABLE)
  2701. if (mwl8k_set_wmm(hw, MWL8K_WMM_ENABLE)) {
  2702. rc = -EINVAL;
  2703. goto mwl8k_conf_tx_exit;
  2704. }
  2705. if (mwl8k_set_edca_params(hw, GET_TXQ(queue), params->cw_min,
  2706. params->cw_max, params->aifs, params->txop))
  2707. rc = -EINVAL;
  2708. mwl8k_conf_tx_exit:
  2709. return rc;
  2710. }
  2711. static int mwl8k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  2712. const struct ieee80211_tx_queue_params *params)
  2713. {
  2714. int rc;
  2715. struct mwl8k_conf_tx_worker *worker;
  2716. struct mwl8k_priv *priv = hw->priv;
  2717. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2718. if (worker == NULL)
  2719. return -ENOMEM;
  2720. worker->queue = queue;
  2721. worker->params = params;
  2722. rc = mwl8k_queue_work(hw, &worker->header,
  2723. priv->config_wq, mwl8k_conf_tx_wt);
  2724. kfree(worker);
  2725. if (rc == -ETIMEDOUT) {
  2726. printk(KERN_ERR "%s() timed out\n", __func__);
  2727. rc = -EINVAL;
  2728. }
  2729. return rc;
  2730. }
  2731. static int mwl8k_get_tx_stats(struct ieee80211_hw *hw,
  2732. struct ieee80211_tx_queue_stats *stats)
  2733. {
  2734. struct mwl8k_priv *priv = hw->priv;
  2735. struct mwl8k_tx_queue *txq;
  2736. int index;
  2737. spin_lock_bh(&priv->tx_lock);
  2738. for (index = 0; index < MWL8K_TX_QUEUES; index++) {
  2739. txq = priv->txq + index;
  2740. memcpy(&stats[index], &txq->tx_stats,
  2741. sizeof(struct ieee80211_tx_queue_stats));
  2742. }
  2743. spin_unlock_bh(&priv->tx_lock);
  2744. return 0;
  2745. }
  2746. struct mwl8k_get_stats_worker {
  2747. struct mwl8k_work_struct header;
  2748. struct ieee80211_low_level_stats *stats;
  2749. };
  2750. static int mwl8k_get_stats_wt(struct work_struct *wt)
  2751. {
  2752. struct mwl8k_get_stats_worker *worker =
  2753. (struct mwl8k_get_stats_worker *)wt;
  2754. return mwl8k_cmd_802_11_get_stat(worker->header.hw, worker->stats);
  2755. }
  2756. static int mwl8k_get_stats(struct ieee80211_hw *hw,
  2757. struct ieee80211_low_level_stats *stats)
  2758. {
  2759. int rc;
  2760. struct mwl8k_get_stats_worker *worker;
  2761. struct mwl8k_priv *priv = hw->priv;
  2762. worker = kzalloc(sizeof(*worker), GFP_KERNEL);
  2763. if (worker == NULL)
  2764. return -ENOMEM;
  2765. worker->stats = stats;
  2766. rc = mwl8k_queue_work(hw, &worker->header,
  2767. priv->config_wq, mwl8k_get_stats_wt);
  2768. kfree(worker);
  2769. if (rc == -ETIMEDOUT) {
  2770. printk(KERN_ERR "%s() timed out\n", __func__);
  2771. rc = -EINVAL;
  2772. }
  2773. return rc;
  2774. }
  2775. static const struct ieee80211_ops mwl8k_ops = {
  2776. .tx = mwl8k_tx,
  2777. .start = mwl8k_start,
  2778. .stop = mwl8k_stop,
  2779. .add_interface = mwl8k_add_interface,
  2780. .remove_interface = mwl8k_remove_interface,
  2781. .config = mwl8k_config,
  2782. .bss_info_changed = mwl8k_bss_info_changed,
  2783. .configure_filter = mwl8k_configure_filter,
  2784. .set_rts_threshold = mwl8k_set_rts_threshold,
  2785. .conf_tx = mwl8k_conf_tx,
  2786. .get_tx_stats = mwl8k_get_tx_stats,
  2787. .get_stats = mwl8k_get_stats,
  2788. };
  2789. static void mwl8k_tx_reclaim_handler(unsigned long data)
  2790. {
  2791. int i;
  2792. struct ieee80211_hw *hw = (struct ieee80211_hw *) data;
  2793. struct mwl8k_priv *priv = hw->priv;
  2794. spin_lock_bh(&priv->tx_lock);
  2795. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2796. mwl8k_txq_reclaim(hw, i, 0);
  2797. if (priv->tx_wait != NULL) {
  2798. int count = mwl8k_txq_busy(priv);
  2799. if (count == 0) {
  2800. complete(priv->tx_wait);
  2801. priv->tx_wait = NULL;
  2802. }
  2803. }
  2804. spin_unlock_bh(&priv->tx_lock);
  2805. }
  2806. static void mwl8k_finalize_join_worker(struct work_struct *work)
  2807. {
  2808. struct mwl8k_priv *priv =
  2809. container_of(work, struct mwl8k_priv, finalize_join_worker);
  2810. struct sk_buff *skb = priv->beacon_skb;
  2811. u8 dtim = (MWL8K_VIF(priv->vif))->bss_info.dtim_period;
  2812. mwl8k_finalize_join(priv->hw, skb->data, skb->len, dtim);
  2813. dev_kfree_skb(skb);
  2814. priv->beacon_skb = NULL;
  2815. }
  2816. static int __devinit mwl8k_probe(struct pci_dev *pdev,
  2817. const struct pci_device_id *id)
  2818. {
  2819. struct ieee80211_hw *hw;
  2820. struct mwl8k_priv *priv;
  2821. DECLARE_MAC_BUF(mac);
  2822. int rc;
  2823. int i;
  2824. u8 *fw;
  2825. rc = pci_enable_device(pdev);
  2826. if (rc) {
  2827. printk(KERN_ERR "%s: Cannot enable new PCI device\n",
  2828. MWL8K_NAME);
  2829. return rc;
  2830. }
  2831. rc = pci_request_regions(pdev, MWL8K_NAME);
  2832. if (rc) {
  2833. printk(KERN_ERR "%s: Cannot obtain PCI resources\n",
  2834. MWL8K_NAME);
  2835. return rc;
  2836. }
  2837. pci_set_master(pdev);
  2838. hw = ieee80211_alloc_hw(sizeof(*priv), &mwl8k_ops);
  2839. if (hw == NULL) {
  2840. printk(KERN_ERR "%s: ieee80211 alloc failed\n", MWL8K_NAME);
  2841. rc = -ENOMEM;
  2842. goto err_free_reg;
  2843. }
  2844. priv = hw->priv;
  2845. priv->hw = hw;
  2846. priv->pdev = pdev;
  2847. priv->hostcmd_wait = NULL;
  2848. priv->tx_wait = NULL;
  2849. priv->inconfig = false;
  2850. priv->wep_enabled = 0;
  2851. priv->wmm_mode = false;
  2852. priv->pending_tx_pkts = 0;
  2853. strncpy(priv->name, MWL8K_NAME, sizeof(priv->name));
  2854. spin_lock_init(&priv->fw_lock);
  2855. SET_IEEE80211_DEV(hw, &pdev->dev);
  2856. pci_set_drvdata(pdev, hw);
  2857. priv->regs = pci_iomap(pdev, 1, 0x10000);
  2858. if (priv->regs == NULL) {
  2859. printk(KERN_ERR "%s: Cannot map device memory\n", priv->name);
  2860. goto err_iounmap;
  2861. }
  2862. memcpy(priv->channels, mwl8k_channels, sizeof(mwl8k_channels));
  2863. priv->band.band = IEEE80211_BAND_2GHZ;
  2864. priv->band.channels = priv->channels;
  2865. priv->band.n_channels = ARRAY_SIZE(mwl8k_channels);
  2866. priv->band.bitrates = priv->rates;
  2867. priv->band.n_bitrates = ARRAY_SIZE(mwl8k_rates);
  2868. hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->band;
  2869. BUILD_BUG_ON(sizeof(priv->rates) != sizeof(mwl8k_rates));
  2870. memcpy(priv->rates, mwl8k_rates, sizeof(mwl8k_rates));
  2871. /*
  2872. * Extra headroom is the size of the required DMA header
  2873. * minus the size of the smallest 802.11 frame (CTS frame).
  2874. */
  2875. hw->extra_tx_headroom =
  2876. sizeof(struct mwl8k_dma_data) - sizeof(struct ieee80211_cts);
  2877. hw->channel_change_time = 10;
  2878. hw->queues = MWL8K_TX_QUEUES;
  2879. hw->wiphy->interface_modes =
  2880. BIT(NL80211_IFTYPE_STATION) | BIT(NL80211_IFTYPE_MONITOR);
  2881. /* Set rssi and noise values to dBm */
  2882. hw->flags |= (IEEE80211_HW_SIGNAL_DBM | IEEE80211_HW_NOISE_DBM);
  2883. hw->vif_data_size = sizeof(struct mwl8k_vif);
  2884. priv->vif = NULL;
  2885. /* Set default radio state and preamble */
  2886. priv->radio_preamble = MWL8K_RADIO_DEFAULT_PREAMBLE;
  2887. priv->radio_state = MWL8K_RADIO_DISABLE;
  2888. /* Finalize join worker */
  2889. INIT_WORK(&priv->finalize_join_worker, mwl8k_finalize_join_worker);
  2890. /* TX reclaim tasklet */
  2891. tasklet_init(&priv->tx_reclaim_task,
  2892. mwl8k_tx_reclaim_handler, (unsigned long)hw);
  2893. tasklet_disable(&priv->tx_reclaim_task);
  2894. /* Config workthread */
  2895. priv->config_wq = create_singlethread_workqueue("mwl8k_config");
  2896. if (priv->config_wq == NULL)
  2897. goto err_iounmap;
  2898. /* Power management cookie */
  2899. priv->cookie = pci_alloc_consistent(priv->pdev, 4, &priv->cookie_dma);
  2900. if (priv->cookie == NULL)
  2901. goto err_iounmap;
  2902. rc = mwl8k_rxq_init(hw, 0);
  2903. if (rc)
  2904. goto err_iounmap;
  2905. rxq_refill(hw, 0, INT_MAX);
  2906. spin_lock_init(&priv->tx_lock);
  2907. for (i = 0; i < MWL8K_TX_QUEUES; i++) {
  2908. rc = mwl8k_txq_init(hw, i);
  2909. if (rc)
  2910. goto err_free_queues;
  2911. }
  2912. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS);
  2913. priv->int_mask = 0;
  2914. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2915. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_CLEAR_SEL);
  2916. iowrite32(0xffffffff, priv->regs + MWL8K_HIU_A2H_INTERRUPT_STATUS_MASK);
  2917. rc = request_irq(priv->pdev->irq, &mwl8k_interrupt,
  2918. IRQF_SHARED, MWL8K_NAME, hw);
  2919. if (rc) {
  2920. printk(KERN_ERR "%s: failed to register IRQ handler\n",
  2921. priv->name);
  2922. goto err_free_queues;
  2923. }
  2924. /* Reset firmware and hardware */
  2925. mwl8k_hw_reset(priv);
  2926. /* Ask userland hotplug daemon for the device firmware */
  2927. rc = mwl8k_request_firmware(priv, (u32)id->driver_data);
  2928. if (rc) {
  2929. printk(KERN_ERR "%s: Firmware files not found\n", priv->name);
  2930. goto err_free_irq;
  2931. }
  2932. /* Load firmware into hardware */
  2933. rc = mwl8k_load_firmware(priv);
  2934. if (rc) {
  2935. printk(KERN_ERR "%s: Cannot start firmware\n", priv->name);
  2936. goto err_stop_firmware;
  2937. }
  2938. /* Reclaim memory once firmware is successfully loaded */
  2939. mwl8k_release_firmware(priv);
  2940. /*
  2941. * Temporarily enable interrupts. Initial firmware host
  2942. * commands use interrupts and avoids polling. Disable
  2943. * interrupts when done.
  2944. */
  2945. priv->int_mask |= MWL8K_A2H_EVENTS;
  2946. iowrite32(priv->int_mask, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2947. /* Get config data, mac addrs etc */
  2948. rc = mwl8k_cmd_get_hw_spec(hw);
  2949. if (rc) {
  2950. printk(KERN_ERR "%s: Cannot initialise firmware\n", priv->name);
  2951. goto err_stop_firmware;
  2952. }
  2953. /* Turn radio off */
  2954. rc = mwl8k_cmd_802_11_radio_control(hw, MWL8K_RADIO_DISABLE);
  2955. if (rc) {
  2956. printk(KERN_ERR "%s: Cannot disable\n", priv->name);
  2957. goto err_stop_firmware;
  2958. }
  2959. /* Disable interrupts */
  2960. spin_lock_irq(&priv->tx_lock);
  2961. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2962. spin_unlock_irq(&priv->tx_lock);
  2963. free_irq(priv->pdev->irq, hw);
  2964. rc = ieee80211_register_hw(hw);
  2965. if (rc) {
  2966. printk(KERN_ERR "%s: Cannot register device\n", priv->name);
  2967. goto err_stop_firmware;
  2968. }
  2969. fw = (u8 *)&priv->fw_rev;
  2970. printk(KERN_INFO "%s: 88W%u %s\n", priv->name, priv->part_num,
  2971. MWL8K_DESC);
  2972. printk(KERN_INFO "%s: Driver Ver:%s Firmware Ver:%u.%u.%u.%u\n",
  2973. priv->name, MWL8K_VERSION, fw[3], fw[2], fw[1], fw[0]);
  2974. printk(KERN_INFO "%s: MAC Address: %s\n", priv->name,
  2975. print_mac(mac, hw->wiphy->perm_addr));
  2976. return 0;
  2977. err_stop_firmware:
  2978. mwl8k_hw_reset(priv);
  2979. mwl8k_release_firmware(priv);
  2980. err_free_irq:
  2981. spin_lock_irq(&priv->tx_lock);
  2982. iowrite32(0, priv->regs + MWL8K_HIU_A2H_INTERRUPT_MASK);
  2983. spin_unlock_irq(&priv->tx_lock);
  2984. free_irq(priv->pdev->irq, hw);
  2985. err_free_queues:
  2986. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  2987. mwl8k_txq_deinit(hw, i);
  2988. mwl8k_rxq_deinit(hw, 0);
  2989. err_iounmap:
  2990. if (priv->cookie != NULL)
  2991. pci_free_consistent(priv->pdev, 4,
  2992. priv->cookie, priv->cookie_dma);
  2993. if (priv->regs != NULL)
  2994. pci_iounmap(pdev, priv->regs);
  2995. if (priv->config_wq != NULL)
  2996. destroy_workqueue(priv->config_wq);
  2997. pci_set_drvdata(pdev, NULL);
  2998. ieee80211_free_hw(hw);
  2999. err_free_reg:
  3000. pci_release_regions(pdev);
  3001. pci_disable_device(pdev);
  3002. return rc;
  3003. }
  3004. static void __devexit mwl8k_shutdown(struct pci_dev *pdev)
  3005. {
  3006. printk(KERN_ERR "===>%s(%u)\n", __func__, __LINE__);
  3007. }
  3008. static void __devexit mwl8k_remove(struct pci_dev *pdev)
  3009. {
  3010. struct ieee80211_hw *hw = pci_get_drvdata(pdev);
  3011. struct mwl8k_priv *priv;
  3012. int i;
  3013. if (hw == NULL)
  3014. return;
  3015. priv = hw->priv;
  3016. ieee80211_stop_queues(hw);
  3017. /* Remove tx reclaim tasklet */
  3018. tasklet_kill(&priv->tx_reclaim_task);
  3019. /* Stop config thread */
  3020. destroy_workqueue(priv->config_wq);
  3021. /* Stop hardware */
  3022. mwl8k_hw_reset(priv);
  3023. /* Return all skbs to mac80211 */
  3024. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3025. mwl8k_txq_reclaim(hw, i, 1);
  3026. ieee80211_unregister_hw(hw);
  3027. for (i = 0; i < MWL8K_TX_QUEUES; i++)
  3028. mwl8k_txq_deinit(hw, i);
  3029. mwl8k_rxq_deinit(hw, 0);
  3030. pci_free_consistent(priv->pdev, 4,
  3031. priv->cookie, priv->cookie_dma);
  3032. pci_iounmap(pdev, priv->regs);
  3033. pci_set_drvdata(pdev, NULL);
  3034. ieee80211_free_hw(hw);
  3035. pci_release_regions(pdev);
  3036. pci_disable_device(pdev);
  3037. }
  3038. static struct pci_driver mwl8k_driver = {
  3039. .name = MWL8K_NAME,
  3040. .id_table = mwl8k_table,
  3041. .probe = mwl8k_probe,
  3042. .remove = __devexit_p(mwl8k_remove),
  3043. .shutdown = __devexit_p(mwl8k_shutdown),
  3044. };
  3045. static int __init mwl8k_init(void)
  3046. {
  3047. return pci_register_driver(&mwl8k_driver);
  3048. }
  3049. static void __exit mwl8k_exit(void)
  3050. {
  3051. pci_unregister_driver(&mwl8k_driver);
  3052. }
  3053. module_init(mwl8k_init);
  3054. module_exit(mwl8k_exit);