smc911x.c 58 KB

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  1. /*
  2. * smc911x.c
  3. * This is a driver for SMSC's LAN911{5,6,7,8} single-chip Ethernet devices.
  4. *
  5. * Copyright (C) 2005 Sensoria Corp
  6. * Derived from the unified SMC91x driver by Nicolas Pitre
  7. * and the smsc911x.c reference driver by SMSC
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  22. *
  23. * Arguments:
  24. * watchdog = TX watchdog timeout
  25. * tx_fifo_kb = Size of TX FIFO in KB
  26. *
  27. * History:
  28. * 04/16/05 Dustin McIntire Initial version
  29. */
  30. static const char version[] =
  31. "smc911x.c: v1.0 04-16-2005 by Dustin McIntire <dustin@sensoria.com>\n";
  32. /* Debugging options */
  33. #define ENABLE_SMC_DEBUG_RX 0
  34. #define ENABLE_SMC_DEBUG_TX 0
  35. #define ENABLE_SMC_DEBUG_DMA 0
  36. #define ENABLE_SMC_DEBUG_PKTS 0
  37. #define ENABLE_SMC_DEBUG_MISC 0
  38. #define ENABLE_SMC_DEBUG_FUNC 0
  39. #define SMC_DEBUG_RX ((ENABLE_SMC_DEBUG_RX ? 1 : 0) << 0)
  40. #define SMC_DEBUG_TX ((ENABLE_SMC_DEBUG_TX ? 1 : 0) << 1)
  41. #define SMC_DEBUG_DMA ((ENABLE_SMC_DEBUG_DMA ? 1 : 0) << 2)
  42. #define SMC_DEBUG_PKTS ((ENABLE_SMC_DEBUG_PKTS ? 1 : 0) << 3)
  43. #define SMC_DEBUG_MISC ((ENABLE_SMC_DEBUG_MISC ? 1 : 0) << 4)
  44. #define SMC_DEBUG_FUNC ((ENABLE_SMC_DEBUG_FUNC ? 1 : 0) << 5)
  45. #ifndef SMC_DEBUG
  46. #define SMC_DEBUG ( SMC_DEBUG_RX | \
  47. SMC_DEBUG_TX | \
  48. SMC_DEBUG_DMA | \
  49. SMC_DEBUG_PKTS | \
  50. SMC_DEBUG_MISC | \
  51. SMC_DEBUG_FUNC \
  52. )
  53. #endif
  54. #include <linux/init.h>
  55. #include <linux/module.h>
  56. #include <linux/kernel.h>
  57. #include <linux/sched.h>
  58. #include <linux/slab.h>
  59. #include <linux/delay.h>
  60. #include <linux/interrupt.h>
  61. #include <linux/errno.h>
  62. #include <linux/ioport.h>
  63. #include <linux/crc32.h>
  64. #include <linux/device.h>
  65. #include <linux/platform_device.h>
  66. #include <linux/spinlock.h>
  67. #include <linux/ethtool.h>
  68. #include <linux/mii.h>
  69. #include <linux/workqueue.h>
  70. #include <linux/netdevice.h>
  71. #include <linux/etherdevice.h>
  72. #include <linux/skbuff.h>
  73. #include <asm/io.h>
  74. #include "smc911x.h"
  75. /*
  76. * Transmit timeout, default 5 seconds.
  77. */
  78. static int watchdog = 5000;
  79. module_param(watchdog, int, 0400);
  80. MODULE_PARM_DESC(watchdog, "transmit timeout in milliseconds");
  81. static int tx_fifo_kb=8;
  82. module_param(tx_fifo_kb, int, 0400);
  83. MODULE_PARM_DESC(tx_fifo_kb,"transmit FIFO size in KB (1<x<15)(default=8)");
  84. MODULE_LICENSE("GPL");
  85. MODULE_ALIAS("platform:smc911x");
  86. /*
  87. * The internal workings of the driver. If you are changing anything
  88. * here with the SMC stuff, you should have the datasheet and know
  89. * what you are doing.
  90. */
  91. #define CARDNAME "smc911x"
  92. /*
  93. * Use power-down feature of the chip
  94. */
  95. #define POWER_DOWN 1
  96. #if SMC_DEBUG > 0
  97. #define DBG(n, args...) \
  98. do { \
  99. if (SMC_DEBUG & (n)) \
  100. printk(args); \
  101. } while (0)
  102. #define PRINTK(args...) printk(args)
  103. #else
  104. #define DBG(n, args...) do { } while (0)
  105. #define PRINTK(args...) printk(KERN_DEBUG args)
  106. #endif
  107. #if SMC_DEBUG_PKTS > 0
  108. static void PRINT_PKT(u_char *buf, int length)
  109. {
  110. int i;
  111. int remainder;
  112. int lines;
  113. lines = length / 16;
  114. remainder = length % 16;
  115. for (i = 0; i < lines ; i ++) {
  116. int cur;
  117. for (cur = 0; cur < 8; cur++) {
  118. u_char a, b;
  119. a = *buf++;
  120. b = *buf++;
  121. printk("%02x%02x ", a, b);
  122. }
  123. printk("\n");
  124. }
  125. for (i = 0; i < remainder/2 ; i++) {
  126. u_char a, b;
  127. a = *buf++;
  128. b = *buf++;
  129. printk("%02x%02x ", a, b);
  130. }
  131. printk("\n");
  132. }
  133. #else
  134. #define PRINT_PKT(x...) do { } while (0)
  135. #endif
  136. /* this enables an interrupt in the interrupt mask register */
  137. #define SMC_ENABLE_INT(lp, x) do { \
  138. unsigned int __mask; \
  139. __mask = SMC_GET_INT_EN((lp)); \
  140. __mask |= (x); \
  141. SMC_SET_INT_EN((lp), __mask); \
  142. } while (0)
  143. /* this disables an interrupt from the interrupt mask register */
  144. #define SMC_DISABLE_INT(lp, x) do { \
  145. unsigned int __mask; \
  146. __mask = SMC_GET_INT_EN((lp)); \
  147. __mask &= ~(x); \
  148. SMC_SET_INT_EN((lp), __mask); \
  149. } while (0)
  150. /*
  151. * this does a soft reset on the device
  152. */
  153. static void smc911x_reset(struct net_device *dev)
  154. {
  155. struct smc911x_local *lp = netdev_priv(dev);
  156. unsigned int reg, timeout=0, resets=1, irq_cfg;
  157. unsigned long flags;
  158. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  159. /* Take out of PM setting first */
  160. if ((SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_) == 0) {
  161. /* Write to the bytetest will take out of powerdown */
  162. SMC_SET_BYTE_TEST(lp, 0);
  163. timeout=10;
  164. do {
  165. udelay(10);
  166. reg = SMC_GET_PMT_CTRL(lp) & PMT_CTRL_READY_;
  167. } while (--timeout && !reg);
  168. if (timeout == 0) {
  169. PRINTK("%s: smc911x_reset timeout waiting for PM restore\n", dev->name);
  170. return;
  171. }
  172. }
  173. /* Disable all interrupts */
  174. spin_lock_irqsave(&lp->lock, flags);
  175. SMC_SET_INT_EN(lp, 0);
  176. spin_unlock_irqrestore(&lp->lock, flags);
  177. while (resets--) {
  178. SMC_SET_HW_CFG(lp, HW_CFG_SRST_);
  179. timeout=10;
  180. do {
  181. udelay(10);
  182. reg = SMC_GET_HW_CFG(lp);
  183. /* If chip indicates reset timeout then try again */
  184. if (reg & HW_CFG_SRST_TO_) {
  185. PRINTK("%s: chip reset timeout, retrying...\n", dev->name);
  186. resets++;
  187. break;
  188. }
  189. } while (--timeout && (reg & HW_CFG_SRST_));
  190. }
  191. if (timeout == 0) {
  192. PRINTK("%s: smc911x_reset timeout waiting for reset\n", dev->name);
  193. return;
  194. }
  195. /* make sure EEPROM has finished loading before setting GPIO_CFG */
  196. timeout=1000;
  197. while (--timeout && (SMC_GET_E2P_CMD(lp) & E2P_CMD_EPC_BUSY_))
  198. udelay(10);
  199. if (timeout == 0){
  200. PRINTK("%s: smc911x_reset timeout waiting for EEPROM busy\n", dev->name);
  201. return;
  202. }
  203. /* Initialize interrupts */
  204. SMC_SET_INT_EN(lp, 0);
  205. SMC_ACK_INT(lp, -1);
  206. /* Reset the FIFO level and flow control settings */
  207. SMC_SET_HW_CFG(lp, (lp->tx_fifo_kb & 0xF) << 16);
  208. //TODO: Figure out what appropriate pause time is
  209. SMC_SET_FLOW(lp, FLOW_FCPT_ | FLOW_FCEN_);
  210. SMC_SET_AFC_CFG(lp, lp->afc_cfg);
  211. /* Set to LED outputs */
  212. SMC_SET_GPIO_CFG(lp, 0x70070000);
  213. /*
  214. * Deassert IRQ for 1*10us for edge type interrupts
  215. * and drive IRQ pin push-pull
  216. */
  217. irq_cfg = (1 << 24) | INT_CFG_IRQ_EN_ | INT_CFG_IRQ_TYPE_;
  218. #ifdef SMC_DYNAMIC_BUS_CONFIG
  219. if (lp->cfg.irq_polarity)
  220. irq_cfg |= INT_CFG_IRQ_POL_;
  221. #endif
  222. SMC_SET_IRQ_CFG(lp, irq_cfg);
  223. /* clear anything saved */
  224. if (lp->pending_tx_skb != NULL) {
  225. dev_kfree_skb (lp->pending_tx_skb);
  226. lp->pending_tx_skb = NULL;
  227. dev->stats.tx_errors++;
  228. dev->stats.tx_aborted_errors++;
  229. }
  230. }
  231. /*
  232. * Enable Interrupts, Receive, and Transmit
  233. */
  234. static void smc911x_enable(struct net_device *dev)
  235. {
  236. struct smc911x_local *lp = netdev_priv(dev);
  237. unsigned mask, cfg, cr;
  238. unsigned long flags;
  239. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  240. spin_lock_irqsave(&lp->lock, flags);
  241. SMC_SET_MAC_ADDR(lp, dev->dev_addr);
  242. /* Enable TX */
  243. cfg = SMC_GET_HW_CFG(lp);
  244. cfg &= HW_CFG_TX_FIF_SZ_ | 0xFFF;
  245. cfg |= HW_CFG_SF_;
  246. SMC_SET_HW_CFG(lp, cfg);
  247. SMC_SET_FIFO_TDA(lp, 0xFF);
  248. /* Update TX stats on every 64 packets received or every 1 sec */
  249. SMC_SET_FIFO_TSL(lp, 64);
  250. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  251. SMC_GET_MAC_CR(lp, cr);
  252. cr |= MAC_CR_TXEN_ | MAC_CR_HBDIS_;
  253. SMC_SET_MAC_CR(lp, cr);
  254. SMC_SET_TX_CFG(lp, TX_CFG_TX_ON_);
  255. /* Add 2 byte padding to start of packets */
  256. SMC_SET_RX_CFG(lp, (2<<8) & RX_CFG_RXDOFF_);
  257. /* Turn on receiver and enable RX */
  258. if (cr & MAC_CR_RXEN_)
  259. DBG(SMC_DEBUG_RX, "%s: Receiver already enabled\n", dev->name);
  260. SMC_SET_MAC_CR(lp, cr | MAC_CR_RXEN_);
  261. /* Interrupt on every received packet */
  262. SMC_SET_FIFO_RSA(lp, 0x01);
  263. SMC_SET_FIFO_RSL(lp, 0x00);
  264. /* now, enable interrupts */
  265. mask = INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_ | INT_EN_RSFL_EN_ |
  266. INT_EN_GPT_INT_EN_ | INT_EN_RXDFH_INT_EN_ | INT_EN_RXE_EN_ |
  267. INT_EN_PHY_INT_EN_;
  268. if (IS_REV_A(lp->revision))
  269. mask|=INT_EN_RDFL_EN_;
  270. else {
  271. mask|=INT_EN_RDFO_EN_;
  272. }
  273. SMC_ENABLE_INT(lp, mask);
  274. spin_unlock_irqrestore(&lp->lock, flags);
  275. }
  276. /*
  277. * this puts the device in an inactive state
  278. */
  279. static void smc911x_shutdown(struct net_device *dev)
  280. {
  281. struct smc911x_local *lp = netdev_priv(dev);
  282. unsigned cr;
  283. unsigned long flags;
  284. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", CARDNAME, __func__);
  285. /* Disable IRQ's */
  286. SMC_SET_INT_EN(lp, 0);
  287. /* Turn of Rx and TX */
  288. spin_lock_irqsave(&lp->lock, flags);
  289. SMC_GET_MAC_CR(lp, cr);
  290. cr &= ~(MAC_CR_TXEN_ | MAC_CR_RXEN_ | MAC_CR_HBDIS_);
  291. SMC_SET_MAC_CR(lp, cr);
  292. SMC_SET_TX_CFG(lp, TX_CFG_STOP_TX_);
  293. spin_unlock_irqrestore(&lp->lock, flags);
  294. }
  295. static inline void smc911x_drop_pkt(struct net_device *dev)
  296. {
  297. struct smc911x_local *lp = netdev_priv(dev);
  298. unsigned int fifo_count, timeout, reg;
  299. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n", CARDNAME, __func__);
  300. fifo_count = SMC_GET_RX_FIFO_INF(lp) & 0xFFFF;
  301. if (fifo_count <= 4) {
  302. /* Manually dump the packet data */
  303. while (fifo_count--)
  304. SMC_GET_RX_FIFO(lp);
  305. } else {
  306. /* Fast forward through the bad packet */
  307. SMC_SET_RX_DP_CTRL(lp, RX_DP_CTRL_FFWD_BUSY_);
  308. timeout=50;
  309. do {
  310. udelay(10);
  311. reg = SMC_GET_RX_DP_CTRL(lp) & RX_DP_CTRL_FFWD_BUSY_;
  312. } while (--timeout && reg);
  313. if (timeout == 0) {
  314. PRINTK("%s: timeout waiting for RX fast forward\n", dev->name);
  315. }
  316. }
  317. }
  318. /*
  319. * This is the procedure to handle the receipt of a packet.
  320. * It should be called after checking for packet presence in
  321. * the RX status FIFO. It must be called with the spin lock
  322. * already held.
  323. */
  324. static inline void smc911x_rcv(struct net_device *dev)
  325. {
  326. struct smc911x_local *lp = netdev_priv(dev);
  327. unsigned int pkt_len, status;
  328. struct sk_buff *skb;
  329. unsigned char *data;
  330. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_RX, "%s: --> %s\n",
  331. dev->name, __func__);
  332. status = SMC_GET_RX_STS_FIFO(lp);
  333. DBG(SMC_DEBUG_RX, "%s: Rx pkt len %d status 0x%08x \n",
  334. dev->name, (status & 0x3fff0000) >> 16, status & 0xc000ffff);
  335. pkt_len = (status & RX_STS_PKT_LEN_) >> 16;
  336. if (status & RX_STS_ES_) {
  337. /* Deal with a bad packet */
  338. dev->stats.rx_errors++;
  339. if (status & RX_STS_CRC_ERR_)
  340. dev->stats.rx_crc_errors++;
  341. else {
  342. if (status & RX_STS_LEN_ERR_)
  343. dev->stats.rx_length_errors++;
  344. if (status & RX_STS_MCAST_)
  345. dev->stats.multicast++;
  346. }
  347. /* Remove the bad packet data from the RX FIFO */
  348. smc911x_drop_pkt(dev);
  349. } else {
  350. /* Receive a valid packet */
  351. /* Alloc a buffer with extra room for DMA alignment */
  352. skb=dev_alloc_skb(pkt_len+32);
  353. if (unlikely(skb == NULL)) {
  354. PRINTK( "%s: Low memory, rcvd packet dropped.\n",
  355. dev->name);
  356. dev->stats.rx_dropped++;
  357. smc911x_drop_pkt(dev);
  358. return;
  359. }
  360. /* Align IP header to 32 bits
  361. * Note that the device is configured to add a 2
  362. * byte padding to the packet start, so we really
  363. * want to write to the orignal data pointer */
  364. data = skb->data;
  365. skb_reserve(skb, 2);
  366. skb_put(skb,pkt_len-4);
  367. #ifdef SMC_USE_DMA
  368. {
  369. unsigned int fifo;
  370. /* Lower the FIFO threshold if possible */
  371. fifo = SMC_GET_FIFO_INT(lp);
  372. if (fifo & 0xFF) fifo--;
  373. DBG(SMC_DEBUG_RX, "%s: Setting RX stat FIFO threshold to %d\n",
  374. dev->name, fifo & 0xff);
  375. SMC_SET_FIFO_INT(lp, fifo);
  376. /* Setup RX DMA */
  377. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN16_ | ((2<<8) & RX_CFG_RXDOFF_));
  378. lp->rxdma_active = 1;
  379. lp->current_rx_skb = skb;
  380. SMC_PULL_DATA(lp, data, (pkt_len+2+15) & ~15);
  381. /* Packet processing deferred to DMA RX interrupt */
  382. }
  383. #else
  384. SMC_SET_RX_CFG(lp, RX_CFG_RX_END_ALGN4_ | ((2<<8) & RX_CFG_RXDOFF_));
  385. SMC_PULL_DATA(lp, data, pkt_len+2+3);
  386. DBG(SMC_DEBUG_PKTS, "%s: Received packet\n", dev->name);
  387. PRINT_PKT(data, ((pkt_len - 4) <= 64) ? pkt_len - 4 : 64);
  388. skb->protocol = eth_type_trans(skb, dev);
  389. netif_rx(skb);
  390. dev->stats.rx_packets++;
  391. dev->stats.rx_bytes += pkt_len-4;
  392. #endif
  393. }
  394. }
  395. /*
  396. * This is called to actually send a packet to the chip.
  397. */
  398. static void smc911x_hardware_send_pkt(struct net_device *dev)
  399. {
  400. struct smc911x_local *lp = netdev_priv(dev);
  401. struct sk_buff *skb;
  402. unsigned int cmdA, cmdB, len;
  403. unsigned char *buf;
  404. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n", dev->name, __func__);
  405. BUG_ON(lp->pending_tx_skb == NULL);
  406. skb = lp->pending_tx_skb;
  407. lp->pending_tx_skb = NULL;
  408. /* cmdA {25:24] data alignment [20:16] start offset [10:0] buffer length */
  409. /* cmdB {31:16] pkt tag [10:0] length */
  410. #ifdef SMC_USE_DMA
  411. /* 16 byte buffer alignment mode */
  412. buf = (char*)((u32)(skb->data) & ~0xF);
  413. len = (skb->len + 0xF + ((u32)skb->data & 0xF)) & ~0xF;
  414. cmdA = (1<<24) | (((u32)skb->data & 0xF)<<16) |
  415. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  416. skb->len;
  417. #else
  418. buf = (char*)((u32)skb->data & ~0x3);
  419. len = (skb->len + 3 + ((u32)skb->data & 3)) & ~0x3;
  420. cmdA = (((u32)skb->data & 0x3) << 16) |
  421. TX_CMD_A_INT_FIRST_SEG_ | TX_CMD_A_INT_LAST_SEG_ |
  422. skb->len;
  423. #endif
  424. /* tag is packet length so we can use this in stats update later */
  425. cmdB = (skb->len << 16) | (skb->len & 0x7FF);
  426. DBG(SMC_DEBUG_TX, "%s: TX PKT LENGTH 0x%04x (%d) BUF 0x%p CMDA 0x%08x CMDB 0x%08x\n",
  427. dev->name, len, len, buf, cmdA, cmdB);
  428. SMC_SET_TX_FIFO(lp, cmdA);
  429. SMC_SET_TX_FIFO(lp, cmdB);
  430. DBG(SMC_DEBUG_PKTS, "%s: Transmitted packet\n", dev->name);
  431. PRINT_PKT(buf, len <= 64 ? len : 64);
  432. /* Send pkt via PIO or DMA */
  433. #ifdef SMC_USE_DMA
  434. lp->current_tx_skb = skb;
  435. SMC_PUSH_DATA(lp, buf, len);
  436. /* DMA complete IRQ will free buffer and set jiffies */
  437. #else
  438. SMC_PUSH_DATA(lp, buf, len);
  439. dev->trans_start = jiffies;
  440. dev_kfree_skb_irq(skb);
  441. #endif
  442. if (!lp->tx_throttle) {
  443. netif_wake_queue(dev);
  444. }
  445. SMC_ENABLE_INT(lp, INT_EN_TDFA_EN_ | INT_EN_TSFL_EN_);
  446. }
  447. /*
  448. * Since I am not sure if I will have enough room in the chip's ram
  449. * to store the packet, I call this routine which either sends it
  450. * now, or set the card to generates an interrupt when ready
  451. * for the packet.
  452. */
  453. static int smc911x_hard_start_xmit(struct sk_buff *skb, struct net_device *dev)
  454. {
  455. struct smc911x_local *lp = netdev_priv(dev);
  456. unsigned int free;
  457. unsigned long flags;
  458. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  459. dev->name, __func__);
  460. spin_lock_irqsave(&lp->lock, flags);
  461. BUG_ON(lp->pending_tx_skb != NULL);
  462. free = SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TDFREE_;
  463. DBG(SMC_DEBUG_TX, "%s: TX free space %d\n", dev->name, free);
  464. /* Turn off the flow when running out of space in FIFO */
  465. if (free <= SMC911X_TX_FIFO_LOW_THRESHOLD) {
  466. DBG(SMC_DEBUG_TX, "%s: Disabling data flow due to low FIFO space (%d)\n",
  467. dev->name, free);
  468. /* Reenable when at least 1 packet of size MTU present */
  469. SMC_SET_FIFO_TDA(lp, (SMC911X_TX_FIFO_LOW_THRESHOLD)/64);
  470. lp->tx_throttle = 1;
  471. netif_stop_queue(dev);
  472. }
  473. /* Drop packets when we run out of space in TX FIFO
  474. * Account for overhead required for:
  475. *
  476. * Tx command words 8 bytes
  477. * Start offset 15 bytes
  478. * End padding 15 bytes
  479. */
  480. if (unlikely(free < (skb->len + 8 + 15 + 15))) {
  481. printk("%s: No Tx free space %d < %d\n",
  482. dev->name, free, skb->len);
  483. lp->pending_tx_skb = NULL;
  484. dev->stats.tx_errors++;
  485. dev->stats.tx_dropped++;
  486. spin_unlock_irqrestore(&lp->lock, flags);
  487. dev_kfree_skb(skb);
  488. return 0;
  489. }
  490. #ifdef SMC_USE_DMA
  491. {
  492. /* If the DMA is already running then defer this packet Tx until
  493. * the DMA IRQ starts it
  494. */
  495. if (lp->txdma_active) {
  496. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Tx DMA running, deferring packet\n", dev->name);
  497. lp->pending_tx_skb = skb;
  498. netif_stop_queue(dev);
  499. spin_unlock_irqrestore(&lp->lock, flags);
  500. return 0;
  501. } else {
  502. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: Activating Tx DMA\n", dev->name);
  503. lp->txdma_active = 1;
  504. }
  505. }
  506. #endif
  507. lp->pending_tx_skb = skb;
  508. smc911x_hardware_send_pkt(dev);
  509. spin_unlock_irqrestore(&lp->lock, flags);
  510. return 0;
  511. }
  512. /*
  513. * This handles a TX status interrupt, which is only called when:
  514. * - a TX error occurred, or
  515. * - TX of a packet completed.
  516. */
  517. static void smc911x_tx(struct net_device *dev)
  518. {
  519. struct smc911x_local *lp = netdev_priv(dev);
  520. unsigned int tx_status;
  521. DBG(SMC_DEBUG_FUNC | SMC_DEBUG_TX, "%s: --> %s\n",
  522. dev->name, __func__);
  523. /* Collect the TX status */
  524. while (((SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16) != 0) {
  525. DBG(SMC_DEBUG_TX, "%s: Tx stat FIFO used 0x%04x\n",
  526. dev->name,
  527. (SMC_GET_TX_FIFO_INF(lp) & TX_FIFO_INF_TSUSED_) >> 16);
  528. tx_status = SMC_GET_TX_STS_FIFO(lp);
  529. dev->stats.tx_packets++;
  530. dev->stats.tx_bytes+=tx_status>>16;
  531. DBG(SMC_DEBUG_TX, "%s: Tx FIFO tag 0x%04x status 0x%04x\n",
  532. dev->name, (tx_status & 0xffff0000) >> 16,
  533. tx_status & 0x0000ffff);
  534. /* count Tx errors, but ignore lost carrier errors when in
  535. * full-duplex mode */
  536. if ((tx_status & TX_STS_ES_) && !(lp->ctl_rfduplx &&
  537. !(tx_status & 0x00000306))) {
  538. dev->stats.tx_errors++;
  539. }
  540. if (tx_status & TX_STS_MANY_COLL_) {
  541. dev->stats.collisions+=16;
  542. dev->stats.tx_aborted_errors++;
  543. } else {
  544. dev->stats.collisions+=(tx_status & TX_STS_COLL_CNT_) >> 3;
  545. }
  546. /* carrier error only has meaning for half-duplex communication */
  547. if ((tx_status & (TX_STS_LOC_ | TX_STS_NO_CARR_)) &&
  548. !lp->ctl_rfduplx) {
  549. dev->stats.tx_carrier_errors++;
  550. }
  551. if (tx_status & TX_STS_LATE_COLL_) {
  552. dev->stats.collisions++;
  553. dev->stats.tx_aborted_errors++;
  554. }
  555. }
  556. }
  557. /*---PHY CONTROL AND CONFIGURATION-----------------------------------------*/
  558. /*
  559. * Reads a register from the MII Management serial interface
  560. */
  561. static int smc911x_phy_read(struct net_device *dev, int phyaddr, int phyreg)
  562. {
  563. struct smc911x_local *lp = netdev_priv(dev);
  564. unsigned int phydata;
  565. SMC_GET_MII(lp, phyreg, phyaddr, phydata);
  566. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%02x, phydata=0x%04x\n",
  567. __func__, phyaddr, phyreg, phydata);
  568. return phydata;
  569. }
  570. /*
  571. * Writes a register to the MII Management serial interface
  572. */
  573. static void smc911x_phy_write(struct net_device *dev, int phyaddr, int phyreg,
  574. int phydata)
  575. {
  576. struct smc911x_local *lp = netdev_priv(dev);
  577. DBG(SMC_DEBUG_MISC, "%s: phyaddr=0x%x, phyreg=0x%x, phydata=0x%x\n",
  578. __func__, phyaddr, phyreg, phydata);
  579. SMC_SET_MII(lp, phyreg, phyaddr, phydata);
  580. }
  581. /*
  582. * Finds and reports the PHY address (115 and 117 have external
  583. * PHY interface 118 has internal only
  584. */
  585. static void smc911x_phy_detect(struct net_device *dev)
  586. {
  587. struct smc911x_local *lp = netdev_priv(dev);
  588. int phyaddr;
  589. unsigned int cfg, id1, id2;
  590. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  591. lp->phy_type = 0;
  592. /*
  593. * Scan all 32 PHY addresses if necessary, starting at
  594. * PHY#1 to PHY#31, and then PHY#0 last.
  595. */
  596. switch(lp->version) {
  597. case CHIP_9115:
  598. case CHIP_9117:
  599. case CHIP_9215:
  600. case CHIP_9217:
  601. cfg = SMC_GET_HW_CFG(lp);
  602. if (cfg & HW_CFG_EXT_PHY_DET_) {
  603. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  604. cfg |= HW_CFG_PHY_CLK_SEL_CLK_DIS_;
  605. SMC_SET_HW_CFG(lp, cfg);
  606. udelay(10); /* Wait for clocks to stop */
  607. cfg |= HW_CFG_EXT_PHY_EN_;
  608. SMC_SET_HW_CFG(lp, cfg);
  609. udelay(10); /* Wait for clocks to stop */
  610. cfg &= ~HW_CFG_PHY_CLK_SEL_;
  611. cfg |= HW_CFG_PHY_CLK_SEL_EXT_PHY_;
  612. SMC_SET_HW_CFG(lp, cfg);
  613. udelay(10); /* Wait for clocks to stop */
  614. cfg |= HW_CFG_SMI_SEL_;
  615. SMC_SET_HW_CFG(lp, cfg);
  616. for (phyaddr = 1; phyaddr < 32; ++phyaddr) {
  617. /* Read the PHY identifiers */
  618. SMC_GET_PHY_ID1(lp, phyaddr & 31, id1);
  619. SMC_GET_PHY_ID2(lp, phyaddr & 31, id2);
  620. /* Make sure it is a valid identifier */
  621. if (id1 != 0x0000 && id1 != 0xffff &&
  622. id1 != 0x8000 && id2 != 0x0000 &&
  623. id2 != 0xffff && id2 != 0x8000) {
  624. /* Save the PHY's address */
  625. lp->mii.phy_id = phyaddr & 31;
  626. lp->phy_type = id1 << 16 | id2;
  627. break;
  628. }
  629. }
  630. if (phyaddr < 32)
  631. /* Found an external PHY */
  632. break;
  633. }
  634. default:
  635. /* Internal media only */
  636. SMC_GET_PHY_ID1(lp, 1, id1);
  637. SMC_GET_PHY_ID2(lp, 1, id2);
  638. /* Save the PHY's address */
  639. lp->mii.phy_id = 1;
  640. lp->phy_type = id1 << 16 | id2;
  641. }
  642. DBG(SMC_DEBUG_MISC, "%s: phy_id1=0x%x, phy_id2=0x%x phyaddr=0x%d\n",
  643. dev->name, id1, id2, lp->mii.phy_id);
  644. }
  645. /*
  646. * Sets the PHY to a configuration as determined by the user.
  647. * Called with spin_lock held.
  648. */
  649. static int smc911x_phy_fixed(struct net_device *dev)
  650. {
  651. struct smc911x_local *lp = netdev_priv(dev);
  652. int phyaddr = lp->mii.phy_id;
  653. int bmcr;
  654. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  655. /* Enter Link Disable state */
  656. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  657. bmcr |= BMCR_PDOWN;
  658. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  659. /*
  660. * Set our fixed capabilities
  661. * Disable auto-negotiation
  662. */
  663. bmcr &= ~BMCR_ANENABLE;
  664. if (lp->ctl_rfduplx)
  665. bmcr |= BMCR_FULLDPLX;
  666. if (lp->ctl_rspeed == 100)
  667. bmcr |= BMCR_SPEED100;
  668. /* Write our capabilities to the phy control register */
  669. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  670. /* Re-Configure the Receive/Phy Control register */
  671. bmcr &= ~BMCR_PDOWN;
  672. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  673. return 1;
  674. }
  675. /*
  676. * smc911x_phy_reset - reset the phy
  677. * @dev: net device
  678. * @phy: phy address
  679. *
  680. * Issue a software reset for the specified PHY and
  681. * wait up to 100ms for the reset to complete. We should
  682. * not access the PHY for 50ms after issuing the reset.
  683. *
  684. * The time to wait appears to be dependent on the PHY.
  685. *
  686. */
  687. static int smc911x_phy_reset(struct net_device *dev, int phy)
  688. {
  689. struct smc911x_local *lp = netdev_priv(dev);
  690. int timeout;
  691. unsigned long flags;
  692. unsigned int reg;
  693. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  694. spin_lock_irqsave(&lp->lock, flags);
  695. reg = SMC_GET_PMT_CTRL(lp);
  696. reg &= ~0xfffff030;
  697. reg |= PMT_CTRL_PHY_RST_;
  698. SMC_SET_PMT_CTRL(lp, reg);
  699. spin_unlock_irqrestore(&lp->lock, flags);
  700. for (timeout = 2; timeout; timeout--) {
  701. msleep(50);
  702. spin_lock_irqsave(&lp->lock, flags);
  703. reg = SMC_GET_PMT_CTRL(lp);
  704. spin_unlock_irqrestore(&lp->lock, flags);
  705. if (!(reg & PMT_CTRL_PHY_RST_)) {
  706. /* extra delay required because the phy may
  707. * not be completed with its reset
  708. * when PHY_BCR_RESET_ is cleared. 256us
  709. * should suffice, but use 500us to be safe
  710. */
  711. udelay(500);
  712. break;
  713. }
  714. }
  715. return reg & PMT_CTRL_PHY_RST_;
  716. }
  717. /*
  718. * smc911x_phy_powerdown - powerdown phy
  719. * @dev: net device
  720. * @phy: phy address
  721. *
  722. * Power down the specified PHY
  723. */
  724. static void smc911x_phy_powerdown(struct net_device *dev, int phy)
  725. {
  726. struct smc911x_local *lp = netdev_priv(dev);
  727. unsigned int bmcr;
  728. /* Enter Link Disable state */
  729. SMC_GET_PHY_BMCR(lp, phy, bmcr);
  730. bmcr |= BMCR_PDOWN;
  731. SMC_SET_PHY_BMCR(lp, phy, bmcr);
  732. }
  733. /*
  734. * smc911x_phy_check_media - check the media status and adjust BMCR
  735. * @dev: net device
  736. * @init: set true for initialisation
  737. *
  738. * Select duplex mode depending on negotiation state. This
  739. * also updates our carrier state.
  740. */
  741. static void smc911x_phy_check_media(struct net_device *dev, int init)
  742. {
  743. struct smc911x_local *lp = netdev_priv(dev);
  744. int phyaddr = lp->mii.phy_id;
  745. unsigned int bmcr, cr;
  746. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  747. if (mii_check_media(&lp->mii, netif_msg_link(lp), init)) {
  748. /* duplex state has changed */
  749. SMC_GET_PHY_BMCR(lp, phyaddr, bmcr);
  750. SMC_GET_MAC_CR(lp, cr);
  751. if (lp->mii.full_duplex) {
  752. DBG(SMC_DEBUG_MISC, "%s: Configuring for full-duplex mode\n", dev->name);
  753. bmcr |= BMCR_FULLDPLX;
  754. cr |= MAC_CR_RCVOWN_;
  755. } else {
  756. DBG(SMC_DEBUG_MISC, "%s: Configuring for half-duplex mode\n", dev->name);
  757. bmcr &= ~BMCR_FULLDPLX;
  758. cr &= ~MAC_CR_RCVOWN_;
  759. }
  760. SMC_SET_PHY_BMCR(lp, phyaddr, bmcr);
  761. SMC_SET_MAC_CR(lp, cr);
  762. }
  763. }
  764. /*
  765. * Configures the specified PHY through the MII management interface
  766. * using Autonegotiation.
  767. * Calls smc911x_phy_fixed() if the user has requested a certain config.
  768. * If RPC ANEG bit is set, the media selection is dependent purely on
  769. * the selection by the MII (either in the MII BMCR reg or the result
  770. * of autonegotiation.) If the RPC ANEG bit is cleared, the selection
  771. * is controlled by the RPC SPEED and RPC DPLX bits.
  772. */
  773. static void smc911x_phy_configure(struct work_struct *work)
  774. {
  775. struct smc911x_local *lp = container_of(work, struct smc911x_local,
  776. phy_configure);
  777. struct net_device *dev = lp->netdev;
  778. int phyaddr = lp->mii.phy_id;
  779. int my_phy_caps; /* My PHY capabilities */
  780. int my_ad_caps; /* My Advertised capabilities */
  781. int status;
  782. unsigned long flags;
  783. DBG(SMC_DEBUG_FUNC, "%s: --> %s()\n", dev->name, __func__);
  784. /*
  785. * We should not be called if phy_type is zero.
  786. */
  787. if (lp->phy_type == 0)
  788. return;
  789. if (smc911x_phy_reset(dev, phyaddr)) {
  790. printk("%s: PHY reset timed out\n", dev->name);
  791. return;
  792. }
  793. spin_lock_irqsave(&lp->lock, flags);
  794. /*
  795. * Enable PHY Interrupts (for register 18)
  796. * Interrupts listed here are enabled
  797. */
  798. SMC_SET_PHY_INT_MASK(lp, phyaddr, PHY_INT_MASK_ENERGY_ON_ |
  799. PHY_INT_MASK_ANEG_COMP_ | PHY_INT_MASK_REMOTE_FAULT_ |
  800. PHY_INT_MASK_LINK_DOWN_);
  801. /* If the user requested no auto neg, then go set his request */
  802. if (lp->mii.force_media) {
  803. smc911x_phy_fixed(dev);
  804. goto smc911x_phy_configure_exit;
  805. }
  806. /* Copy our capabilities from MII_BMSR to MII_ADVERTISE */
  807. SMC_GET_PHY_BMSR(lp, phyaddr, my_phy_caps);
  808. if (!(my_phy_caps & BMSR_ANEGCAPABLE)) {
  809. printk(KERN_INFO "Auto negotiation NOT supported\n");
  810. smc911x_phy_fixed(dev);
  811. goto smc911x_phy_configure_exit;
  812. }
  813. /* CSMA capable w/ both pauses */
  814. my_ad_caps = ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | ADVERTISE_PAUSE_ASYM;
  815. if (my_phy_caps & BMSR_100BASE4)
  816. my_ad_caps |= ADVERTISE_100BASE4;
  817. if (my_phy_caps & BMSR_100FULL)
  818. my_ad_caps |= ADVERTISE_100FULL;
  819. if (my_phy_caps & BMSR_100HALF)
  820. my_ad_caps |= ADVERTISE_100HALF;
  821. if (my_phy_caps & BMSR_10FULL)
  822. my_ad_caps |= ADVERTISE_10FULL;
  823. if (my_phy_caps & BMSR_10HALF)
  824. my_ad_caps |= ADVERTISE_10HALF;
  825. /* Disable capabilities not selected by our user */
  826. if (lp->ctl_rspeed != 100)
  827. my_ad_caps &= ~(ADVERTISE_100BASE4|ADVERTISE_100FULL|ADVERTISE_100HALF);
  828. if (!lp->ctl_rfduplx)
  829. my_ad_caps &= ~(ADVERTISE_100FULL|ADVERTISE_10FULL);
  830. /* Update our Auto-Neg Advertisement Register */
  831. SMC_SET_PHY_MII_ADV(lp, phyaddr, my_ad_caps);
  832. lp->mii.advertising = my_ad_caps;
  833. /*
  834. * Read the register back. Without this, it appears that when
  835. * auto-negotiation is restarted, sometimes it isn't ready and
  836. * the link does not come up.
  837. */
  838. udelay(10);
  839. SMC_GET_PHY_MII_ADV(lp, phyaddr, status);
  840. DBG(SMC_DEBUG_MISC, "%s: phy caps=0x%04x\n", dev->name, my_phy_caps);
  841. DBG(SMC_DEBUG_MISC, "%s: phy advertised caps=0x%04x\n", dev->name, my_ad_caps);
  842. /* Restart auto-negotiation process in order to advertise my caps */
  843. SMC_SET_PHY_BMCR(lp, phyaddr, BMCR_ANENABLE | BMCR_ANRESTART);
  844. smc911x_phy_check_media(dev, 1);
  845. smc911x_phy_configure_exit:
  846. spin_unlock_irqrestore(&lp->lock, flags);
  847. }
  848. /*
  849. * smc911x_phy_interrupt
  850. *
  851. * Purpose: Handle interrupts relating to PHY register 18. This is
  852. * called from the "hard" interrupt handler under our private spinlock.
  853. */
  854. static void smc911x_phy_interrupt(struct net_device *dev)
  855. {
  856. struct smc911x_local *lp = netdev_priv(dev);
  857. int phyaddr = lp->mii.phy_id;
  858. int status;
  859. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  860. if (lp->phy_type == 0)
  861. return;
  862. smc911x_phy_check_media(dev, 0);
  863. /* read to clear status bits */
  864. SMC_GET_PHY_INT_SRC(lp, phyaddr,status);
  865. DBG(SMC_DEBUG_MISC, "%s: PHY interrupt status 0x%04x\n",
  866. dev->name, status & 0xffff);
  867. DBG(SMC_DEBUG_MISC, "%s: AFC_CFG 0x%08x\n",
  868. dev->name, SMC_GET_AFC_CFG(lp));
  869. }
  870. /*--- END PHY CONTROL AND CONFIGURATION-------------------------------------*/
  871. /*
  872. * This is the main routine of the driver, to handle the device when
  873. * it needs some attention.
  874. */
  875. static irqreturn_t smc911x_interrupt(int irq, void *dev_id)
  876. {
  877. struct net_device *dev = dev_id;
  878. struct smc911x_local *lp = netdev_priv(dev);
  879. unsigned int status, mask, timeout;
  880. unsigned int rx_overrun=0, cr, pkts;
  881. unsigned long flags;
  882. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  883. spin_lock_irqsave(&lp->lock, flags);
  884. /* Spurious interrupt check */
  885. if ((SMC_GET_IRQ_CFG(lp) & (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) !=
  886. (INT_CFG_IRQ_INT_ | INT_CFG_IRQ_EN_)) {
  887. spin_unlock_irqrestore(&lp->lock, flags);
  888. return IRQ_NONE;
  889. }
  890. mask = SMC_GET_INT_EN(lp);
  891. SMC_SET_INT_EN(lp, 0);
  892. /* set a timeout value, so I don't stay here forever */
  893. timeout = 8;
  894. do {
  895. status = SMC_GET_INT(lp);
  896. DBG(SMC_DEBUG_MISC, "%s: INT 0x%08x MASK 0x%08x OUTSIDE MASK 0x%08x\n",
  897. dev->name, status, mask, status & ~mask);
  898. status &= mask;
  899. if (!status)
  900. break;
  901. /* Handle SW interrupt condition */
  902. if (status & INT_STS_SW_INT_) {
  903. SMC_ACK_INT(lp, INT_STS_SW_INT_);
  904. mask &= ~INT_EN_SW_INT_EN_;
  905. }
  906. /* Handle various error conditions */
  907. if (status & INT_STS_RXE_) {
  908. SMC_ACK_INT(lp, INT_STS_RXE_);
  909. dev->stats.rx_errors++;
  910. }
  911. if (status & INT_STS_RXDFH_INT_) {
  912. SMC_ACK_INT(lp, INT_STS_RXDFH_INT_);
  913. dev->stats.rx_dropped+=SMC_GET_RX_DROP(lp);
  914. }
  915. /* Undocumented interrupt-what is the right thing to do here? */
  916. if (status & INT_STS_RXDF_INT_) {
  917. SMC_ACK_INT(lp, INT_STS_RXDF_INT_);
  918. }
  919. /* Rx Data FIFO exceeds set level */
  920. if (status & INT_STS_RDFL_) {
  921. if (IS_REV_A(lp->revision)) {
  922. rx_overrun=1;
  923. SMC_GET_MAC_CR(lp, cr);
  924. cr &= ~MAC_CR_RXEN_;
  925. SMC_SET_MAC_CR(lp, cr);
  926. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  927. dev->stats.rx_errors++;
  928. dev->stats.rx_fifo_errors++;
  929. }
  930. SMC_ACK_INT(lp, INT_STS_RDFL_);
  931. }
  932. if (status & INT_STS_RDFO_) {
  933. if (!IS_REV_A(lp->revision)) {
  934. SMC_GET_MAC_CR(lp, cr);
  935. cr &= ~MAC_CR_RXEN_;
  936. SMC_SET_MAC_CR(lp, cr);
  937. rx_overrun=1;
  938. DBG(SMC_DEBUG_RX, "%s: RX overrun\n", dev->name);
  939. dev->stats.rx_errors++;
  940. dev->stats.rx_fifo_errors++;
  941. }
  942. SMC_ACK_INT(lp, INT_STS_RDFO_);
  943. }
  944. /* Handle receive condition */
  945. if ((status & INT_STS_RSFL_) || rx_overrun) {
  946. unsigned int fifo;
  947. DBG(SMC_DEBUG_RX, "%s: RX irq\n", dev->name);
  948. fifo = SMC_GET_RX_FIFO_INF(lp);
  949. pkts = (fifo & RX_FIFO_INF_RXSUSED_) >> 16;
  950. DBG(SMC_DEBUG_RX, "%s: Rx FIFO pkts %d, bytes %d\n",
  951. dev->name, pkts, fifo & 0xFFFF );
  952. if (pkts != 0) {
  953. #ifdef SMC_USE_DMA
  954. unsigned int fifo;
  955. if (lp->rxdma_active){
  956. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  957. "%s: RX DMA active\n", dev->name);
  958. /* The DMA is already running so up the IRQ threshold */
  959. fifo = SMC_GET_FIFO_INT(lp) & ~0xFF;
  960. fifo |= pkts & 0xFF;
  961. DBG(SMC_DEBUG_RX,
  962. "%s: Setting RX stat FIFO threshold to %d\n",
  963. dev->name, fifo & 0xff);
  964. SMC_SET_FIFO_INT(lp, fifo);
  965. } else
  966. #endif
  967. smc911x_rcv(dev);
  968. }
  969. SMC_ACK_INT(lp, INT_STS_RSFL_);
  970. }
  971. /* Handle transmit FIFO available */
  972. if (status & INT_STS_TDFA_) {
  973. DBG(SMC_DEBUG_TX, "%s: TX data FIFO space available irq\n", dev->name);
  974. SMC_SET_FIFO_TDA(lp, 0xFF);
  975. lp->tx_throttle = 0;
  976. #ifdef SMC_USE_DMA
  977. if (!lp->txdma_active)
  978. #endif
  979. netif_wake_queue(dev);
  980. SMC_ACK_INT(lp, INT_STS_TDFA_);
  981. }
  982. /* Handle transmit done condition */
  983. #if 1
  984. if (status & (INT_STS_TSFL_ | INT_STS_GPT_INT_)) {
  985. DBG(SMC_DEBUG_TX | SMC_DEBUG_MISC,
  986. "%s: Tx stat FIFO limit (%d) /GPT irq\n",
  987. dev->name, (SMC_GET_FIFO_INT(lp) & 0x00ff0000) >> 16);
  988. smc911x_tx(dev);
  989. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  990. SMC_ACK_INT(lp, INT_STS_TSFL_);
  991. SMC_ACK_INT(lp, INT_STS_TSFL_ | INT_STS_GPT_INT_);
  992. }
  993. #else
  994. if (status & INT_STS_TSFL_) {
  995. DBG(SMC_DEBUG_TX, "%s: TX status FIFO limit (%d) irq \n", dev->name, );
  996. smc911x_tx(dev);
  997. SMC_ACK_INT(lp, INT_STS_TSFL_);
  998. }
  999. if (status & INT_STS_GPT_INT_) {
  1000. DBG(SMC_DEBUG_RX, "%s: IRQ_CFG 0x%08x FIFO_INT 0x%08x RX_CFG 0x%08x\n",
  1001. dev->name,
  1002. SMC_GET_IRQ_CFG(lp),
  1003. SMC_GET_FIFO_INT(lp),
  1004. SMC_GET_RX_CFG(lp));
  1005. DBG(SMC_DEBUG_RX, "%s: Rx Stat FIFO Used 0x%02x "
  1006. "Data FIFO Used 0x%04x Stat FIFO 0x%08x\n",
  1007. dev->name,
  1008. (SMC_GET_RX_FIFO_INF(lp) & 0x00ff0000) >> 16,
  1009. SMC_GET_RX_FIFO_INF(lp) & 0xffff,
  1010. SMC_GET_RX_STS_FIFO_PEEK(lp));
  1011. SMC_SET_GPT_CFG(lp, GPT_CFG_TIMER_EN_ | 10000);
  1012. SMC_ACK_INT(lp, INT_STS_GPT_INT_);
  1013. }
  1014. #endif
  1015. /* Handle PHY interrupt condition */
  1016. if (status & INT_STS_PHY_INT_) {
  1017. DBG(SMC_DEBUG_MISC, "%s: PHY irq\n", dev->name);
  1018. smc911x_phy_interrupt(dev);
  1019. SMC_ACK_INT(lp, INT_STS_PHY_INT_);
  1020. }
  1021. } while (--timeout);
  1022. /* restore mask state */
  1023. SMC_SET_INT_EN(lp, mask);
  1024. DBG(SMC_DEBUG_MISC, "%s: Interrupt done (%d loops)\n",
  1025. dev->name, 8-timeout);
  1026. spin_unlock_irqrestore(&lp->lock, flags);
  1027. return IRQ_HANDLED;
  1028. }
  1029. #ifdef SMC_USE_DMA
  1030. static void
  1031. smc911x_tx_dma_irq(int dma, void *data)
  1032. {
  1033. struct net_device *dev = (struct net_device *)data;
  1034. struct smc911x_local *lp = netdev_priv(dev);
  1035. struct sk_buff *skb = lp->current_tx_skb;
  1036. unsigned long flags;
  1037. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1038. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA, "%s: TX DMA irq handler\n", dev->name);
  1039. /* Clear the DMA interrupt sources */
  1040. SMC_DMA_ACK_IRQ(dev, dma);
  1041. BUG_ON(skb == NULL);
  1042. dma_unmap_single(NULL, tx_dmabuf, tx_dmalen, DMA_TO_DEVICE);
  1043. dev->trans_start = jiffies;
  1044. dev_kfree_skb_irq(skb);
  1045. lp->current_tx_skb = NULL;
  1046. if (lp->pending_tx_skb != NULL)
  1047. smc911x_hardware_send_pkt(dev);
  1048. else {
  1049. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1050. "%s: No pending Tx packets. DMA disabled\n", dev->name);
  1051. spin_lock_irqsave(&lp->lock, flags);
  1052. lp->txdma_active = 0;
  1053. if (!lp->tx_throttle) {
  1054. netif_wake_queue(dev);
  1055. }
  1056. spin_unlock_irqrestore(&lp->lock, flags);
  1057. }
  1058. DBG(SMC_DEBUG_TX | SMC_DEBUG_DMA,
  1059. "%s: TX DMA irq completed\n", dev->name);
  1060. }
  1061. static void
  1062. smc911x_rx_dma_irq(int dma, void *data)
  1063. {
  1064. struct net_device *dev = (struct net_device *)data;
  1065. unsigned long ioaddr = dev->base_addr;
  1066. struct smc911x_local *lp = netdev_priv(dev);
  1067. struct sk_buff *skb = lp->current_rx_skb;
  1068. unsigned long flags;
  1069. unsigned int pkts;
  1070. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1071. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA, "%s: RX DMA irq handler\n", dev->name);
  1072. /* Clear the DMA interrupt sources */
  1073. SMC_DMA_ACK_IRQ(dev, dma);
  1074. dma_unmap_single(NULL, rx_dmabuf, rx_dmalen, DMA_FROM_DEVICE);
  1075. BUG_ON(skb == NULL);
  1076. lp->current_rx_skb = NULL;
  1077. PRINT_PKT(skb->data, skb->len);
  1078. skb->protocol = eth_type_trans(skb, dev);
  1079. dev->stats.rx_packets++;
  1080. dev->stats.rx_bytes += skb->len;
  1081. netif_rx(skb);
  1082. spin_lock_irqsave(&lp->lock, flags);
  1083. pkts = (SMC_GET_RX_FIFO_INF(lp) & RX_FIFO_INF_RXSUSED_) >> 16;
  1084. if (pkts != 0) {
  1085. smc911x_rcv(dev);
  1086. }else {
  1087. lp->rxdma_active = 0;
  1088. }
  1089. spin_unlock_irqrestore(&lp->lock, flags);
  1090. DBG(SMC_DEBUG_RX | SMC_DEBUG_DMA,
  1091. "%s: RX DMA irq completed. DMA RX FIFO PKTS %d\n",
  1092. dev->name, pkts);
  1093. }
  1094. #endif /* SMC_USE_DMA */
  1095. #ifdef CONFIG_NET_POLL_CONTROLLER
  1096. /*
  1097. * Polling receive - used by netconsole and other diagnostic tools
  1098. * to allow network i/o with interrupts disabled.
  1099. */
  1100. static void smc911x_poll_controller(struct net_device *dev)
  1101. {
  1102. disable_irq(dev->irq);
  1103. smc911x_interrupt(dev->irq, dev);
  1104. enable_irq(dev->irq);
  1105. }
  1106. #endif
  1107. /* Our watchdog timed out. Called by the networking layer */
  1108. static void smc911x_timeout(struct net_device *dev)
  1109. {
  1110. struct smc911x_local *lp = netdev_priv(dev);
  1111. int status, mask;
  1112. unsigned long flags;
  1113. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1114. spin_lock_irqsave(&lp->lock, flags);
  1115. status = SMC_GET_INT(lp);
  1116. mask = SMC_GET_INT_EN(lp);
  1117. spin_unlock_irqrestore(&lp->lock, flags);
  1118. DBG(SMC_DEBUG_MISC, "%s: INT 0x%02x MASK 0x%02x \n",
  1119. dev->name, status, mask);
  1120. /* Dump the current TX FIFO contents and restart */
  1121. mask = SMC_GET_TX_CFG(lp);
  1122. SMC_SET_TX_CFG(lp, mask | TX_CFG_TXS_DUMP_ | TX_CFG_TXD_DUMP_);
  1123. /*
  1124. * Reconfiguring the PHY doesn't seem like a bad idea here, but
  1125. * smc911x_phy_configure() calls msleep() which calls schedule_timeout()
  1126. * which calls schedule(). Hence we use a work queue.
  1127. */
  1128. if (lp->phy_type != 0)
  1129. schedule_work(&lp->phy_configure);
  1130. /* We can accept TX packets again */
  1131. dev->trans_start = jiffies;
  1132. netif_wake_queue(dev);
  1133. }
  1134. /*
  1135. * This routine will, depending on the values passed to it,
  1136. * either make it accept multicast packets, go into
  1137. * promiscuous mode (for TCPDUMP and cousins) or accept
  1138. * a select set of multicast packets
  1139. */
  1140. static void smc911x_set_multicast_list(struct net_device *dev)
  1141. {
  1142. struct smc911x_local *lp = netdev_priv(dev);
  1143. unsigned int multicast_table[2];
  1144. unsigned int mcr, update_multicast = 0;
  1145. unsigned long flags;
  1146. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1147. spin_lock_irqsave(&lp->lock, flags);
  1148. SMC_GET_MAC_CR(lp, mcr);
  1149. spin_unlock_irqrestore(&lp->lock, flags);
  1150. if (dev->flags & IFF_PROMISC) {
  1151. DBG(SMC_DEBUG_MISC, "%s: RCR_PRMS\n", dev->name);
  1152. mcr |= MAC_CR_PRMS_;
  1153. }
  1154. /*
  1155. * Here, I am setting this to accept all multicast packets.
  1156. * I don't need to zero the multicast table, because the flag is
  1157. * checked before the table is
  1158. */
  1159. else if (dev->flags & IFF_ALLMULTI || dev->mc_count > 16) {
  1160. DBG(SMC_DEBUG_MISC, "%s: RCR_ALMUL\n", dev->name);
  1161. mcr |= MAC_CR_MCPAS_;
  1162. }
  1163. /*
  1164. * This sets the internal hardware table to filter out unwanted
  1165. * multicast packets before they take up memory.
  1166. *
  1167. * The SMC chip uses a hash table where the high 6 bits of the CRC of
  1168. * address are the offset into the table. If that bit is 1, then the
  1169. * multicast packet is accepted. Otherwise, it's dropped silently.
  1170. *
  1171. * To use the 6 bits as an offset into the table, the high 1 bit is
  1172. * the number of the 32 bit register, while the low 5 bits are the bit
  1173. * within that register.
  1174. */
  1175. else if (dev->mc_count) {
  1176. int i;
  1177. struct dev_mc_list *cur_addr;
  1178. /* Set the Hash perfec mode */
  1179. mcr |= MAC_CR_HPFILT_;
  1180. /* start with a table of all zeros: reject all */
  1181. memset(multicast_table, 0, sizeof(multicast_table));
  1182. cur_addr = dev->mc_list;
  1183. for (i = 0; i < dev->mc_count; i++, cur_addr = cur_addr->next) {
  1184. u32 position;
  1185. /* do we have a pointer here? */
  1186. if (!cur_addr)
  1187. break;
  1188. /* make sure this is a multicast address -
  1189. shouldn't this be a given if we have it here ? */
  1190. if (!(*cur_addr->dmi_addr & 1))
  1191. continue;
  1192. /* upper 6 bits are used as hash index */
  1193. position = ether_crc(ETH_ALEN, cur_addr->dmi_addr)>>26;
  1194. multicast_table[position>>5] |= 1 << (position&0x1f);
  1195. }
  1196. /* be sure I get rid of flags I might have set */
  1197. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1198. /* now, the table can be loaded into the chipset */
  1199. update_multicast = 1;
  1200. } else {
  1201. DBG(SMC_DEBUG_MISC, "%s: ~(MAC_CR_PRMS_|MAC_CR_MCPAS_)\n",
  1202. dev->name);
  1203. mcr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_);
  1204. /*
  1205. * since I'm disabling all multicast entirely, I need to
  1206. * clear the multicast list
  1207. */
  1208. memset(multicast_table, 0, sizeof(multicast_table));
  1209. update_multicast = 1;
  1210. }
  1211. spin_lock_irqsave(&lp->lock, flags);
  1212. SMC_SET_MAC_CR(lp, mcr);
  1213. if (update_multicast) {
  1214. DBG(SMC_DEBUG_MISC,
  1215. "%s: update mcast hash table 0x%08x 0x%08x\n",
  1216. dev->name, multicast_table[0], multicast_table[1]);
  1217. SMC_SET_HASHL(lp, multicast_table[0]);
  1218. SMC_SET_HASHH(lp, multicast_table[1]);
  1219. }
  1220. spin_unlock_irqrestore(&lp->lock, flags);
  1221. }
  1222. /*
  1223. * Open and Initialize the board
  1224. *
  1225. * Set up everything, reset the card, etc..
  1226. */
  1227. static int
  1228. smc911x_open(struct net_device *dev)
  1229. {
  1230. struct smc911x_local *lp = netdev_priv(dev);
  1231. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1232. /*
  1233. * Check that the address is valid. If its not, refuse
  1234. * to bring the device up. The user must specify an
  1235. * address using ifconfig eth0 hw ether xx:xx:xx:xx:xx:xx
  1236. */
  1237. if (!is_valid_ether_addr(dev->dev_addr)) {
  1238. PRINTK("%s: no valid ethernet hw addr\n", __func__);
  1239. return -EINVAL;
  1240. }
  1241. /* reset the hardware */
  1242. smc911x_reset(dev);
  1243. /* Configure the PHY, initialize the link state */
  1244. smc911x_phy_configure(&lp->phy_configure);
  1245. /* Turn on Tx + Rx */
  1246. smc911x_enable(dev);
  1247. netif_start_queue(dev);
  1248. return 0;
  1249. }
  1250. /*
  1251. * smc911x_close
  1252. *
  1253. * this makes the board clean up everything that it can
  1254. * and not talk to the outside world. Caused by
  1255. * an 'ifconfig ethX down'
  1256. */
  1257. static int smc911x_close(struct net_device *dev)
  1258. {
  1259. struct smc911x_local *lp = netdev_priv(dev);
  1260. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1261. netif_stop_queue(dev);
  1262. netif_carrier_off(dev);
  1263. /* clear everything */
  1264. smc911x_shutdown(dev);
  1265. if (lp->phy_type != 0) {
  1266. /* We need to ensure that no calls to
  1267. * smc911x_phy_configure are pending.
  1268. */
  1269. cancel_work_sync(&lp->phy_configure);
  1270. smc911x_phy_powerdown(dev, lp->mii.phy_id);
  1271. }
  1272. if (lp->pending_tx_skb) {
  1273. dev_kfree_skb(lp->pending_tx_skb);
  1274. lp->pending_tx_skb = NULL;
  1275. }
  1276. return 0;
  1277. }
  1278. /*
  1279. * Ethtool support
  1280. */
  1281. static int
  1282. smc911x_ethtool_getsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1283. {
  1284. struct smc911x_local *lp = netdev_priv(dev);
  1285. int ret, status;
  1286. unsigned long flags;
  1287. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1288. cmd->maxtxpkt = 1;
  1289. cmd->maxrxpkt = 1;
  1290. if (lp->phy_type != 0) {
  1291. spin_lock_irqsave(&lp->lock, flags);
  1292. ret = mii_ethtool_gset(&lp->mii, cmd);
  1293. spin_unlock_irqrestore(&lp->lock, flags);
  1294. } else {
  1295. cmd->supported = SUPPORTED_10baseT_Half |
  1296. SUPPORTED_10baseT_Full |
  1297. SUPPORTED_TP | SUPPORTED_AUI;
  1298. if (lp->ctl_rspeed == 10)
  1299. cmd->speed = SPEED_10;
  1300. else if (lp->ctl_rspeed == 100)
  1301. cmd->speed = SPEED_100;
  1302. cmd->autoneg = AUTONEG_DISABLE;
  1303. if (lp->mii.phy_id==1)
  1304. cmd->transceiver = XCVR_INTERNAL;
  1305. else
  1306. cmd->transceiver = XCVR_EXTERNAL;
  1307. cmd->port = 0;
  1308. SMC_GET_PHY_SPECIAL(lp, lp->mii.phy_id, status);
  1309. cmd->duplex =
  1310. (status & (PHY_SPECIAL_SPD_10FULL_ | PHY_SPECIAL_SPD_100FULL_)) ?
  1311. DUPLEX_FULL : DUPLEX_HALF;
  1312. ret = 0;
  1313. }
  1314. return ret;
  1315. }
  1316. static int
  1317. smc911x_ethtool_setsettings(struct net_device *dev, struct ethtool_cmd *cmd)
  1318. {
  1319. struct smc911x_local *lp = netdev_priv(dev);
  1320. int ret;
  1321. unsigned long flags;
  1322. if (lp->phy_type != 0) {
  1323. spin_lock_irqsave(&lp->lock, flags);
  1324. ret = mii_ethtool_sset(&lp->mii, cmd);
  1325. spin_unlock_irqrestore(&lp->lock, flags);
  1326. } else {
  1327. if (cmd->autoneg != AUTONEG_DISABLE ||
  1328. cmd->speed != SPEED_10 ||
  1329. (cmd->duplex != DUPLEX_HALF && cmd->duplex != DUPLEX_FULL) ||
  1330. (cmd->port != PORT_TP && cmd->port != PORT_AUI))
  1331. return -EINVAL;
  1332. lp->ctl_rfduplx = cmd->duplex == DUPLEX_FULL;
  1333. ret = 0;
  1334. }
  1335. return ret;
  1336. }
  1337. static void
  1338. smc911x_ethtool_getdrvinfo(struct net_device *dev, struct ethtool_drvinfo *info)
  1339. {
  1340. strncpy(info->driver, CARDNAME, sizeof(info->driver));
  1341. strncpy(info->version, version, sizeof(info->version));
  1342. strncpy(info->bus_info, dev_name(dev->dev.parent), sizeof(info->bus_info));
  1343. }
  1344. static int smc911x_ethtool_nwayreset(struct net_device *dev)
  1345. {
  1346. struct smc911x_local *lp = netdev_priv(dev);
  1347. int ret = -EINVAL;
  1348. unsigned long flags;
  1349. if (lp->phy_type != 0) {
  1350. spin_lock_irqsave(&lp->lock, flags);
  1351. ret = mii_nway_restart(&lp->mii);
  1352. spin_unlock_irqrestore(&lp->lock, flags);
  1353. }
  1354. return ret;
  1355. }
  1356. static u32 smc911x_ethtool_getmsglevel(struct net_device *dev)
  1357. {
  1358. struct smc911x_local *lp = netdev_priv(dev);
  1359. return lp->msg_enable;
  1360. }
  1361. static void smc911x_ethtool_setmsglevel(struct net_device *dev, u32 level)
  1362. {
  1363. struct smc911x_local *lp = netdev_priv(dev);
  1364. lp->msg_enable = level;
  1365. }
  1366. static int smc911x_ethtool_getregslen(struct net_device *dev)
  1367. {
  1368. /* System regs + MAC regs + PHY regs */
  1369. return (((E2P_CMD - ID_REV)/4 + 1) +
  1370. (WUCSR - MAC_CR)+1 + 32) * sizeof(u32);
  1371. }
  1372. static void smc911x_ethtool_getregs(struct net_device *dev,
  1373. struct ethtool_regs* regs, void *buf)
  1374. {
  1375. struct smc911x_local *lp = netdev_priv(dev);
  1376. unsigned long flags;
  1377. u32 reg,i,j=0;
  1378. u32 *data = (u32*)buf;
  1379. regs->version = lp->version;
  1380. for(i=ID_REV;i<=E2P_CMD;i+=4) {
  1381. data[j++] = SMC_inl(lp, i);
  1382. }
  1383. for(i=MAC_CR;i<=WUCSR;i++) {
  1384. spin_lock_irqsave(&lp->lock, flags);
  1385. SMC_GET_MAC_CSR(lp, i, reg);
  1386. spin_unlock_irqrestore(&lp->lock, flags);
  1387. data[j++] = reg;
  1388. }
  1389. for(i=0;i<=31;i++) {
  1390. spin_lock_irqsave(&lp->lock, flags);
  1391. SMC_GET_MII(lp, i, lp->mii.phy_id, reg);
  1392. spin_unlock_irqrestore(&lp->lock, flags);
  1393. data[j++] = reg & 0xFFFF;
  1394. }
  1395. }
  1396. static int smc911x_ethtool_wait_eeprom_ready(struct net_device *dev)
  1397. {
  1398. struct smc911x_local *lp = netdev_priv(dev);
  1399. unsigned int timeout;
  1400. int e2p_cmd;
  1401. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1402. for(timeout=10;(e2p_cmd & E2P_CMD_EPC_BUSY_) && timeout; timeout--) {
  1403. if (e2p_cmd & E2P_CMD_EPC_TIMEOUT_) {
  1404. PRINTK("%s: %s timeout waiting for EEPROM to respond\n",
  1405. dev->name, __func__);
  1406. return -EFAULT;
  1407. }
  1408. mdelay(1);
  1409. e2p_cmd = SMC_GET_E2P_CMD(lp);
  1410. }
  1411. if (timeout == 0) {
  1412. PRINTK("%s: %s timeout waiting for EEPROM CMD not busy\n",
  1413. dev->name, __func__);
  1414. return -ETIMEDOUT;
  1415. }
  1416. return 0;
  1417. }
  1418. static inline int smc911x_ethtool_write_eeprom_cmd(struct net_device *dev,
  1419. int cmd, int addr)
  1420. {
  1421. struct smc911x_local *lp = netdev_priv(dev);
  1422. int ret;
  1423. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1424. return ret;
  1425. SMC_SET_E2P_CMD(lp, E2P_CMD_EPC_BUSY_ |
  1426. ((cmd) & (0x7<<28)) |
  1427. ((addr) & 0xFF));
  1428. return 0;
  1429. }
  1430. static inline int smc911x_ethtool_read_eeprom_byte(struct net_device *dev,
  1431. u8 *data)
  1432. {
  1433. struct smc911x_local *lp = netdev_priv(dev);
  1434. int ret;
  1435. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1436. return ret;
  1437. *data = SMC_GET_E2P_DATA(lp);
  1438. return 0;
  1439. }
  1440. static inline int smc911x_ethtool_write_eeprom_byte(struct net_device *dev,
  1441. u8 data)
  1442. {
  1443. struct smc911x_local *lp = netdev_priv(dev);
  1444. int ret;
  1445. if ((ret = smc911x_ethtool_wait_eeprom_ready(dev))!=0)
  1446. return ret;
  1447. SMC_SET_E2P_DATA(lp, data);
  1448. return 0;
  1449. }
  1450. static int smc911x_ethtool_geteeprom(struct net_device *dev,
  1451. struct ethtool_eeprom *eeprom, u8 *data)
  1452. {
  1453. u8 eebuf[SMC911X_EEPROM_LEN];
  1454. int i, ret;
  1455. for(i=0;i<SMC911X_EEPROM_LEN;i++) {
  1456. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_READ_, i ))!=0)
  1457. return ret;
  1458. if ((ret=smc911x_ethtool_read_eeprom_byte(dev, &eebuf[i]))!=0)
  1459. return ret;
  1460. }
  1461. memcpy(data, eebuf+eeprom->offset, eeprom->len);
  1462. return 0;
  1463. }
  1464. static int smc911x_ethtool_seteeprom(struct net_device *dev,
  1465. struct ethtool_eeprom *eeprom, u8 *data)
  1466. {
  1467. int i, ret;
  1468. /* Enable erase */
  1469. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_EWEN_, 0 ))!=0)
  1470. return ret;
  1471. for(i=eeprom->offset;i<(eeprom->offset+eeprom->len);i++) {
  1472. /* erase byte */
  1473. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_ERASE_, i ))!=0)
  1474. return ret;
  1475. /* write byte */
  1476. if ((ret=smc911x_ethtool_write_eeprom_byte(dev, *data))!=0)
  1477. return ret;
  1478. if ((ret=smc911x_ethtool_write_eeprom_cmd(dev, E2P_CMD_EPC_CMD_WRITE_, i ))!=0)
  1479. return ret;
  1480. }
  1481. return 0;
  1482. }
  1483. static int smc911x_ethtool_geteeprom_len(struct net_device *dev)
  1484. {
  1485. return SMC911X_EEPROM_LEN;
  1486. }
  1487. static const struct ethtool_ops smc911x_ethtool_ops = {
  1488. .get_settings = smc911x_ethtool_getsettings,
  1489. .set_settings = smc911x_ethtool_setsettings,
  1490. .get_drvinfo = smc911x_ethtool_getdrvinfo,
  1491. .get_msglevel = smc911x_ethtool_getmsglevel,
  1492. .set_msglevel = smc911x_ethtool_setmsglevel,
  1493. .nway_reset = smc911x_ethtool_nwayreset,
  1494. .get_link = ethtool_op_get_link,
  1495. .get_regs_len = smc911x_ethtool_getregslen,
  1496. .get_regs = smc911x_ethtool_getregs,
  1497. .get_eeprom_len = smc911x_ethtool_geteeprom_len,
  1498. .get_eeprom = smc911x_ethtool_geteeprom,
  1499. .set_eeprom = smc911x_ethtool_seteeprom,
  1500. };
  1501. /*
  1502. * smc911x_findirq
  1503. *
  1504. * This routine has a simple purpose -- make the SMC chip generate an
  1505. * interrupt, so an auto-detect routine can detect it, and find the IRQ,
  1506. */
  1507. static int __devinit smc911x_findirq(struct net_device *dev)
  1508. {
  1509. struct smc911x_local *lp = netdev_priv(dev);
  1510. int timeout = 20;
  1511. unsigned long cookie;
  1512. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1513. cookie = probe_irq_on();
  1514. /*
  1515. * Force a SW interrupt
  1516. */
  1517. SMC_SET_INT_EN(lp, INT_EN_SW_INT_EN_);
  1518. /*
  1519. * Wait until positive that the interrupt has been generated
  1520. */
  1521. do {
  1522. int int_status;
  1523. udelay(10);
  1524. int_status = SMC_GET_INT_EN(lp);
  1525. if (int_status & INT_EN_SW_INT_EN_)
  1526. break; /* got the interrupt */
  1527. } while (--timeout);
  1528. /*
  1529. * there is really nothing that I can do here if timeout fails,
  1530. * as autoirq_report will return a 0 anyway, which is what I
  1531. * want in this case. Plus, the clean up is needed in both
  1532. * cases.
  1533. */
  1534. /* and disable all interrupts again */
  1535. SMC_SET_INT_EN(lp, 0);
  1536. /* and return what I found */
  1537. return probe_irq_off(cookie);
  1538. }
  1539. static const struct net_device_ops smc911x_netdev_ops = {
  1540. .ndo_open = smc911x_open,
  1541. .ndo_stop = smc911x_close,
  1542. .ndo_start_xmit = smc911x_hard_start_xmit,
  1543. .ndo_tx_timeout = smc911x_timeout,
  1544. .ndo_set_multicast_list = smc911x_set_multicast_list,
  1545. .ndo_change_mtu = eth_change_mtu,
  1546. .ndo_validate_addr = eth_validate_addr,
  1547. .ndo_set_mac_address = eth_mac_addr,
  1548. #ifdef CONFIG_NET_POLL_CONTROLLER
  1549. .ndo_poll_controller = smc911x_poll_controller,
  1550. #endif
  1551. };
  1552. /*
  1553. * Function: smc911x_probe(unsigned long ioaddr)
  1554. *
  1555. * Purpose:
  1556. * Tests to see if a given ioaddr points to an SMC911x chip.
  1557. * Returns a 0 on success
  1558. *
  1559. * Algorithm:
  1560. * (1) see if the endian word is OK
  1561. * (1) see if I recognize the chip ID in the appropriate register
  1562. *
  1563. * Here I do typical initialization tasks.
  1564. *
  1565. * o Initialize the structure if needed
  1566. * o print out my vanity message if not done so already
  1567. * o print out what type of hardware is detected
  1568. * o print out the ethernet address
  1569. * o find the IRQ
  1570. * o set up my private data
  1571. * o configure the dev structure with my subroutines
  1572. * o actually GRAB the irq.
  1573. * o GRAB the region
  1574. */
  1575. static int __devinit smc911x_probe(struct net_device *dev)
  1576. {
  1577. struct smc911x_local *lp = netdev_priv(dev);
  1578. int i, retval;
  1579. unsigned int val, chip_id, revision;
  1580. const char *version_string;
  1581. unsigned long irq_flags;
  1582. DBG(SMC_DEBUG_FUNC, "%s: --> %s\n", dev->name, __func__);
  1583. /* First, see if the endian word is recognized */
  1584. val = SMC_GET_BYTE_TEST(lp);
  1585. DBG(SMC_DEBUG_MISC, "%s: endian probe returned 0x%04x\n", CARDNAME, val);
  1586. if (val != 0x87654321) {
  1587. printk(KERN_ERR "Invalid chip endian 0x%08x\n",val);
  1588. retval = -ENODEV;
  1589. goto err_out;
  1590. }
  1591. /*
  1592. * check if the revision register is something that I
  1593. * recognize. These might need to be added to later,
  1594. * as future revisions could be added.
  1595. */
  1596. chip_id = SMC_GET_PN(lp);
  1597. DBG(SMC_DEBUG_MISC, "%s: id probe returned 0x%04x\n", CARDNAME, chip_id);
  1598. for(i=0;chip_ids[i].id != 0; i++) {
  1599. if (chip_ids[i].id == chip_id) break;
  1600. }
  1601. if (!chip_ids[i].id) {
  1602. printk(KERN_ERR "Unknown chip ID %04x\n", chip_id);
  1603. retval = -ENODEV;
  1604. goto err_out;
  1605. }
  1606. version_string = chip_ids[i].name;
  1607. revision = SMC_GET_REV(lp);
  1608. DBG(SMC_DEBUG_MISC, "%s: revision = 0x%04x\n", CARDNAME, revision);
  1609. /* At this point I'll assume that the chip is an SMC911x. */
  1610. DBG(SMC_DEBUG_MISC, "%s: Found a %s\n", CARDNAME, chip_ids[i].name);
  1611. /* Validate the TX FIFO size requested */
  1612. if ((tx_fifo_kb < 2) || (tx_fifo_kb > 14)) {
  1613. printk(KERN_ERR "Invalid TX FIFO size requested %d\n", tx_fifo_kb);
  1614. retval = -EINVAL;
  1615. goto err_out;
  1616. }
  1617. /* fill in some of the fields */
  1618. lp->version = chip_ids[i].id;
  1619. lp->revision = revision;
  1620. lp->tx_fifo_kb = tx_fifo_kb;
  1621. /* Reverse calculate the RX FIFO size from the TX */
  1622. lp->tx_fifo_size=(lp->tx_fifo_kb<<10) - 512;
  1623. lp->rx_fifo_size= ((0x4000 - 512 - lp->tx_fifo_size) / 16) * 15;
  1624. /* Set the automatic flow control values */
  1625. switch(lp->tx_fifo_kb) {
  1626. /*
  1627. * AFC_HI is about ((Rx Data Fifo Size)*2/3)/64
  1628. * AFC_LO is AFC_HI/2
  1629. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1630. */
  1631. case 2:/* 13440 Rx Data Fifo Size */
  1632. lp->afc_cfg=0x008C46AF;break;
  1633. case 3:/* 12480 Rx Data Fifo Size */
  1634. lp->afc_cfg=0x0082419F;break;
  1635. case 4:/* 11520 Rx Data Fifo Size */
  1636. lp->afc_cfg=0x00783C9F;break;
  1637. case 5:/* 10560 Rx Data Fifo Size */
  1638. lp->afc_cfg=0x006E374F;break;
  1639. case 6:/* 9600 Rx Data Fifo Size */
  1640. lp->afc_cfg=0x0064328F;break;
  1641. case 7:/* 8640 Rx Data Fifo Size */
  1642. lp->afc_cfg=0x005A2D7F;break;
  1643. case 8:/* 7680 Rx Data Fifo Size */
  1644. lp->afc_cfg=0x0050287F;break;
  1645. case 9:/* 6720 Rx Data Fifo Size */
  1646. lp->afc_cfg=0x0046236F;break;
  1647. case 10:/* 5760 Rx Data Fifo Size */
  1648. lp->afc_cfg=0x003C1E6F;break;
  1649. case 11:/* 4800 Rx Data Fifo Size */
  1650. lp->afc_cfg=0x0032195F;break;
  1651. /*
  1652. * AFC_HI is ~1520 bytes less than RX Data Fifo Size
  1653. * AFC_LO is AFC_HI/2
  1654. * BACK_DUR is about 5uS*(AFC_LO) rounded down
  1655. */
  1656. case 12:/* 3840 Rx Data Fifo Size */
  1657. lp->afc_cfg=0x0024124F;break;
  1658. case 13:/* 2880 Rx Data Fifo Size */
  1659. lp->afc_cfg=0x0015073F;break;
  1660. case 14:/* 1920 Rx Data Fifo Size */
  1661. lp->afc_cfg=0x0006032F;break;
  1662. default:
  1663. PRINTK("%s: ERROR -- no AFC_CFG setting found",
  1664. dev->name);
  1665. break;
  1666. }
  1667. DBG(SMC_DEBUG_MISC | SMC_DEBUG_TX | SMC_DEBUG_RX,
  1668. "%s: tx_fifo %d rx_fifo %d afc_cfg 0x%08x\n", CARDNAME,
  1669. lp->tx_fifo_size, lp->rx_fifo_size, lp->afc_cfg);
  1670. spin_lock_init(&lp->lock);
  1671. /* Get the MAC address */
  1672. SMC_GET_MAC_ADDR(lp, dev->dev_addr);
  1673. /* now, reset the chip, and put it into a known state */
  1674. smc911x_reset(dev);
  1675. /*
  1676. * If dev->irq is 0, then the device has to be banged on to see
  1677. * what the IRQ is.
  1678. *
  1679. * Specifying an IRQ is done with the assumption that the user knows
  1680. * what (s)he is doing. No checking is done!!!!
  1681. */
  1682. if (dev->irq < 1) {
  1683. int trials;
  1684. trials = 3;
  1685. while (trials--) {
  1686. dev->irq = smc911x_findirq(dev);
  1687. if (dev->irq)
  1688. break;
  1689. /* kick the card and try again */
  1690. smc911x_reset(dev);
  1691. }
  1692. }
  1693. if (dev->irq == 0) {
  1694. printk("%s: Couldn't autodetect your IRQ. Use irq=xx.\n",
  1695. dev->name);
  1696. retval = -ENODEV;
  1697. goto err_out;
  1698. }
  1699. dev->irq = irq_canonicalize(dev->irq);
  1700. /* Fill in the fields of the device structure with ethernet values. */
  1701. ether_setup(dev);
  1702. dev->netdev_ops = &smc911x_netdev_ops;
  1703. dev->watchdog_timeo = msecs_to_jiffies(watchdog);
  1704. dev->ethtool_ops = &smc911x_ethtool_ops;
  1705. INIT_WORK(&lp->phy_configure, smc911x_phy_configure);
  1706. lp->mii.phy_id_mask = 0x1f;
  1707. lp->mii.reg_num_mask = 0x1f;
  1708. lp->mii.force_media = 0;
  1709. lp->mii.full_duplex = 0;
  1710. lp->mii.dev = dev;
  1711. lp->mii.mdio_read = smc911x_phy_read;
  1712. lp->mii.mdio_write = smc911x_phy_write;
  1713. /*
  1714. * Locate the phy, if any.
  1715. */
  1716. smc911x_phy_detect(dev);
  1717. /* Set default parameters */
  1718. lp->msg_enable = NETIF_MSG_LINK;
  1719. lp->ctl_rfduplx = 1;
  1720. lp->ctl_rspeed = 100;
  1721. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1722. irq_flags = lp->cfg.irq_flags;
  1723. #else
  1724. irq_flags = IRQF_SHARED | SMC_IRQ_SENSE;
  1725. #endif
  1726. /* Grab the IRQ */
  1727. retval = request_irq(dev->irq, &smc911x_interrupt,
  1728. irq_flags, dev->name, dev);
  1729. if (retval)
  1730. goto err_out;
  1731. #ifdef SMC_USE_DMA
  1732. lp->rxdma = SMC_DMA_REQUEST(dev, smc911x_rx_dma_irq);
  1733. lp->txdma = SMC_DMA_REQUEST(dev, smc911x_tx_dma_irq);
  1734. lp->rxdma_active = 0;
  1735. lp->txdma_active = 0;
  1736. dev->dma = lp->rxdma;
  1737. #endif
  1738. retval = register_netdev(dev);
  1739. if (retval == 0) {
  1740. /* now, print out the card info, in a short format.. */
  1741. printk("%s: %s (rev %d) at %#lx IRQ %d",
  1742. dev->name, version_string, lp->revision,
  1743. dev->base_addr, dev->irq);
  1744. #ifdef SMC_USE_DMA
  1745. if (lp->rxdma != -1)
  1746. printk(" RXDMA %d ", lp->rxdma);
  1747. if (lp->txdma != -1)
  1748. printk("TXDMA %d", lp->txdma);
  1749. #endif
  1750. printk("\n");
  1751. if (!is_valid_ether_addr(dev->dev_addr)) {
  1752. printk("%s: Invalid ethernet MAC address. Please "
  1753. "set using ifconfig\n", dev->name);
  1754. } else {
  1755. /* Print the Ethernet address */
  1756. printk("%s: Ethernet addr: ", dev->name);
  1757. for (i = 0; i < 5; i++)
  1758. printk("%2.2x:", dev->dev_addr[i]);
  1759. printk("%2.2x\n", dev->dev_addr[5]);
  1760. }
  1761. if (lp->phy_type == 0) {
  1762. PRINTK("%s: No PHY found\n", dev->name);
  1763. } else if ((lp->phy_type & ~0xff) == LAN911X_INTERNAL_PHY_ID) {
  1764. PRINTK("%s: LAN911x Internal PHY\n", dev->name);
  1765. } else {
  1766. PRINTK("%s: External PHY 0x%08x\n", dev->name, lp->phy_type);
  1767. }
  1768. }
  1769. err_out:
  1770. #ifdef SMC_USE_DMA
  1771. if (retval) {
  1772. if (lp->rxdma != -1) {
  1773. SMC_DMA_FREE(dev, lp->rxdma);
  1774. }
  1775. if (lp->txdma != -1) {
  1776. SMC_DMA_FREE(dev, lp->txdma);
  1777. }
  1778. }
  1779. #endif
  1780. return retval;
  1781. }
  1782. /*
  1783. * smc911x_init(void)
  1784. *
  1785. * Output:
  1786. * 0 --> there is a device
  1787. * anything else, error
  1788. */
  1789. static int __devinit smc911x_drv_probe(struct platform_device *pdev)
  1790. {
  1791. struct net_device *ndev;
  1792. struct resource *res;
  1793. struct smc911x_local *lp;
  1794. unsigned int *addr;
  1795. int ret;
  1796. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1797. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1798. if (!res) {
  1799. ret = -ENODEV;
  1800. goto out;
  1801. }
  1802. /*
  1803. * Request the regions.
  1804. */
  1805. if (!request_mem_region(res->start, SMC911X_IO_EXTENT, CARDNAME)) {
  1806. ret = -EBUSY;
  1807. goto out;
  1808. }
  1809. ndev = alloc_etherdev(sizeof(struct smc911x_local));
  1810. if (!ndev) {
  1811. printk("%s: could not allocate device.\n", CARDNAME);
  1812. ret = -ENOMEM;
  1813. goto release_1;
  1814. }
  1815. SET_NETDEV_DEV(ndev, &pdev->dev);
  1816. ndev->dma = (unsigned char)-1;
  1817. ndev->irq = platform_get_irq(pdev, 0);
  1818. lp = netdev_priv(ndev);
  1819. lp->netdev = ndev;
  1820. #ifdef SMC_DYNAMIC_BUS_CONFIG
  1821. {
  1822. struct smc911x_platdata *pd = pdev->dev.platform_data;
  1823. if (!pd) {
  1824. ret = -EINVAL;
  1825. goto release_both;
  1826. }
  1827. memcpy(&lp->cfg, pd, sizeof(lp->cfg));
  1828. }
  1829. #endif
  1830. addr = ioremap(res->start, SMC911X_IO_EXTENT);
  1831. if (!addr) {
  1832. ret = -ENOMEM;
  1833. goto release_both;
  1834. }
  1835. platform_set_drvdata(pdev, ndev);
  1836. lp->base = addr;
  1837. ndev->base_addr = res->start;
  1838. ret = smc911x_probe(ndev);
  1839. if (ret != 0) {
  1840. platform_set_drvdata(pdev, NULL);
  1841. iounmap(addr);
  1842. release_both:
  1843. free_netdev(ndev);
  1844. release_1:
  1845. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1846. out:
  1847. printk("%s: not found (%d).\n", CARDNAME, ret);
  1848. }
  1849. #ifdef SMC_USE_DMA
  1850. else {
  1851. lp->physaddr = res->start;
  1852. lp->dev = &pdev->dev;
  1853. }
  1854. #endif
  1855. return ret;
  1856. }
  1857. static int __devexit smc911x_drv_remove(struct platform_device *pdev)
  1858. {
  1859. struct net_device *ndev = platform_get_drvdata(pdev);
  1860. struct smc911x_local *lp = netdev_priv(ndev);
  1861. struct resource *res;
  1862. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1863. platform_set_drvdata(pdev, NULL);
  1864. unregister_netdev(ndev);
  1865. free_irq(ndev->irq, ndev);
  1866. #ifdef SMC_USE_DMA
  1867. {
  1868. if (lp->rxdma != -1) {
  1869. SMC_DMA_FREE(dev, lp->rxdma);
  1870. }
  1871. if (lp->txdma != -1) {
  1872. SMC_DMA_FREE(dev, lp->txdma);
  1873. }
  1874. }
  1875. #endif
  1876. iounmap(lp->base);
  1877. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  1878. release_mem_region(res->start, SMC911X_IO_EXTENT);
  1879. free_netdev(ndev);
  1880. return 0;
  1881. }
  1882. static int smc911x_drv_suspend(struct platform_device *dev, pm_message_t state)
  1883. {
  1884. struct net_device *ndev = platform_get_drvdata(dev);
  1885. struct smc911x_local *lp = netdev_priv(ndev);
  1886. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1887. if (ndev) {
  1888. if (netif_running(ndev)) {
  1889. netif_device_detach(ndev);
  1890. smc911x_shutdown(ndev);
  1891. #if POWER_DOWN
  1892. /* Set D2 - Energy detect only setting */
  1893. SMC_SET_PMT_CTRL(lp, 2<<12);
  1894. #endif
  1895. }
  1896. }
  1897. return 0;
  1898. }
  1899. static int smc911x_drv_resume(struct platform_device *dev)
  1900. {
  1901. struct net_device *ndev = platform_get_drvdata(dev);
  1902. DBG(SMC_DEBUG_FUNC, "--> %s\n", __func__);
  1903. if (ndev) {
  1904. struct smc911x_local *lp = netdev_priv(ndev);
  1905. if (netif_running(ndev)) {
  1906. smc911x_reset(ndev);
  1907. if (lp->phy_type != 0)
  1908. smc911x_phy_configure(&lp->phy_configure);
  1909. smc911x_enable(ndev);
  1910. netif_device_attach(ndev);
  1911. }
  1912. }
  1913. return 0;
  1914. }
  1915. static struct platform_driver smc911x_driver = {
  1916. .probe = smc911x_drv_probe,
  1917. .remove = __devexit_p(smc911x_drv_remove),
  1918. .suspend = smc911x_drv_suspend,
  1919. .resume = smc911x_drv_resume,
  1920. .driver = {
  1921. .name = CARDNAME,
  1922. .owner = THIS_MODULE,
  1923. },
  1924. };
  1925. static int __init smc911x_init(void)
  1926. {
  1927. return platform_driver_register(&smc911x_driver);
  1928. }
  1929. static void __exit smc911x_cleanup(void)
  1930. {
  1931. platform_driver_unregister(&smc911x_driver);
  1932. }
  1933. module_init(smc911x_init);
  1934. module_exit(smc911x_cleanup);