be_main.c 52 KB

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  1. /*
  2. * Copyright (C) 2005 - 2009 ServerEngines
  3. * All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or
  6. * modify it under the terms of the GNU General Public License version 2
  7. * as published by the Free Software Foundation. The full GNU General
  8. * Public License is included in this distribution in the file called COPYING.
  9. *
  10. * Contact Information:
  11. * linux-drivers@serverengines.com
  12. *
  13. * ServerEngines
  14. * 209 N. Fair Oaks Ave
  15. * Sunnyvale, CA 94085
  16. */
  17. #include "be.h"
  18. #include <asm/div64.h>
  19. MODULE_VERSION(DRV_VER);
  20. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  21. MODULE_DESCRIPTION(DRV_DESC " " DRV_VER);
  22. MODULE_AUTHOR("ServerEngines Corporation");
  23. MODULE_LICENSE("GPL");
  24. static unsigned int rx_frag_size = 2048;
  25. module_param(rx_frag_size, uint, S_IRUGO);
  26. MODULE_PARM_DESC(rx_frag_size, "Size of a fragment that holds rcvd data.");
  27. static DEFINE_PCI_DEVICE_TABLE(be_dev_ids) = {
  28. { PCI_DEVICE(BE_VENDOR_ID, BE_DEVICE_ID1) },
  29. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID1) },
  30. { PCI_DEVICE(BE_VENDOR_ID, OC_DEVICE_ID2) },
  31. { 0 }
  32. };
  33. MODULE_DEVICE_TABLE(pci, be_dev_ids);
  34. static void be_queue_free(struct be_adapter *adapter, struct be_queue_info *q)
  35. {
  36. struct be_dma_mem *mem = &q->dma_mem;
  37. if (mem->va)
  38. pci_free_consistent(adapter->pdev, mem->size,
  39. mem->va, mem->dma);
  40. }
  41. static int be_queue_alloc(struct be_adapter *adapter, struct be_queue_info *q,
  42. u16 len, u16 entry_size)
  43. {
  44. struct be_dma_mem *mem = &q->dma_mem;
  45. memset(q, 0, sizeof(*q));
  46. q->len = len;
  47. q->entry_size = entry_size;
  48. mem->size = len * entry_size;
  49. mem->va = pci_alloc_consistent(adapter->pdev, mem->size, &mem->dma);
  50. if (!mem->va)
  51. return -1;
  52. memset(mem->va, 0, mem->size);
  53. return 0;
  54. }
  55. static void be_intr_set(struct be_ctrl_info *ctrl, bool enable)
  56. {
  57. u8 __iomem *addr = ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET;
  58. u32 reg = ioread32(addr);
  59. u32 enabled = reg & MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  60. if (!enabled && enable) {
  61. reg |= MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  62. } else if (enabled && !enable) {
  63. reg &= ~MEMBAR_CTRL_INT_CTRL_HOSTINTR_MASK;
  64. } else {
  65. printk(KERN_WARNING DRV_NAME
  66. ": bad value in membar_int_ctrl reg=0x%x\n", reg);
  67. return;
  68. }
  69. iowrite32(reg, addr);
  70. }
  71. static void be_rxq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  72. {
  73. u32 val = 0;
  74. val |= qid & DB_RQ_RING_ID_MASK;
  75. val |= posted << DB_RQ_NUM_POSTED_SHIFT;
  76. iowrite32(val, ctrl->db + DB_RQ_OFFSET);
  77. }
  78. static void be_txq_notify(struct be_ctrl_info *ctrl, u16 qid, u16 posted)
  79. {
  80. u32 val = 0;
  81. val |= qid & DB_TXULP_RING_ID_MASK;
  82. val |= (posted & DB_TXULP_NUM_POSTED_MASK) << DB_TXULP_NUM_POSTED_SHIFT;
  83. iowrite32(val, ctrl->db + DB_TXULP1_OFFSET);
  84. }
  85. static void be_eq_notify(struct be_ctrl_info *ctrl, u16 qid,
  86. bool arm, bool clear_int, u16 num_popped)
  87. {
  88. u32 val = 0;
  89. val |= qid & DB_EQ_RING_ID_MASK;
  90. if (arm)
  91. val |= 1 << DB_EQ_REARM_SHIFT;
  92. if (clear_int)
  93. val |= 1 << DB_EQ_CLR_SHIFT;
  94. val |= 1 << DB_EQ_EVNT_SHIFT;
  95. val |= num_popped << DB_EQ_NUM_POPPED_SHIFT;
  96. iowrite32(val, ctrl->db + DB_EQ_OFFSET);
  97. }
  98. void be_cq_notify(struct be_ctrl_info *ctrl, u16 qid,
  99. bool arm, u16 num_popped)
  100. {
  101. u32 val = 0;
  102. val |= qid & DB_CQ_RING_ID_MASK;
  103. if (arm)
  104. val |= 1 << DB_CQ_REARM_SHIFT;
  105. val |= num_popped << DB_CQ_NUM_POPPED_SHIFT;
  106. iowrite32(val, ctrl->db + DB_CQ_OFFSET);
  107. }
  108. static int be_mac_addr_set(struct net_device *netdev, void *p)
  109. {
  110. struct be_adapter *adapter = netdev_priv(netdev);
  111. struct sockaddr *addr = p;
  112. int status = 0;
  113. if (netif_running(netdev)) {
  114. status = be_cmd_pmac_del(&adapter->ctrl, adapter->if_handle,
  115. adapter->pmac_id);
  116. if (status)
  117. return status;
  118. status = be_cmd_pmac_add(&adapter->ctrl, (u8 *)addr->sa_data,
  119. adapter->if_handle, &adapter->pmac_id);
  120. }
  121. if (!status)
  122. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  123. return status;
  124. }
  125. static void netdev_stats_update(struct be_adapter *adapter)
  126. {
  127. struct be_hw_stats *hw_stats = hw_stats_from_cmd(adapter->stats.cmd.va);
  128. struct be_rxf_stats *rxf_stats = &hw_stats->rxf;
  129. struct be_port_rxf_stats *port_stats =
  130. &rxf_stats->port[adapter->port_num];
  131. struct net_device_stats *dev_stats = &adapter->stats.net_stats;
  132. struct be_erx_stats *erx_stats = &hw_stats->erx;
  133. dev_stats->rx_packets = port_stats->rx_total_frames;
  134. dev_stats->tx_packets = port_stats->tx_unicastframes +
  135. port_stats->tx_multicastframes + port_stats->tx_broadcastframes;
  136. dev_stats->rx_bytes = (u64) port_stats->rx_bytes_msd << 32 |
  137. (u64) port_stats->rx_bytes_lsd;
  138. dev_stats->tx_bytes = (u64) port_stats->tx_bytes_msd << 32 |
  139. (u64) port_stats->tx_bytes_lsd;
  140. /* bad pkts received */
  141. dev_stats->rx_errors = port_stats->rx_crc_errors +
  142. port_stats->rx_alignment_symbol_errors +
  143. port_stats->rx_in_range_errors +
  144. port_stats->rx_out_range_errors +
  145. port_stats->rx_frame_too_long +
  146. port_stats->rx_dropped_too_small +
  147. port_stats->rx_dropped_too_short +
  148. port_stats->rx_dropped_header_too_small +
  149. port_stats->rx_dropped_tcp_length +
  150. port_stats->rx_dropped_runt +
  151. port_stats->rx_tcp_checksum_errs +
  152. port_stats->rx_ip_checksum_errs +
  153. port_stats->rx_udp_checksum_errs;
  154. /* no space in linux buffers: best possible approximation */
  155. dev_stats->rx_dropped = erx_stats->rx_drops_no_fragments[0];
  156. /* detailed rx errors */
  157. dev_stats->rx_length_errors = port_stats->rx_in_range_errors +
  158. port_stats->rx_out_range_errors +
  159. port_stats->rx_frame_too_long;
  160. /* receive ring buffer overflow */
  161. dev_stats->rx_over_errors = 0;
  162. dev_stats->rx_crc_errors = port_stats->rx_crc_errors;
  163. /* frame alignment errors */
  164. dev_stats->rx_frame_errors = port_stats->rx_alignment_symbol_errors;
  165. /* receiver fifo overrun */
  166. /* drops_no_pbuf is no per i/f, it's per BE card */
  167. dev_stats->rx_fifo_errors = port_stats->rx_fifo_overflow +
  168. port_stats->rx_input_fifo_overflow +
  169. rxf_stats->rx_drops_no_pbuf;
  170. /* receiver missed packetd */
  171. dev_stats->rx_missed_errors = 0;
  172. /* packet transmit problems */
  173. dev_stats->tx_errors = 0;
  174. /* no space available in linux */
  175. dev_stats->tx_dropped = 0;
  176. dev_stats->multicast = port_stats->tx_multicastframes;
  177. dev_stats->collisions = 0;
  178. /* detailed tx_errors */
  179. dev_stats->tx_aborted_errors = 0;
  180. dev_stats->tx_carrier_errors = 0;
  181. dev_stats->tx_fifo_errors = 0;
  182. dev_stats->tx_heartbeat_errors = 0;
  183. dev_stats->tx_window_errors = 0;
  184. }
  185. void be_link_status_update(void *ctxt, bool link_up)
  186. {
  187. struct be_adapter *adapter = ctxt;
  188. struct net_device *netdev = adapter->netdev;
  189. /* If link came up or went down */
  190. if (adapter->link_up != link_up) {
  191. if (link_up) {
  192. netif_start_queue(netdev);
  193. netif_carrier_on(netdev);
  194. printk(KERN_INFO "%s: Link up\n", netdev->name);
  195. } else {
  196. netif_stop_queue(netdev);
  197. netif_carrier_off(netdev);
  198. printk(KERN_INFO "%s: Link down\n", netdev->name);
  199. }
  200. adapter->link_up = link_up;
  201. }
  202. }
  203. /* Update the EQ delay n BE based on the RX frags consumed / sec */
  204. static void be_rx_eqd_update(struct be_adapter *adapter)
  205. {
  206. struct be_ctrl_info *ctrl = &adapter->ctrl;
  207. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  208. struct be_drvr_stats *stats = &adapter->stats.drvr_stats;
  209. ulong now = jiffies;
  210. u32 eqd;
  211. if (!rx_eq->enable_aic)
  212. return;
  213. /* Wrapped around */
  214. if (time_before(now, stats->rx_fps_jiffies)) {
  215. stats->rx_fps_jiffies = now;
  216. return;
  217. }
  218. /* Update once a second */
  219. if ((now - stats->rx_fps_jiffies) < HZ)
  220. return;
  221. stats->be_rx_fps = (stats->be_rx_frags - stats->be_prev_rx_frags) /
  222. ((now - stats->rx_fps_jiffies) / HZ);
  223. stats->rx_fps_jiffies = now;
  224. stats->be_prev_rx_frags = stats->be_rx_frags;
  225. eqd = stats->be_rx_fps / 110000;
  226. eqd = eqd << 3;
  227. if (eqd > rx_eq->max_eqd)
  228. eqd = rx_eq->max_eqd;
  229. if (eqd < rx_eq->min_eqd)
  230. eqd = rx_eq->min_eqd;
  231. if (eqd < 10)
  232. eqd = 0;
  233. if (eqd != rx_eq->cur_eqd)
  234. be_cmd_modify_eqd(ctrl, rx_eq->q.id, eqd);
  235. rx_eq->cur_eqd = eqd;
  236. }
  237. static struct net_device_stats *be_get_stats(struct net_device *dev)
  238. {
  239. struct be_adapter *adapter = netdev_priv(dev);
  240. return &adapter->stats.net_stats;
  241. }
  242. static u32 be_calc_rate(u64 bytes, unsigned long ticks)
  243. {
  244. u64 rate = bytes;
  245. do_div(rate, ticks / HZ);
  246. rate <<= 3; /* bytes/sec -> bits/sec */
  247. do_div(rate, 1000000ul); /* MB/Sec */
  248. return rate;
  249. }
  250. static void be_tx_rate_update(struct be_adapter *adapter)
  251. {
  252. struct be_drvr_stats *stats = drvr_stats(adapter);
  253. ulong now = jiffies;
  254. /* Wrapped around? */
  255. if (time_before(now, stats->be_tx_jiffies)) {
  256. stats->be_tx_jiffies = now;
  257. return;
  258. }
  259. /* Update tx rate once in two seconds */
  260. if ((now - stats->be_tx_jiffies) > 2 * HZ) {
  261. stats->be_tx_rate = be_calc_rate(stats->be_tx_bytes
  262. - stats->be_tx_bytes_prev,
  263. now - stats->be_tx_jiffies);
  264. stats->be_tx_jiffies = now;
  265. stats->be_tx_bytes_prev = stats->be_tx_bytes;
  266. }
  267. }
  268. static void be_tx_stats_update(struct be_adapter *adapter,
  269. u32 wrb_cnt, u32 copied, bool stopped)
  270. {
  271. struct be_drvr_stats *stats = drvr_stats(adapter);
  272. stats->be_tx_reqs++;
  273. stats->be_tx_wrbs += wrb_cnt;
  274. stats->be_tx_bytes += copied;
  275. if (stopped)
  276. stats->be_tx_stops++;
  277. }
  278. /* Determine number of WRB entries needed to xmit data in an skb */
  279. static u32 wrb_cnt_for_skb(struct sk_buff *skb, bool *dummy)
  280. {
  281. int cnt = (skb->len > skb->data_len);
  282. cnt += skb_shinfo(skb)->nr_frags;
  283. /* to account for hdr wrb */
  284. cnt++;
  285. if (cnt & 1) {
  286. /* add a dummy to make it an even num */
  287. cnt++;
  288. *dummy = true;
  289. } else
  290. *dummy = false;
  291. BUG_ON(cnt > BE_MAX_TX_FRAG_COUNT);
  292. return cnt;
  293. }
  294. static inline void wrb_fill(struct be_eth_wrb *wrb, u64 addr, int len)
  295. {
  296. wrb->frag_pa_hi = upper_32_bits(addr);
  297. wrb->frag_pa_lo = addr & 0xFFFFFFFF;
  298. wrb->frag_len = len & ETH_WRB_FRAG_LEN_MASK;
  299. }
  300. static void wrb_fill_hdr(struct be_eth_hdr_wrb *hdr, struct sk_buff *skb,
  301. bool vlan, u32 wrb_cnt, u32 len)
  302. {
  303. memset(hdr, 0, sizeof(*hdr));
  304. AMAP_SET_BITS(struct amap_eth_hdr_wrb, crc, hdr, 1);
  305. if (skb_shinfo(skb)->gso_segs > 1 && skb_shinfo(skb)->gso_size) {
  306. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso, hdr, 1);
  307. AMAP_SET_BITS(struct amap_eth_hdr_wrb, lso_mss,
  308. hdr, skb_shinfo(skb)->gso_size);
  309. } else if (skb->ip_summed == CHECKSUM_PARTIAL) {
  310. if (is_tcp_pkt(skb))
  311. AMAP_SET_BITS(struct amap_eth_hdr_wrb, tcpcs, hdr, 1);
  312. else if (is_udp_pkt(skb))
  313. AMAP_SET_BITS(struct amap_eth_hdr_wrb, udpcs, hdr, 1);
  314. }
  315. if (vlan && vlan_tx_tag_present(skb)) {
  316. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan, hdr, 1);
  317. AMAP_SET_BITS(struct amap_eth_hdr_wrb, vlan_tag,
  318. hdr, vlan_tx_tag_get(skb));
  319. }
  320. AMAP_SET_BITS(struct amap_eth_hdr_wrb, event, hdr, 1);
  321. AMAP_SET_BITS(struct amap_eth_hdr_wrb, complete, hdr, 1);
  322. AMAP_SET_BITS(struct amap_eth_hdr_wrb, num_wrb, hdr, wrb_cnt);
  323. AMAP_SET_BITS(struct amap_eth_hdr_wrb, len, hdr, len);
  324. }
  325. static int make_tx_wrbs(struct be_adapter *adapter,
  326. struct sk_buff *skb, u32 wrb_cnt, bool dummy_wrb)
  327. {
  328. u64 busaddr;
  329. u32 i, copied = 0;
  330. struct pci_dev *pdev = adapter->pdev;
  331. struct sk_buff *first_skb = skb;
  332. struct be_queue_info *txq = &adapter->tx_obj.q;
  333. struct be_eth_wrb *wrb;
  334. struct be_eth_hdr_wrb *hdr;
  335. atomic_add(wrb_cnt, &txq->used);
  336. hdr = queue_head_node(txq);
  337. queue_head_inc(txq);
  338. if (skb->len > skb->data_len) {
  339. int len = skb->len - skb->data_len;
  340. busaddr = pci_map_single(pdev, skb->data, len,
  341. PCI_DMA_TODEVICE);
  342. wrb = queue_head_node(txq);
  343. wrb_fill(wrb, busaddr, len);
  344. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  345. queue_head_inc(txq);
  346. copied += len;
  347. }
  348. for (i = 0; i < skb_shinfo(skb)->nr_frags; i++) {
  349. struct skb_frag_struct *frag =
  350. &skb_shinfo(skb)->frags[i];
  351. busaddr = pci_map_page(pdev, frag->page,
  352. frag->page_offset,
  353. frag->size, PCI_DMA_TODEVICE);
  354. wrb = queue_head_node(txq);
  355. wrb_fill(wrb, busaddr, frag->size);
  356. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  357. queue_head_inc(txq);
  358. copied += frag->size;
  359. }
  360. if (dummy_wrb) {
  361. wrb = queue_head_node(txq);
  362. wrb_fill(wrb, 0, 0);
  363. be_dws_cpu_to_le(wrb, sizeof(*wrb));
  364. queue_head_inc(txq);
  365. }
  366. wrb_fill_hdr(hdr, first_skb, adapter->vlan_grp ? true : false,
  367. wrb_cnt, copied);
  368. be_dws_cpu_to_le(hdr, sizeof(*hdr));
  369. return copied;
  370. }
  371. static int be_xmit(struct sk_buff *skb, struct net_device *netdev)
  372. {
  373. struct be_adapter *adapter = netdev_priv(netdev);
  374. struct be_tx_obj *tx_obj = &adapter->tx_obj;
  375. struct be_queue_info *txq = &tx_obj->q;
  376. u32 wrb_cnt = 0, copied = 0;
  377. u32 start = txq->head;
  378. bool dummy_wrb, stopped = false;
  379. wrb_cnt = wrb_cnt_for_skb(skb, &dummy_wrb);
  380. copied = make_tx_wrbs(adapter, skb, wrb_cnt, dummy_wrb);
  381. /* record the sent skb in the sent_skb table */
  382. BUG_ON(tx_obj->sent_skb_list[start]);
  383. tx_obj->sent_skb_list[start] = skb;
  384. /* Ensure that txq has space for the next skb; Else stop the queue
  385. * *BEFORE* ringing the tx doorbell, so that we serialze the
  386. * tx compls of the current transmit which'll wake up the queue
  387. */
  388. if ((BE_MAX_TX_FRAG_COUNT + atomic_read(&txq->used)) >= txq->len) {
  389. netif_stop_queue(netdev);
  390. stopped = true;
  391. }
  392. be_txq_notify(&adapter->ctrl, txq->id, wrb_cnt);
  393. be_tx_stats_update(adapter, wrb_cnt, copied, stopped);
  394. return NETDEV_TX_OK;
  395. }
  396. static int be_change_mtu(struct net_device *netdev, int new_mtu)
  397. {
  398. struct be_adapter *adapter = netdev_priv(netdev);
  399. if (new_mtu < BE_MIN_MTU ||
  400. new_mtu > BE_MAX_JUMBO_FRAME_SIZE) {
  401. dev_info(&adapter->pdev->dev,
  402. "MTU must be between %d and %d bytes\n",
  403. BE_MIN_MTU, BE_MAX_JUMBO_FRAME_SIZE);
  404. return -EINVAL;
  405. }
  406. dev_info(&adapter->pdev->dev, "MTU changed from %d to %d bytes\n",
  407. netdev->mtu, new_mtu);
  408. netdev->mtu = new_mtu;
  409. return 0;
  410. }
  411. /*
  412. * if there are BE_NUM_VLANS_SUPPORTED or lesser number of VLANS configured,
  413. * program them in BE. If more than BE_NUM_VLANS_SUPPORTED are configured,
  414. * set the BE in promiscuous VLAN mode.
  415. */
  416. static void be_vid_config(struct net_device *netdev)
  417. {
  418. struct be_adapter *adapter = netdev_priv(netdev);
  419. u16 vtag[BE_NUM_VLANS_SUPPORTED];
  420. u16 ntags = 0, i;
  421. if (adapter->num_vlans <= BE_NUM_VLANS_SUPPORTED) {
  422. /* Construct VLAN Table to give to HW */
  423. for (i = 0; i < VLAN_GROUP_ARRAY_LEN; i++) {
  424. if (adapter->vlan_tag[i]) {
  425. vtag[ntags] = cpu_to_le16(i);
  426. ntags++;
  427. }
  428. }
  429. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  430. vtag, ntags, 1, 0);
  431. } else {
  432. be_cmd_vlan_config(&adapter->ctrl, adapter->if_handle,
  433. NULL, 0, 1, 1);
  434. }
  435. }
  436. static void be_vlan_register(struct net_device *netdev, struct vlan_group *grp)
  437. {
  438. struct be_adapter *adapter = netdev_priv(netdev);
  439. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  440. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  441. struct be_ctrl_info *ctrl = &adapter->ctrl;
  442. be_eq_notify(ctrl, rx_eq->q.id, false, false, 0);
  443. be_eq_notify(ctrl, tx_eq->q.id, false, false, 0);
  444. adapter->vlan_grp = grp;
  445. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  446. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  447. }
  448. static void be_vlan_add_vid(struct net_device *netdev, u16 vid)
  449. {
  450. struct be_adapter *adapter = netdev_priv(netdev);
  451. adapter->num_vlans++;
  452. adapter->vlan_tag[vid] = 1;
  453. be_vid_config(netdev);
  454. }
  455. static void be_vlan_rem_vid(struct net_device *netdev, u16 vid)
  456. {
  457. struct be_adapter *adapter = netdev_priv(netdev);
  458. adapter->num_vlans--;
  459. adapter->vlan_tag[vid] = 0;
  460. vlan_group_set_device(adapter->vlan_grp, vid, NULL);
  461. be_vid_config(netdev);
  462. }
  463. static void be_set_multicast_list(struct net_device *netdev)
  464. {
  465. struct be_adapter *adapter = netdev_priv(netdev);
  466. struct be_ctrl_info *ctrl = &adapter->ctrl;
  467. if (netdev->flags & IFF_PROMISC) {
  468. be_cmd_promiscuous_config(ctrl, adapter->port_num, 1);
  469. adapter->promiscuous = true;
  470. goto done;
  471. }
  472. /* BE was previously in promiscous mode; disable it */
  473. if (adapter->promiscuous) {
  474. adapter->promiscuous = false;
  475. be_cmd_promiscuous_config(ctrl, adapter->port_num, 0);
  476. }
  477. if (netdev->flags & IFF_ALLMULTI) {
  478. be_cmd_multicast_set(ctrl, adapter->if_handle, NULL, 0);
  479. goto done;
  480. }
  481. be_cmd_multicast_set(ctrl, adapter->if_handle, netdev->mc_list,
  482. netdev->mc_count);
  483. done:
  484. return;
  485. }
  486. static void be_rx_rate_update(struct be_adapter *adapter)
  487. {
  488. struct be_drvr_stats *stats = drvr_stats(adapter);
  489. ulong now = jiffies;
  490. /* Wrapped around */
  491. if (time_before(now, stats->be_rx_jiffies)) {
  492. stats->be_rx_jiffies = now;
  493. return;
  494. }
  495. /* Update the rate once in two seconds */
  496. if ((now - stats->be_rx_jiffies) < 2 * HZ)
  497. return;
  498. stats->be_rx_rate = be_calc_rate(stats->be_rx_bytes
  499. - stats->be_rx_bytes_prev,
  500. now - stats->be_rx_jiffies);
  501. stats->be_rx_jiffies = now;
  502. stats->be_rx_bytes_prev = stats->be_rx_bytes;
  503. }
  504. static void be_rx_stats_update(struct be_adapter *adapter,
  505. u32 pktsize, u16 numfrags)
  506. {
  507. struct be_drvr_stats *stats = drvr_stats(adapter);
  508. stats->be_rx_compl++;
  509. stats->be_rx_frags += numfrags;
  510. stats->be_rx_bytes += pktsize;
  511. }
  512. static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
  513. {
  514. u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
  515. l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
  516. ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
  517. ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
  518. if (ip_version) {
  519. tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  520. udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
  521. }
  522. ipv6_chk = (ip_version && (tcpf || udpf));
  523. return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
  524. }
  525. static struct be_rx_page_info *
  526. get_rx_page_info(struct be_adapter *adapter, u16 frag_idx)
  527. {
  528. struct be_rx_page_info *rx_page_info;
  529. struct be_queue_info *rxq = &adapter->rx_obj.q;
  530. rx_page_info = &adapter->rx_obj.page_info_tbl[frag_idx];
  531. BUG_ON(!rx_page_info->page);
  532. if (rx_page_info->last_page_user)
  533. pci_unmap_page(adapter->pdev, pci_unmap_addr(rx_page_info, bus),
  534. adapter->big_page_size, PCI_DMA_FROMDEVICE);
  535. atomic_dec(&rxq->used);
  536. return rx_page_info;
  537. }
  538. /* Throwaway the data in the Rx completion */
  539. static void be_rx_compl_discard(struct be_adapter *adapter,
  540. struct be_eth_rx_compl *rxcp)
  541. {
  542. struct be_queue_info *rxq = &adapter->rx_obj.q;
  543. struct be_rx_page_info *page_info;
  544. u16 rxq_idx, i, num_rcvd;
  545. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  546. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  547. for (i = 0; i < num_rcvd; i++) {
  548. page_info = get_rx_page_info(adapter, rxq_idx);
  549. put_page(page_info->page);
  550. memset(page_info, 0, sizeof(*page_info));
  551. index_inc(&rxq_idx, rxq->len);
  552. }
  553. }
  554. /*
  555. * skb_fill_rx_data forms a complete skb for an ether frame
  556. * indicated by rxcp.
  557. */
  558. static void skb_fill_rx_data(struct be_adapter *adapter,
  559. struct sk_buff *skb, struct be_eth_rx_compl *rxcp)
  560. {
  561. struct be_queue_info *rxq = &adapter->rx_obj.q;
  562. struct be_rx_page_info *page_info;
  563. u16 rxq_idx, i, num_rcvd, j;
  564. u32 pktsize, hdr_len, curr_frag_len;
  565. u8 *start;
  566. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  567. pktsize = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  568. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  569. page_info = get_rx_page_info(adapter, rxq_idx);
  570. start = page_address(page_info->page) + page_info->page_offset;
  571. prefetch(start);
  572. /* Copy data in the first descriptor of this completion */
  573. curr_frag_len = min(pktsize, rx_frag_size);
  574. /* Copy the header portion into skb_data */
  575. hdr_len = min((u32)BE_HDR_LEN, curr_frag_len);
  576. memcpy(skb->data, start, hdr_len);
  577. skb->len = curr_frag_len;
  578. if (curr_frag_len <= BE_HDR_LEN) { /* tiny packet */
  579. /* Complete packet has now been moved to data */
  580. put_page(page_info->page);
  581. skb->data_len = 0;
  582. skb->tail += curr_frag_len;
  583. } else {
  584. skb_shinfo(skb)->nr_frags = 1;
  585. skb_shinfo(skb)->frags[0].page = page_info->page;
  586. skb_shinfo(skb)->frags[0].page_offset =
  587. page_info->page_offset + hdr_len;
  588. skb_shinfo(skb)->frags[0].size = curr_frag_len - hdr_len;
  589. skb->data_len = curr_frag_len - hdr_len;
  590. skb->tail += hdr_len;
  591. }
  592. memset(page_info, 0, sizeof(*page_info));
  593. if (pktsize <= rx_frag_size) {
  594. BUG_ON(num_rcvd != 1);
  595. goto done;
  596. }
  597. /* More frags present for this completion */
  598. pktsize -= curr_frag_len; /* account for above copied frag */
  599. for (i = 1, j = 0; i < num_rcvd; i++) {
  600. index_inc(&rxq_idx, rxq->len);
  601. page_info = get_rx_page_info(adapter, rxq_idx);
  602. curr_frag_len = min(pktsize, rx_frag_size);
  603. /* Coalesce all frags from the same physical page in one slot */
  604. if (page_info->page_offset == 0) {
  605. /* Fresh page */
  606. j++;
  607. skb_shinfo(skb)->frags[j].page = page_info->page;
  608. skb_shinfo(skb)->frags[j].page_offset =
  609. page_info->page_offset;
  610. skb_shinfo(skb)->frags[j].size = 0;
  611. skb_shinfo(skb)->nr_frags++;
  612. } else {
  613. put_page(page_info->page);
  614. }
  615. skb_shinfo(skb)->frags[j].size += curr_frag_len;
  616. skb->len += curr_frag_len;
  617. skb->data_len += curr_frag_len;
  618. pktsize -= curr_frag_len;
  619. memset(page_info, 0, sizeof(*page_info));
  620. }
  621. BUG_ON(j > MAX_SKB_FRAGS);
  622. done:
  623. be_rx_stats_update(adapter, pktsize, num_rcvd);
  624. return;
  625. }
  626. /* Process the RX completion indicated by rxcp when LRO is disabled */
  627. static void be_rx_compl_process(struct be_adapter *adapter,
  628. struct be_eth_rx_compl *rxcp)
  629. {
  630. struct sk_buff *skb;
  631. u32 vtp, vid;
  632. vtp = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  633. skb = netdev_alloc_skb(adapter->netdev, BE_HDR_LEN + NET_IP_ALIGN);
  634. if (!skb) {
  635. if (net_ratelimit())
  636. dev_warn(&adapter->pdev->dev, "skb alloc failed\n");
  637. be_rx_compl_discard(adapter, rxcp);
  638. return;
  639. }
  640. skb_reserve(skb, NET_IP_ALIGN);
  641. skb_fill_rx_data(adapter, skb, rxcp);
  642. if (do_pkt_csum(rxcp, adapter->rx_csum))
  643. skb->ip_summed = CHECKSUM_NONE;
  644. else
  645. skb->ip_summed = CHECKSUM_UNNECESSARY;
  646. skb->truesize = skb->len + sizeof(struct sk_buff);
  647. skb->protocol = eth_type_trans(skb, adapter->netdev);
  648. skb->dev = adapter->netdev;
  649. if (vtp) {
  650. if (!adapter->vlan_grp || adapter->num_vlans == 0) {
  651. kfree_skb(skb);
  652. return;
  653. }
  654. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  655. vid = be16_to_cpu(vid);
  656. vlan_hwaccel_receive_skb(skb, adapter->vlan_grp, vid);
  657. } else {
  658. netif_receive_skb(skb);
  659. }
  660. adapter->netdev->last_rx = jiffies;
  661. return;
  662. }
  663. /* Process the RX completion indicated by rxcp when LRO is enabled */
  664. static void be_rx_compl_process_lro(struct be_adapter *adapter,
  665. struct be_eth_rx_compl *rxcp)
  666. {
  667. struct be_rx_page_info *page_info;
  668. struct skb_frag_struct rx_frags[BE_MAX_FRAGS_PER_FRAME];
  669. struct be_queue_info *rxq = &adapter->rx_obj.q;
  670. u32 num_rcvd, pkt_size, remaining, vlanf, curr_frag_len;
  671. u16 i, rxq_idx = 0, vid, j;
  672. num_rcvd = AMAP_GET_BITS(struct amap_eth_rx_compl, numfrags, rxcp);
  673. pkt_size = AMAP_GET_BITS(struct amap_eth_rx_compl, pktsize, rxcp);
  674. vlanf = AMAP_GET_BITS(struct amap_eth_rx_compl, vtp, rxcp);
  675. rxq_idx = AMAP_GET_BITS(struct amap_eth_rx_compl, fragndx, rxcp);
  676. remaining = pkt_size;
  677. for (i = 0, j = -1; i < num_rcvd; i++) {
  678. page_info = get_rx_page_info(adapter, rxq_idx);
  679. curr_frag_len = min(remaining, rx_frag_size);
  680. /* Coalesce all frags from the same physical page in one slot */
  681. if (i == 0 || page_info->page_offset == 0) {
  682. /* First frag or Fresh page */
  683. j++;
  684. rx_frags[j].page = page_info->page;
  685. rx_frags[j].page_offset = page_info->page_offset;
  686. rx_frags[j].size = 0;
  687. } else {
  688. put_page(page_info->page);
  689. }
  690. rx_frags[j].size += curr_frag_len;
  691. remaining -= curr_frag_len;
  692. index_inc(&rxq_idx, rxq->len);
  693. memset(page_info, 0, sizeof(*page_info));
  694. }
  695. BUG_ON(j > MAX_SKB_FRAGS);
  696. if (likely(!vlanf)) {
  697. lro_receive_frags(&adapter->rx_obj.lro_mgr, rx_frags, pkt_size,
  698. pkt_size, NULL, 0);
  699. } else {
  700. vid = AMAP_GET_BITS(struct amap_eth_rx_compl, vlan_tag, rxcp);
  701. vid = be16_to_cpu(vid);
  702. if (!adapter->vlan_grp || adapter->num_vlans == 0)
  703. return;
  704. lro_vlan_hwaccel_receive_frags(&adapter->rx_obj.lro_mgr,
  705. rx_frags, pkt_size, pkt_size, adapter->vlan_grp,
  706. vid, NULL, 0);
  707. }
  708. be_rx_stats_update(adapter, pkt_size, num_rcvd);
  709. return;
  710. }
  711. static struct be_eth_rx_compl *be_rx_compl_get(struct be_adapter *adapter)
  712. {
  713. struct be_eth_rx_compl *rxcp = queue_tail_node(&adapter->rx_obj.cq);
  714. if (rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] == 0)
  715. return NULL;
  716. be_dws_le_to_cpu(rxcp, sizeof(*rxcp));
  717. queue_tail_inc(&adapter->rx_obj.cq);
  718. return rxcp;
  719. }
  720. /* To reset the valid bit, we need to reset the whole word as
  721. * when walking the queue the valid entries are little-endian
  722. * and invalid entries are host endian
  723. */
  724. static inline void be_rx_compl_reset(struct be_eth_rx_compl *rxcp)
  725. {
  726. rxcp->dw[offsetof(struct amap_eth_rx_compl, valid) / 32] = 0;
  727. }
  728. static inline struct page *be_alloc_pages(u32 size)
  729. {
  730. gfp_t alloc_flags = GFP_ATOMIC;
  731. u32 order = get_order(size);
  732. if (order > 0)
  733. alloc_flags |= __GFP_COMP;
  734. return alloc_pages(alloc_flags, order);
  735. }
  736. /*
  737. * Allocate a page, split it to fragments of size rx_frag_size and post as
  738. * receive buffers to BE
  739. */
  740. static void be_post_rx_frags(struct be_adapter *adapter)
  741. {
  742. struct be_rx_page_info *page_info_tbl = adapter->rx_obj.page_info_tbl;
  743. struct be_rx_page_info *page_info = NULL;
  744. struct be_queue_info *rxq = &adapter->rx_obj.q;
  745. struct page *pagep = NULL;
  746. struct be_eth_rx_d *rxd;
  747. u64 page_dmaaddr = 0, frag_dmaaddr;
  748. u32 posted, page_offset = 0;
  749. page_info = &page_info_tbl[rxq->head];
  750. for (posted = 0; posted < MAX_RX_POST && !page_info->page; posted++) {
  751. if (!pagep) {
  752. pagep = be_alloc_pages(adapter->big_page_size);
  753. if (unlikely(!pagep)) {
  754. drvr_stats(adapter)->be_ethrx_post_fail++;
  755. break;
  756. }
  757. page_dmaaddr = pci_map_page(adapter->pdev, pagep, 0,
  758. adapter->big_page_size,
  759. PCI_DMA_FROMDEVICE);
  760. page_info->page_offset = 0;
  761. } else {
  762. get_page(pagep);
  763. page_info->page_offset = page_offset + rx_frag_size;
  764. }
  765. page_offset = page_info->page_offset;
  766. page_info->page = pagep;
  767. pci_unmap_addr_set(page_info, bus, page_dmaaddr);
  768. frag_dmaaddr = page_dmaaddr + page_info->page_offset;
  769. rxd = queue_head_node(rxq);
  770. rxd->fragpa_lo = cpu_to_le32(frag_dmaaddr & 0xFFFFFFFF);
  771. rxd->fragpa_hi = cpu_to_le32(upper_32_bits(frag_dmaaddr));
  772. queue_head_inc(rxq);
  773. /* Any space left in the current big page for another frag? */
  774. if ((page_offset + rx_frag_size + rx_frag_size) >
  775. adapter->big_page_size) {
  776. pagep = NULL;
  777. page_info->last_page_user = true;
  778. }
  779. page_info = &page_info_tbl[rxq->head];
  780. }
  781. if (pagep)
  782. page_info->last_page_user = true;
  783. if (posted) {
  784. atomic_add(posted, &rxq->used);
  785. be_rxq_notify(&adapter->ctrl, rxq->id, posted);
  786. } else if (atomic_read(&rxq->used) == 0) {
  787. /* Let be_worker replenish when memory is available */
  788. adapter->rx_post_starved = true;
  789. }
  790. return;
  791. }
  792. static struct be_eth_tx_compl *be_tx_compl_get(struct be_queue_info *tx_cq)
  793. {
  794. struct be_eth_tx_compl *txcp = queue_tail_node(tx_cq);
  795. if (txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] == 0)
  796. return NULL;
  797. be_dws_le_to_cpu(txcp, sizeof(*txcp));
  798. txcp->dw[offsetof(struct amap_eth_tx_compl, valid) / 32] = 0;
  799. queue_tail_inc(tx_cq);
  800. return txcp;
  801. }
  802. static void be_tx_compl_process(struct be_adapter *adapter, u16 last_index)
  803. {
  804. struct be_queue_info *txq = &adapter->tx_obj.q;
  805. struct be_eth_wrb *wrb;
  806. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  807. struct sk_buff *sent_skb;
  808. u64 busaddr;
  809. u16 cur_index, num_wrbs = 0;
  810. cur_index = txq->tail;
  811. sent_skb = sent_skbs[cur_index];
  812. BUG_ON(!sent_skb);
  813. sent_skbs[cur_index] = NULL;
  814. do {
  815. cur_index = txq->tail;
  816. wrb = queue_tail_node(txq);
  817. be_dws_le_to_cpu(wrb, sizeof(*wrb));
  818. busaddr = ((u64)wrb->frag_pa_hi << 32) | (u64)wrb->frag_pa_lo;
  819. if (busaddr != 0) {
  820. pci_unmap_single(adapter->pdev, busaddr,
  821. wrb->frag_len, PCI_DMA_TODEVICE);
  822. }
  823. num_wrbs++;
  824. queue_tail_inc(txq);
  825. } while (cur_index != last_index);
  826. atomic_sub(num_wrbs, &txq->used);
  827. kfree_skb(sent_skb);
  828. }
  829. static void be_rx_q_clean(struct be_adapter *adapter)
  830. {
  831. struct be_rx_page_info *page_info;
  832. struct be_queue_info *rxq = &adapter->rx_obj.q;
  833. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  834. struct be_eth_rx_compl *rxcp;
  835. u16 tail;
  836. /* First cleanup pending rx completions */
  837. while ((rxcp = be_rx_compl_get(adapter)) != NULL) {
  838. be_rx_compl_discard(adapter, rxcp);
  839. be_rx_compl_reset(rxcp);
  840. be_cq_notify(&adapter->ctrl, rx_cq->id, true, 1);
  841. }
  842. /* Then free posted rx buffer that were not used */
  843. tail = (rxq->head + rxq->len - atomic_read(&rxq->used)) % rxq->len;
  844. for (; tail != rxq->head; index_inc(&tail, rxq->len)) {
  845. page_info = get_rx_page_info(adapter, tail);
  846. put_page(page_info->page);
  847. memset(page_info, 0, sizeof(*page_info));
  848. }
  849. BUG_ON(atomic_read(&rxq->used));
  850. }
  851. static void be_tx_q_clean(struct be_adapter *adapter)
  852. {
  853. struct sk_buff **sent_skbs = adapter->tx_obj.sent_skb_list;
  854. struct sk_buff *sent_skb;
  855. struct be_queue_info *txq = &adapter->tx_obj.q;
  856. u16 last_index;
  857. bool dummy_wrb;
  858. while (atomic_read(&txq->used)) {
  859. sent_skb = sent_skbs[txq->tail];
  860. last_index = txq->tail;
  861. index_adv(&last_index,
  862. wrb_cnt_for_skb(sent_skb, &dummy_wrb) - 1, txq->len);
  863. be_tx_compl_process(adapter, last_index);
  864. }
  865. }
  866. static void be_mcc_queues_destroy(struct be_adapter *adapter)
  867. {
  868. struct be_queue_info *q;
  869. struct be_ctrl_info *ctrl = &adapter->ctrl;
  870. q = &ctrl->mcc_obj.q;
  871. if (q->created)
  872. be_cmd_q_destroy(ctrl, q, QTYPE_MCCQ);
  873. be_queue_free(adapter, q);
  874. q = &ctrl->mcc_obj.cq;
  875. if (q->created)
  876. be_cmd_q_destroy(ctrl, q, QTYPE_CQ);
  877. be_queue_free(adapter, q);
  878. }
  879. /* Must be called only after TX qs are created as MCC shares TX EQ */
  880. static int be_mcc_queues_create(struct be_adapter *adapter)
  881. {
  882. struct be_queue_info *q, *cq;
  883. struct be_ctrl_info *ctrl = &adapter->ctrl;
  884. /* Alloc MCC compl queue */
  885. cq = &ctrl->mcc_obj.cq;
  886. if (be_queue_alloc(adapter, cq, MCC_CQ_LEN,
  887. sizeof(struct be_mcc_cq_entry)))
  888. goto err;
  889. /* Ask BE to create MCC compl queue; share TX's eq */
  890. if (be_cmd_cq_create(ctrl, cq, &adapter->tx_eq.q, false, true, 0))
  891. goto mcc_cq_free;
  892. /* Alloc MCC queue */
  893. q = &ctrl->mcc_obj.q;
  894. if (be_queue_alloc(adapter, q, MCC_Q_LEN, sizeof(struct be_mcc_wrb)))
  895. goto mcc_cq_destroy;
  896. /* Ask BE to create MCC queue */
  897. if (be_cmd_mccq_create(ctrl, q, cq))
  898. goto mcc_q_free;
  899. return 0;
  900. mcc_q_free:
  901. be_queue_free(adapter, q);
  902. mcc_cq_destroy:
  903. be_cmd_q_destroy(ctrl, cq, QTYPE_CQ);
  904. mcc_cq_free:
  905. be_queue_free(adapter, cq);
  906. err:
  907. return -1;
  908. }
  909. static void be_tx_queues_destroy(struct be_adapter *adapter)
  910. {
  911. struct be_queue_info *q;
  912. q = &adapter->tx_obj.q;
  913. if (q->created) {
  914. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_TXQ);
  915. /* No more tx completions can be rcvd now; clean up if there
  916. * are any pending completions or pending tx requests */
  917. be_tx_q_clean(adapter);
  918. }
  919. be_queue_free(adapter, q);
  920. q = &adapter->tx_obj.cq;
  921. if (q->created)
  922. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  923. be_queue_free(adapter, q);
  924. q = &adapter->tx_eq.q;
  925. if (q->created)
  926. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  927. be_queue_free(adapter, q);
  928. }
  929. static int be_tx_queues_create(struct be_adapter *adapter)
  930. {
  931. struct be_queue_info *eq, *q, *cq;
  932. adapter->tx_eq.max_eqd = 0;
  933. adapter->tx_eq.min_eqd = 0;
  934. adapter->tx_eq.cur_eqd = 96;
  935. adapter->tx_eq.enable_aic = false;
  936. /* Alloc Tx Event queue */
  937. eq = &adapter->tx_eq.q;
  938. if (be_queue_alloc(adapter, eq, EVNT_Q_LEN, sizeof(struct be_eq_entry)))
  939. return -1;
  940. /* Ask BE to create Tx Event queue */
  941. if (be_cmd_eq_create(&adapter->ctrl, eq, adapter->tx_eq.cur_eqd))
  942. goto tx_eq_free;
  943. /* Alloc TX eth compl queue */
  944. cq = &adapter->tx_obj.cq;
  945. if (be_queue_alloc(adapter, cq, TX_CQ_LEN,
  946. sizeof(struct be_eth_tx_compl)))
  947. goto tx_eq_destroy;
  948. /* Ask BE to create Tx eth compl queue */
  949. if (be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3))
  950. goto tx_cq_free;
  951. /* Alloc TX eth queue */
  952. q = &adapter->tx_obj.q;
  953. if (be_queue_alloc(adapter, q, TX_Q_LEN, sizeof(struct be_eth_wrb)))
  954. goto tx_cq_destroy;
  955. /* Ask BE to create Tx eth queue */
  956. if (be_cmd_txq_create(&adapter->ctrl, q, cq))
  957. goto tx_q_free;
  958. return 0;
  959. tx_q_free:
  960. be_queue_free(adapter, q);
  961. tx_cq_destroy:
  962. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  963. tx_cq_free:
  964. be_queue_free(adapter, cq);
  965. tx_eq_destroy:
  966. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  967. tx_eq_free:
  968. be_queue_free(adapter, eq);
  969. return -1;
  970. }
  971. static void be_rx_queues_destroy(struct be_adapter *adapter)
  972. {
  973. struct be_queue_info *q;
  974. q = &adapter->rx_obj.q;
  975. if (q->created) {
  976. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_RXQ);
  977. be_rx_q_clean(adapter);
  978. }
  979. be_queue_free(adapter, q);
  980. q = &adapter->rx_obj.cq;
  981. if (q->created)
  982. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_CQ);
  983. be_queue_free(adapter, q);
  984. q = &adapter->rx_eq.q;
  985. if (q->created)
  986. be_cmd_q_destroy(&adapter->ctrl, q, QTYPE_EQ);
  987. be_queue_free(adapter, q);
  988. }
  989. static int be_rx_queues_create(struct be_adapter *adapter)
  990. {
  991. struct be_queue_info *eq, *q, *cq;
  992. int rc;
  993. adapter->max_rx_coal = BE_MAX_FRAGS_PER_FRAME;
  994. adapter->big_page_size = (1 << get_order(rx_frag_size)) * PAGE_SIZE;
  995. adapter->rx_eq.max_eqd = BE_MAX_EQD;
  996. adapter->rx_eq.min_eqd = 0;
  997. adapter->rx_eq.cur_eqd = 0;
  998. adapter->rx_eq.enable_aic = true;
  999. /* Alloc Rx Event queue */
  1000. eq = &adapter->rx_eq.q;
  1001. rc = be_queue_alloc(adapter, eq, EVNT_Q_LEN,
  1002. sizeof(struct be_eq_entry));
  1003. if (rc)
  1004. return rc;
  1005. /* Ask BE to create Rx Event queue */
  1006. rc = be_cmd_eq_create(&adapter->ctrl, eq, adapter->rx_eq.cur_eqd);
  1007. if (rc)
  1008. goto rx_eq_free;
  1009. /* Alloc RX eth compl queue */
  1010. cq = &adapter->rx_obj.cq;
  1011. rc = be_queue_alloc(adapter, cq, RX_CQ_LEN,
  1012. sizeof(struct be_eth_rx_compl));
  1013. if (rc)
  1014. goto rx_eq_destroy;
  1015. /* Ask BE to create Rx eth compl queue */
  1016. rc = be_cmd_cq_create(&adapter->ctrl, cq, eq, false, false, 3);
  1017. if (rc)
  1018. goto rx_cq_free;
  1019. /* Alloc RX eth queue */
  1020. q = &adapter->rx_obj.q;
  1021. rc = be_queue_alloc(adapter, q, RX_Q_LEN, sizeof(struct be_eth_rx_d));
  1022. if (rc)
  1023. goto rx_cq_destroy;
  1024. /* Ask BE to create Rx eth queue */
  1025. rc = be_cmd_rxq_create(&adapter->ctrl, q, cq->id, rx_frag_size,
  1026. BE_MAX_JUMBO_FRAME_SIZE, adapter->if_handle, false);
  1027. if (rc)
  1028. goto rx_q_free;
  1029. return 0;
  1030. rx_q_free:
  1031. be_queue_free(adapter, q);
  1032. rx_cq_destroy:
  1033. be_cmd_q_destroy(&adapter->ctrl, cq, QTYPE_CQ);
  1034. rx_cq_free:
  1035. be_queue_free(adapter, cq);
  1036. rx_eq_destroy:
  1037. be_cmd_q_destroy(&adapter->ctrl, eq, QTYPE_EQ);
  1038. rx_eq_free:
  1039. be_queue_free(adapter, eq);
  1040. return rc;
  1041. }
  1042. static bool event_get(struct be_eq_obj *eq_obj, u16 *rid)
  1043. {
  1044. struct be_eq_entry *entry = queue_tail_node(&eq_obj->q);
  1045. u32 evt = entry->evt;
  1046. if (!evt)
  1047. return false;
  1048. evt = le32_to_cpu(evt);
  1049. *rid = (evt >> EQ_ENTRY_RES_ID_SHIFT) & EQ_ENTRY_RES_ID_MASK;
  1050. entry->evt = 0;
  1051. queue_tail_inc(&eq_obj->q);
  1052. return true;
  1053. }
  1054. static int event_handle(struct be_ctrl_info *ctrl,
  1055. struct be_eq_obj *eq_obj)
  1056. {
  1057. u16 rid = 0, num = 0;
  1058. while (event_get(eq_obj, &rid))
  1059. num++;
  1060. /* We can see an interrupt and no event */
  1061. be_eq_notify(ctrl, eq_obj->q.id, true, true, num);
  1062. if (num)
  1063. napi_schedule(&eq_obj->napi);
  1064. return num;
  1065. }
  1066. static irqreturn_t be_intx(int irq, void *dev)
  1067. {
  1068. struct be_adapter *adapter = dev;
  1069. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1070. int isr;
  1071. isr = ioread32(ctrl->csr + CEV_ISR0_OFFSET +
  1072. ctrl->pci_func * CEV_ISR_SIZE);
  1073. if (!isr)
  1074. return IRQ_NONE;
  1075. event_handle(ctrl, &adapter->tx_eq);
  1076. event_handle(ctrl, &adapter->rx_eq);
  1077. return IRQ_HANDLED;
  1078. }
  1079. static irqreturn_t be_msix_rx(int irq, void *dev)
  1080. {
  1081. struct be_adapter *adapter = dev;
  1082. event_handle(&adapter->ctrl, &adapter->rx_eq);
  1083. return IRQ_HANDLED;
  1084. }
  1085. static irqreturn_t be_msix_tx_mcc(int irq, void *dev)
  1086. {
  1087. struct be_adapter *adapter = dev;
  1088. event_handle(&adapter->ctrl, &adapter->tx_eq);
  1089. return IRQ_HANDLED;
  1090. }
  1091. static inline bool do_lro(struct be_adapter *adapter,
  1092. struct be_eth_rx_compl *rxcp)
  1093. {
  1094. int err = AMAP_GET_BITS(struct amap_eth_rx_compl, err, rxcp);
  1095. int tcp_frame = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
  1096. if (err)
  1097. drvr_stats(adapter)->be_rxcp_err++;
  1098. return (!tcp_frame || err || (adapter->max_rx_coal <= 1)) ?
  1099. false : true;
  1100. }
  1101. int be_poll_rx(struct napi_struct *napi, int budget)
  1102. {
  1103. struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
  1104. struct be_adapter *adapter =
  1105. container_of(rx_eq, struct be_adapter, rx_eq);
  1106. struct be_queue_info *rx_cq = &adapter->rx_obj.cq;
  1107. struct be_eth_rx_compl *rxcp;
  1108. u32 work_done;
  1109. for (work_done = 0; work_done < budget; work_done++) {
  1110. rxcp = be_rx_compl_get(adapter);
  1111. if (!rxcp)
  1112. break;
  1113. if (do_lro(adapter, rxcp))
  1114. be_rx_compl_process_lro(adapter, rxcp);
  1115. else
  1116. be_rx_compl_process(adapter, rxcp);
  1117. be_rx_compl_reset(rxcp);
  1118. }
  1119. lro_flush_all(&adapter->rx_obj.lro_mgr);
  1120. /* Refill the queue */
  1121. if (atomic_read(&adapter->rx_obj.q.used) < RX_FRAGS_REFILL_WM)
  1122. be_post_rx_frags(adapter);
  1123. /* All consumed */
  1124. if (work_done < budget) {
  1125. napi_complete(napi);
  1126. be_cq_notify(&adapter->ctrl, rx_cq->id, true, work_done);
  1127. } else {
  1128. /* More to be consumed; continue with interrupts disabled */
  1129. be_cq_notify(&adapter->ctrl, rx_cq->id, false, work_done);
  1130. }
  1131. return work_done;
  1132. }
  1133. void be_process_tx(struct be_adapter *adapter)
  1134. {
  1135. struct be_queue_info *txq = &adapter->tx_obj.q;
  1136. struct be_queue_info *tx_cq = &adapter->tx_obj.cq;
  1137. struct be_eth_tx_compl *txcp;
  1138. u32 num_cmpl = 0;
  1139. u16 end_idx;
  1140. while ((txcp = be_tx_compl_get(tx_cq))) {
  1141. end_idx = AMAP_GET_BITS(struct amap_eth_tx_compl,
  1142. wrb_index, txcp);
  1143. be_tx_compl_process(adapter, end_idx);
  1144. num_cmpl++;
  1145. }
  1146. if (num_cmpl) {
  1147. be_cq_notify(&adapter->ctrl, tx_cq->id, true, num_cmpl);
  1148. /* As Tx wrbs have been freed up, wake up netdev queue if
  1149. * it was stopped due to lack of tx wrbs.
  1150. */
  1151. if (netif_queue_stopped(adapter->netdev) &&
  1152. atomic_read(&txq->used) < txq->len / 2) {
  1153. netif_wake_queue(adapter->netdev);
  1154. }
  1155. drvr_stats(adapter)->be_tx_events++;
  1156. drvr_stats(adapter)->be_tx_compl += num_cmpl;
  1157. }
  1158. }
  1159. /* As TX and MCC share the same EQ check for both TX and MCC completions.
  1160. * For TX/MCC we don't honour budget; consume everything
  1161. */
  1162. static int be_poll_tx_mcc(struct napi_struct *napi, int budget)
  1163. {
  1164. struct be_eq_obj *tx_eq = container_of(napi, struct be_eq_obj, napi);
  1165. struct be_adapter *adapter =
  1166. container_of(tx_eq, struct be_adapter, tx_eq);
  1167. napi_complete(napi);
  1168. be_process_tx(adapter);
  1169. be_process_mcc(&adapter->ctrl);
  1170. return 1;
  1171. }
  1172. static void be_worker(struct work_struct *work)
  1173. {
  1174. struct be_adapter *adapter =
  1175. container_of(work, struct be_adapter, work.work);
  1176. int status;
  1177. /* Get Stats */
  1178. status = be_cmd_get_stats(&adapter->ctrl, &adapter->stats.cmd);
  1179. if (!status)
  1180. netdev_stats_update(adapter);
  1181. /* Set EQ delay */
  1182. be_rx_eqd_update(adapter);
  1183. be_tx_rate_update(adapter);
  1184. be_rx_rate_update(adapter);
  1185. if (adapter->rx_post_starved) {
  1186. adapter->rx_post_starved = false;
  1187. be_post_rx_frags(adapter);
  1188. }
  1189. schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
  1190. }
  1191. static void be_msix_enable(struct be_adapter *adapter)
  1192. {
  1193. int i, status;
  1194. for (i = 0; i < BE_NUM_MSIX_VECTORS; i++)
  1195. adapter->msix_entries[i].entry = i;
  1196. status = pci_enable_msix(adapter->pdev, adapter->msix_entries,
  1197. BE_NUM_MSIX_VECTORS);
  1198. if (status == 0)
  1199. adapter->msix_enabled = true;
  1200. return;
  1201. }
  1202. static inline int be_msix_vec_get(struct be_adapter *adapter, u32 eq_id)
  1203. {
  1204. return adapter->msix_entries[eq_id -
  1205. 8 * adapter->ctrl.pci_func].vector;
  1206. }
  1207. static int be_msix_register(struct be_adapter *adapter)
  1208. {
  1209. struct net_device *netdev = adapter->netdev;
  1210. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1211. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1212. int status, vec;
  1213. sprintf(tx_eq->desc, "%s-tx", netdev->name);
  1214. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1215. status = request_irq(vec, be_msix_tx_mcc, 0, tx_eq->desc, adapter);
  1216. if (status)
  1217. goto err;
  1218. sprintf(rx_eq->desc, "%s-rx", netdev->name);
  1219. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1220. status = request_irq(vec, be_msix_rx, 0, rx_eq->desc, adapter);
  1221. if (status) { /* Free TX IRQ */
  1222. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1223. free_irq(vec, adapter);
  1224. goto err;
  1225. }
  1226. return 0;
  1227. err:
  1228. dev_warn(&adapter->pdev->dev,
  1229. "MSIX Request IRQ failed - err %d\n", status);
  1230. pci_disable_msix(adapter->pdev);
  1231. adapter->msix_enabled = false;
  1232. return status;
  1233. }
  1234. static int be_irq_register(struct be_adapter *adapter)
  1235. {
  1236. struct net_device *netdev = adapter->netdev;
  1237. int status;
  1238. if (adapter->msix_enabled) {
  1239. status = be_msix_register(adapter);
  1240. if (status == 0)
  1241. goto done;
  1242. }
  1243. /* INTx */
  1244. netdev->irq = adapter->pdev->irq;
  1245. status = request_irq(netdev->irq, be_intx, IRQF_SHARED, netdev->name,
  1246. adapter);
  1247. if (status) {
  1248. dev_err(&adapter->pdev->dev,
  1249. "INTx request IRQ failed - err %d\n", status);
  1250. return status;
  1251. }
  1252. done:
  1253. adapter->isr_registered = true;
  1254. return 0;
  1255. }
  1256. static void be_irq_unregister(struct be_adapter *adapter)
  1257. {
  1258. struct net_device *netdev = adapter->netdev;
  1259. int vec;
  1260. if (!adapter->isr_registered)
  1261. return;
  1262. /* INTx */
  1263. if (!adapter->msix_enabled) {
  1264. free_irq(netdev->irq, adapter);
  1265. goto done;
  1266. }
  1267. /* MSIx */
  1268. vec = be_msix_vec_get(adapter, adapter->tx_eq.q.id);
  1269. free_irq(vec, adapter);
  1270. vec = be_msix_vec_get(adapter, adapter->rx_eq.q.id);
  1271. free_irq(vec, adapter);
  1272. done:
  1273. adapter->isr_registered = false;
  1274. return;
  1275. }
  1276. static int be_open(struct net_device *netdev)
  1277. {
  1278. struct be_adapter *adapter = netdev_priv(netdev);
  1279. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1280. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1281. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1282. bool link_up;
  1283. int status;
  1284. /* First time posting */
  1285. be_post_rx_frags(adapter);
  1286. napi_enable(&rx_eq->napi);
  1287. napi_enable(&tx_eq->napi);
  1288. be_irq_register(adapter);
  1289. be_intr_set(ctrl, true);
  1290. /* The evt queues are created in unarmed state; arm them */
  1291. be_eq_notify(ctrl, rx_eq->q.id, true, false, 0);
  1292. be_eq_notify(ctrl, tx_eq->q.id, true, false, 0);
  1293. /* Rx compl queue may be in unarmed state; rearm it */
  1294. be_cq_notify(ctrl, adapter->rx_obj.cq.id, true, 0);
  1295. status = be_cmd_link_status_query(ctrl, &link_up);
  1296. if (status)
  1297. return status;
  1298. be_link_status_update(adapter, link_up);
  1299. schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
  1300. return 0;
  1301. }
  1302. static int be_setup(struct be_adapter *adapter)
  1303. {
  1304. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1305. struct net_device *netdev = adapter->netdev;
  1306. u32 if_flags;
  1307. int status;
  1308. if_flags = BE_IF_FLAGS_BROADCAST | BE_IF_FLAGS_PROMISCUOUS |
  1309. BE_IF_FLAGS_MCAST_PROMISCUOUS | BE_IF_FLAGS_UNTAGGED |
  1310. BE_IF_FLAGS_PASS_L3L4_ERRORS;
  1311. status = be_cmd_if_create(ctrl, if_flags, netdev->dev_addr,
  1312. false/* pmac_invalid */, &adapter->if_handle,
  1313. &adapter->pmac_id);
  1314. if (status != 0)
  1315. goto do_none;
  1316. be_vid_config(netdev);
  1317. status = be_cmd_set_flow_control(ctrl, true, true);
  1318. if (status != 0)
  1319. goto if_destroy;
  1320. status = be_tx_queues_create(adapter);
  1321. if (status != 0)
  1322. goto if_destroy;
  1323. status = be_rx_queues_create(adapter);
  1324. if (status != 0)
  1325. goto tx_qs_destroy;
  1326. status = be_mcc_queues_create(adapter);
  1327. if (status != 0)
  1328. goto rx_qs_destroy;
  1329. return 0;
  1330. rx_qs_destroy:
  1331. be_rx_queues_destroy(adapter);
  1332. tx_qs_destroy:
  1333. be_tx_queues_destroy(adapter);
  1334. if_destroy:
  1335. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1336. do_none:
  1337. return status;
  1338. }
  1339. static int be_clear(struct be_adapter *adapter)
  1340. {
  1341. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1342. be_rx_queues_destroy(adapter);
  1343. be_tx_queues_destroy(adapter);
  1344. be_cmd_if_destroy(ctrl, adapter->if_handle);
  1345. be_mcc_queues_destroy(adapter);
  1346. return 0;
  1347. }
  1348. static int be_close(struct net_device *netdev)
  1349. {
  1350. struct be_adapter *adapter = netdev_priv(netdev);
  1351. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1352. struct be_eq_obj *rx_eq = &adapter->rx_eq;
  1353. struct be_eq_obj *tx_eq = &adapter->tx_eq;
  1354. int vec;
  1355. cancel_delayed_work_sync(&adapter->work);
  1356. netif_stop_queue(netdev);
  1357. netif_carrier_off(netdev);
  1358. adapter->link_up = false;
  1359. be_intr_set(ctrl, false);
  1360. if (adapter->msix_enabled) {
  1361. vec = be_msix_vec_get(adapter, tx_eq->q.id);
  1362. synchronize_irq(vec);
  1363. vec = be_msix_vec_get(adapter, rx_eq->q.id);
  1364. synchronize_irq(vec);
  1365. } else {
  1366. synchronize_irq(netdev->irq);
  1367. }
  1368. be_irq_unregister(adapter);
  1369. napi_disable(&rx_eq->napi);
  1370. napi_disable(&tx_eq->napi);
  1371. return 0;
  1372. }
  1373. static int be_get_frag_header(struct skb_frag_struct *frag, void **mac_hdr,
  1374. void **ip_hdr, void **tcpudp_hdr,
  1375. u64 *hdr_flags, void *priv)
  1376. {
  1377. struct ethhdr *eh;
  1378. struct vlan_ethhdr *veh;
  1379. struct iphdr *iph;
  1380. u8 *va = page_address(frag->page) + frag->page_offset;
  1381. unsigned long ll_hlen;
  1382. prefetch(va);
  1383. eh = (struct ethhdr *)va;
  1384. *mac_hdr = eh;
  1385. ll_hlen = ETH_HLEN;
  1386. if (eh->h_proto != htons(ETH_P_IP)) {
  1387. if (eh->h_proto == htons(ETH_P_8021Q)) {
  1388. veh = (struct vlan_ethhdr *)va;
  1389. if (veh->h_vlan_encapsulated_proto != htons(ETH_P_IP))
  1390. return -1;
  1391. ll_hlen += VLAN_HLEN;
  1392. } else {
  1393. return -1;
  1394. }
  1395. }
  1396. *hdr_flags = LRO_IPV4;
  1397. iph = (struct iphdr *)(va + ll_hlen);
  1398. *ip_hdr = iph;
  1399. if (iph->protocol != IPPROTO_TCP)
  1400. return -1;
  1401. *hdr_flags |= LRO_TCP;
  1402. *tcpudp_hdr = (u8 *) (*ip_hdr) + (iph->ihl << 2);
  1403. return 0;
  1404. }
  1405. static void be_lro_init(struct be_adapter *adapter, struct net_device *netdev)
  1406. {
  1407. struct net_lro_mgr *lro_mgr;
  1408. lro_mgr = &adapter->rx_obj.lro_mgr;
  1409. lro_mgr->dev = netdev;
  1410. lro_mgr->features = LRO_F_NAPI;
  1411. lro_mgr->ip_summed = CHECKSUM_UNNECESSARY;
  1412. lro_mgr->ip_summed_aggr = CHECKSUM_UNNECESSARY;
  1413. lro_mgr->max_desc = BE_MAX_LRO_DESCRIPTORS;
  1414. lro_mgr->lro_arr = adapter->rx_obj.lro_desc;
  1415. lro_mgr->get_frag_header = be_get_frag_header;
  1416. lro_mgr->max_aggr = BE_MAX_FRAGS_PER_FRAME;
  1417. }
  1418. static struct net_device_ops be_netdev_ops = {
  1419. .ndo_open = be_open,
  1420. .ndo_stop = be_close,
  1421. .ndo_start_xmit = be_xmit,
  1422. .ndo_get_stats = be_get_stats,
  1423. .ndo_set_rx_mode = be_set_multicast_list,
  1424. .ndo_set_mac_address = be_mac_addr_set,
  1425. .ndo_change_mtu = be_change_mtu,
  1426. .ndo_validate_addr = eth_validate_addr,
  1427. .ndo_vlan_rx_register = be_vlan_register,
  1428. .ndo_vlan_rx_add_vid = be_vlan_add_vid,
  1429. .ndo_vlan_rx_kill_vid = be_vlan_rem_vid,
  1430. };
  1431. static void be_netdev_init(struct net_device *netdev)
  1432. {
  1433. struct be_adapter *adapter = netdev_priv(netdev);
  1434. netdev->features |= NETIF_F_SG | NETIF_F_HW_VLAN_RX | NETIF_F_TSO |
  1435. NETIF_F_HW_VLAN_TX | NETIF_F_HW_VLAN_FILTER | NETIF_F_IP_CSUM |
  1436. NETIF_F_IPV6_CSUM;
  1437. netdev->flags |= IFF_MULTICAST;
  1438. adapter->rx_csum = true;
  1439. BE_SET_NETDEV_OPS(netdev, &be_netdev_ops);
  1440. SET_ETHTOOL_OPS(netdev, &be_ethtool_ops);
  1441. be_lro_init(adapter, netdev);
  1442. netif_napi_add(netdev, &adapter->rx_eq.napi, be_poll_rx,
  1443. BE_NAPI_WEIGHT);
  1444. netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
  1445. BE_NAPI_WEIGHT);
  1446. netif_carrier_off(netdev);
  1447. netif_stop_queue(netdev);
  1448. }
  1449. static void be_unmap_pci_bars(struct be_adapter *adapter)
  1450. {
  1451. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1452. if (ctrl->csr)
  1453. iounmap(ctrl->csr);
  1454. if (ctrl->db)
  1455. iounmap(ctrl->db);
  1456. if (ctrl->pcicfg)
  1457. iounmap(ctrl->pcicfg);
  1458. }
  1459. static int be_map_pci_bars(struct be_adapter *adapter)
  1460. {
  1461. u8 __iomem *addr;
  1462. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 2),
  1463. pci_resource_len(adapter->pdev, 2));
  1464. if (addr == NULL)
  1465. return -ENOMEM;
  1466. adapter->ctrl.csr = addr;
  1467. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 4),
  1468. 128 * 1024);
  1469. if (addr == NULL)
  1470. goto pci_map_err;
  1471. adapter->ctrl.db = addr;
  1472. addr = ioremap_nocache(pci_resource_start(adapter->pdev, 1),
  1473. pci_resource_len(adapter->pdev, 1));
  1474. if (addr == NULL)
  1475. goto pci_map_err;
  1476. adapter->ctrl.pcicfg = addr;
  1477. return 0;
  1478. pci_map_err:
  1479. be_unmap_pci_bars(adapter);
  1480. return -ENOMEM;
  1481. }
  1482. static void be_ctrl_cleanup(struct be_adapter *adapter)
  1483. {
  1484. struct be_dma_mem *mem = &adapter->ctrl.mbox_mem_alloced;
  1485. be_unmap_pci_bars(adapter);
  1486. if (mem->va)
  1487. pci_free_consistent(adapter->pdev, mem->size,
  1488. mem->va, mem->dma);
  1489. }
  1490. /* Initialize the mbox required to send cmds to BE */
  1491. static int be_ctrl_init(struct be_adapter *adapter)
  1492. {
  1493. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1494. struct be_dma_mem *mbox_mem_alloc = &ctrl->mbox_mem_alloced;
  1495. struct be_dma_mem *mbox_mem_align = &ctrl->mbox_mem;
  1496. int status;
  1497. u32 val;
  1498. status = be_map_pci_bars(adapter);
  1499. if (status)
  1500. return status;
  1501. mbox_mem_alloc->size = sizeof(struct be_mcc_mailbox) + 16;
  1502. mbox_mem_alloc->va = pci_alloc_consistent(adapter->pdev,
  1503. mbox_mem_alloc->size, &mbox_mem_alloc->dma);
  1504. if (!mbox_mem_alloc->va) {
  1505. be_unmap_pci_bars(adapter);
  1506. return -1;
  1507. }
  1508. mbox_mem_align->size = sizeof(struct be_mcc_mailbox);
  1509. mbox_mem_align->va = PTR_ALIGN(mbox_mem_alloc->va, 16);
  1510. mbox_mem_align->dma = PTR_ALIGN(mbox_mem_alloc->dma, 16);
  1511. memset(mbox_mem_align->va, 0, sizeof(struct be_mcc_mailbox));
  1512. spin_lock_init(&ctrl->mbox_lock);
  1513. spin_lock_init(&ctrl->mcc_lock);
  1514. spin_lock_init(&ctrl->mcc_cq_lock);
  1515. ctrl->async_cb = be_link_status_update;
  1516. ctrl->adapter_ctxt = adapter;
  1517. val = ioread32(ctrl->pcicfg + PCICFG_MEMBAR_CTRL_INT_CTRL_OFFSET);
  1518. ctrl->pci_func = (val >> MEMBAR_CTRL_INT_CTRL_PFUNC_SHIFT) &
  1519. MEMBAR_CTRL_INT_CTRL_PFUNC_MASK;
  1520. return 0;
  1521. }
  1522. static void be_stats_cleanup(struct be_adapter *adapter)
  1523. {
  1524. struct be_stats_obj *stats = &adapter->stats;
  1525. struct be_dma_mem *cmd = &stats->cmd;
  1526. if (cmd->va)
  1527. pci_free_consistent(adapter->pdev, cmd->size,
  1528. cmd->va, cmd->dma);
  1529. }
  1530. static int be_stats_init(struct be_adapter *adapter)
  1531. {
  1532. struct be_stats_obj *stats = &adapter->stats;
  1533. struct be_dma_mem *cmd = &stats->cmd;
  1534. cmd->size = sizeof(struct be_cmd_req_get_stats);
  1535. cmd->va = pci_alloc_consistent(adapter->pdev, cmd->size, &cmd->dma);
  1536. if (cmd->va == NULL)
  1537. return -1;
  1538. return 0;
  1539. }
  1540. static void __devexit be_remove(struct pci_dev *pdev)
  1541. {
  1542. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1543. if (!adapter)
  1544. return;
  1545. unregister_netdev(adapter->netdev);
  1546. be_clear(adapter);
  1547. be_stats_cleanup(adapter);
  1548. be_ctrl_cleanup(adapter);
  1549. if (adapter->msix_enabled) {
  1550. pci_disable_msix(adapter->pdev);
  1551. adapter->msix_enabled = false;
  1552. }
  1553. pci_set_drvdata(pdev, NULL);
  1554. pci_release_regions(pdev);
  1555. pci_disable_device(pdev);
  1556. free_netdev(adapter->netdev);
  1557. }
  1558. static int be_hw_up(struct be_adapter *adapter)
  1559. {
  1560. struct be_ctrl_info *ctrl = &adapter->ctrl;
  1561. int status;
  1562. status = be_cmd_POST(ctrl);
  1563. if (status)
  1564. return status;
  1565. status = be_cmd_get_fw_ver(ctrl, adapter->fw_ver);
  1566. if (status)
  1567. return status;
  1568. status = be_cmd_query_fw_cfg(ctrl, &adapter->port_num);
  1569. return status;
  1570. }
  1571. static int __devinit be_probe(struct pci_dev *pdev,
  1572. const struct pci_device_id *pdev_id)
  1573. {
  1574. int status = 0;
  1575. struct be_adapter *adapter;
  1576. struct net_device *netdev;
  1577. struct be_ctrl_info *ctrl;
  1578. u8 mac[ETH_ALEN];
  1579. status = pci_enable_device(pdev);
  1580. if (status)
  1581. goto do_none;
  1582. status = pci_request_regions(pdev, DRV_NAME);
  1583. if (status)
  1584. goto disable_dev;
  1585. pci_set_master(pdev);
  1586. netdev = alloc_etherdev(sizeof(struct be_adapter));
  1587. if (netdev == NULL) {
  1588. status = -ENOMEM;
  1589. goto rel_reg;
  1590. }
  1591. adapter = netdev_priv(netdev);
  1592. adapter->pdev = pdev;
  1593. pci_set_drvdata(pdev, adapter);
  1594. adapter->netdev = netdev;
  1595. be_msix_enable(adapter);
  1596. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(64));
  1597. if (!status) {
  1598. netdev->features |= NETIF_F_HIGHDMA;
  1599. } else {
  1600. status = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  1601. if (status) {
  1602. dev_err(&pdev->dev, "Could not set PCI DMA Mask\n");
  1603. goto free_netdev;
  1604. }
  1605. }
  1606. ctrl = &adapter->ctrl;
  1607. status = be_ctrl_init(adapter);
  1608. if (status)
  1609. goto free_netdev;
  1610. status = be_stats_init(adapter);
  1611. if (status)
  1612. goto ctrl_clean;
  1613. status = be_hw_up(adapter);
  1614. if (status)
  1615. goto stats_clean;
  1616. status = be_cmd_mac_addr_query(ctrl, mac, MAC_ADDRESS_TYPE_NETWORK,
  1617. true /* permanent */, 0);
  1618. if (status)
  1619. goto stats_clean;
  1620. memcpy(netdev->dev_addr, mac, ETH_ALEN);
  1621. INIT_DELAYED_WORK(&adapter->work, be_worker);
  1622. be_netdev_init(netdev);
  1623. SET_NETDEV_DEV(netdev, &adapter->pdev->dev);
  1624. status = be_setup(adapter);
  1625. if (status)
  1626. goto stats_clean;
  1627. status = register_netdev(netdev);
  1628. if (status != 0)
  1629. goto unsetup;
  1630. dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
  1631. return 0;
  1632. unsetup:
  1633. be_clear(adapter);
  1634. stats_clean:
  1635. be_stats_cleanup(adapter);
  1636. ctrl_clean:
  1637. be_ctrl_cleanup(adapter);
  1638. free_netdev:
  1639. free_netdev(adapter->netdev);
  1640. rel_reg:
  1641. pci_release_regions(pdev);
  1642. disable_dev:
  1643. pci_disable_device(pdev);
  1644. do_none:
  1645. dev_err(&pdev->dev, "%s initialization failed\n", nic_name(pdev));
  1646. return status;
  1647. }
  1648. static int be_suspend(struct pci_dev *pdev, pm_message_t state)
  1649. {
  1650. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1651. struct net_device *netdev = adapter->netdev;
  1652. netif_device_detach(netdev);
  1653. if (netif_running(netdev)) {
  1654. rtnl_lock();
  1655. be_close(netdev);
  1656. be_clear(adapter);
  1657. rtnl_unlock();
  1658. }
  1659. pci_save_state(pdev);
  1660. pci_disable_device(pdev);
  1661. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  1662. return 0;
  1663. }
  1664. static int be_resume(struct pci_dev *pdev)
  1665. {
  1666. int status = 0;
  1667. struct be_adapter *adapter = pci_get_drvdata(pdev);
  1668. struct net_device *netdev = adapter->netdev;
  1669. netif_device_detach(netdev);
  1670. status = pci_enable_device(pdev);
  1671. if (status)
  1672. return status;
  1673. pci_set_power_state(pdev, 0);
  1674. pci_restore_state(pdev);
  1675. if (netif_running(netdev)) {
  1676. rtnl_lock();
  1677. be_setup(adapter);
  1678. be_open(netdev);
  1679. rtnl_unlock();
  1680. }
  1681. netif_device_attach(netdev);
  1682. return 0;
  1683. }
  1684. static struct pci_driver be_driver = {
  1685. .name = DRV_NAME,
  1686. .id_table = be_dev_ids,
  1687. .probe = be_probe,
  1688. .remove = be_remove,
  1689. .suspend = be_suspend,
  1690. .resume = be_resume
  1691. };
  1692. static int __init be_init_module(void)
  1693. {
  1694. if (rx_frag_size != 8192 && rx_frag_size != 4096
  1695. && rx_frag_size != 2048) {
  1696. printk(KERN_WARNING DRV_NAME
  1697. " : Module param rx_frag_size must be 2048/4096/8192."
  1698. " Using 2048\n");
  1699. rx_frag_size = 2048;
  1700. }
  1701. /* Ensure rx_frag_size is aligned to chache line */
  1702. if (SKB_DATA_ALIGN(rx_frag_size) != rx_frag_size) {
  1703. printk(KERN_WARNING DRV_NAME
  1704. " : Bad module param rx_frag_size. Using 2048\n");
  1705. rx_frag_size = 2048;
  1706. }
  1707. return pci_register_driver(&be_driver);
  1708. }
  1709. module_init(be_init_module);
  1710. static void __exit be_exit_module(void)
  1711. {
  1712. pci_unregister_driver(&be_driver);
  1713. }
  1714. module_exit(be_exit_module);