atl1c_main.c 76 KB

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  1. /*
  2. * Copyright(c) 2008 - 2009 Atheros Corporation. All rights reserved.
  3. *
  4. * Derived from Intel e1000 driver
  5. * Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the Free
  9. * Software Foundation; either version 2 of the License, or (at your option)
  10. * any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc., 59
  19. * Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  20. */
  21. #include "atl1c.h"
  22. #define ATL1C_DRV_VERSION "1.0.0.1-NAPI"
  23. char atl1c_driver_name[] = "atl1c";
  24. char atl1c_driver_version[] = ATL1C_DRV_VERSION;
  25. #define PCI_DEVICE_ID_ATTANSIC_L2C 0x1062
  26. #define PCI_DEVICE_ID_ATTANSIC_L1C 0x1063
  27. /*
  28. * atl1c_pci_tbl - PCI Device ID Table
  29. *
  30. * Wildcard entries (PCI_ANY_ID) should come last
  31. * Last entry must be all 0s
  32. *
  33. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  34. * Class, Class Mask, private data (not used) }
  35. */
  36. static struct pci_device_id atl1c_pci_tbl[] = {
  37. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L1C)},
  38. {PCI_DEVICE(PCI_VENDOR_ID_ATTANSIC, PCI_DEVICE_ID_ATTANSIC_L2C)},
  39. /* required last entry */
  40. { 0 }
  41. };
  42. MODULE_DEVICE_TABLE(pci, atl1c_pci_tbl);
  43. MODULE_AUTHOR("Jie Yang <jie.yang@atheros.com>");
  44. MODULE_DESCRIPTION("Atheros 1000M Ethernet Network Driver");
  45. MODULE_LICENSE("GPL");
  46. MODULE_VERSION(ATL1C_DRV_VERSION);
  47. static int atl1c_stop_mac(struct atl1c_hw *hw);
  48. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw);
  49. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw);
  50. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw);
  51. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
  52. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
  53. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  54. int *work_done, int work_to_do);
  55. static const u16 atl1c_pay_load_size[] = {
  56. 128, 256, 512, 1024, 2048, 4096,
  57. };
  58. static const u16 atl1c_rfd_prod_idx_regs[AT_MAX_RECEIVE_QUEUE] =
  59. {
  60. REG_MB_RFD0_PROD_IDX,
  61. REG_MB_RFD1_PROD_IDX,
  62. REG_MB_RFD2_PROD_IDX,
  63. REG_MB_RFD3_PROD_IDX
  64. };
  65. static const u16 atl1c_rfd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  66. {
  67. REG_RFD0_HEAD_ADDR_LO,
  68. REG_RFD1_HEAD_ADDR_LO,
  69. REG_RFD2_HEAD_ADDR_LO,
  70. REG_RFD3_HEAD_ADDR_LO
  71. };
  72. static const u16 atl1c_rrd_addr_lo_regs[AT_MAX_RECEIVE_QUEUE] =
  73. {
  74. REG_RRD0_HEAD_ADDR_LO,
  75. REG_RRD1_HEAD_ADDR_LO,
  76. REG_RRD2_HEAD_ADDR_LO,
  77. REG_RRD3_HEAD_ADDR_LO
  78. };
  79. static const u32 atl1c_default_msg = NETIF_MSG_DRV | NETIF_MSG_PROBE |
  80. NETIF_MSG_LINK | NETIF_MSG_TIMER | NETIF_MSG_IFDOWN | NETIF_MSG_IFUP;
  81. /*
  82. * atl1c_init_pcie - init PCIE module
  83. */
  84. static void atl1c_reset_pcie(struct atl1c_hw *hw, u32 flag)
  85. {
  86. u32 data;
  87. u32 pci_cmd;
  88. struct pci_dev *pdev = hw->adapter->pdev;
  89. AT_READ_REG(hw, PCI_COMMAND, &pci_cmd);
  90. pci_cmd &= ~PCI_COMMAND_INTX_DISABLE;
  91. pci_cmd |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
  92. PCI_COMMAND_IO);
  93. AT_WRITE_REG(hw, PCI_COMMAND, pci_cmd);
  94. /*
  95. * Clear any PowerSaveing Settings
  96. */
  97. pci_enable_wake(pdev, PCI_D3hot, 0);
  98. pci_enable_wake(pdev, PCI_D3cold, 0);
  99. /*
  100. * Mask some pcie error bits
  101. */
  102. AT_READ_REG(hw, REG_PCIE_UC_SEVERITY, &data);
  103. data &= ~PCIE_UC_SERVRITY_DLP;
  104. data &= ~PCIE_UC_SERVRITY_FCP;
  105. AT_WRITE_REG(hw, REG_PCIE_UC_SEVERITY, data);
  106. if (flag & ATL1C_PCIE_L0S_L1_DISABLE)
  107. atl1c_disable_l0s_l1(hw);
  108. if (flag & ATL1C_PCIE_PHY_RESET)
  109. AT_WRITE_REG(hw, REG_GPHY_CTRL, GPHY_CTRL_DEFAULT);
  110. else
  111. AT_WRITE_REG(hw, REG_GPHY_CTRL,
  112. GPHY_CTRL_DEFAULT | GPHY_CTRL_EXT_RESET);
  113. msleep(1);
  114. }
  115. /*
  116. * atl1c_irq_enable - Enable default interrupt generation settings
  117. * @adapter: board private structure
  118. */
  119. static inline void atl1c_irq_enable(struct atl1c_adapter *adapter)
  120. {
  121. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  122. AT_WRITE_REG(&adapter->hw, REG_ISR, 0x7FFFFFFF);
  123. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  124. AT_WRITE_FLUSH(&adapter->hw);
  125. }
  126. }
  127. /*
  128. * atl1c_irq_disable - Mask off interrupt generation on the NIC
  129. * @adapter: board private structure
  130. */
  131. static inline void atl1c_irq_disable(struct atl1c_adapter *adapter)
  132. {
  133. atomic_inc(&adapter->irq_sem);
  134. AT_WRITE_REG(&adapter->hw, REG_IMR, 0);
  135. AT_WRITE_FLUSH(&adapter->hw);
  136. synchronize_irq(adapter->pdev->irq);
  137. }
  138. /*
  139. * atl1c_irq_reset - reset interrupt confiure on the NIC
  140. * @adapter: board private structure
  141. */
  142. static inline void atl1c_irq_reset(struct atl1c_adapter *adapter)
  143. {
  144. atomic_set(&adapter->irq_sem, 1);
  145. atl1c_irq_enable(adapter);
  146. }
  147. /*
  148. * atl1c_wait_until_idle - wait up to AT_HW_MAX_IDLE_DELAY reads
  149. * of the idle status register until the device is actually idle
  150. */
  151. static u32 atl1c_wait_until_idle(struct atl1c_hw *hw)
  152. {
  153. int timeout;
  154. u32 data;
  155. for (timeout = 0; timeout < AT_HW_MAX_IDLE_DELAY; timeout++) {
  156. AT_READ_REG(hw, REG_IDLE_STATUS, &data);
  157. if ((data & IDLE_STATUS_MASK) == 0)
  158. return 0;
  159. msleep(1);
  160. }
  161. return data;
  162. }
  163. /*
  164. * atl1c_phy_config - Timer Call-back
  165. * @data: pointer to netdev cast into an unsigned long
  166. */
  167. static void atl1c_phy_config(unsigned long data)
  168. {
  169. struct atl1c_adapter *adapter = (struct atl1c_adapter *) data;
  170. struct atl1c_hw *hw = &adapter->hw;
  171. unsigned long flags;
  172. spin_lock_irqsave(&adapter->mdio_lock, flags);
  173. atl1c_restart_autoneg(hw);
  174. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  175. }
  176. void atl1c_reinit_locked(struct atl1c_adapter *adapter)
  177. {
  178. WARN_ON(in_interrupt());
  179. atl1c_down(adapter);
  180. atl1c_up(adapter);
  181. clear_bit(__AT_RESETTING, &adapter->flags);
  182. }
  183. static void atl1c_reset_task(struct work_struct *work)
  184. {
  185. struct atl1c_adapter *adapter;
  186. struct net_device *netdev;
  187. adapter = container_of(work, struct atl1c_adapter, reset_task);
  188. netdev = adapter->netdev;
  189. netif_device_detach(netdev);
  190. atl1c_down(adapter);
  191. atl1c_up(adapter);
  192. netif_device_attach(netdev);
  193. }
  194. static void atl1c_check_link_status(struct atl1c_adapter *adapter)
  195. {
  196. struct atl1c_hw *hw = &adapter->hw;
  197. struct net_device *netdev = adapter->netdev;
  198. struct pci_dev *pdev = adapter->pdev;
  199. int err;
  200. unsigned long flags;
  201. u16 speed, duplex, phy_data;
  202. spin_lock_irqsave(&adapter->mdio_lock, flags);
  203. /* MII_BMSR must read twise */
  204. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  205. atl1c_read_phy_reg(hw, MII_BMSR, &phy_data);
  206. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  207. if ((phy_data & BMSR_LSTATUS) == 0) {
  208. /* link down */
  209. if (netif_carrier_ok(netdev)) {
  210. hw->hibernate = true;
  211. if (atl1c_stop_mac(hw) != 0)
  212. if (netif_msg_hw(adapter))
  213. dev_warn(&pdev->dev,
  214. "stop mac failed\n");
  215. atl1c_set_aspm(hw, false);
  216. }
  217. netif_carrier_off(netdev);
  218. } else {
  219. /* Link Up */
  220. hw->hibernate = false;
  221. spin_lock_irqsave(&adapter->mdio_lock, flags);
  222. err = atl1c_get_speed_and_duplex(hw, &speed, &duplex);
  223. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  224. if (unlikely(err))
  225. return;
  226. /* link result is our setting */
  227. if (adapter->link_speed != speed ||
  228. adapter->link_duplex != duplex) {
  229. adapter->link_speed = speed;
  230. adapter->link_duplex = duplex;
  231. atl1c_set_aspm(hw, true);
  232. atl1c_enable_tx_ctrl(hw);
  233. atl1c_enable_rx_ctrl(hw);
  234. atl1c_setup_mac_ctrl(adapter);
  235. if (netif_msg_link(adapter))
  236. dev_info(&pdev->dev,
  237. "%s: %s NIC Link is Up<%d Mbps %s>\n",
  238. atl1c_driver_name, netdev->name,
  239. adapter->link_speed,
  240. adapter->link_duplex == FULL_DUPLEX ?
  241. "Full Duplex" : "Half Duplex");
  242. }
  243. if (!netif_carrier_ok(netdev))
  244. netif_carrier_on(netdev);
  245. }
  246. }
  247. /*
  248. * atl1c_link_chg_task - deal with link change event Out of interrupt context
  249. * @netdev: network interface device structure
  250. */
  251. static void atl1c_link_chg_task(struct work_struct *work)
  252. {
  253. struct atl1c_adapter *adapter;
  254. adapter = container_of(work, struct atl1c_adapter, link_chg_task);
  255. atl1c_check_link_status(adapter);
  256. }
  257. static void atl1c_link_chg_event(struct atl1c_adapter *adapter)
  258. {
  259. struct net_device *netdev = adapter->netdev;
  260. struct pci_dev *pdev = adapter->pdev;
  261. u16 phy_data;
  262. u16 link_up;
  263. spin_lock(&adapter->mdio_lock);
  264. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  265. atl1c_read_phy_reg(&adapter->hw, MII_BMSR, &phy_data);
  266. spin_unlock(&adapter->mdio_lock);
  267. link_up = phy_data & BMSR_LSTATUS;
  268. /* notify upper layer link down ASAP */
  269. if (!link_up) {
  270. if (netif_carrier_ok(netdev)) {
  271. /* old link state: Up */
  272. netif_carrier_off(netdev);
  273. if (netif_msg_link(adapter))
  274. dev_info(&pdev->dev,
  275. "%s: %s NIC Link is Down\n",
  276. atl1c_driver_name, netdev->name);
  277. adapter->link_speed = SPEED_0;
  278. }
  279. }
  280. schedule_work(&adapter->link_chg_task);
  281. }
  282. static void atl1c_del_timer(struct atl1c_adapter *adapter)
  283. {
  284. del_timer_sync(&adapter->phy_config_timer);
  285. }
  286. static void atl1c_cancel_work(struct atl1c_adapter *adapter)
  287. {
  288. cancel_work_sync(&adapter->reset_task);
  289. cancel_work_sync(&adapter->link_chg_task);
  290. }
  291. /*
  292. * atl1c_tx_timeout - Respond to a Tx Hang
  293. * @netdev: network interface device structure
  294. */
  295. static void atl1c_tx_timeout(struct net_device *netdev)
  296. {
  297. struct atl1c_adapter *adapter = netdev_priv(netdev);
  298. /* Do the reset outside of interrupt context */
  299. schedule_work(&adapter->reset_task);
  300. }
  301. /*
  302. * atl1c_set_multi - Multicast and Promiscuous mode set
  303. * @netdev: network interface device structure
  304. *
  305. * The set_multi entry point is called whenever the multicast address
  306. * list or the network interface flags are updated. This routine is
  307. * responsible for configuring the hardware for proper multicast,
  308. * promiscuous mode, and all-multi behavior.
  309. */
  310. static void atl1c_set_multi(struct net_device *netdev)
  311. {
  312. struct atl1c_adapter *adapter = netdev_priv(netdev);
  313. struct atl1c_hw *hw = &adapter->hw;
  314. struct dev_mc_list *mc_ptr;
  315. u32 mac_ctrl_data;
  316. u32 hash_value;
  317. /* Check for Promiscuous and All Multicast modes */
  318. AT_READ_REG(hw, REG_MAC_CTRL, &mac_ctrl_data);
  319. if (netdev->flags & IFF_PROMISC) {
  320. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  321. } else if (netdev->flags & IFF_ALLMULTI) {
  322. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  323. mac_ctrl_data &= ~MAC_CTRL_PROMIS_EN;
  324. } else {
  325. mac_ctrl_data &= ~(MAC_CTRL_PROMIS_EN | MAC_CTRL_MC_ALL_EN);
  326. }
  327. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  328. /* clear the old settings from the multicast hash table */
  329. AT_WRITE_REG(hw, REG_RX_HASH_TABLE, 0);
  330. AT_WRITE_REG_ARRAY(hw, REG_RX_HASH_TABLE, 1, 0);
  331. /* comoute mc addresses' hash value ,and put it into hash table */
  332. for (mc_ptr = netdev->mc_list; mc_ptr; mc_ptr = mc_ptr->next) {
  333. hash_value = atl1c_hash_mc_addr(hw, mc_ptr->dmi_addr);
  334. atl1c_hash_set(hw, hash_value);
  335. }
  336. }
  337. static void atl1c_vlan_rx_register(struct net_device *netdev,
  338. struct vlan_group *grp)
  339. {
  340. struct atl1c_adapter *adapter = netdev_priv(netdev);
  341. struct pci_dev *pdev = adapter->pdev;
  342. u32 mac_ctrl_data = 0;
  343. if (netif_msg_pktdata(adapter))
  344. dev_dbg(&pdev->dev, "atl1c_vlan_rx_register\n");
  345. atl1c_irq_disable(adapter);
  346. adapter->vlgrp = grp;
  347. AT_READ_REG(&adapter->hw, REG_MAC_CTRL, &mac_ctrl_data);
  348. if (grp) {
  349. /* enable VLAN tag insert/strip */
  350. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  351. } else {
  352. /* disable VLAN tag insert/strip */
  353. mac_ctrl_data &= ~MAC_CTRL_RMV_VLAN;
  354. }
  355. AT_WRITE_REG(&adapter->hw, REG_MAC_CTRL, mac_ctrl_data);
  356. atl1c_irq_enable(adapter);
  357. }
  358. static void atl1c_restore_vlan(struct atl1c_adapter *adapter)
  359. {
  360. struct pci_dev *pdev = adapter->pdev;
  361. if (netif_msg_pktdata(adapter))
  362. dev_dbg(&pdev->dev, "atl1c_restore_vlan !");
  363. atl1c_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  364. }
  365. /*
  366. * atl1c_set_mac - Change the Ethernet Address of the NIC
  367. * @netdev: network interface device structure
  368. * @p: pointer to an address structure
  369. *
  370. * Returns 0 on success, negative on failure
  371. */
  372. static int atl1c_set_mac_addr(struct net_device *netdev, void *p)
  373. {
  374. struct atl1c_adapter *adapter = netdev_priv(netdev);
  375. struct sockaddr *addr = p;
  376. if (!is_valid_ether_addr(addr->sa_data))
  377. return -EADDRNOTAVAIL;
  378. if (netif_running(netdev))
  379. return -EBUSY;
  380. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  381. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  382. atl1c_hw_set_mac_addr(&adapter->hw);
  383. return 0;
  384. }
  385. static void atl1c_set_rxbufsize(struct atl1c_adapter *adapter,
  386. struct net_device *dev)
  387. {
  388. int mtu = dev->mtu;
  389. adapter->rx_buffer_len = mtu > AT_RX_BUF_SIZE ?
  390. roundup(mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN, 8) : AT_RX_BUF_SIZE;
  391. }
  392. /*
  393. * atl1c_change_mtu - Change the Maximum Transfer Unit
  394. * @netdev: network interface device structure
  395. * @new_mtu: new value for maximum frame size
  396. *
  397. * Returns 0 on success, negative on failure
  398. */
  399. static int atl1c_change_mtu(struct net_device *netdev, int new_mtu)
  400. {
  401. struct atl1c_adapter *adapter = netdev_priv(netdev);
  402. int old_mtu = netdev->mtu;
  403. int max_frame = new_mtu + ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN;
  404. if ((max_frame < ETH_ZLEN + ETH_FCS_LEN) ||
  405. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  406. if (netif_msg_link(adapter))
  407. dev_warn(&adapter->pdev->dev, "invalid MTU setting\n");
  408. return -EINVAL;
  409. }
  410. /* set MTU */
  411. if (old_mtu != new_mtu && netif_running(netdev)) {
  412. while (test_and_set_bit(__AT_RESETTING, &adapter->flags))
  413. msleep(1);
  414. netdev->mtu = new_mtu;
  415. adapter->hw.max_frame_size = new_mtu;
  416. atl1c_set_rxbufsize(adapter, netdev);
  417. atl1c_down(adapter);
  418. atl1c_up(adapter);
  419. clear_bit(__AT_RESETTING, &adapter->flags);
  420. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  421. u32 phy_data;
  422. AT_READ_REG(&adapter->hw, 0x1414, &phy_data);
  423. phy_data |= 0x10000000;
  424. AT_WRITE_REG(&adapter->hw, 0x1414, phy_data);
  425. }
  426. }
  427. return 0;
  428. }
  429. /*
  430. * caller should hold mdio_lock
  431. */
  432. static int atl1c_mdio_read(struct net_device *netdev, int phy_id, int reg_num)
  433. {
  434. struct atl1c_adapter *adapter = netdev_priv(netdev);
  435. u16 result;
  436. atl1c_read_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, &result);
  437. return result;
  438. }
  439. static void atl1c_mdio_write(struct net_device *netdev, int phy_id,
  440. int reg_num, int val)
  441. {
  442. struct atl1c_adapter *adapter = netdev_priv(netdev);
  443. atl1c_write_phy_reg(&adapter->hw, reg_num & MDIO_REG_ADDR_MASK, val);
  444. }
  445. /*
  446. * atl1c_mii_ioctl -
  447. * @netdev:
  448. * @ifreq:
  449. * @cmd:
  450. */
  451. static int atl1c_mii_ioctl(struct net_device *netdev,
  452. struct ifreq *ifr, int cmd)
  453. {
  454. struct atl1c_adapter *adapter = netdev_priv(netdev);
  455. struct pci_dev *pdev = adapter->pdev;
  456. struct mii_ioctl_data *data = if_mii(ifr);
  457. unsigned long flags;
  458. int retval = 0;
  459. if (!netif_running(netdev))
  460. return -EINVAL;
  461. spin_lock_irqsave(&adapter->mdio_lock, flags);
  462. switch (cmd) {
  463. case SIOCGMIIPHY:
  464. data->phy_id = 0;
  465. break;
  466. case SIOCGMIIREG:
  467. if (!capable(CAP_NET_ADMIN)) {
  468. retval = -EPERM;
  469. goto out;
  470. }
  471. if (atl1c_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  472. &data->val_out)) {
  473. retval = -EIO;
  474. goto out;
  475. }
  476. break;
  477. case SIOCSMIIREG:
  478. if (!capable(CAP_NET_ADMIN)) {
  479. retval = -EPERM;
  480. goto out;
  481. }
  482. if (data->reg_num & ~(0x1F)) {
  483. retval = -EFAULT;
  484. goto out;
  485. }
  486. dev_dbg(&pdev->dev, "<atl1c_mii_ioctl> write %x %x",
  487. data->reg_num, data->val_in);
  488. if (atl1c_write_phy_reg(&adapter->hw,
  489. data->reg_num, data->val_in)) {
  490. retval = -EIO;
  491. goto out;
  492. }
  493. break;
  494. default:
  495. retval = -EOPNOTSUPP;
  496. break;
  497. }
  498. out:
  499. spin_unlock_irqrestore(&adapter->mdio_lock, flags);
  500. return retval;
  501. }
  502. /*
  503. * atl1c_ioctl -
  504. * @netdev:
  505. * @ifreq:
  506. * @cmd:
  507. */
  508. static int atl1c_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  509. {
  510. switch (cmd) {
  511. case SIOCGMIIPHY:
  512. case SIOCGMIIREG:
  513. case SIOCSMIIREG:
  514. return atl1c_mii_ioctl(netdev, ifr, cmd);
  515. default:
  516. return -EOPNOTSUPP;
  517. }
  518. }
  519. /*
  520. * atl1c_alloc_queues - Allocate memory for all rings
  521. * @adapter: board private structure to initialize
  522. *
  523. */
  524. static int __devinit atl1c_alloc_queues(struct atl1c_adapter *adapter)
  525. {
  526. return 0;
  527. }
  528. static void atl1c_set_mac_type(struct atl1c_hw *hw)
  529. {
  530. switch (hw->device_id) {
  531. case PCI_DEVICE_ID_ATTANSIC_L2C:
  532. hw->nic_type = athr_l2c;
  533. break;
  534. case PCI_DEVICE_ID_ATTANSIC_L1C:
  535. hw->nic_type = athr_l1c;
  536. break;
  537. default:
  538. break;
  539. }
  540. }
  541. static int atl1c_setup_mac_funcs(struct atl1c_hw *hw)
  542. {
  543. u32 phy_status_data;
  544. u32 link_ctrl_data;
  545. atl1c_set_mac_type(hw);
  546. AT_READ_REG(hw, REG_PHY_STATUS, &phy_status_data);
  547. AT_READ_REG(hw, REG_LINK_CTRL, &link_ctrl_data);
  548. hw->ctrl_flags = ATL1C_INTR_CLEAR_ON_READ |
  549. ATL1C_INTR_MODRT_ENABLE |
  550. ATL1C_RX_IPV6_CHKSUM |
  551. ATL1C_TXQ_MODE_ENHANCE;
  552. if (link_ctrl_data & LINK_CTRL_L0S_EN)
  553. hw->ctrl_flags |= ATL1C_ASPM_L0S_SUPPORT;
  554. if (link_ctrl_data & LINK_CTRL_L1_EN)
  555. hw->ctrl_flags |= ATL1C_ASPM_L1_SUPPORT;
  556. if (hw->nic_type == athr_l1c) {
  557. hw->ctrl_flags |= ATL1C_ASPM_CTRL_MON;
  558. hw->ctrl_flags |= ATL1C_LINK_CAP_1000M;
  559. }
  560. return 0;
  561. }
  562. /*
  563. * atl1c_sw_init - Initialize general software structures (struct atl1c_adapter)
  564. * @adapter: board private structure to initialize
  565. *
  566. * atl1c_sw_init initializes the Adapter private data structure.
  567. * Fields are initialized based on PCI device information and
  568. * OS network device settings (MTU size).
  569. */
  570. static int __devinit atl1c_sw_init(struct atl1c_adapter *adapter)
  571. {
  572. struct atl1c_hw *hw = &adapter->hw;
  573. struct pci_dev *pdev = adapter->pdev;
  574. adapter->wol = 0;
  575. adapter->link_speed = SPEED_0;
  576. adapter->link_duplex = FULL_DUPLEX;
  577. adapter->num_rx_queues = AT_DEF_RECEIVE_QUEUE;
  578. adapter->tpd_ring[0].count = 1024;
  579. adapter->rfd_ring[0].count = 512;
  580. hw->vendor_id = pdev->vendor;
  581. hw->device_id = pdev->device;
  582. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  583. hw->subsystem_id = pdev->subsystem_device;
  584. /* before link up, we assume hibernate is true */
  585. hw->hibernate = true;
  586. hw->media_type = MEDIA_TYPE_AUTO_SENSOR;
  587. if (atl1c_setup_mac_funcs(hw) != 0) {
  588. dev_err(&pdev->dev, "set mac function pointers failed\n");
  589. return -1;
  590. }
  591. hw->intr_mask = IMR_NORMAL_MASK;
  592. hw->phy_configured = false;
  593. hw->preamble_len = 7;
  594. hw->max_frame_size = adapter->netdev->mtu;
  595. if (adapter->num_rx_queues < 2) {
  596. hw->rss_type = atl1c_rss_disable;
  597. hw->rss_mode = atl1c_rss_mode_disable;
  598. } else {
  599. hw->rss_type = atl1c_rss_ipv4;
  600. hw->rss_mode = atl1c_rss_mul_que_mul_int;
  601. hw->rss_hash_bits = 16;
  602. }
  603. hw->autoneg_advertised = ADVERTISED_Autoneg;
  604. hw->indirect_tab = 0xE4E4E4E4;
  605. hw->base_cpu = 0;
  606. hw->ict = 50000; /* 100ms */
  607. hw->smb_timer = 200000; /* 400ms */
  608. hw->cmb_tpd = 4;
  609. hw->cmb_tx_timer = 1; /* 2 us */
  610. hw->rx_imt = 200;
  611. hw->tx_imt = 1000;
  612. hw->tpd_burst = 5;
  613. hw->rfd_burst = 8;
  614. hw->dma_order = atl1c_dma_ord_out;
  615. hw->dmar_block = atl1c_dma_req_1024;
  616. hw->dmaw_block = atl1c_dma_req_1024;
  617. hw->dmar_dly_cnt = 15;
  618. hw->dmaw_dly_cnt = 4;
  619. if (atl1c_alloc_queues(adapter)) {
  620. dev_err(&pdev->dev, "Unable to allocate memory for queues\n");
  621. return -ENOMEM;
  622. }
  623. /* TODO */
  624. atl1c_set_rxbufsize(adapter, adapter->netdev);
  625. atomic_set(&adapter->irq_sem, 1);
  626. spin_lock_init(&adapter->mdio_lock);
  627. spin_lock_init(&adapter->tx_lock);
  628. set_bit(__AT_DOWN, &adapter->flags);
  629. return 0;
  630. }
  631. /*
  632. * atl1c_clean_tx_ring - Free Tx-skb
  633. * @adapter: board private structure
  634. */
  635. static void atl1c_clean_tx_ring(struct atl1c_adapter *adapter,
  636. enum atl1c_trans_queue type)
  637. {
  638. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  639. struct atl1c_buffer *buffer_info;
  640. struct pci_dev *pdev = adapter->pdev;
  641. u16 index, ring_count;
  642. ring_count = tpd_ring->count;
  643. for (index = 0; index < ring_count; index++) {
  644. buffer_info = &tpd_ring->buffer_info[index];
  645. if (buffer_info->state == ATL1_BUFFER_FREE)
  646. continue;
  647. if (buffer_info->dma)
  648. pci_unmap_single(pdev, buffer_info->dma,
  649. buffer_info->length,
  650. PCI_DMA_TODEVICE);
  651. if (buffer_info->skb)
  652. dev_kfree_skb(buffer_info->skb);
  653. buffer_info->dma = 0;
  654. buffer_info->skb = NULL;
  655. buffer_info->state = ATL1_BUFFER_FREE;
  656. }
  657. /* Zero out Tx-buffers */
  658. memset(tpd_ring->desc, 0, sizeof(struct atl1c_tpd_desc) *
  659. ring_count);
  660. atomic_set(&tpd_ring->next_to_clean, 0);
  661. tpd_ring->next_to_use = 0;
  662. }
  663. /*
  664. * atl1c_clean_rx_ring - Free rx-reservation skbs
  665. * @adapter: board private structure
  666. */
  667. static void atl1c_clean_rx_ring(struct atl1c_adapter *adapter)
  668. {
  669. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  670. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  671. struct atl1c_buffer *buffer_info;
  672. struct pci_dev *pdev = adapter->pdev;
  673. int i, j;
  674. for (i = 0; i < adapter->num_rx_queues; i++) {
  675. for (j = 0; j < rfd_ring[i].count; j++) {
  676. buffer_info = &rfd_ring[i].buffer_info[j];
  677. if (buffer_info->state == ATL1_BUFFER_FREE)
  678. continue;
  679. if (buffer_info->dma)
  680. pci_unmap_single(pdev, buffer_info->dma,
  681. buffer_info->length,
  682. PCI_DMA_FROMDEVICE);
  683. if (buffer_info->skb)
  684. dev_kfree_skb(buffer_info->skb);
  685. buffer_info->state = ATL1_BUFFER_FREE;
  686. buffer_info->skb = NULL;
  687. }
  688. /* zero out the descriptor ring */
  689. memset(rfd_ring[i].desc, 0, rfd_ring[i].size);
  690. rfd_ring[i].next_to_clean = 0;
  691. rfd_ring[i].next_to_use = 0;
  692. rrd_ring[i].next_to_use = 0;
  693. rrd_ring[i].next_to_clean = 0;
  694. }
  695. }
  696. /*
  697. * Read / Write Ptr Initialize:
  698. */
  699. static void atl1c_init_ring_ptrs(struct atl1c_adapter *adapter)
  700. {
  701. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  702. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  703. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  704. struct atl1c_buffer *buffer_info;
  705. int i, j;
  706. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  707. tpd_ring[i].next_to_use = 0;
  708. atomic_set(&tpd_ring[i].next_to_clean, 0);
  709. buffer_info = tpd_ring[i].buffer_info;
  710. for (j = 0; j < tpd_ring->count; j++)
  711. buffer_info[i].state = ATL1_BUFFER_FREE;
  712. }
  713. for (i = 0; i < adapter->num_rx_queues; i++) {
  714. rfd_ring[i].next_to_use = 0;
  715. rfd_ring[i].next_to_clean = 0;
  716. rrd_ring[i].next_to_use = 0;
  717. rrd_ring[i].next_to_clean = 0;
  718. for (j = 0; j < rfd_ring[i].count; j++) {
  719. buffer_info = &rfd_ring[i].buffer_info[j];
  720. buffer_info->state = ATL1_BUFFER_FREE;
  721. }
  722. }
  723. }
  724. /*
  725. * atl1c_free_ring_resources - Free Tx / RX descriptor Resources
  726. * @adapter: board private structure
  727. *
  728. * Free all transmit software resources
  729. */
  730. static void atl1c_free_ring_resources(struct atl1c_adapter *adapter)
  731. {
  732. struct pci_dev *pdev = adapter->pdev;
  733. pci_free_consistent(pdev, adapter->ring_header.size,
  734. adapter->ring_header.desc,
  735. adapter->ring_header.dma);
  736. adapter->ring_header.desc = NULL;
  737. /* Note: just free tdp_ring.buffer_info,
  738. * it contain rfd_ring.buffer_info, do not double free */
  739. if (adapter->tpd_ring[0].buffer_info) {
  740. kfree(adapter->tpd_ring[0].buffer_info);
  741. adapter->tpd_ring[0].buffer_info = NULL;
  742. }
  743. }
  744. /*
  745. * atl1c_setup_mem_resources - allocate Tx / RX descriptor resources
  746. * @adapter: board private structure
  747. *
  748. * Return 0 on success, negative on failure
  749. */
  750. static int atl1c_setup_ring_resources(struct atl1c_adapter *adapter)
  751. {
  752. struct pci_dev *pdev = adapter->pdev;
  753. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  754. struct atl1c_rfd_ring *rfd_ring = adapter->rfd_ring;
  755. struct atl1c_rrd_ring *rrd_ring = adapter->rrd_ring;
  756. struct atl1c_ring_header *ring_header = &adapter->ring_header;
  757. int num_rx_queues = adapter->num_rx_queues;
  758. int size;
  759. int i;
  760. int count = 0;
  761. int rx_desc_count = 0;
  762. u32 offset = 0;
  763. rrd_ring[0].count = rfd_ring[0].count;
  764. for (i = 1; i < AT_MAX_TRANSMIT_QUEUE; i++)
  765. tpd_ring[i].count = tpd_ring[0].count;
  766. for (i = 1; i < adapter->num_rx_queues; i++)
  767. rfd_ring[i].count = rrd_ring[i].count = rfd_ring[0].count;
  768. /* 2 tpd queue, one high priority queue,
  769. * another normal priority queue */
  770. size = sizeof(struct atl1c_buffer) * (tpd_ring->count * 2 +
  771. rfd_ring->count * num_rx_queues);
  772. tpd_ring->buffer_info = kzalloc(size, GFP_KERNEL);
  773. if (unlikely(!tpd_ring->buffer_info)) {
  774. dev_err(&pdev->dev, "kzalloc failed, size = %d\n",
  775. size);
  776. goto err_nomem;
  777. }
  778. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  779. tpd_ring[i].buffer_info =
  780. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  781. count += tpd_ring[i].count;
  782. }
  783. for (i = 0; i < num_rx_queues; i++) {
  784. rfd_ring[i].buffer_info =
  785. (struct atl1c_buffer *) (tpd_ring->buffer_info + count);
  786. count += rfd_ring[i].count;
  787. rx_desc_count += rfd_ring[i].count;
  788. }
  789. /*
  790. * real ring DMA buffer
  791. * each ring/block may need up to 8 bytes for alignment, hence the
  792. * additional bytes tacked onto the end.
  793. */
  794. ring_header->size = size =
  795. sizeof(struct atl1c_tpd_desc) * tpd_ring->count * 2 +
  796. sizeof(struct atl1c_rx_free_desc) * rx_desc_count +
  797. sizeof(struct atl1c_recv_ret_status) * rx_desc_count +
  798. sizeof(struct atl1c_hw_stats) +
  799. 8 * 4 + 8 * 2 * num_rx_queues;
  800. ring_header->desc = pci_alloc_consistent(pdev, ring_header->size,
  801. &ring_header->dma);
  802. if (unlikely(!ring_header->desc)) {
  803. dev_err(&pdev->dev, "pci_alloc_consistend failed\n");
  804. goto err_nomem;
  805. }
  806. memset(ring_header->desc, 0, ring_header->size);
  807. /* init TPD ring */
  808. tpd_ring[0].dma = roundup(ring_header->dma, 8);
  809. offset = tpd_ring[0].dma - ring_header->dma;
  810. for (i = 0; i < AT_MAX_TRANSMIT_QUEUE; i++) {
  811. tpd_ring[i].dma = ring_header->dma + offset;
  812. tpd_ring[i].desc = (u8 *) ring_header->desc + offset;
  813. tpd_ring[i].size =
  814. sizeof(struct atl1c_tpd_desc) * tpd_ring[i].count;
  815. offset += roundup(tpd_ring[i].size, 8);
  816. }
  817. /* init RFD ring */
  818. for (i = 0; i < num_rx_queues; i++) {
  819. rfd_ring[i].dma = ring_header->dma + offset;
  820. rfd_ring[i].desc = (u8 *) ring_header->desc + offset;
  821. rfd_ring[i].size = sizeof(struct atl1c_rx_free_desc) *
  822. rfd_ring[i].count;
  823. offset += roundup(rfd_ring[i].size, 8);
  824. }
  825. /* init RRD ring */
  826. for (i = 0; i < num_rx_queues; i++) {
  827. rrd_ring[i].dma = ring_header->dma + offset;
  828. rrd_ring[i].desc = (u8 *) ring_header->desc + offset;
  829. rrd_ring[i].size = sizeof(struct atl1c_recv_ret_status) *
  830. rrd_ring[i].count;
  831. offset += roundup(rrd_ring[i].size, 8);
  832. }
  833. adapter->smb.dma = ring_header->dma + offset;
  834. adapter->smb.smb = (u8 *)ring_header->desc + offset;
  835. return 0;
  836. err_nomem:
  837. kfree(tpd_ring->buffer_info);
  838. return -ENOMEM;
  839. }
  840. static void atl1c_configure_des_ring(struct atl1c_adapter *adapter)
  841. {
  842. struct atl1c_hw *hw = &adapter->hw;
  843. struct atl1c_rfd_ring *rfd_ring = (struct atl1c_rfd_ring *)
  844. adapter->rfd_ring;
  845. struct atl1c_rrd_ring *rrd_ring = (struct atl1c_rrd_ring *)
  846. adapter->rrd_ring;
  847. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  848. adapter->tpd_ring;
  849. struct atl1c_cmb *cmb = (struct atl1c_cmb *) &adapter->cmb;
  850. struct atl1c_smb *smb = (struct atl1c_smb *) &adapter->smb;
  851. int i;
  852. /* TPD */
  853. AT_WRITE_REG(hw, REG_TX_BASE_ADDR_HI,
  854. (u32)((tpd_ring[atl1c_trans_normal].dma &
  855. AT_DMA_HI_ADDR_MASK) >> 32));
  856. /* just enable normal priority TX queue */
  857. AT_WRITE_REG(hw, REG_NTPD_HEAD_ADDR_LO,
  858. (u32)(tpd_ring[atl1c_trans_normal].dma &
  859. AT_DMA_LO_ADDR_MASK));
  860. AT_WRITE_REG(hw, REG_HTPD_HEAD_ADDR_LO,
  861. (u32)(tpd_ring[atl1c_trans_high].dma &
  862. AT_DMA_LO_ADDR_MASK));
  863. AT_WRITE_REG(hw, REG_TPD_RING_SIZE,
  864. (u32)(tpd_ring[0].count & TPD_RING_SIZE_MASK));
  865. /* RFD */
  866. AT_WRITE_REG(hw, REG_RX_BASE_ADDR_HI,
  867. (u32)((rfd_ring[0].dma & AT_DMA_HI_ADDR_MASK) >> 32));
  868. for (i = 0; i < adapter->num_rx_queues; i++)
  869. AT_WRITE_REG(hw, atl1c_rfd_addr_lo_regs[i],
  870. (u32)(rfd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  871. AT_WRITE_REG(hw, REG_RFD_RING_SIZE,
  872. rfd_ring[0].count & RFD_RING_SIZE_MASK);
  873. AT_WRITE_REG(hw, REG_RX_BUF_SIZE,
  874. adapter->rx_buffer_len & RX_BUF_SIZE_MASK);
  875. /* RRD */
  876. for (i = 0; i < adapter->num_rx_queues; i++)
  877. AT_WRITE_REG(hw, atl1c_rrd_addr_lo_regs[i],
  878. (u32)(rrd_ring[i].dma & AT_DMA_LO_ADDR_MASK));
  879. AT_WRITE_REG(hw, REG_RRD_RING_SIZE,
  880. (rrd_ring[0].count & RRD_RING_SIZE_MASK));
  881. /* CMB */
  882. AT_WRITE_REG(hw, REG_CMB_BASE_ADDR_LO, cmb->dma & AT_DMA_LO_ADDR_MASK);
  883. /* SMB */
  884. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_HI,
  885. (u32)((smb->dma & AT_DMA_HI_ADDR_MASK) >> 32));
  886. AT_WRITE_REG(hw, REG_SMB_BASE_ADDR_LO,
  887. (u32)(smb->dma & AT_DMA_LO_ADDR_MASK));
  888. /* Load all of base address above */
  889. AT_WRITE_REG(hw, REG_LOAD_PTR, 1);
  890. }
  891. static void atl1c_configure_tx(struct atl1c_adapter *adapter)
  892. {
  893. struct atl1c_hw *hw = &adapter->hw;
  894. u32 dev_ctrl_data;
  895. u32 max_pay_load;
  896. u16 tx_offload_thresh;
  897. u32 txq_ctrl_data;
  898. u32 extra_size = 0; /* Jumbo frame threshold in QWORD unit */
  899. extra_size = ETH_HLEN + VLAN_HLEN + ETH_FCS_LEN;
  900. tx_offload_thresh = MAX_TX_OFFLOAD_THRESH;
  901. AT_WRITE_REG(hw, REG_TX_TSO_OFFLOAD_THRESH,
  902. (tx_offload_thresh >> 3) & TX_TSO_OFFLOAD_THRESH_MASK);
  903. AT_READ_REG(hw, REG_DEVICE_CTRL, &dev_ctrl_data);
  904. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_PAYLOAD_SHIFT) &
  905. DEVICE_CTRL_MAX_PAYLOAD_MASK;
  906. hw->dmaw_block = min(max_pay_load, hw->dmaw_block);
  907. max_pay_load = (dev_ctrl_data >> DEVICE_CTRL_MAX_RREQ_SZ_SHIFT) &
  908. DEVICE_CTRL_MAX_RREQ_SZ_MASK;
  909. hw->dmar_block = min(max_pay_load, hw->dmar_block);
  910. txq_ctrl_data = (hw->tpd_burst & TXQ_NUM_TPD_BURST_MASK) <<
  911. TXQ_NUM_TPD_BURST_SHIFT;
  912. if (hw->ctrl_flags & ATL1C_TXQ_MODE_ENHANCE)
  913. txq_ctrl_data |= TXQ_CTRL_ENH_MODE;
  914. txq_ctrl_data |= (atl1c_pay_load_size[hw->dmar_block] &
  915. TXQ_TXF_BURST_NUM_MASK) << TXQ_TXF_BURST_NUM_SHIFT;
  916. AT_WRITE_REG(hw, REG_TXQ_CTRL, txq_ctrl_data);
  917. }
  918. static void atl1c_configure_rx(struct atl1c_adapter *adapter)
  919. {
  920. struct atl1c_hw *hw = &adapter->hw;
  921. u32 rxq_ctrl_data;
  922. rxq_ctrl_data = (hw->rfd_burst & RXQ_RFD_BURST_NUM_MASK) <<
  923. RXQ_RFD_BURST_NUM_SHIFT;
  924. if (hw->ctrl_flags & ATL1C_RX_IPV6_CHKSUM)
  925. rxq_ctrl_data |= IPV6_CHKSUM_CTRL_EN;
  926. if (hw->rss_type == atl1c_rss_ipv4)
  927. rxq_ctrl_data |= RSS_HASH_IPV4;
  928. if (hw->rss_type == atl1c_rss_ipv4_tcp)
  929. rxq_ctrl_data |= RSS_HASH_IPV4_TCP;
  930. if (hw->rss_type == atl1c_rss_ipv6)
  931. rxq_ctrl_data |= RSS_HASH_IPV6;
  932. if (hw->rss_type == atl1c_rss_ipv6_tcp)
  933. rxq_ctrl_data |= RSS_HASH_IPV6_TCP;
  934. if (hw->rss_type != atl1c_rss_disable)
  935. rxq_ctrl_data |= RRS_HASH_CTRL_EN;
  936. rxq_ctrl_data |= (hw->rss_mode & RSS_MODE_MASK) <<
  937. RSS_MODE_SHIFT;
  938. rxq_ctrl_data |= (hw->rss_hash_bits & RSS_HASH_BITS_MASK) <<
  939. RSS_HASH_BITS_SHIFT;
  940. if (hw->ctrl_flags & ATL1C_ASPM_CTRL_MON)
  941. rxq_ctrl_data |= (ASPM_THRUPUT_LIMIT_100M &
  942. ASPM_THRUPUT_LIMIT_MASK) << ASPM_THRUPUT_LIMIT_SHIFT;
  943. AT_WRITE_REG(hw, REG_RXQ_CTRL, rxq_ctrl_data);
  944. }
  945. static void atl1c_configure_rss(struct atl1c_adapter *adapter)
  946. {
  947. struct atl1c_hw *hw = &adapter->hw;
  948. AT_WRITE_REG(hw, REG_IDT_TABLE, hw->indirect_tab);
  949. AT_WRITE_REG(hw, REG_BASE_CPU_NUMBER, hw->base_cpu);
  950. }
  951. static void atl1c_configure_dma(struct atl1c_adapter *adapter)
  952. {
  953. struct atl1c_hw *hw = &adapter->hw;
  954. u32 dma_ctrl_data;
  955. dma_ctrl_data = DMA_CTRL_DMAR_REQ_PRI;
  956. if (hw->ctrl_flags & ATL1C_CMB_ENABLE)
  957. dma_ctrl_data |= DMA_CTRL_CMB_EN;
  958. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  959. dma_ctrl_data |= DMA_CTRL_SMB_EN;
  960. else
  961. dma_ctrl_data |= MAC_CTRL_SMB_DIS;
  962. switch (hw->dma_order) {
  963. case atl1c_dma_ord_in:
  964. dma_ctrl_data |= DMA_CTRL_DMAR_IN_ORDER;
  965. break;
  966. case atl1c_dma_ord_enh:
  967. dma_ctrl_data |= DMA_CTRL_DMAR_ENH_ORDER;
  968. break;
  969. case atl1c_dma_ord_out:
  970. dma_ctrl_data |= DMA_CTRL_DMAR_OUT_ORDER;
  971. break;
  972. default:
  973. break;
  974. }
  975. dma_ctrl_data |= (((u32)hw->dmar_block) & DMA_CTRL_DMAR_BURST_LEN_MASK)
  976. << DMA_CTRL_DMAR_BURST_LEN_SHIFT;
  977. dma_ctrl_data |= (((u32)hw->dmaw_block) & DMA_CTRL_DMAW_BURST_LEN_MASK)
  978. << DMA_CTRL_DMAW_BURST_LEN_SHIFT;
  979. dma_ctrl_data |= (((u32)hw->dmar_dly_cnt) & DMA_CTRL_DMAR_DLY_CNT_MASK)
  980. << DMA_CTRL_DMAR_DLY_CNT_SHIFT;
  981. dma_ctrl_data |= (((u32)hw->dmaw_dly_cnt) & DMA_CTRL_DMAW_DLY_CNT_MASK)
  982. << DMA_CTRL_DMAW_DLY_CNT_SHIFT;
  983. AT_WRITE_REG(hw, REG_DMA_CTRL, dma_ctrl_data);
  984. }
  985. /*
  986. * Stop the mac, transmit and receive units
  987. * hw - Struct containing variables accessed by shared code
  988. * return : 0 or idle status (if error)
  989. */
  990. static int atl1c_stop_mac(struct atl1c_hw *hw)
  991. {
  992. u32 data;
  993. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  994. data &= ~(RXQ1_CTRL_EN | RXQ2_CTRL_EN |
  995. RXQ3_CTRL_EN | RXQ_CTRL_EN);
  996. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  997. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  998. data &= ~TXQ_CTRL_EN;
  999. AT_WRITE_REG(hw, REG_TWSI_CTRL, data);
  1000. atl1c_wait_until_idle(hw);
  1001. AT_READ_REG(hw, REG_MAC_CTRL, &data);
  1002. data &= ~(MAC_CTRL_TX_EN | MAC_CTRL_RX_EN);
  1003. AT_WRITE_REG(hw, REG_MAC_CTRL, data);
  1004. return (int)atl1c_wait_until_idle(hw);
  1005. }
  1006. static void atl1c_enable_rx_ctrl(struct atl1c_hw *hw)
  1007. {
  1008. u32 data;
  1009. AT_READ_REG(hw, REG_RXQ_CTRL, &data);
  1010. switch (hw->adapter->num_rx_queues) {
  1011. case 4:
  1012. data |= (RXQ3_CTRL_EN | RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1013. break;
  1014. case 3:
  1015. data |= (RXQ2_CTRL_EN | RXQ1_CTRL_EN);
  1016. break;
  1017. case 2:
  1018. data |= RXQ1_CTRL_EN;
  1019. break;
  1020. default:
  1021. break;
  1022. }
  1023. data |= RXQ_CTRL_EN;
  1024. AT_WRITE_REG(hw, REG_RXQ_CTRL, data);
  1025. }
  1026. static void atl1c_enable_tx_ctrl(struct atl1c_hw *hw)
  1027. {
  1028. u32 data;
  1029. AT_READ_REG(hw, REG_TXQ_CTRL, &data);
  1030. data |= TXQ_CTRL_EN;
  1031. AT_WRITE_REG(hw, REG_TXQ_CTRL, data);
  1032. }
  1033. /*
  1034. * Reset the transmit and receive units; mask and clear all interrupts.
  1035. * hw - Struct containing variables accessed by shared code
  1036. * return : 0 or idle status (if error)
  1037. */
  1038. static int atl1c_reset_mac(struct atl1c_hw *hw)
  1039. {
  1040. struct atl1c_adapter *adapter = (struct atl1c_adapter *)hw->adapter;
  1041. struct pci_dev *pdev = adapter->pdev;
  1042. int ret;
  1043. AT_WRITE_REG(hw, REG_IMR, 0);
  1044. AT_WRITE_REG(hw, REG_ISR, ISR_DIS_INT);
  1045. ret = atl1c_stop_mac(hw);
  1046. if (ret)
  1047. return ret;
  1048. /*
  1049. * Issue Soft Reset to the MAC. This will reset the chip's
  1050. * transmit, receive, DMA. It will not effect
  1051. * the current PCI configuration. The global reset bit is self-
  1052. * clearing, and should clear within a microsecond.
  1053. */
  1054. AT_WRITE_REGW(hw, REG_MASTER_CTRL, MASTER_CTRL_SOFT_RST);
  1055. AT_WRITE_FLUSH(hw);
  1056. msleep(10);
  1057. /* Wait at least 10ms for All module to be Idle */
  1058. if (atl1c_wait_until_idle(hw)) {
  1059. dev_err(&pdev->dev,
  1060. "MAC state machine can't be idle since"
  1061. " disabled for 10ms second\n");
  1062. return -1;
  1063. }
  1064. return 0;
  1065. }
  1066. static void atl1c_disable_l0s_l1(struct atl1c_hw *hw)
  1067. {
  1068. u32 pm_ctrl_data;
  1069. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1070. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1071. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1072. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1073. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1074. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1075. pm_ctrl_data &= ~PM_CTRL_MAC_ASPM_CHK;
  1076. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1077. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1078. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1079. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1080. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1081. }
  1082. /*
  1083. * Set ASPM state.
  1084. * Enable/disable L0s/L1 depend on link state.
  1085. */
  1086. static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup)
  1087. {
  1088. u32 pm_ctrl_data;
  1089. AT_READ_REG(hw, REG_PM_CTRL, &pm_ctrl_data);
  1090. pm_ctrl_data &= ~PM_CTRL_SERDES_PD_EX_L1;
  1091. pm_ctrl_data &= ~(PM_CTRL_L1_ENTRY_TIMER_MASK <<
  1092. PM_CTRL_L1_ENTRY_TIMER_SHIFT);
  1093. pm_ctrl_data |= PM_CTRL_MAC_ASPM_CHK;
  1094. if (linkup) {
  1095. pm_ctrl_data |= PM_CTRL_SERDES_PLL_L1_EN;
  1096. pm_ctrl_data &= ~PM_CTRL_CLK_SWH_L1;
  1097. pm_ctrl_data |= PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1098. pm_ctrl_data |= PM_CTRL_SERDES_L1_EN;
  1099. } else {
  1100. pm_ctrl_data &= ~PM_CTRL_SERDES_BUDS_RX_L1_EN;
  1101. pm_ctrl_data &= ~PM_CTRL_SERDES_L1_EN;
  1102. pm_ctrl_data &= ~PM_CTRL_ASPM_L0S_EN;
  1103. pm_ctrl_data &= ~PM_CTRL_SERDES_PLL_L1_EN;
  1104. pm_ctrl_data |= PM_CTRL_CLK_SWH_L1;
  1105. if (hw->ctrl_flags & ATL1C_ASPM_L1_SUPPORT)
  1106. pm_ctrl_data |= PM_CTRL_ASPM_L1_EN;
  1107. else
  1108. pm_ctrl_data &= ~PM_CTRL_ASPM_L1_EN;
  1109. }
  1110. AT_WRITE_REG(hw, REG_PM_CTRL, pm_ctrl_data);
  1111. }
  1112. static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter)
  1113. {
  1114. struct atl1c_hw *hw = &adapter->hw;
  1115. struct net_device *netdev = adapter->netdev;
  1116. u32 mac_ctrl_data;
  1117. mac_ctrl_data = MAC_CTRL_TX_EN | MAC_CTRL_RX_EN;
  1118. mac_ctrl_data |= (MAC_CTRL_TX_FLOW | MAC_CTRL_RX_FLOW);
  1119. if (adapter->link_duplex == FULL_DUPLEX) {
  1120. hw->mac_duplex = true;
  1121. mac_ctrl_data |= MAC_CTRL_DUPLX;
  1122. }
  1123. if (adapter->link_speed == SPEED_1000)
  1124. hw->mac_speed = atl1c_mac_speed_1000;
  1125. else
  1126. hw->mac_speed = atl1c_mac_speed_10_100;
  1127. mac_ctrl_data |= (hw->mac_speed & MAC_CTRL_SPEED_MASK) <<
  1128. MAC_CTRL_SPEED_SHIFT;
  1129. mac_ctrl_data |= (MAC_CTRL_ADD_CRC | MAC_CTRL_PAD);
  1130. mac_ctrl_data |= ((hw->preamble_len & MAC_CTRL_PRMLEN_MASK) <<
  1131. MAC_CTRL_PRMLEN_SHIFT);
  1132. if (adapter->vlgrp)
  1133. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  1134. mac_ctrl_data |= MAC_CTRL_BC_EN;
  1135. if (netdev->flags & IFF_PROMISC)
  1136. mac_ctrl_data |= MAC_CTRL_PROMIS_EN;
  1137. if (netdev->flags & IFF_ALLMULTI)
  1138. mac_ctrl_data |= MAC_CTRL_MC_ALL_EN;
  1139. mac_ctrl_data |= MAC_CTRL_SINGLE_PAUSE_EN;
  1140. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  1141. }
  1142. /*
  1143. * atl1c_configure - Configure Transmit&Receive Unit after Reset
  1144. * @adapter: board private structure
  1145. *
  1146. * Configure the Tx /Rx unit of the MAC after a reset.
  1147. */
  1148. static int atl1c_configure(struct atl1c_adapter *adapter)
  1149. {
  1150. struct atl1c_hw *hw = &adapter->hw;
  1151. u32 master_ctrl_data = 0;
  1152. u32 intr_modrt_data;
  1153. /* clear interrupt status */
  1154. AT_WRITE_REG(hw, REG_ISR, 0xFFFFFFFF);
  1155. /* Clear any WOL status */
  1156. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  1157. /* set Interrupt Clear Timer
  1158. * HW will enable self to assert interrupt event to system after
  1159. * waiting x-time for software to notify it accept interrupt.
  1160. */
  1161. AT_WRITE_REG(hw, REG_INT_RETRIG_TIMER,
  1162. hw->ict & INT_RETRIG_TIMER_MASK);
  1163. atl1c_configure_des_ring(adapter);
  1164. if (hw->ctrl_flags & ATL1C_INTR_MODRT_ENABLE) {
  1165. intr_modrt_data = (hw->tx_imt & IRQ_MODRT_TIMER_MASK) <<
  1166. IRQ_MODRT_TX_TIMER_SHIFT;
  1167. intr_modrt_data |= (hw->rx_imt & IRQ_MODRT_TIMER_MASK) <<
  1168. IRQ_MODRT_RX_TIMER_SHIFT;
  1169. AT_WRITE_REG(hw, REG_IRQ_MODRT_TIMER_INIT, intr_modrt_data);
  1170. master_ctrl_data |=
  1171. MASTER_CTRL_TX_ITIMER_EN | MASTER_CTRL_RX_ITIMER_EN;
  1172. }
  1173. if (hw->ctrl_flags & ATL1C_INTR_CLEAR_ON_READ)
  1174. master_ctrl_data |= MASTER_CTRL_INT_RDCLR;
  1175. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  1176. if (hw->ctrl_flags & ATL1C_CMB_ENABLE) {
  1177. AT_WRITE_REG(hw, REG_CMB_TPD_THRESH,
  1178. hw->cmb_tpd & CMB_TPD_THRESH_MASK);
  1179. AT_WRITE_REG(hw, REG_CMB_TX_TIMER,
  1180. hw->cmb_tx_timer & CMB_TX_TIMER_MASK);
  1181. }
  1182. if (hw->ctrl_flags & ATL1C_SMB_ENABLE)
  1183. AT_WRITE_REG(hw, REG_SMB_STAT_TIMER,
  1184. hw->smb_timer & SMB_STAT_TIMER_MASK);
  1185. /* set MTU */
  1186. AT_WRITE_REG(hw, REG_MTU, hw->max_frame_size + ETH_HLEN +
  1187. VLAN_HLEN + ETH_FCS_LEN);
  1188. /* HDS, disable */
  1189. AT_WRITE_REG(hw, REG_HDS_CTRL, 0);
  1190. atl1c_configure_tx(adapter);
  1191. atl1c_configure_rx(adapter);
  1192. atl1c_configure_rss(adapter);
  1193. atl1c_configure_dma(adapter);
  1194. return 0;
  1195. }
  1196. static void atl1c_update_hw_stats(struct atl1c_adapter *adapter)
  1197. {
  1198. u16 hw_reg_addr = 0;
  1199. unsigned long *stats_item = NULL;
  1200. u32 data;
  1201. /* update rx status */
  1202. hw_reg_addr = REG_MAC_RX_STATUS_BIN;
  1203. stats_item = &adapter->hw_stats.rx_ok;
  1204. while (hw_reg_addr <= REG_MAC_RX_STATUS_END) {
  1205. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1206. *stats_item += data;
  1207. stats_item++;
  1208. hw_reg_addr += 4;
  1209. }
  1210. /* update tx status */
  1211. hw_reg_addr = REG_MAC_TX_STATUS_BIN;
  1212. stats_item = &adapter->hw_stats.tx_ok;
  1213. while (hw_reg_addr <= REG_MAC_TX_STATUS_END) {
  1214. AT_READ_REG(&adapter->hw, hw_reg_addr, &data);
  1215. *stats_item += data;
  1216. stats_item++;
  1217. hw_reg_addr += 4;
  1218. }
  1219. }
  1220. /*
  1221. * atl1c_get_stats - Get System Network Statistics
  1222. * @netdev: network interface device structure
  1223. *
  1224. * Returns the address of the device statistics structure.
  1225. * The statistics are actually updated from the timer callback.
  1226. */
  1227. static struct net_device_stats *atl1c_get_stats(struct net_device *netdev)
  1228. {
  1229. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1230. struct atl1c_hw_stats *hw_stats = &adapter->hw_stats;
  1231. struct net_device_stats *net_stats = &adapter->net_stats;
  1232. atl1c_update_hw_stats(adapter);
  1233. net_stats->rx_packets = hw_stats->rx_ok;
  1234. net_stats->tx_packets = hw_stats->tx_ok;
  1235. net_stats->rx_bytes = hw_stats->rx_byte_cnt;
  1236. net_stats->tx_bytes = hw_stats->tx_byte_cnt;
  1237. net_stats->multicast = hw_stats->rx_mcast;
  1238. net_stats->collisions = hw_stats->tx_1_col +
  1239. hw_stats->tx_2_col * 2 +
  1240. hw_stats->tx_late_col + hw_stats->tx_abort_col;
  1241. net_stats->rx_errors = hw_stats->rx_frag + hw_stats->rx_fcs_err +
  1242. hw_stats->rx_len_err + hw_stats->rx_sz_ov +
  1243. hw_stats->rx_rrd_ov + hw_stats->rx_align_err;
  1244. net_stats->rx_fifo_errors = hw_stats->rx_rxf_ov;
  1245. net_stats->rx_length_errors = hw_stats->rx_len_err;
  1246. net_stats->rx_crc_errors = hw_stats->rx_fcs_err;
  1247. net_stats->rx_frame_errors = hw_stats->rx_align_err;
  1248. net_stats->rx_over_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1249. net_stats->rx_missed_errors = hw_stats->rx_rrd_ov + hw_stats->rx_rxf_ov;
  1250. net_stats->tx_errors = hw_stats->tx_late_col + hw_stats->tx_abort_col +
  1251. hw_stats->tx_underrun + hw_stats->tx_trunc;
  1252. net_stats->tx_fifo_errors = hw_stats->tx_underrun;
  1253. net_stats->tx_aborted_errors = hw_stats->tx_abort_col;
  1254. net_stats->tx_window_errors = hw_stats->tx_late_col;
  1255. return &adapter->net_stats;
  1256. }
  1257. static inline void atl1c_clear_phy_int(struct atl1c_adapter *adapter)
  1258. {
  1259. u16 phy_data;
  1260. spin_lock(&adapter->mdio_lock);
  1261. atl1c_read_phy_reg(&adapter->hw, MII_ISR, &phy_data);
  1262. spin_unlock(&adapter->mdio_lock);
  1263. }
  1264. static bool atl1c_clean_tx_irq(struct atl1c_adapter *adapter,
  1265. enum atl1c_trans_queue type)
  1266. {
  1267. struct atl1c_tpd_ring *tpd_ring = (struct atl1c_tpd_ring *)
  1268. &adapter->tpd_ring[type];
  1269. struct atl1c_buffer *buffer_info;
  1270. u16 next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1271. u16 hw_next_to_clean;
  1272. u16 shift;
  1273. u32 data;
  1274. if (type == atl1c_trans_high)
  1275. shift = MB_HTPD_CONS_IDX_SHIFT;
  1276. else
  1277. shift = MB_NTPD_CONS_IDX_SHIFT;
  1278. AT_READ_REG(&adapter->hw, REG_MB_PRIO_CONS_IDX, &data);
  1279. hw_next_to_clean = (data >> shift) & MB_PRIO_PROD_IDX_MASK;
  1280. while (next_to_clean != hw_next_to_clean) {
  1281. buffer_info = &tpd_ring->buffer_info[next_to_clean];
  1282. if (buffer_info->state == ATL1_BUFFER_BUSY) {
  1283. pci_unmap_page(adapter->pdev, buffer_info->dma,
  1284. buffer_info->length, PCI_DMA_TODEVICE);
  1285. buffer_info->dma = 0;
  1286. if (buffer_info->skb) {
  1287. dev_kfree_skb_irq(buffer_info->skb);
  1288. buffer_info->skb = NULL;
  1289. }
  1290. buffer_info->state = ATL1_BUFFER_FREE;
  1291. }
  1292. if (++next_to_clean == tpd_ring->count)
  1293. next_to_clean = 0;
  1294. atomic_set(&tpd_ring->next_to_clean, next_to_clean);
  1295. }
  1296. if (netif_queue_stopped(adapter->netdev) &&
  1297. netif_carrier_ok(adapter->netdev)) {
  1298. netif_wake_queue(adapter->netdev);
  1299. }
  1300. return true;
  1301. }
  1302. /*
  1303. * atl1c_intr - Interrupt Handler
  1304. * @irq: interrupt number
  1305. * @data: pointer to a network interface device structure
  1306. * @pt_regs: CPU registers structure
  1307. */
  1308. static irqreturn_t atl1c_intr(int irq, void *data)
  1309. {
  1310. struct net_device *netdev = data;
  1311. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1312. struct pci_dev *pdev = adapter->pdev;
  1313. struct atl1c_hw *hw = &adapter->hw;
  1314. int max_ints = AT_MAX_INT_WORK;
  1315. int handled = IRQ_NONE;
  1316. u32 status;
  1317. u32 reg_data;
  1318. do {
  1319. AT_READ_REG(hw, REG_ISR, &reg_data);
  1320. status = reg_data & hw->intr_mask;
  1321. if (status == 0 || (status & ISR_DIS_INT) != 0) {
  1322. if (max_ints != AT_MAX_INT_WORK)
  1323. handled = IRQ_HANDLED;
  1324. break;
  1325. }
  1326. /* link event */
  1327. if (status & ISR_GPHY)
  1328. atl1c_clear_phy_int(adapter);
  1329. /* Ack ISR */
  1330. AT_WRITE_REG(hw, REG_ISR, status | ISR_DIS_INT);
  1331. if (status & ISR_RX_PKT) {
  1332. if (likely(napi_schedule_prep(&adapter->napi))) {
  1333. hw->intr_mask &= ~ISR_RX_PKT;
  1334. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1335. __napi_schedule(&adapter->napi);
  1336. }
  1337. }
  1338. if (status & ISR_TX_PKT)
  1339. atl1c_clean_tx_irq(adapter, atl1c_trans_normal);
  1340. handled = IRQ_HANDLED;
  1341. /* check if PCIE PHY Link down */
  1342. if (status & ISR_ERROR) {
  1343. if (netif_msg_hw(adapter))
  1344. dev_err(&pdev->dev,
  1345. "atl1c hardware error (status = 0x%x)\n",
  1346. status & ISR_ERROR);
  1347. /* reset MAC */
  1348. hw->intr_mask &= ~ISR_ERROR;
  1349. AT_WRITE_REG(hw, REG_IMR, hw->intr_mask);
  1350. schedule_work(&adapter->reset_task);
  1351. break;
  1352. }
  1353. if (status & ISR_OVER)
  1354. if (netif_msg_intr(adapter))
  1355. dev_warn(&pdev->dev,
  1356. "TX/RX over flow (status = 0x%x)\n",
  1357. status & ISR_OVER);
  1358. /* link event */
  1359. if (status & (ISR_GPHY | ISR_MANUAL)) {
  1360. adapter->net_stats.tx_carrier_errors++;
  1361. atl1c_link_chg_event(adapter);
  1362. break;
  1363. }
  1364. } while (--max_ints > 0);
  1365. /* re-enable Interrupt*/
  1366. AT_WRITE_REG(&adapter->hw, REG_ISR, 0);
  1367. return handled;
  1368. }
  1369. static inline void atl1c_rx_checksum(struct atl1c_adapter *adapter,
  1370. struct sk_buff *skb, struct atl1c_recv_ret_status *prrs)
  1371. {
  1372. /*
  1373. * The pid field in RRS in not correct sometimes, so we
  1374. * cannot figure out if the packet is fragmented or not,
  1375. * so we tell the KERNEL CHECKSUM_NONE
  1376. */
  1377. skb->ip_summed = CHECKSUM_NONE;
  1378. }
  1379. static int atl1c_alloc_rx_buffer(struct atl1c_adapter *adapter, const int ringid)
  1380. {
  1381. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[ringid];
  1382. struct pci_dev *pdev = adapter->pdev;
  1383. struct atl1c_buffer *buffer_info, *next_info;
  1384. struct sk_buff *skb;
  1385. void *vir_addr = NULL;
  1386. u16 num_alloc = 0;
  1387. u16 rfd_next_to_use, next_next;
  1388. struct atl1c_rx_free_desc *rfd_desc;
  1389. next_next = rfd_next_to_use = rfd_ring->next_to_use;
  1390. if (++next_next == rfd_ring->count)
  1391. next_next = 0;
  1392. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1393. next_info = &rfd_ring->buffer_info[next_next];
  1394. while (next_info->state == ATL1_BUFFER_FREE) {
  1395. rfd_desc = ATL1C_RFD_DESC(rfd_ring, rfd_next_to_use);
  1396. skb = dev_alloc_skb(adapter->rx_buffer_len);
  1397. if (unlikely(!skb)) {
  1398. if (netif_msg_rx_err(adapter))
  1399. dev_warn(&pdev->dev, "alloc rx buffer failed\n");
  1400. break;
  1401. }
  1402. /*
  1403. * Make buffer alignment 2 beyond a 16 byte boundary
  1404. * this will result in a 16 byte aligned IP header after
  1405. * the 14 byte MAC header is removed
  1406. */
  1407. vir_addr = skb->data;
  1408. buffer_info->state = ATL1_BUFFER_BUSY;
  1409. buffer_info->skb = skb;
  1410. buffer_info->length = adapter->rx_buffer_len;
  1411. buffer_info->dma = pci_map_single(pdev, vir_addr,
  1412. buffer_info->length,
  1413. PCI_DMA_FROMDEVICE);
  1414. rfd_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  1415. rfd_next_to_use = next_next;
  1416. if (++next_next == rfd_ring->count)
  1417. next_next = 0;
  1418. buffer_info = &rfd_ring->buffer_info[rfd_next_to_use];
  1419. next_info = &rfd_ring->buffer_info[next_next];
  1420. num_alloc++;
  1421. }
  1422. if (num_alloc) {
  1423. /* TODO: update mailbox here */
  1424. wmb();
  1425. rfd_ring->next_to_use = rfd_next_to_use;
  1426. AT_WRITE_REG(&adapter->hw, atl1c_rfd_prod_idx_regs[ringid],
  1427. rfd_ring->next_to_use & MB_RFDX_PROD_IDX_MASK);
  1428. }
  1429. return num_alloc;
  1430. }
  1431. static void atl1c_clean_rrd(struct atl1c_rrd_ring *rrd_ring,
  1432. struct atl1c_recv_ret_status *rrs, u16 num)
  1433. {
  1434. u16 i;
  1435. /* the relationship between rrd and rfd is one map one */
  1436. for (i = 0; i < num; i++, rrs = ATL1C_RRD_DESC(rrd_ring,
  1437. rrd_ring->next_to_clean)) {
  1438. rrs->word3 &= ~RRS_RXD_UPDATED;
  1439. if (++rrd_ring->next_to_clean == rrd_ring->count)
  1440. rrd_ring->next_to_clean = 0;
  1441. }
  1442. }
  1443. static void atl1c_clean_rfd(struct atl1c_rfd_ring *rfd_ring,
  1444. struct atl1c_recv_ret_status *rrs, u16 num)
  1445. {
  1446. u16 i;
  1447. u16 rfd_index;
  1448. struct atl1c_buffer *buffer_info = rfd_ring->buffer_info;
  1449. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1450. RRS_RX_RFD_INDEX_MASK;
  1451. for (i = 0; i < num; i++) {
  1452. buffer_info[rfd_index].skb = NULL;
  1453. buffer_info[rfd_index].state = ATL1_BUFFER_FREE;
  1454. if (++rfd_index == rfd_ring->count)
  1455. rfd_index = 0;
  1456. }
  1457. rfd_ring->next_to_clean = rfd_index;
  1458. }
  1459. static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
  1460. int *work_done, int work_to_do)
  1461. {
  1462. u16 rfd_num, rfd_index;
  1463. u16 count = 0;
  1464. u16 length;
  1465. struct pci_dev *pdev = adapter->pdev;
  1466. struct net_device *netdev = adapter->netdev;
  1467. struct atl1c_rfd_ring *rfd_ring = &adapter->rfd_ring[que];
  1468. struct atl1c_rrd_ring *rrd_ring = &adapter->rrd_ring[que];
  1469. struct sk_buff *skb;
  1470. struct atl1c_recv_ret_status *rrs;
  1471. struct atl1c_buffer *buffer_info;
  1472. while (1) {
  1473. if (*work_done >= work_to_do)
  1474. break;
  1475. rrs = ATL1C_RRD_DESC(rrd_ring, rrd_ring->next_to_clean);
  1476. if (likely(RRS_RXD_IS_VALID(rrs->word3))) {
  1477. rfd_num = (rrs->word0 >> RRS_RX_RFD_CNT_SHIFT) &
  1478. RRS_RX_RFD_CNT_MASK;
  1479. if (unlikely(rfd_num != 1))
  1480. /* TODO support mul rfd*/
  1481. if (netif_msg_rx_err(adapter))
  1482. dev_warn(&pdev->dev,
  1483. "Multi rfd not support yet!\n");
  1484. goto rrs_checked;
  1485. } else {
  1486. break;
  1487. }
  1488. rrs_checked:
  1489. atl1c_clean_rrd(rrd_ring, rrs, rfd_num);
  1490. if (rrs->word3 & (RRS_RX_ERR_SUM | RRS_802_3_LEN_ERR)) {
  1491. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1492. if (netif_msg_rx_err(adapter))
  1493. dev_warn(&pdev->dev,
  1494. "wrong packet! rrs word3 is %x\n",
  1495. rrs->word3);
  1496. continue;
  1497. }
  1498. length = le16_to_cpu((rrs->word3 >> RRS_PKT_SIZE_SHIFT) &
  1499. RRS_PKT_SIZE_MASK);
  1500. /* Good Receive */
  1501. if (likely(rfd_num == 1)) {
  1502. rfd_index = (rrs->word0 >> RRS_RX_RFD_INDEX_SHIFT) &
  1503. RRS_RX_RFD_INDEX_MASK;
  1504. buffer_info = &rfd_ring->buffer_info[rfd_index];
  1505. pci_unmap_single(pdev, buffer_info->dma,
  1506. buffer_info->length, PCI_DMA_FROMDEVICE);
  1507. skb = buffer_info->skb;
  1508. } else {
  1509. /* TODO */
  1510. if (netif_msg_rx_err(adapter))
  1511. dev_warn(&pdev->dev,
  1512. "Multi rfd not support yet!\n");
  1513. break;
  1514. }
  1515. atl1c_clean_rfd(rfd_ring, rrs, rfd_num);
  1516. skb_put(skb, length - ETH_FCS_LEN);
  1517. skb->protocol = eth_type_trans(skb, netdev);
  1518. skb->dev = netdev;
  1519. atl1c_rx_checksum(adapter, skb, rrs);
  1520. if (unlikely(adapter->vlgrp) && rrs->word3 & RRS_VLAN_INS) {
  1521. u16 vlan;
  1522. AT_TAG_TO_VLAN(rrs->vlan_tag, vlan);
  1523. vlan = le16_to_cpu(vlan);
  1524. vlan_hwaccel_receive_skb(skb, adapter->vlgrp, vlan);
  1525. } else
  1526. netif_receive_skb(skb);
  1527. netdev->last_rx = jiffies;
  1528. (*work_done)++;
  1529. count++;
  1530. }
  1531. if (count)
  1532. atl1c_alloc_rx_buffer(adapter, que);
  1533. }
  1534. /*
  1535. * atl1c_clean - NAPI Rx polling callback
  1536. * @adapter: board private structure
  1537. */
  1538. static int atl1c_clean(struct napi_struct *napi, int budget)
  1539. {
  1540. struct atl1c_adapter *adapter =
  1541. container_of(napi, struct atl1c_adapter, napi);
  1542. int work_done = 0;
  1543. /* Keep link state information with original netdev */
  1544. if (!netif_carrier_ok(adapter->netdev))
  1545. goto quit_polling;
  1546. /* just enable one RXQ */
  1547. atl1c_clean_rx_irq(adapter, 0, &work_done, budget);
  1548. if (work_done < budget) {
  1549. quit_polling:
  1550. napi_complete(napi);
  1551. adapter->hw.intr_mask |= ISR_RX_PKT;
  1552. AT_WRITE_REG(&adapter->hw, REG_IMR, adapter->hw.intr_mask);
  1553. }
  1554. return work_done;
  1555. }
  1556. #ifdef CONFIG_NET_POLL_CONTROLLER
  1557. /*
  1558. * Polling 'interrupt' - used by things like netconsole to send skbs
  1559. * without having to re-enable interrupts. It's not called while
  1560. * the interrupt routine is executing.
  1561. */
  1562. static void atl1c_netpoll(struct net_device *netdev)
  1563. {
  1564. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1565. disable_irq(adapter->pdev->irq);
  1566. atl1c_intr(adapter->pdev->irq, netdev);
  1567. enable_irq(adapter->pdev->irq);
  1568. }
  1569. #endif
  1570. static inline u16 atl1c_tpd_avail(struct atl1c_adapter *adapter, enum atl1c_trans_queue type)
  1571. {
  1572. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1573. u16 next_to_use = 0;
  1574. u16 next_to_clean = 0;
  1575. next_to_clean = atomic_read(&tpd_ring->next_to_clean);
  1576. next_to_use = tpd_ring->next_to_use;
  1577. return (u16)(next_to_clean > next_to_use) ?
  1578. (next_to_clean - next_to_use - 1) :
  1579. (tpd_ring->count + next_to_clean - next_to_use - 1);
  1580. }
  1581. /*
  1582. * get next usable tpd
  1583. * Note: should call atl1c_tdp_avail to make sure
  1584. * there is enough tpd to use
  1585. */
  1586. static struct atl1c_tpd_desc *atl1c_get_tpd(struct atl1c_adapter *adapter,
  1587. enum atl1c_trans_queue type)
  1588. {
  1589. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1590. struct atl1c_tpd_desc *tpd_desc;
  1591. u16 next_to_use = 0;
  1592. next_to_use = tpd_ring->next_to_use;
  1593. if (++tpd_ring->next_to_use == tpd_ring->count)
  1594. tpd_ring->next_to_use = 0;
  1595. tpd_desc = ATL1C_TPD_DESC(tpd_ring, next_to_use);
  1596. memset(tpd_desc, 0, sizeof(struct atl1c_tpd_desc));
  1597. return tpd_desc;
  1598. }
  1599. static struct atl1c_buffer *
  1600. atl1c_get_tx_buffer(struct atl1c_adapter *adapter, struct atl1c_tpd_desc *tpd)
  1601. {
  1602. struct atl1c_tpd_ring *tpd_ring = adapter->tpd_ring;
  1603. return &tpd_ring->buffer_info[tpd -
  1604. (struct atl1c_tpd_desc *)tpd_ring->desc];
  1605. }
  1606. /* Calculate the transmit packet descript needed*/
  1607. static u16 atl1c_cal_tpd_req(const struct sk_buff *skb)
  1608. {
  1609. u16 tpd_req;
  1610. u16 proto_hdr_len = 0;
  1611. tpd_req = skb_shinfo(skb)->nr_frags + 1;
  1612. if (skb_is_gso(skb)) {
  1613. proto_hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1614. if (proto_hdr_len < skb_headlen(skb))
  1615. tpd_req++;
  1616. if (skb_shinfo(skb)->gso_type & SKB_GSO_TCPV6)
  1617. tpd_req++;
  1618. }
  1619. return tpd_req;
  1620. }
  1621. static int atl1c_tso_csum(struct atl1c_adapter *adapter,
  1622. struct sk_buff *skb,
  1623. struct atl1c_tpd_desc **tpd,
  1624. enum atl1c_trans_queue type)
  1625. {
  1626. struct pci_dev *pdev = adapter->pdev;
  1627. u8 hdr_len;
  1628. u32 real_len;
  1629. unsigned short offload_type;
  1630. int err;
  1631. if (skb_is_gso(skb)) {
  1632. if (skb_header_cloned(skb)) {
  1633. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  1634. if (unlikely(err))
  1635. return -1;
  1636. }
  1637. offload_type = skb_shinfo(skb)->gso_type;
  1638. if (offload_type & SKB_GSO_TCPV4) {
  1639. real_len = (((unsigned char *)ip_hdr(skb) - skb->data)
  1640. + ntohs(ip_hdr(skb)->tot_len));
  1641. if (real_len < skb->len)
  1642. pskb_trim(skb, real_len);
  1643. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1644. if (unlikely(skb->len == hdr_len)) {
  1645. /* only xsum need */
  1646. if (netif_msg_tx_queued(adapter))
  1647. dev_warn(&pdev->dev,
  1648. "IPV4 tso with zero data??\n");
  1649. goto check_sum;
  1650. } else {
  1651. ip_hdr(skb)->check = 0;
  1652. tcp_hdr(skb)->check = ~csum_tcpudp_magic(
  1653. ip_hdr(skb)->saddr,
  1654. ip_hdr(skb)->daddr,
  1655. 0, IPPROTO_TCP, 0);
  1656. (*tpd)->word1 |= 1 << TPD_IPV4_PACKET_SHIFT;
  1657. }
  1658. }
  1659. if (offload_type & SKB_GSO_TCPV6) {
  1660. struct atl1c_tpd_ext_desc *etpd =
  1661. *(struct atl1c_tpd_ext_desc **)(tpd);
  1662. memset(etpd, 0, sizeof(struct atl1c_tpd_ext_desc));
  1663. *tpd = atl1c_get_tpd(adapter, type);
  1664. ipv6_hdr(skb)->payload_len = 0;
  1665. /* check payload == 0 byte ? */
  1666. hdr_len = (skb_transport_offset(skb) + tcp_hdrlen(skb));
  1667. if (unlikely(skb->len == hdr_len)) {
  1668. /* only xsum need */
  1669. if (netif_msg_tx_queued(adapter))
  1670. dev_warn(&pdev->dev,
  1671. "IPV6 tso with zero data??\n");
  1672. goto check_sum;
  1673. } else
  1674. tcp_hdr(skb)->check = ~csum_ipv6_magic(
  1675. &ipv6_hdr(skb)->saddr,
  1676. &ipv6_hdr(skb)->daddr,
  1677. 0, IPPROTO_TCP, 0);
  1678. etpd->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1679. etpd->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1680. etpd->pkt_len = cpu_to_le32(skb->len);
  1681. (*tpd)->word1 |= 1 << TPD_LSO_VER_SHIFT;
  1682. }
  1683. (*tpd)->word1 |= 1 << TPD_LSO_EN_SHIFT;
  1684. (*tpd)->word1 |= (skb_transport_offset(skb) & TPD_TCPHDR_OFFSET_MASK) <<
  1685. TPD_TCPHDR_OFFSET_SHIFT;
  1686. (*tpd)->word1 |= (skb_shinfo(skb)->gso_size & TPD_MSS_MASK) <<
  1687. TPD_MSS_SHIFT;
  1688. return 0;
  1689. }
  1690. check_sum:
  1691. if (likely(skb->ip_summed == CHECKSUM_PARTIAL)) {
  1692. u8 css, cso;
  1693. cso = skb_transport_offset(skb);
  1694. if (unlikely(cso & 0x1)) {
  1695. if (netif_msg_tx_err(adapter))
  1696. dev_err(&adapter->pdev->dev,
  1697. "payload offset should not an event number\n");
  1698. return -1;
  1699. } else {
  1700. css = cso + skb->csum_offset;
  1701. (*tpd)->word1 |= ((cso >> 1) & TPD_PLOADOFFSET_MASK) <<
  1702. TPD_PLOADOFFSET_SHIFT;
  1703. (*tpd)->word1 |= ((css >> 1) & TPD_CCSUM_OFFSET_MASK) <<
  1704. TPD_CCSUM_OFFSET_SHIFT;
  1705. (*tpd)->word1 |= 1 << TPD_CCSUM_EN_SHIFT;
  1706. }
  1707. }
  1708. return 0;
  1709. }
  1710. static void atl1c_tx_map(struct atl1c_adapter *adapter,
  1711. struct sk_buff *skb, struct atl1c_tpd_desc *tpd,
  1712. enum atl1c_trans_queue type)
  1713. {
  1714. struct atl1c_tpd_desc *use_tpd = NULL;
  1715. struct atl1c_buffer *buffer_info = NULL;
  1716. u16 buf_len = skb_headlen(skb);
  1717. u16 map_len = 0;
  1718. u16 mapped_len = 0;
  1719. u16 hdr_len = 0;
  1720. u16 nr_frags;
  1721. u16 f;
  1722. int tso;
  1723. nr_frags = skb_shinfo(skb)->nr_frags;
  1724. tso = (tpd->word1 >> TPD_LSO_EN_SHIFT) & TPD_LSO_EN_MASK;
  1725. if (tso) {
  1726. /* TSO */
  1727. map_len = hdr_len = skb_transport_offset(skb) + tcp_hdrlen(skb);
  1728. use_tpd = tpd;
  1729. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1730. buffer_info->length = map_len;
  1731. buffer_info->dma = pci_map_single(adapter->pdev,
  1732. skb->data, hdr_len, PCI_DMA_TODEVICE);
  1733. buffer_info->state = ATL1_BUFFER_BUSY;
  1734. mapped_len += map_len;
  1735. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1736. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1737. }
  1738. if (mapped_len < buf_len) {
  1739. /* mapped_len == 0, means we should use the first tpd,
  1740. which is given by caller */
  1741. if (mapped_len == 0)
  1742. use_tpd = tpd;
  1743. else {
  1744. use_tpd = atl1c_get_tpd(adapter, type);
  1745. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1746. use_tpd = atl1c_get_tpd(adapter, type);
  1747. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1748. }
  1749. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1750. buffer_info->length = buf_len - mapped_len;
  1751. buffer_info->dma =
  1752. pci_map_single(adapter->pdev, skb->data + mapped_len,
  1753. buffer_info->length, PCI_DMA_TODEVICE);
  1754. buffer_info->state = ATL1_BUFFER_BUSY;
  1755. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1756. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1757. }
  1758. for (f = 0; f < nr_frags; f++) {
  1759. struct skb_frag_struct *frag;
  1760. frag = &skb_shinfo(skb)->frags[f];
  1761. use_tpd = atl1c_get_tpd(adapter, type);
  1762. memcpy(use_tpd, tpd, sizeof(struct atl1c_tpd_desc));
  1763. buffer_info = atl1c_get_tx_buffer(adapter, use_tpd);
  1764. buffer_info->length = frag->size;
  1765. buffer_info->dma =
  1766. pci_map_page(adapter->pdev, frag->page,
  1767. frag->page_offset,
  1768. buffer_info->length,
  1769. PCI_DMA_TODEVICE);
  1770. buffer_info->state = ATL1_BUFFER_BUSY;
  1771. use_tpd->buffer_addr = cpu_to_le64(buffer_info->dma);
  1772. use_tpd->buffer_len = cpu_to_le16(buffer_info->length);
  1773. }
  1774. /* The last tpd */
  1775. use_tpd->word1 |= 1 << TPD_EOP_SHIFT;
  1776. /* The last buffer info contain the skb address,
  1777. so it will be free after unmap */
  1778. buffer_info->skb = skb;
  1779. }
  1780. static void atl1c_tx_queue(struct atl1c_adapter *adapter, struct sk_buff *skb,
  1781. struct atl1c_tpd_desc *tpd, enum atl1c_trans_queue type)
  1782. {
  1783. struct atl1c_tpd_ring *tpd_ring = &adapter->tpd_ring[type];
  1784. u32 prod_data;
  1785. AT_READ_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, &prod_data);
  1786. switch (type) {
  1787. case atl1c_trans_high:
  1788. prod_data &= 0xFFFF0000;
  1789. prod_data |= tpd_ring->next_to_use & 0xFFFF;
  1790. break;
  1791. case atl1c_trans_normal:
  1792. prod_data &= 0x0000FFFF;
  1793. prod_data |= (tpd_ring->next_to_use & 0xFFFF) << 16;
  1794. break;
  1795. default:
  1796. break;
  1797. }
  1798. wmb();
  1799. AT_WRITE_REG(&adapter->hw, REG_MB_PRIO_PROD_IDX, prod_data);
  1800. }
  1801. static int atl1c_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  1802. {
  1803. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1804. unsigned long flags;
  1805. u16 tpd_req = 1;
  1806. struct atl1c_tpd_desc *tpd;
  1807. enum atl1c_trans_queue type = atl1c_trans_normal;
  1808. if (test_bit(__AT_DOWN, &adapter->flags)) {
  1809. dev_kfree_skb_any(skb);
  1810. return NETDEV_TX_OK;
  1811. }
  1812. tpd_req = atl1c_cal_tpd_req(skb);
  1813. if (!spin_trylock_irqsave(&adapter->tx_lock, flags)) {
  1814. if (netif_msg_pktdata(adapter))
  1815. dev_info(&adapter->pdev->dev, "tx locked\n");
  1816. return NETDEV_TX_LOCKED;
  1817. }
  1818. if (skb->mark == 0x01)
  1819. type = atl1c_trans_high;
  1820. else
  1821. type = atl1c_trans_normal;
  1822. if (atl1c_tpd_avail(adapter, type) < tpd_req) {
  1823. /* no enough descriptor, just stop queue */
  1824. netif_stop_queue(netdev);
  1825. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1826. return NETDEV_TX_BUSY;
  1827. }
  1828. tpd = atl1c_get_tpd(adapter, type);
  1829. /* do TSO and check sum */
  1830. if (atl1c_tso_csum(adapter, skb, &tpd, type) != 0) {
  1831. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1832. dev_kfree_skb_any(skb);
  1833. return NETDEV_TX_OK;
  1834. }
  1835. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  1836. u16 vlan = vlan_tx_tag_get(skb);
  1837. __le16 tag;
  1838. vlan = cpu_to_le16(vlan);
  1839. AT_VLAN_TO_TAG(vlan, tag);
  1840. tpd->word1 |= 1 << TPD_INS_VTAG_SHIFT;
  1841. tpd->vlan_tag = tag;
  1842. }
  1843. if (skb_network_offset(skb) != ETH_HLEN)
  1844. tpd->word1 |= 1 << TPD_ETH_TYPE_SHIFT; /* Ethernet frame */
  1845. atl1c_tx_map(adapter, skb, tpd, type);
  1846. atl1c_tx_queue(adapter, skb, tpd, type);
  1847. spin_unlock_irqrestore(&adapter->tx_lock, flags);
  1848. return NETDEV_TX_OK;
  1849. }
  1850. static void atl1c_free_irq(struct atl1c_adapter *adapter)
  1851. {
  1852. struct net_device *netdev = adapter->netdev;
  1853. free_irq(adapter->pdev->irq, netdev);
  1854. if (adapter->have_msi)
  1855. pci_disable_msi(adapter->pdev);
  1856. }
  1857. static int atl1c_request_irq(struct atl1c_adapter *adapter)
  1858. {
  1859. struct pci_dev *pdev = adapter->pdev;
  1860. struct net_device *netdev = adapter->netdev;
  1861. int flags = 0;
  1862. int err = 0;
  1863. adapter->have_msi = true;
  1864. err = pci_enable_msi(adapter->pdev);
  1865. if (err) {
  1866. if (netif_msg_ifup(adapter))
  1867. dev_err(&pdev->dev,
  1868. "Unable to allocate MSI interrupt Error: %d\n",
  1869. err);
  1870. adapter->have_msi = false;
  1871. } else
  1872. netdev->irq = pdev->irq;
  1873. if (!adapter->have_msi)
  1874. flags |= IRQF_SHARED;
  1875. err = request_irq(adapter->pdev->irq, &atl1c_intr, flags,
  1876. netdev->name, netdev);
  1877. if (err) {
  1878. if (netif_msg_ifup(adapter))
  1879. dev_err(&pdev->dev,
  1880. "Unable to allocate interrupt Error: %d\n",
  1881. err);
  1882. if (adapter->have_msi)
  1883. pci_disable_msi(adapter->pdev);
  1884. return err;
  1885. }
  1886. if (netif_msg_ifup(adapter))
  1887. dev_dbg(&pdev->dev, "atl1c_request_irq OK\n");
  1888. return err;
  1889. }
  1890. int atl1c_up(struct atl1c_adapter *adapter)
  1891. {
  1892. struct net_device *netdev = adapter->netdev;
  1893. int num;
  1894. int err;
  1895. int i;
  1896. netif_carrier_off(netdev);
  1897. atl1c_init_ring_ptrs(adapter);
  1898. atl1c_set_multi(netdev);
  1899. atl1c_restore_vlan(adapter);
  1900. for (i = 0; i < adapter->num_rx_queues; i++) {
  1901. num = atl1c_alloc_rx_buffer(adapter, i);
  1902. if (unlikely(num == 0)) {
  1903. err = -ENOMEM;
  1904. goto err_alloc_rx;
  1905. }
  1906. }
  1907. if (atl1c_configure(adapter)) {
  1908. err = -EIO;
  1909. goto err_up;
  1910. }
  1911. err = atl1c_request_irq(adapter);
  1912. if (unlikely(err))
  1913. goto err_up;
  1914. clear_bit(__AT_DOWN, &adapter->flags);
  1915. napi_enable(&adapter->napi);
  1916. atl1c_irq_enable(adapter);
  1917. atl1c_check_link_status(adapter);
  1918. netif_start_queue(netdev);
  1919. return err;
  1920. err_up:
  1921. err_alloc_rx:
  1922. atl1c_clean_rx_ring(adapter);
  1923. return err;
  1924. }
  1925. void atl1c_down(struct atl1c_adapter *adapter)
  1926. {
  1927. struct net_device *netdev = adapter->netdev;
  1928. atl1c_del_timer(adapter);
  1929. atl1c_cancel_work(adapter);
  1930. /* signal that we're down so the interrupt handler does not
  1931. * reschedule our watchdog timer */
  1932. set_bit(__AT_DOWN, &adapter->flags);
  1933. netif_carrier_off(netdev);
  1934. napi_disable(&adapter->napi);
  1935. atl1c_irq_disable(adapter);
  1936. atl1c_free_irq(adapter);
  1937. AT_WRITE_REG(&adapter->hw, REG_ISR, ISR_DIS_INT);
  1938. /* reset MAC to disable all RX/TX */
  1939. atl1c_reset_mac(&adapter->hw);
  1940. msleep(1);
  1941. adapter->link_speed = SPEED_0;
  1942. adapter->link_duplex = -1;
  1943. atl1c_clean_tx_ring(adapter, atl1c_trans_normal);
  1944. atl1c_clean_tx_ring(adapter, atl1c_trans_high);
  1945. atl1c_clean_rx_ring(adapter);
  1946. }
  1947. /*
  1948. * atl1c_open - Called when a network interface is made active
  1949. * @netdev: network interface device structure
  1950. *
  1951. * Returns 0 on success, negative value on failure
  1952. *
  1953. * The open entry point is called when a network interface is made
  1954. * active by the system (IFF_UP). At this point all resources needed
  1955. * for transmit and receive operations are allocated, the interrupt
  1956. * handler is registered with the OS, the watchdog timer is started,
  1957. * and the stack is notified that the interface is ready.
  1958. */
  1959. static int atl1c_open(struct net_device *netdev)
  1960. {
  1961. struct atl1c_adapter *adapter = netdev_priv(netdev);
  1962. int err;
  1963. /* disallow open during test */
  1964. if (test_bit(__AT_TESTING, &adapter->flags))
  1965. return -EBUSY;
  1966. /* allocate rx/tx dma buffer & descriptors */
  1967. err = atl1c_setup_ring_resources(adapter);
  1968. if (unlikely(err))
  1969. return err;
  1970. err = atl1c_up(adapter);
  1971. if (unlikely(err))
  1972. goto err_up;
  1973. if (adapter->hw.ctrl_flags & ATL1C_FPGA_VERSION) {
  1974. u32 phy_data;
  1975. AT_READ_REG(&adapter->hw, REG_MDIO_CTRL, &phy_data);
  1976. phy_data |= MDIO_AP_EN;
  1977. AT_WRITE_REG(&adapter->hw, REG_MDIO_CTRL, phy_data);
  1978. }
  1979. return 0;
  1980. err_up:
  1981. atl1c_free_irq(adapter);
  1982. atl1c_free_ring_resources(adapter);
  1983. atl1c_reset_mac(&adapter->hw);
  1984. return err;
  1985. }
  1986. /*
  1987. * atl1c_close - Disables a network interface
  1988. * @netdev: network interface device structure
  1989. *
  1990. * Returns 0, this is not allowed to fail
  1991. *
  1992. * The close entry point is called when an interface is de-activated
  1993. * by the OS. The hardware is still under the drivers control, but
  1994. * needs to be disabled. A global MAC reset is issued to stop the
  1995. * hardware, and all transmit and receive resources are freed.
  1996. */
  1997. static int atl1c_close(struct net_device *netdev)
  1998. {
  1999. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2000. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2001. atl1c_down(adapter);
  2002. atl1c_free_ring_resources(adapter);
  2003. return 0;
  2004. }
  2005. static int atl1c_suspend(struct pci_dev *pdev, pm_message_t state)
  2006. {
  2007. struct net_device *netdev = pci_get_drvdata(pdev);
  2008. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2009. struct atl1c_hw *hw = &adapter->hw;
  2010. u32 ctrl;
  2011. u32 mac_ctrl_data;
  2012. u32 master_ctrl_data;
  2013. u32 wol_ctrl_data;
  2014. u16 mii_bmsr_data;
  2015. u16 save_autoneg_advertised;
  2016. u16 mii_intr_status_data;
  2017. u32 wufc = adapter->wol;
  2018. u32 i;
  2019. int retval = 0;
  2020. if (netif_running(netdev)) {
  2021. WARN_ON(test_bit(__AT_RESETTING, &adapter->flags));
  2022. atl1c_down(adapter);
  2023. }
  2024. netif_device_detach(netdev);
  2025. atl1c_disable_l0s_l1(hw);
  2026. retval = pci_save_state(pdev);
  2027. if (retval)
  2028. return retval;
  2029. if (wufc) {
  2030. AT_READ_REG(hw, REG_MASTER_CTRL, &master_ctrl_data);
  2031. master_ctrl_data &= ~MASTER_CTRL_CLK_SEL_DIS;
  2032. /* get link status */
  2033. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2034. atl1c_read_phy_reg(hw, MII_BMSR, (u16 *)&mii_bmsr_data);
  2035. save_autoneg_advertised = hw->autoneg_advertised;
  2036. hw->autoneg_advertised = ADVERTISED_10baseT_Half;
  2037. if (atl1c_restart_autoneg(hw) != 0)
  2038. if (netif_msg_link(adapter))
  2039. dev_warn(&pdev->dev, "phy autoneg failed\n");
  2040. hw->phy_configured = false; /* re-init PHY when resume */
  2041. hw->autoneg_advertised = save_autoneg_advertised;
  2042. /* turn on magic packet wol */
  2043. if (wufc & AT_WUFC_MAG)
  2044. wol_ctrl_data = WOL_MAGIC_EN | WOL_MAGIC_PME_EN;
  2045. if (wufc & AT_WUFC_LNKC) {
  2046. for (i = 0; i < AT_SUSPEND_LINK_TIMEOUT; i++) {
  2047. msleep(100);
  2048. atl1c_read_phy_reg(hw, MII_BMSR,
  2049. (u16 *)&mii_bmsr_data);
  2050. if (mii_bmsr_data & BMSR_LSTATUS)
  2051. break;
  2052. }
  2053. if ((mii_bmsr_data & BMSR_LSTATUS) == 0)
  2054. if (netif_msg_link(adapter))
  2055. dev_warn(&pdev->dev,
  2056. "%s: Link may change"
  2057. "when suspend\n",
  2058. atl1c_driver_name);
  2059. wol_ctrl_data |= WOL_LINK_CHG_EN | WOL_LINK_CHG_PME_EN;
  2060. /* only link up can wake up */
  2061. if (atl1c_write_phy_reg(hw, MII_IER, IER_LINK_UP) != 0) {
  2062. if (netif_msg_link(adapter))
  2063. dev_err(&pdev->dev,
  2064. "%s: read write phy "
  2065. "register failed.\n",
  2066. atl1c_driver_name);
  2067. goto wol_dis;
  2068. }
  2069. }
  2070. /* clear phy interrupt */
  2071. atl1c_read_phy_reg(hw, MII_ISR, &mii_intr_status_data);
  2072. /* Config MAC Ctrl register */
  2073. mac_ctrl_data = MAC_CTRL_RX_EN;
  2074. /* set to 10/100M halt duplex */
  2075. mac_ctrl_data |= atl1c_mac_speed_10_100 << MAC_CTRL_SPEED_SHIFT;
  2076. mac_ctrl_data |= (((u32)adapter->hw.preamble_len &
  2077. MAC_CTRL_PRMLEN_MASK) <<
  2078. MAC_CTRL_PRMLEN_SHIFT);
  2079. if (adapter->vlgrp)
  2080. mac_ctrl_data |= MAC_CTRL_RMV_VLAN;
  2081. /* magic packet maybe Broadcast&multicast&Unicast frame */
  2082. if (wufc & AT_WUFC_MAG)
  2083. mac_ctrl_data |= MAC_CTRL_BC_EN;
  2084. if (netif_msg_hw(adapter))
  2085. dev_dbg(&pdev->dev,
  2086. "%s: suspend MAC=0x%x\n",
  2087. atl1c_driver_name, mac_ctrl_data);
  2088. AT_WRITE_REG(hw, REG_MASTER_CTRL, master_ctrl_data);
  2089. AT_WRITE_REG(hw, REG_WOL_CTRL, wol_ctrl_data);
  2090. AT_WRITE_REG(hw, REG_MAC_CTRL, mac_ctrl_data);
  2091. /* pcie patch */
  2092. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2093. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2094. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2095. pci_enable_wake(pdev, pci_choose_state(pdev, state), 1);
  2096. goto suspend_exit;
  2097. }
  2098. wol_dis:
  2099. /* WOL disabled */
  2100. AT_WRITE_REG(hw, REG_WOL_CTRL, 0);
  2101. /* pcie patch */
  2102. AT_READ_REG(hw, REG_PCIE_PHYMISC, &ctrl);
  2103. ctrl |= PCIE_PHYMISC_FORCE_RCV_DET;
  2104. AT_WRITE_REG(hw, REG_PCIE_PHYMISC, ctrl);
  2105. atl1c_phy_disable(hw);
  2106. hw->phy_configured = false; /* re-init PHY when resume */
  2107. pci_enable_wake(pdev, pci_choose_state(pdev, state), 0);
  2108. suspend_exit:
  2109. pci_disable_device(pdev);
  2110. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  2111. return 0;
  2112. }
  2113. static int atl1c_resume(struct pci_dev *pdev)
  2114. {
  2115. struct net_device *netdev = pci_get_drvdata(pdev);
  2116. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2117. pci_set_power_state(pdev, PCI_D0);
  2118. pci_restore_state(pdev);
  2119. pci_enable_wake(pdev, PCI_D3hot, 0);
  2120. pci_enable_wake(pdev, PCI_D3cold, 0);
  2121. AT_WRITE_REG(&adapter->hw, REG_WOL_CTRL, 0);
  2122. atl1c_phy_reset(&adapter->hw);
  2123. atl1c_reset_mac(&adapter->hw);
  2124. netif_device_attach(netdev);
  2125. if (netif_running(netdev))
  2126. atl1c_up(adapter);
  2127. return 0;
  2128. }
  2129. static void atl1c_shutdown(struct pci_dev *pdev)
  2130. {
  2131. atl1c_suspend(pdev, PMSG_SUSPEND);
  2132. }
  2133. static const struct net_device_ops atl1c_netdev_ops = {
  2134. .ndo_open = atl1c_open,
  2135. .ndo_stop = atl1c_close,
  2136. .ndo_validate_addr = eth_validate_addr,
  2137. .ndo_start_xmit = atl1c_xmit_frame,
  2138. .ndo_set_mac_address = atl1c_set_mac_addr,
  2139. .ndo_set_multicast_list = atl1c_set_multi,
  2140. .ndo_change_mtu = atl1c_change_mtu,
  2141. .ndo_do_ioctl = atl1c_ioctl,
  2142. .ndo_tx_timeout = atl1c_tx_timeout,
  2143. .ndo_get_stats = atl1c_get_stats,
  2144. .ndo_vlan_rx_register = atl1c_vlan_rx_register,
  2145. #ifdef CONFIG_NET_POLL_CONTROLLER
  2146. .ndo_poll_controller = atl1c_netpoll,
  2147. #endif
  2148. };
  2149. static int atl1c_init_netdev(struct net_device *netdev, struct pci_dev *pdev)
  2150. {
  2151. SET_NETDEV_DEV(netdev, &pdev->dev);
  2152. pci_set_drvdata(pdev, netdev);
  2153. netdev->irq = pdev->irq;
  2154. netdev->netdev_ops = &atl1c_netdev_ops;
  2155. netdev->watchdog_timeo = AT_TX_WATCHDOG;
  2156. atl1c_set_ethtool_ops(netdev);
  2157. /* TODO: add when ready */
  2158. netdev->features = NETIF_F_SG |
  2159. NETIF_F_HW_CSUM |
  2160. NETIF_F_HW_VLAN_TX |
  2161. NETIF_F_HW_VLAN_RX |
  2162. NETIF_F_TSO |
  2163. NETIF_F_TSO6;
  2164. return 0;
  2165. }
  2166. /*
  2167. * atl1c_probe - Device Initialization Routine
  2168. * @pdev: PCI device information struct
  2169. * @ent: entry in atl1c_pci_tbl
  2170. *
  2171. * Returns 0 on success, negative on failure
  2172. *
  2173. * atl1c_probe initializes an adapter identified by a pci_dev structure.
  2174. * The OS initialization, configuring of the adapter private structure,
  2175. * and a hardware reset occur.
  2176. */
  2177. static int __devinit atl1c_probe(struct pci_dev *pdev,
  2178. const struct pci_device_id *ent)
  2179. {
  2180. struct net_device *netdev;
  2181. struct atl1c_adapter *adapter;
  2182. static int cards_found;
  2183. int err = 0;
  2184. /* enable device (incl. PCI PM wakeup and hotplug setup) */
  2185. err = pci_enable_device_mem(pdev);
  2186. if (err) {
  2187. dev_err(&pdev->dev, "cannot enable PCI device\n");
  2188. return err;
  2189. }
  2190. /*
  2191. * The atl1c chip can DMA to 64-bit addresses, but it uses a single
  2192. * shared register for the high 32 bits, so only a single, aligned,
  2193. * 4 GB physical address range can be used at a time.
  2194. *
  2195. * Supporting 64-bit DMA on this hardware is more trouble than it's
  2196. * worth. It is far easier to limit to 32-bit DMA than update
  2197. * various kernel subsystems to support the mechanics required by a
  2198. * fixed-high-32-bit system.
  2199. */
  2200. if ((pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) ||
  2201. (pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)) != 0)) {
  2202. dev_err(&pdev->dev, "No usable DMA configuration,aborting\n");
  2203. goto err_dma;
  2204. }
  2205. err = pci_request_regions(pdev, atl1c_driver_name);
  2206. if (err) {
  2207. dev_err(&pdev->dev, "cannot obtain PCI resources\n");
  2208. goto err_pci_reg;
  2209. }
  2210. pci_set_master(pdev);
  2211. netdev = alloc_etherdev(sizeof(struct atl1c_adapter));
  2212. if (netdev == NULL) {
  2213. err = -ENOMEM;
  2214. dev_err(&pdev->dev, "etherdev alloc failed\n");
  2215. goto err_alloc_etherdev;
  2216. }
  2217. err = atl1c_init_netdev(netdev, pdev);
  2218. if (err) {
  2219. dev_err(&pdev->dev, "init netdevice failed\n");
  2220. goto err_init_netdev;
  2221. }
  2222. adapter = netdev_priv(netdev);
  2223. adapter->bd_number = cards_found;
  2224. adapter->netdev = netdev;
  2225. adapter->pdev = pdev;
  2226. adapter->hw.adapter = adapter;
  2227. adapter->msg_enable = netif_msg_init(-1, atl1c_default_msg);
  2228. adapter->hw.hw_addr = ioremap(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  2229. if (!adapter->hw.hw_addr) {
  2230. err = -EIO;
  2231. dev_err(&pdev->dev, "cannot map device registers\n");
  2232. goto err_ioremap;
  2233. }
  2234. netdev->base_addr = (unsigned long)adapter->hw.hw_addr;
  2235. /* init mii data */
  2236. adapter->mii.dev = netdev;
  2237. adapter->mii.mdio_read = atl1c_mdio_read;
  2238. adapter->mii.mdio_write = atl1c_mdio_write;
  2239. adapter->mii.phy_id_mask = 0x1f;
  2240. adapter->mii.reg_num_mask = MDIO_REG_ADDR_MASK;
  2241. netif_napi_add(netdev, &adapter->napi, atl1c_clean, 64);
  2242. setup_timer(&adapter->phy_config_timer, atl1c_phy_config,
  2243. (unsigned long)adapter);
  2244. /* setup the private structure */
  2245. err = atl1c_sw_init(adapter);
  2246. if (err) {
  2247. dev_err(&pdev->dev, "net device private data init failed\n");
  2248. goto err_sw_init;
  2249. }
  2250. atl1c_reset_pcie(&adapter->hw, ATL1C_PCIE_L0S_L1_DISABLE |
  2251. ATL1C_PCIE_PHY_RESET);
  2252. /* Init GPHY as early as possible due to power saving issue */
  2253. atl1c_phy_reset(&adapter->hw);
  2254. err = atl1c_reset_mac(&adapter->hw);
  2255. if (err) {
  2256. err = -EIO;
  2257. goto err_reset;
  2258. }
  2259. device_init_wakeup(&pdev->dev, 1);
  2260. /* reset the controller to
  2261. * put the device in a known good starting state */
  2262. err = atl1c_phy_init(&adapter->hw);
  2263. if (err) {
  2264. err = -EIO;
  2265. goto err_reset;
  2266. }
  2267. if (atl1c_read_mac_addr(&adapter->hw) != 0) {
  2268. err = -EIO;
  2269. dev_err(&pdev->dev, "get mac address failed\n");
  2270. goto err_eeprom;
  2271. }
  2272. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  2273. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  2274. if (netif_msg_probe(adapter))
  2275. dev_dbg(&pdev->dev,
  2276. "mac address : %02x-%02x-%02x-%02x-%02x-%02x\n",
  2277. adapter->hw.mac_addr[0], adapter->hw.mac_addr[1],
  2278. adapter->hw.mac_addr[2], adapter->hw.mac_addr[3],
  2279. adapter->hw.mac_addr[4], adapter->hw.mac_addr[5]);
  2280. atl1c_hw_set_mac_addr(&adapter->hw);
  2281. INIT_WORK(&adapter->reset_task, atl1c_reset_task);
  2282. INIT_WORK(&adapter->link_chg_task, atl1c_link_chg_task);
  2283. err = register_netdev(netdev);
  2284. if (err) {
  2285. dev_err(&pdev->dev, "register netdevice failed\n");
  2286. goto err_register;
  2287. }
  2288. if (netif_msg_probe(adapter))
  2289. dev_info(&pdev->dev, "version %s\n", ATL1C_DRV_VERSION);
  2290. cards_found++;
  2291. return 0;
  2292. err_reset:
  2293. err_register:
  2294. err_sw_init:
  2295. err_eeprom:
  2296. iounmap(adapter->hw.hw_addr);
  2297. err_init_netdev:
  2298. err_ioremap:
  2299. free_netdev(netdev);
  2300. err_alloc_etherdev:
  2301. pci_release_regions(pdev);
  2302. err_pci_reg:
  2303. err_dma:
  2304. pci_disable_device(pdev);
  2305. return err;
  2306. }
  2307. /*
  2308. * atl1c_remove - Device Removal Routine
  2309. * @pdev: PCI device information struct
  2310. *
  2311. * atl1c_remove is called by the PCI subsystem to alert the driver
  2312. * that it should release a PCI device. The could be caused by a
  2313. * Hot-Plug event, or because the driver is going to be removed from
  2314. * memory.
  2315. */
  2316. static void __devexit atl1c_remove(struct pci_dev *pdev)
  2317. {
  2318. struct net_device *netdev = pci_get_drvdata(pdev);
  2319. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2320. unregister_netdev(netdev);
  2321. atl1c_phy_disable(&adapter->hw);
  2322. iounmap(adapter->hw.hw_addr);
  2323. pci_release_regions(pdev);
  2324. pci_disable_device(pdev);
  2325. free_netdev(netdev);
  2326. }
  2327. /*
  2328. * atl1c_io_error_detected - called when PCI error is detected
  2329. * @pdev: Pointer to PCI device
  2330. * @state: The current pci connection state
  2331. *
  2332. * This function is called after a PCI bus error affecting
  2333. * this device has been detected.
  2334. */
  2335. static pci_ers_result_t atl1c_io_error_detected(struct pci_dev *pdev,
  2336. pci_channel_state_t state)
  2337. {
  2338. struct net_device *netdev = pci_get_drvdata(pdev);
  2339. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2340. netif_device_detach(netdev);
  2341. if (netif_running(netdev))
  2342. atl1c_down(adapter);
  2343. pci_disable_device(pdev);
  2344. /* Request a slot slot reset. */
  2345. return PCI_ERS_RESULT_NEED_RESET;
  2346. }
  2347. /*
  2348. * atl1c_io_slot_reset - called after the pci bus has been reset.
  2349. * @pdev: Pointer to PCI device
  2350. *
  2351. * Restart the card from scratch, as if from a cold-boot. Implementation
  2352. * resembles the first-half of the e1000_resume routine.
  2353. */
  2354. static pci_ers_result_t atl1c_io_slot_reset(struct pci_dev *pdev)
  2355. {
  2356. struct net_device *netdev = pci_get_drvdata(pdev);
  2357. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2358. if (pci_enable_device(pdev)) {
  2359. if (netif_msg_hw(adapter))
  2360. dev_err(&pdev->dev,
  2361. "Cannot re-enable PCI device after reset\n");
  2362. return PCI_ERS_RESULT_DISCONNECT;
  2363. }
  2364. pci_set_master(pdev);
  2365. pci_enable_wake(pdev, PCI_D3hot, 0);
  2366. pci_enable_wake(pdev, PCI_D3cold, 0);
  2367. atl1c_reset_mac(&adapter->hw);
  2368. return PCI_ERS_RESULT_RECOVERED;
  2369. }
  2370. /*
  2371. * atl1c_io_resume - called when traffic can start flowing again.
  2372. * @pdev: Pointer to PCI device
  2373. *
  2374. * This callback is called when the error recovery driver tells us that
  2375. * its OK to resume normal operation. Implementation resembles the
  2376. * second-half of the atl1c_resume routine.
  2377. */
  2378. static void atl1c_io_resume(struct pci_dev *pdev)
  2379. {
  2380. struct net_device *netdev = pci_get_drvdata(pdev);
  2381. struct atl1c_adapter *adapter = netdev_priv(netdev);
  2382. if (netif_running(netdev)) {
  2383. if (atl1c_up(adapter)) {
  2384. if (netif_msg_hw(adapter))
  2385. dev_err(&pdev->dev,
  2386. "Cannot bring device back up after reset\n");
  2387. return;
  2388. }
  2389. }
  2390. netif_device_attach(netdev);
  2391. }
  2392. static struct pci_error_handlers atl1c_err_handler = {
  2393. .error_detected = atl1c_io_error_detected,
  2394. .slot_reset = atl1c_io_slot_reset,
  2395. .resume = atl1c_io_resume,
  2396. };
  2397. static struct pci_driver atl1c_driver = {
  2398. .name = atl1c_driver_name,
  2399. .id_table = atl1c_pci_tbl,
  2400. .probe = atl1c_probe,
  2401. .remove = __devexit_p(atl1c_remove),
  2402. /* Power Managment Hooks */
  2403. .suspend = atl1c_suspend,
  2404. .resume = atl1c_resume,
  2405. .shutdown = atl1c_shutdown,
  2406. .err_handler = &atl1c_err_handler
  2407. };
  2408. /*
  2409. * atl1c_init_module - Driver Registration Routine
  2410. *
  2411. * atl1c_init_module is the first routine called when the driver is
  2412. * loaded. All it does is register with the PCI subsystem.
  2413. */
  2414. static int __init atl1c_init_module(void)
  2415. {
  2416. return pci_register_driver(&atl1c_driver);
  2417. }
  2418. /*
  2419. * atl1c_exit_module - Driver Exit Cleanup Routine
  2420. *
  2421. * atl1c_exit_module is called just before the driver is removed
  2422. * from memory.
  2423. */
  2424. static void __exit atl1c_exit_module(void)
  2425. {
  2426. pci_unregister_driver(&atl1c_driver);
  2427. }
  2428. module_init(atl1c_init_module);
  2429. module_exit(atl1c_exit_module);