sdricoh_cs.c 15 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576
  1. /*
  2. * sdricoh_cs.c - driver for Ricoh Secure Digital Card Readers that can be
  3. * found on some Ricoh RL5c476 II cardbus bridge
  4. *
  5. * Copyright (C) 2006 - 2008 Sascha Sommer <saschasommer@freenet.de>
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. *
  21. */
  22. /*
  23. #define DEBUG
  24. #define VERBOSE_DEBUG
  25. */
  26. #include <linux/delay.h>
  27. #include <linux/highmem.h>
  28. #include <linux/pci.h>
  29. #include <linux/ioport.h>
  30. #include <linux/scatterlist.h>
  31. #include <pcmcia/cs_types.h>
  32. #include <pcmcia/cs.h>
  33. #include <pcmcia/cistpl.h>
  34. #include <pcmcia/ds.h>
  35. #include <linux/io.h>
  36. #include <linux/mmc/host.h>
  37. #define DRIVER_NAME "sdricoh_cs"
  38. static unsigned int switchlocked;
  39. /* i/o region */
  40. #define SDRICOH_PCI_REGION 0
  41. #define SDRICOH_PCI_REGION_SIZE 0x1000
  42. /* registers */
  43. #define R104_VERSION 0x104
  44. #define R200_CMD 0x200
  45. #define R204_CMD_ARG 0x204
  46. #define R208_DATAIO 0x208
  47. #define R20C_RESP 0x20c
  48. #define R21C_STATUS 0x21c
  49. #define R2E0_INIT 0x2e0
  50. #define R2E4_STATUS_RESP 0x2e4
  51. #define R2F0_RESET 0x2f0
  52. #define R224_MODE 0x224
  53. #define R226_BLOCKSIZE 0x226
  54. #define R228_POWER 0x228
  55. #define R230_DATA 0x230
  56. /* flags for the R21C_STATUS register */
  57. #define STATUS_CMD_FINISHED 0x00000001
  58. #define STATUS_TRANSFER_FINISHED 0x00000004
  59. #define STATUS_CARD_INSERTED 0x00000020
  60. #define STATUS_CARD_LOCKED 0x00000080
  61. #define STATUS_CMD_TIMEOUT 0x00400000
  62. #define STATUS_READY_TO_READ 0x01000000
  63. #define STATUS_READY_TO_WRITE 0x02000000
  64. #define STATUS_BUSY 0x40000000
  65. /* timeouts */
  66. #define INIT_TIMEOUT 100
  67. #define CMD_TIMEOUT 100000
  68. #define TRANSFER_TIMEOUT 100000
  69. #define BUSY_TIMEOUT 32767
  70. /* list of supported pcmcia devices */
  71. static struct pcmcia_device_id pcmcia_ids[] = {
  72. /* vendor and device strings followed by their crc32 hashes */
  73. PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay1Controller", 0xd9f522ed,
  74. 0xc3901202),
  75. PCMCIA_DEVICE_PROD_ID12("RICOH", "Bay Controller", 0xd9f522ed,
  76. 0xace80909),
  77. PCMCIA_DEVICE_NULL,
  78. };
  79. MODULE_DEVICE_TABLE(pcmcia, pcmcia_ids);
  80. /* mmc privdata */
  81. struct sdricoh_host {
  82. struct device *dev;
  83. struct mmc_host *mmc; /* MMC structure */
  84. unsigned char __iomem *iobase;
  85. struct pci_dev *pci_dev;
  86. int app_cmd;
  87. };
  88. /***************** register i/o helper functions *****************************/
  89. static inline unsigned int sdricoh_readl(struct sdricoh_host *host,
  90. unsigned int reg)
  91. {
  92. unsigned int value = readl(host->iobase + reg);
  93. dev_vdbg(host->dev, "rl %x 0x%x\n", reg, value);
  94. return value;
  95. }
  96. static inline void sdricoh_writel(struct sdricoh_host *host, unsigned int reg,
  97. unsigned int value)
  98. {
  99. writel(value, host->iobase + reg);
  100. dev_vdbg(host->dev, "wl %x 0x%x\n", reg, value);
  101. }
  102. static inline unsigned int sdricoh_readw(struct sdricoh_host *host,
  103. unsigned int reg)
  104. {
  105. unsigned int value = readw(host->iobase + reg);
  106. dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
  107. return value;
  108. }
  109. static inline void sdricoh_writew(struct sdricoh_host *host, unsigned int reg,
  110. unsigned short value)
  111. {
  112. writew(value, host->iobase + reg);
  113. dev_vdbg(host->dev, "ww %x 0x%x\n", reg, value);
  114. }
  115. static inline unsigned int sdricoh_readb(struct sdricoh_host *host,
  116. unsigned int reg)
  117. {
  118. unsigned int value = readb(host->iobase + reg);
  119. dev_vdbg(host->dev, "rb %x 0x%x\n", reg, value);
  120. return value;
  121. }
  122. static int sdricoh_query_status(struct sdricoh_host *host, unsigned int wanted,
  123. unsigned int timeout){
  124. unsigned int loop;
  125. unsigned int status = 0;
  126. struct device *dev = host->dev;
  127. for (loop = 0; loop < timeout; loop++) {
  128. status = sdricoh_readl(host, R21C_STATUS);
  129. sdricoh_writel(host, R2E4_STATUS_RESP, status);
  130. if (status & wanted)
  131. break;
  132. }
  133. if (loop == timeout) {
  134. dev_err(dev, "query_status: timeout waiting for %x\n", wanted);
  135. return -ETIMEDOUT;
  136. }
  137. /* do not do this check in the loop as some commands fail otherwise */
  138. if (status & 0x7F0000) {
  139. dev_err(dev, "waiting for status bit %x failed\n", wanted);
  140. return -EINVAL;
  141. }
  142. return 0;
  143. }
  144. static int sdricoh_mmc_cmd(struct sdricoh_host *host, unsigned char opcode,
  145. unsigned int arg)
  146. {
  147. unsigned int status;
  148. int result = 0;
  149. unsigned int loop = 0;
  150. /* reset status reg? */
  151. sdricoh_writel(host, R21C_STATUS, 0x18);
  152. /* fill parameters */
  153. sdricoh_writel(host, R204_CMD_ARG, arg);
  154. sdricoh_writel(host, R200_CMD, (0x10000 << 8) | opcode);
  155. /* wait for command completion */
  156. if (opcode) {
  157. for (loop = 0; loop < CMD_TIMEOUT; loop++) {
  158. status = sdricoh_readl(host, R21C_STATUS);
  159. sdricoh_writel(host, R2E4_STATUS_RESP, status);
  160. if (status & STATUS_CMD_FINISHED)
  161. break;
  162. }
  163. /* don't check for timeout in the loop it is not always
  164. reset correctly
  165. */
  166. if (loop == CMD_TIMEOUT || status & STATUS_CMD_TIMEOUT)
  167. result = -ETIMEDOUT;
  168. }
  169. return result;
  170. }
  171. static int sdricoh_reset(struct sdricoh_host *host)
  172. {
  173. dev_dbg(host->dev, "reset\n");
  174. sdricoh_writel(host, R2F0_RESET, 0x10001);
  175. sdricoh_writel(host, R2E0_INIT, 0x10000);
  176. if (sdricoh_readl(host, R2E0_INIT) != 0x10000)
  177. return -EIO;
  178. sdricoh_writel(host, R2E0_INIT, 0x10007);
  179. sdricoh_writel(host, R224_MODE, 0x2000000);
  180. sdricoh_writel(host, R228_POWER, 0xe0);
  181. /* status register ? */
  182. sdricoh_writel(host, R21C_STATUS, 0x18);
  183. return 0;
  184. }
  185. static int sdricoh_blockio(struct sdricoh_host *host, int read,
  186. u8 *buf, int len)
  187. {
  188. int size;
  189. u32 data = 0;
  190. /* wait until the data is available */
  191. if (read) {
  192. if (sdricoh_query_status(host, STATUS_READY_TO_READ,
  193. TRANSFER_TIMEOUT))
  194. return -ETIMEDOUT;
  195. sdricoh_writel(host, R21C_STATUS, 0x18);
  196. /* read data */
  197. while (len) {
  198. data = sdricoh_readl(host, R230_DATA);
  199. size = min(len, 4);
  200. len -= size;
  201. while (size) {
  202. *buf = data & 0xFF;
  203. buf++;
  204. data >>= 8;
  205. size--;
  206. }
  207. }
  208. } else {
  209. if (sdricoh_query_status(host, STATUS_READY_TO_WRITE,
  210. TRANSFER_TIMEOUT))
  211. return -ETIMEDOUT;
  212. sdricoh_writel(host, R21C_STATUS, 0x18);
  213. /* write data */
  214. while (len) {
  215. size = min(len, 4);
  216. len -= size;
  217. while (size) {
  218. data >>= 8;
  219. data |= (u32)*buf << 24;
  220. buf++;
  221. size--;
  222. }
  223. sdricoh_writel(host, R230_DATA, data);
  224. }
  225. }
  226. if (len)
  227. return -EIO;
  228. return 0;
  229. }
  230. static void sdricoh_request(struct mmc_host *mmc, struct mmc_request *mrq)
  231. {
  232. struct sdricoh_host *host = mmc_priv(mmc);
  233. struct mmc_command *cmd = mrq->cmd;
  234. struct mmc_data *data = cmd->data;
  235. struct device *dev = host->dev;
  236. unsigned char opcode = cmd->opcode;
  237. int i;
  238. dev_dbg(dev, "=============================\n");
  239. dev_dbg(dev, "sdricoh_request opcode=%i\n", opcode);
  240. sdricoh_writel(host, R21C_STATUS, 0x18);
  241. /* MMC_APP_CMDs need some special handling */
  242. if (host->app_cmd) {
  243. opcode |= 64;
  244. host->app_cmd = 0;
  245. } else if (opcode == 55)
  246. host->app_cmd = 1;
  247. /* read/write commands seem to require this */
  248. if (data) {
  249. sdricoh_writew(host, R226_BLOCKSIZE, data->blksz);
  250. sdricoh_writel(host, R208_DATAIO, 0);
  251. }
  252. cmd->error = sdricoh_mmc_cmd(host, opcode, cmd->arg);
  253. /* read response buffer */
  254. if (cmd->flags & MMC_RSP_PRESENT) {
  255. if (cmd->flags & MMC_RSP_136) {
  256. /* CRC is stripped so we need to do some shifting. */
  257. for (i = 0; i < 4; i++) {
  258. cmd->resp[i] =
  259. sdricoh_readl(host,
  260. R20C_RESP + (3 - i) * 4) << 8;
  261. if (i != 3)
  262. cmd->resp[i] |=
  263. sdricoh_readb(host, R20C_RESP +
  264. (3 - i) * 4 - 1);
  265. }
  266. } else
  267. cmd->resp[0] = sdricoh_readl(host, R20C_RESP);
  268. }
  269. /* transfer data */
  270. if (data && cmd->error == 0) {
  271. dev_dbg(dev, "transfer: blksz %i blocks %i sg_len %i "
  272. "sg length %i\n", data->blksz, data->blocks,
  273. data->sg_len, data->sg->length);
  274. /* enter data reading mode */
  275. sdricoh_writel(host, R21C_STATUS, 0x837f031e);
  276. for (i = 0; i < data->blocks; i++) {
  277. size_t len = data->blksz;
  278. u8 *buf;
  279. struct page *page;
  280. int result;
  281. page = sg_page(data->sg);
  282. buf = kmap(page) + data->sg->offset + (len * i);
  283. result =
  284. sdricoh_blockio(host,
  285. data->flags & MMC_DATA_READ, buf, len);
  286. kunmap(page);
  287. flush_dcache_page(page);
  288. if (result) {
  289. dev_err(dev, "sdricoh_request: cmd %i "
  290. "block transfer failed\n", cmd->opcode);
  291. cmd->error = result;
  292. break;
  293. } else
  294. data->bytes_xfered += len;
  295. }
  296. sdricoh_writel(host, R208_DATAIO, 1);
  297. if (sdricoh_query_status(host, STATUS_TRANSFER_FINISHED,
  298. TRANSFER_TIMEOUT)) {
  299. dev_err(dev, "sdricoh_request: transfer end error\n");
  300. cmd->error = -EINVAL;
  301. }
  302. }
  303. /* FIXME check busy flag */
  304. mmc_request_done(mmc, mrq);
  305. dev_dbg(dev, "=============================\n");
  306. }
  307. static void sdricoh_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
  308. {
  309. struct sdricoh_host *host = mmc_priv(mmc);
  310. dev_dbg(host->dev, "set_ios\n");
  311. if (ios->power_mode == MMC_POWER_ON) {
  312. sdricoh_writel(host, R228_POWER, 0xc0e0);
  313. if (ios->bus_width == MMC_BUS_WIDTH_4) {
  314. sdricoh_writel(host, R224_MODE, 0x2000300);
  315. sdricoh_writel(host, R228_POWER, 0x40e0);
  316. } else {
  317. sdricoh_writel(host, R224_MODE, 0x2000340);
  318. }
  319. } else if (ios->power_mode == MMC_POWER_UP) {
  320. sdricoh_writel(host, R224_MODE, 0x2000320);
  321. sdricoh_writel(host, R228_POWER, 0xe0);
  322. }
  323. }
  324. static int sdricoh_get_ro(struct mmc_host *mmc)
  325. {
  326. struct sdricoh_host *host = mmc_priv(mmc);
  327. unsigned int status;
  328. status = sdricoh_readl(host, R21C_STATUS);
  329. sdricoh_writel(host, R2E4_STATUS_RESP, status);
  330. /* some notebooks seem to have the locked flag switched */
  331. if (switchlocked)
  332. return !(status & STATUS_CARD_LOCKED);
  333. return (status & STATUS_CARD_LOCKED);
  334. }
  335. static struct mmc_host_ops sdricoh_ops = {
  336. .request = sdricoh_request,
  337. .set_ios = sdricoh_set_ios,
  338. .get_ro = sdricoh_get_ro,
  339. };
  340. /* initialize the control and register it to the mmc framework */
  341. static int sdricoh_init_mmc(struct pci_dev *pci_dev,
  342. struct pcmcia_device *pcmcia_dev)
  343. {
  344. int result = 0;
  345. void __iomem *iobase = NULL;
  346. struct mmc_host *mmc = NULL;
  347. struct sdricoh_host *host = NULL;
  348. struct device *dev = &pcmcia_dev->dev;
  349. /* map iomem */
  350. if (pci_resource_len(pci_dev, SDRICOH_PCI_REGION) !=
  351. SDRICOH_PCI_REGION_SIZE) {
  352. dev_dbg(dev, "unexpected pci resource len\n");
  353. return -ENODEV;
  354. }
  355. iobase =
  356. pci_iomap(pci_dev, SDRICOH_PCI_REGION, SDRICOH_PCI_REGION_SIZE);
  357. if (!iobase) {
  358. dev_err(dev, "unable to map iobase\n");
  359. return -ENODEV;
  360. }
  361. /* check version? */
  362. if (readl(iobase + R104_VERSION) != 0x4000) {
  363. dev_dbg(dev, "no supported mmc controller found\n");
  364. result = -ENODEV;
  365. goto err;
  366. }
  367. /* allocate privdata */
  368. mmc = pcmcia_dev->priv =
  369. mmc_alloc_host(sizeof(struct sdricoh_host), &pcmcia_dev->dev);
  370. if (!mmc) {
  371. dev_err(dev, "mmc_alloc_host failed\n");
  372. result = -ENOMEM;
  373. goto err;
  374. }
  375. host = mmc_priv(mmc);
  376. host->iobase = iobase;
  377. host->dev = dev;
  378. host->pci_dev = pci_dev;
  379. mmc->ops = &sdricoh_ops;
  380. /* FIXME: frequency and voltage handling is done by the controller
  381. */
  382. mmc->f_min = 450000;
  383. mmc->f_max = 24000000;
  384. mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34;
  385. mmc->caps |= MMC_CAP_4_BIT_DATA;
  386. mmc->max_seg_size = 1024 * 512;
  387. mmc->max_blk_size = 512;
  388. /* reset the controler */
  389. if (sdricoh_reset(host)) {
  390. dev_dbg(dev, "could not reset\n");
  391. result = -EIO;
  392. goto err;
  393. }
  394. result = mmc_add_host(mmc);
  395. if (!result) {
  396. dev_dbg(dev, "mmc host registered\n");
  397. return 0;
  398. }
  399. err:
  400. if (iobase)
  401. pci_iounmap(pci_dev, iobase);
  402. if (mmc)
  403. mmc_free_host(mmc);
  404. return result;
  405. }
  406. /* search for supported mmc controllers */
  407. static int sdricoh_pcmcia_probe(struct pcmcia_device *pcmcia_dev)
  408. {
  409. struct pci_dev *pci_dev = NULL;
  410. dev_info(&pcmcia_dev->dev, "Searching MMC controller for pcmcia device"
  411. " %s %s ...\n", pcmcia_dev->prod_id[0], pcmcia_dev->prod_id[1]);
  412. /* search pci cardbus bridge that contains the mmc controler */
  413. /* the io region is already claimed by yenta_socket... */
  414. while ((pci_dev =
  415. pci_get_device(PCI_VENDOR_ID_RICOH, PCI_DEVICE_ID_RICOH_RL5C476,
  416. pci_dev))) {
  417. /* try to init the device */
  418. if (!sdricoh_init_mmc(pci_dev, pcmcia_dev)) {
  419. dev_info(&pcmcia_dev->dev, "MMC controller found\n");
  420. return 0;
  421. }
  422. }
  423. dev_err(&pcmcia_dev->dev, "No MMC controller was found.\n");
  424. return -ENODEV;
  425. }
  426. static void sdricoh_pcmcia_detach(struct pcmcia_device *link)
  427. {
  428. struct mmc_host *mmc = link->priv;
  429. dev_dbg(&link->dev, "detach\n");
  430. /* remove mmc host */
  431. if (mmc) {
  432. struct sdricoh_host *host = mmc_priv(mmc);
  433. mmc_remove_host(mmc);
  434. pci_iounmap(host->pci_dev, host->iobase);
  435. pci_dev_put(host->pci_dev);
  436. mmc_free_host(mmc);
  437. }
  438. pcmcia_disable_device(link);
  439. }
  440. #ifdef CONFIG_PM
  441. static int sdricoh_pcmcia_suspend(struct pcmcia_device *link)
  442. {
  443. struct mmc_host *mmc = link->priv;
  444. dev_dbg(&link->dev, "suspend\n");
  445. mmc_suspend_host(mmc, PMSG_SUSPEND);
  446. return 0;
  447. }
  448. static int sdricoh_pcmcia_resume(struct pcmcia_device *link)
  449. {
  450. struct mmc_host *mmc = link->priv;
  451. dev_dbg(&link->dev, "resume\n");
  452. sdricoh_reset(mmc_priv(mmc));
  453. mmc_resume_host(mmc);
  454. return 0;
  455. }
  456. #else
  457. #define sdricoh_pcmcia_suspend NULL
  458. #define sdricoh_pcmcia_resume NULL
  459. #endif
  460. static struct pcmcia_driver sdricoh_driver = {
  461. .drv = {
  462. .name = DRIVER_NAME,
  463. },
  464. .probe = sdricoh_pcmcia_probe,
  465. .remove = sdricoh_pcmcia_detach,
  466. .id_table = pcmcia_ids,
  467. .suspend = sdricoh_pcmcia_suspend,
  468. .resume = sdricoh_pcmcia_resume,
  469. };
  470. /*****************************************************************************\
  471. * *
  472. * Driver init/exit *
  473. * *
  474. \*****************************************************************************/
  475. static int __init sdricoh_drv_init(void)
  476. {
  477. return pcmcia_register_driver(&sdricoh_driver);
  478. }
  479. static void __exit sdricoh_drv_exit(void)
  480. {
  481. pcmcia_unregister_driver(&sdricoh_driver);
  482. }
  483. module_init(sdricoh_drv_init);
  484. module_exit(sdricoh_drv_exit);
  485. module_param(switchlocked, uint, 0444);
  486. MODULE_AUTHOR("Sascha Sommer <saschasommer@freenet.de>");
  487. MODULE_DESCRIPTION("Ricoh PCMCIA Secure Digital Interface driver");
  488. MODULE_LICENSE("GPL");
  489. MODULE_PARM_DESC(switchlocked, "Switch the cards locked status."
  490. "Use this when unlocked cards are shown readonly (default 0)");