grufault.c 20 KB

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  1. /*
  2. * SN Platform GRU Driver
  3. *
  4. * FAULT HANDLER FOR GRU DETECTED TLB MISSES
  5. *
  6. * This file contains code that handles TLB misses within the GRU.
  7. * These misses are reported either via interrupts or user polling of
  8. * the user CB.
  9. *
  10. * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/errno.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/mm.h>
  30. #include <linux/hugetlb.h>
  31. #include <linux/device.h>
  32. #include <linux/io.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/security.h>
  35. #include <asm/pgtable.h>
  36. #include "gru.h"
  37. #include "grutables.h"
  38. #include "grulib.h"
  39. #include "gru_instructions.h"
  40. #include <asm/uv/uv_hub.h>
  41. /*
  42. * Test if a physical address is a valid GRU GSEG address
  43. */
  44. static inline int is_gru_paddr(unsigned long paddr)
  45. {
  46. return paddr >= gru_start_paddr && paddr < gru_end_paddr;
  47. }
  48. /*
  49. * Find the vma of a GRU segment. Caller must hold mmap_sem.
  50. */
  51. struct vm_area_struct *gru_find_vma(unsigned long vaddr)
  52. {
  53. struct vm_area_struct *vma;
  54. vma = find_vma(current->mm, vaddr);
  55. if (vma && vma->vm_start <= vaddr && vma->vm_ops == &gru_vm_ops)
  56. return vma;
  57. return NULL;
  58. }
  59. /*
  60. * Find and lock the gts that contains the specified user vaddr.
  61. *
  62. * Returns:
  63. * - *gts with the mmap_sem locked for read and the GTS locked.
  64. * - NULL if vaddr invalid OR is not a valid GSEG vaddr.
  65. */
  66. static struct gru_thread_state *gru_find_lock_gts(unsigned long vaddr)
  67. {
  68. struct mm_struct *mm = current->mm;
  69. struct vm_area_struct *vma;
  70. struct gru_thread_state *gts = NULL;
  71. down_read(&mm->mmap_sem);
  72. vma = gru_find_vma(vaddr);
  73. if (vma)
  74. gts = gru_find_thread_state(vma, TSID(vaddr, vma));
  75. if (gts)
  76. mutex_lock(&gts->ts_ctxlock);
  77. else
  78. up_read(&mm->mmap_sem);
  79. return gts;
  80. }
  81. static struct gru_thread_state *gru_alloc_locked_gts(unsigned long vaddr)
  82. {
  83. struct mm_struct *mm = current->mm;
  84. struct vm_area_struct *vma;
  85. struct gru_thread_state *gts = NULL;
  86. down_write(&mm->mmap_sem);
  87. vma = gru_find_vma(vaddr);
  88. if (vma)
  89. gts = gru_alloc_thread_state(vma, TSID(vaddr, vma));
  90. if (gts) {
  91. mutex_lock(&gts->ts_ctxlock);
  92. downgrade_write(&mm->mmap_sem);
  93. } else {
  94. up_write(&mm->mmap_sem);
  95. }
  96. return gts;
  97. }
  98. /*
  99. * Unlock a GTS that was previously locked with gru_find_lock_gts().
  100. */
  101. static void gru_unlock_gts(struct gru_thread_state *gts)
  102. {
  103. mutex_unlock(&gts->ts_ctxlock);
  104. up_read(&current->mm->mmap_sem);
  105. }
  106. /*
  107. * Set a CB.istatus to active using a user virtual address. This must be done
  108. * just prior to a TFH RESTART. The new cb.istatus is an in-cache status ONLY.
  109. * If the line is evicted, the status may be lost. The in-cache update
  110. * is necessary to prevent the user from seeing a stale cb.istatus that will
  111. * change as soon as the TFH restart is complete. Races may cause an
  112. * occasional failure to clear the cb.istatus, but that is ok.
  113. *
  114. * If the cb address is not valid (should not happen, but...), nothing
  115. * bad will happen.. The get_user()/put_user() will fail but there
  116. * are no bad side-effects.
  117. */
  118. static void gru_cb_set_istatus_active(unsigned long __user *cb)
  119. {
  120. union {
  121. struct gru_instruction_bits bits;
  122. unsigned long dw;
  123. } u;
  124. if (cb) {
  125. get_user(u.dw, cb);
  126. u.bits.istatus = CBS_ACTIVE;
  127. put_user(u.dw, cb);
  128. }
  129. }
  130. /*
  131. * Convert a interrupt IRQ to a pointer to the GRU GTS that caused the
  132. * interrupt. Interrupts are always sent to a cpu on the blade that contains the
  133. * GRU (except for headless blades which are not currently supported). A blade
  134. * has N grus; a block of N consecutive IRQs is assigned to the GRUs. The IRQ
  135. * number uniquely identifies the GRU chiplet on the local blade that caused the
  136. * interrupt. Always called in interrupt context.
  137. */
  138. static inline struct gru_state *irq_to_gru(int irq)
  139. {
  140. return &gru_base[uv_numa_blade_id()]->bs_grus[irq - IRQ_GRU];
  141. }
  142. /*
  143. * Read & clear a TFM
  144. *
  145. * The GRU has an array of fault maps. A map is private to a cpu
  146. * Only one cpu will be accessing a cpu's fault map.
  147. *
  148. * This function scans the cpu-private fault map & clears all bits that
  149. * are set. The function returns a bitmap that indicates the bits that
  150. * were cleared. Note that sense the maps may be updated asynchronously by
  151. * the GRU, atomic operations must be used to clear bits.
  152. */
  153. static void get_clear_fault_map(struct gru_state *gru,
  154. struct gru_tlb_fault_map *imap,
  155. struct gru_tlb_fault_map *dmap)
  156. {
  157. unsigned long i, k;
  158. struct gru_tlb_fault_map *tfm;
  159. tfm = get_tfm_for_cpu(gru, gru_cpu_fault_map_id());
  160. prefetchw(tfm); /* Helps on hardware, required for emulator */
  161. for (i = 0; i < BITS_TO_LONGS(GRU_NUM_CBE); i++) {
  162. k = tfm->fault_bits[i];
  163. if (k)
  164. k = xchg(&tfm->fault_bits[i], 0UL);
  165. imap->fault_bits[i] = k;
  166. k = tfm->done_bits[i];
  167. if (k)
  168. k = xchg(&tfm->done_bits[i], 0UL);
  169. dmap->fault_bits[i] = k;
  170. }
  171. /*
  172. * Not functionally required but helps performance. (Required
  173. * on emulator)
  174. */
  175. gru_flush_cache(tfm);
  176. }
  177. /*
  178. * Atomic (interrupt context) & non-atomic (user context) functions to
  179. * convert a vaddr into a physical address. The size of the page
  180. * is returned in pageshift.
  181. * returns:
  182. * 0 - successful
  183. * < 0 - error code
  184. * 1 - (atomic only) try again in non-atomic context
  185. */
  186. static int non_atomic_pte_lookup(struct vm_area_struct *vma,
  187. unsigned long vaddr, int write,
  188. unsigned long *paddr, int *pageshift)
  189. {
  190. struct page *page;
  191. /* ZZZ Need to handle HUGE pages */
  192. if (is_vm_hugetlb_page(vma))
  193. return -EFAULT;
  194. *pageshift = PAGE_SHIFT;
  195. if (get_user_pages
  196. (current, current->mm, vaddr, 1, write, 0, &page, NULL) <= 0)
  197. return -EFAULT;
  198. *paddr = page_to_phys(page);
  199. put_page(page);
  200. return 0;
  201. }
  202. /*
  203. * atomic_pte_lookup
  204. *
  205. * Convert a user virtual address to a physical address
  206. * Only supports Intel large pages (2MB only) on x86_64.
  207. * ZZZ - hugepage support is incomplete
  208. *
  209. * NOTE: mmap_sem is already held on entry to this function. This
  210. * guarantees existence of the page tables.
  211. */
  212. static int atomic_pte_lookup(struct vm_area_struct *vma, unsigned long vaddr,
  213. int write, unsigned long *paddr, int *pageshift)
  214. {
  215. pgd_t *pgdp;
  216. pmd_t *pmdp;
  217. pud_t *pudp;
  218. pte_t pte;
  219. pgdp = pgd_offset(vma->vm_mm, vaddr);
  220. if (unlikely(pgd_none(*pgdp)))
  221. goto err;
  222. pudp = pud_offset(pgdp, vaddr);
  223. if (unlikely(pud_none(*pudp)))
  224. goto err;
  225. pmdp = pmd_offset(pudp, vaddr);
  226. if (unlikely(pmd_none(*pmdp)))
  227. goto err;
  228. #ifdef CONFIG_X86_64
  229. if (unlikely(pmd_large(*pmdp)))
  230. pte = *(pte_t *) pmdp;
  231. else
  232. #endif
  233. pte = *pte_offset_kernel(pmdp, vaddr);
  234. if (unlikely(!pte_present(pte) ||
  235. (write && (!pte_write(pte) || !pte_dirty(pte)))))
  236. return 1;
  237. *paddr = pte_pfn(pte) << PAGE_SHIFT;
  238. #ifdef CONFIG_HUGETLB_PAGE
  239. *pageshift = is_vm_hugetlb_page(vma) ? HPAGE_SHIFT : PAGE_SHIFT;
  240. #else
  241. *pageshift = PAGE_SHIFT;
  242. #endif
  243. return 0;
  244. err:
  245. local_irq_enable();
  246. return 1;
  247. }
  248. static int gru_vtop(struct gru_thread_state *gts, unsigned long vaddr,
  249. int write, int atomic, unsigned long *gpa, int *pageshift)
  250. {
  251. struct mm_struct *mm = gts->ts_mm;
  252. struct vm_area_struct *vma;
  253. unsigned long paddr;
  254. int ret, ps;
  255. vma = find_vma(mm, vaddr);
  256. if (!vma)
  257. goto inval;
  258. /*
  259. * Atomic lookup is faster & usually works even if called in non-atomic
  260. * context.
  261. */
  262. rmb(); /* Must/check ms_range_active before loading PTEs */
  263. ret = atomic_pte_lookup(vma, vaddr, write, &paddr, &ps);
  264. if (ret) {
  265. if (atomic)
  266. goto upm;
  267. if (non_atomic_pte_lookup(vma, vaddr, write, &paddr, &ps))
  268. goto inval;
  269. }
  270. if (is_gru_paddr(paddr))
  271. goto inval;
  272. paddr = paddr & ~((1UL << ps) - 1);
  273. *gpa = uv_soc_phys_ram_to_gpa(paddr);
  274. *pageshift = ps;
  275. return 0;
  276. inval:
  277. return -1;
  278. upm:
  279. return -2;
  280. }
  281. /*
  282. * Drop a TLB entry into the GRU. The fault is described by info in an TFH.
  283. * Input:
  284. * cb Address of user CBR. Null if not running in user context
  285. * Return:
  286. * 0 = dropin, exception, or switch to UPM successful
  287. * 1 = range invalidate active
  288. * < 0 = error code
  289. *
  290. */
  291. static int gru_try_dropin(struct gru_thread_state *gts,
  292. struct gru_tlb_fault_handle *tfh,
  293. unsigned long __user *cb)
  294. {
  295. int pageshift = 0, asid, write, ret, atomic = !cb;
  296. unsigned long gpa = 0, vaddr = 0;
  297. /*
  298. * NOTE: The GRU contains magic hardware that eliminates races between
  299. * TLB invalidates and TLB dropins. If an invalidate occurs
  300. * in the window between reading the TFH and the subsequent TLB dropin,
  301. * the dropin is ignored. This eliminates the need for additional locks.
  302. */
  303. /*
  304. * Error if TFH state is IDLE or FMM mode & the user issuing a UPM call.
  305. * Might be a hardware race OR a stupid user. Ignore FMM because FMM
  306. * is a transient state.
  307. */
  308. if (tfh->status != TFHSTATUS_EXCEPTION) {
  309. gru_flush_cache(tfh);
  310. if (tfh->status != TFHSTATUS_EXCEPTION)
  311. goto failnoexception;
  312. STAT(tfh_stale_on_fault);
  313. }
  314. if (tfh->state == TFHSTATE_IDLE)
  315. goto failidle;
  316. if (tfh->state == TFHSTATE_MISS_FMM && cb)
  317. goto failfmm;
  318. write = (tfh->cause & TFHCAUSE_TLB_MOD) != 0;
  319. vaddr = tfh->missvaddr;
  320. asid = tfh->missasid;
  321. if (asid == 0)
  322. goto failnoasid;
  323. rmb(); /* TFH must be cache resident before reading ms_range_active */
  324. /*
  325. * TFH is cache resident - at least briefly. Fail the dropin
  326. * if a range invalidate is active.
  327. */
  328. if (atomic_read(&gts->ts_gms->ms_range_active))
  329. goto failactive;
  330. ret = gru_vtop(gts, vaddr, write, atomic, &gpa, &pageshift);
  331. if (ret == -1)
  332. goto failinval;
  333. if (ret == -2)
  334. goto failupm;
  335. if (!(gts->ts_sizeavail & GRU_SIZEAVAIL(pageshift))) {
  336. gts->ts_sizeavail |= GRU_SIZEAVAIL(pageshift);
  337. if (atomic || !gru_update_cch(gts, 0)) {
  338. gts->ts_force_cch_reload = 1;
  339. goto failupm;
  340. }
  341. }
  342. gru_cb_set_istatus_active(cb);
  343. tfh_write_restart(tfh, gpa, GAA_RAM, vaddr, asid, write,
  344. GRU_PAGESIZE(pageshift));
  345. STAT(tlb_dropin);
  346. gru_dbg(grudev,
  347. "%s: tfh 0x%p, vaddr 0x%lx, asid 0x%x, ps %d, gpa 0x%lx\n",
  348. ret ? "non-atomic" : "atomic", tfh, vaddr, asid,
  349. pageshift, gpa);
  350. return 0;
  351. failnoasid:
  352. /* No asid (delayed unload). */
  353. STAT(tlb_dropin_fail_no_asid);
  354. gru_dbg(grudev, "FAILED no_asid tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  355. if (!cb)
  356. tfh_user_polling_mode(tfh);
  357. else
  358. gru_flush_cache(tfh);
  359. return -EAGAIN;
  360. failupm:
  361. /* Atomic failure switch CBR to UPM */
  362. tfh_user_polling_mode(tfh);
  363. STAT(tlb_dropin_fail_upm);
  364. gru_dbg(grudev, "FAILED upm tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  365. return 1;
  366. failfmm:
  367. /* FMM state on UPM call */
  368. gru_flush_cache(tfh);
  369. STAT(tlb_dropin_fail_fmm);
  370. gru_dbg(grudev, "FAILED fmm tfh: 0x%p, state %d\n", tfh, tfh->state);
  371. return 0;
  372. failnoexception:
  373. /* TFH status did not show exception pending */
  374. gru_flush_cache(tfh);
  375. if (cb)
  376. gru_flush_cache(cb);
  377. STAT(tlb_dropin_fail_no_exception);
  378. gru_dbg(grudev, "FAILED non-exception tfh: 0x%p, status %d, state %d\n", tfh, tfh->status, tfh->state);
  379. return 0;
  380. failidle:
  381. /* TFH state was idle - no miss pending */
  382. gru_flush_cache(tfh);
  383. if (cb)
  384. gru_flush_cache(cb);
  385. STAT(tlb_dropin_fail_idle);
  386. gru_dbg(grudev, "FAILED idle tfh: 0x%p, state %d\n", tfh, tfh->state);
  387. return 0;
  388. failinval:
  389. /* All errors (atomic & non-atomic) switch CBR to EXCEPTION state */
  390. tfh_exception(tfh);
  391. STAT(tlb_dropin_fail_invalid);
  392. gru_dbg(grudev, "FAILED inval tfh: 0x%p, vaddr 0x%lx\n", tfh, vaddr);
  393. return -EFAULT;
  394. failactive:
  395. /* Range invalidate active. Switch to UPM iff atomic */
  396. if (!cb)
  397. tfh_user_polling_mode(tfh);
  398. else
  399. gru_flush_cache(tfh);
  400. STAT(tlb_dropin_fail_range_active);
  401. gru_dbg(grudev, "FAILED range active: tfh 0x%p, vaddr 0x%lx\n",
  402. tfh, vaddr);
  403. return 1;
  404. }
  405. /*
  406. * Process an external interrupt from the GRU. This interrupt is
  407. * caused by a TLB miss.
  408. * Note that this is the interrupt handler that is registered with linux
  409. * interrupt handlers.
  410. */
  411. irqreturn_t gru_intr(int irq, void *dev_id)
  412. {
  413. struct gru_state *gru;
  414. struct gru_tlb_fault_map imap, dmap;
  415. struct gru_thread_state *gts;
  416. struct gru_tlb_fault_handle *tfh = NULL;
  417. int cbrnum, ctxnum;
  418. STAT(intr);
  419. gru = irq_to_gru(irq);
  420. if (!gru) {
  421. dev_err(grudev, "GRU: invalid interrupt: cpu %d, irq %d\n",
  422. raw_smp_processor_id(), irq);
  423. return IRQ_NONE;
  424. }
  425. get_clear_fault_map(gru, &imap, &dmap);
  426. for_each_cbr_in_tfm(cbrnum, dmap.fault_bits) {
  427. complete(gru->gs_blade->bs_async_wq);
  428. gru_dbg(grudev, "gid %d, cbr_done %d, done %d\n",
  429. gru->gs_gid, cbrnum, gru->gs_blade->bs_async_wq->done);
  430. }
  431. for_each_cbr_in_tfm(cbrnum, imap.fault_bits) {
  432. tfh = get_tfh_by_index(gru, cbrnum);
  433. prefetchw(tfh); /* Helps on hdw, required for emulator */
  434. /*
  435. * When hardware sets a bit in the faultmap, it implicitly
  436. * locks the GRU context so that it cannot be unloaded.
  437. * The gts cannot change until a TFH start/writestart command
  438. * is issued.
  439. */
  440. ctxnum = tfh->ctxnum;
  441. gts = gru->gs_gts[ctxnum];
  442. /*
  443. * This is running in interrupt context. Trylock the mmap_sem.
  444. * If it fails, retry the fault in user context.
  445. */
  446. if (!gts->ts_force_cch_reload &&
  447. down_read_trylock(&gts->ts_mm->mmap_sem)) {
  448. gts->ustats.fmm_tlbdropin++;
  449. gru_try_dropin(gts, tfh, NULL);
  450. up_read(&gts->ts_mm->mmap_sem);
  451. } else {
  452. tfh_user_polling_mode(tfh);
  453. STAT(intr_mm_lock_failed);
  454. }
  455. }
  456. return IRQ_HANDLED;
  457. }
  458. static int gru_user_dropin(struct gru_thread_state *gts,
  459. struct gru_tlb_fault_handle *tfh,
  460. unsigned long __user *cb)
  461. {
  462. struct gru_mm_struct *gms = gts->ts_gms;
  463. int ret;
  464. gts->ustats.upm_tlbdropin++;
  465. while (1) {
  466. wait_event(gms->ms_wait_queue,
  467. atomic_read(&gms->ms_range_active) == 0);
  468. prefetchw(tfh); /* Helps on hdw, required for emulator */
  469. ret = gru_try_dropin(gts, tfh, cb);
  470. if (ret <= 0)
  471. return ret;
  472. STAT(call_os_wait_queue);
  473. }
  474. }
  475. /*
  476. * This interface is called as a result of a user detecting a "call OS" bit
  477. * in a user CB. Normally means that a TLB fault has occurred.
  478. * cb - user virtual address of the CB
  479. */
  480. int gru_handle_user_call_os(unsigned long cb)
  481. {
  482. struct gru_tlb_fault_handle *tfh;
  483. struct gru_thread_state *gts;
  484. unsigned long __user *cbp;
  485. int ucbnum, cbrnum, ret = -EINVAL;
  486. STAT(call_os);
  487. gru_dbg(grudev, "address 0x%lx\n", cb);
  488. /* sanity check the cb pointer */
  489. ucbnum = get_cb_number((void *)cb);
  490. if ((cb & (GRU_HANDLE_STRIDE - 1)) || ucbnum >= GRU_NUM_CB)
  491. return -EINVAL;
  492. cbp = (unsigned long *)cb;
  493. gts = gru_find_lock_gts(cb);
  494. if (!gts)
  495. return -EINVAL;
  496. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE)
  497. goto exit;
  498. /*
  499. * If force_unload is set, the UPM TLB fault is phony. The task
  500. * has migrated to another node and the GSEG must be moved. Just
  501. * unload the context. The task will page fault and assign a new
  502. * context.
  503. */
  504. if (gts->ts_tgid_owner == current->tgid && gts->ts_blade >= 0 &&
  505. gts->ts_blade != uv_numa_blade_id()) {
  506. STAT(call_os_offnode_reference);
  507. gts->ts_force_unload = 1;
  508. }
  509. /*
  510. * CCH may contain stale data if ts_force_cch_reload is set.
  511. */
  512. if (gts->ts_gru && gts->ts_force_cch_reload) {
  513. gts->ts_force_cch_reload = 0;
  514. gru_update_cch(gts, 0);
  515. }
  516. ret = -EAGAIN;
  517. cbrnum = thread_cbr_number(gts, ucbnum);
  518. if (gts->ts_force_unload) {
  519. gru_unload_context(gts, 1);
  520. } else if (gts->ts_gru) {
  521. tfh = get_tfh_by_index(gts->ts_gru, cbrnum);
  522. ret = gru_user_dropin(gts, tfh, cbp);
  523. }
  524. exit:
  525. gru_unlock_gts(gts);
  526. return ret;
  527. }
  528. /*
  529. * Fetch the exception detail information for a CB that terminated with
  530. * an exception.
  531. */
  532. int gru_get_exception_detail(unsigned long arg)
  533. {
  534. struct control_block_extended_exc_detail excdet;
  535. struct gru_control_block_extended *cbe;
  536. struct gru_thread_state *gts;
  537. int ucbnum, cbrnum, ret;
  538. STAT(user_exception);
  539. if (copy_from_user(&excdet, (void __user *)arg, sizeof(excdet)))
  540. return -EFAULT;
  541. gru_dbg(grudev, "address 0x%lx\n", excdet.cb);
  542. gts = gru_find_lock_gts(excdet.cb);
  543. if (!gts)
  544. return -EINVAL;
  545. ucbnum = get_cb_number((void *)excdet.cb);
  546. if (ucbnum >= gts->ts_cbr_au_count * GRU_CBR_AU_SIZE) {
  547. ret = -EINVAL;
  548. } else if (gts->ts_gru) {
  549. cbrnum = thread_cbr_number(gts, ucbnum);
  550. cbe = get_cbe_by_index(gts->ts_gru, cbrnum);
  551. gru_flush_cache(cbe); /* CBE not coherent */
  552. excdet.opc = cbe->opccpy;
  553. excdet.exopc = cbe->exopccpy;
  554. excdet.ecause = cbe->ecause;
  555. excdet.exceptdet0 = cbe->idef1upd;
  556. excdet.exceptdet1 = cbe->idef3upd;
  557. excdet.cbrstate = cbe->cbrstate;
  558. excdet.cbrexecstatus = cbe->cbrexecstatus;
  559. gru_flush_cache(cbe);
  560. ret = 0;
  561. } else {
  562. ret = -EAGAIN;
  563. }
  564. gru_unlock_gts(gts);
  565. gru_dbg(grudev,
  566. "cb 0x%lx, op %d, exopc %d, cbrstate %d, cbrexecstatus 0x%x, ecause 0x%x, "
  567. "exdet0 0x%lx, exdet1 0x%x\n",
  568. excdet.cb, excdet.opc, excdet.exopc, excdet.cbrstate, excdet.cbrexecstatus,
  569. excdet.ecause, excdet.exceptdet0, excdet.exceptdet1);
  570. if (!ret && copy_to_user((void __user *)arg, &excdet, sizeof(excdet)))
  571. ret = -EFAULT;
  572. return ret;
  573. }
  574. /*
  575. * User request to unload a context. Content is saved for possible reload.
  576. */
  577. static int gru_unload_all_contexts(void)
  578. {
  579. struct gru_thread_state *gts;
  580. struct gru_state *gru;
  581. int gid, ctxnum;
  582. if (!capable(CAP_SYS_ADMIN))
  583. return -EPERM;
  584. foreach_gid(gid) {
  585. gru = GID_TO_GRU(gid);
  586. spin_lock(&gru->gs_lock);
  587. for (ctxnum = 0; ctxnum < GRU_NUM_CCH; ctxnum++) {
  588. gts = gru->gs_gts[ctxnum];
  589. if (gts && mutex_trylock(&gts->ts_ctxlock)) {
  590. spin_unlock(&gru->gs_lock);
  591. gru_unload_context(gts, 1);
  592. mutex_unlock(&gts->ts_ctxlock);
  593. spin_lock(&gru->gs_lock);
  594. }
  595. }
  596. spin_unlock(&gru->gs_lock);
  597. }
  598. return 0;
  599. }
  600. int gru_user_unload_context(unsigned long arg)
  601. {
  602. struct gru_thread_state *gts;
  603. struct gru_unload_context_req req;
  604. STAT(user_unload_context);
  605. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  606. return -EFAULT;
  607. gru_dbg(grudev, "gseg 0x%lx\n", req.gseg);
  608. if (!req.gseg)
  609. return gru_unload_all_contexts();
  610. gts = gru_find_lock_gts(req.gseg);
  611. if (!gts)
  612. return -EINVAL;
  613. if (gts->ts_gru)
  614. gru_unload_context(gts, 1);
  615. gru_unlock_gts(gts);
  616. return 0;
  617. }
  618. /*
  619. * User request to flush a range of virtual addresses from the GRU TLB
  620. * (Mainly for testing).
  621. */
  622. int gru_user_flush_tlb(unsigned long arg)
  623. {
  624. struct gru_thread_state *gts;
  625. struct gru_flush_tlb_req req;
  626. struct gru_mm_struct *gms;
  627. STAT(user_flush_tlb);
  628. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  629. return -EFAULT;
  630. gru_dbg(grudev, "gseg 0x%lx, vaddr 0x%lx, len 0x%lx\n", req.gseg,
  631. req.vaddr, req.len);
  632. gts = gru_find_lock_gts(req.gseg);
  633. if (!gts)
  634. return -EINVAL;
  635. gms = gts->ts_gms;
  636. gru_unlock_gts(gts);
  637. gru_flush_tlb_range(gms, req.vaddr, req.len);
  638. return 0;
  639. }
  640. /*
  641. * Fetch GSEG statisticss
  642. */
  643. long gru_get_gseg_statistics(unsigned long arg)
  644. {
  645. struct gru_thread_state *gts;
  646. struct gru_get_gseg_statistics_req req;
  647. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  648. return -EFAULT;
  649. gts = gru_find_lock_gts(req.gseg);
  650. if (gts) {
  651. memcpy(&req.stats, &gts->ustats, sizeof(gts->ustats));
  652. gru_unlock_gts(gts);
  653. } else {
  654. memset(&req.stats, 0, sizeof(gts->ustats));
  655. }
  656. if (copy_to_user((void __user *)arg, &req, sizeof(req)))
  657. return -EFAULT;
  658. return 0;
  659. }
  660. /*
  661. * Register the current task as the user of the GSEG slice.
  662. * Needed for TLB fault interrupt targeting.
  663. */
  664. int gru_set_context_option(unsigned long arg)
  665. {
  666. struct gru_thread_state *gts;
  667. struct gru_set_context_option_req req;
  668. int ret = 0;
  669. STAT(set_context_option);
  670. if (copy_from_user(&req, (void __user *)arg, sizeof(req)))
  671. return -EFAULT;
  672. gru_dbg(grudev, "op %d, gseg 0x%lx, value1 0x%lx\n", req.op, req.gseg, req.val1);
  673. gts = gru_alloc_locked_gts(req.gseg);
  674. if (!gts)
  675. return -EINVAL;
  676. switch (req.op) {
  677. case sco_gseg_owner:
  678. /* Register the current task as the GSEG owner */
  679. gts->ts_tgid_owner = current->tgid;
  680. break;
  681. case sco_cch_req_slice:
  682. /* Set the CCH slice option */
  683. gts->ts_cch_req_slice = req.val1 & 3;
  684. break;
  685. default:
  686. ret = -EINVAL;
  687. }
  688. gru_unlock_gts(gts);
  689. return ret;
  690. }