tifm_ms.c 17 KB

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  1. /*
  2. * TI FlashMedia driver
  3. *
  4. * Copyright (C) 2007 Alex Dubov <oakad@yahoo.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. *
  10. * Special thanks to Carlos Corbacho for providing various MemoryStick cards
  11. * that made this driver possible.
  12. *
  13. */
  14. #include <linux/tifm.h>
  15. #include <linux/memstick.h>
  16. #include <linux/highmem.h>
  17. #include <linux/scatterlist.h>
  18. #include <linux/log2.h>
  19. #include <asm/io.h>
  20. #define DRIVER_NAME "tifm_ms"
  21. static int no_dma;
  22. module_param(no_dma, bool, 0644);
  23. /*
  24. * Some control bits of TIFM appear to conform to Sony's reference design,
  25. * so I'm just assuming they all are.
  26. */
  27. #define TIFM_MS_STAT_DRQ 0x04000
  28. #define TIFM_MS_STAT_MSINT 0x02000
  29. #define TIFM_MS_STAT_RDY 0x01000
  30. #define TIFM_MS_STAT_CRC 0x00200
  31. #define TIFM_MS_STAT_TOE 0x00100
  32. #define TIFM_MS_STAT_EMP 0x00020
  33. #define TIFM_MS_STAT_FUL 0x00010
  34. #define TIFM_MS_STAT_CED 0x00008
  35. #define TIFM_MS_STAT_ERR 0x00004
  36. #define TIFM_MS_STAT_BRQ 0x00002
  37. #define TIFM_MS_STAT_CNK 0x00001
  38. #define TIFM_MS_SYS_DMA 0x10000
  39. #define TIFM_MS_SYS_RESET 0x08000
  40. #define TIFM_MS_SYS_SRAC 0x04000
  41. #define TIFM_MS_SYS_INTEN 0x02000
  42. #define TIFM_MS_SYS_NOCRC 0x01000
  43. #define TIFM_MS_SYS_INTCLR 0x00800
  44. #define TIFM_MS_SYS_MSIEN 0x00400
  45. #define TIFM_MS_SYS_FCLR 0x00200
  46. #define TIFM_MS_SYS_FDIR 0x00100
  47. #define TIFM_MS_SYS_DAM 0x00080
  48. #define TIFM_MS_SYS_DRM 0x00040
  49. #define TIFM_MS_SYS_DRQSL 0x00020
  50. #define TIFM_MS_SYS_REI 0x00010
  51. #define TIFM_MS_SYS_REO 0x00008
  52. #define TIFM_MS_SYS_BSY_MASK 0x00007
  53. #define TIFM_MS_SYS_FIFO (TIFM_MS_SYS_INTEN | TIFM_MS_SYS_MSIEN \
  54. | TIFM_MS_SYS_FCLR | TIFM_MS_SYS_BSY_MASK)
  55. /* Hardware flags */
  56. enum {
  57. CMD_READY = 0x01,
  58. FIFO_READY = 0x02,
  59. CARD_INT = 0x04
  60. };
  61. struct tifm_ms {
  62. struct tifm_dev *dev;
  63. struct timer_list timer;
  64. struct memstick_request *req;
  65. struct tasklet_struct notify;
  66. unsigned int mode_mask;
  67. unsigned int block_pos;
  68. unsigned long timeout_jiffies;
  69. unsigned char eject:1,
  70. use_dma:1;
  71. unsigned char cmd_flags;
  72. unsigned char io_pos;
  73. unsigned int io_word;
  74. };
  75. static unsigned int tifm_ms_read_data(struct tifm_ms *host,
  76. unsigned char *buf, unsigned int length)
  77. {
  78. struct tifm_dev *sock = host->dev;
  79. unsigned int off = 0;
  80. while (host->io_pos && length) {
  81. buf[off++] = host->io_word & 0xff;
  82. host->io_word >>= 8;
  83. length--;
  84. host->io_pos--;
  85. }
  86. if (!length)
  87. return off;
  88. while (!(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  89. if (length < 4)
  90. break;
  91. *(unsigned int *)(buf + off) = __raw_readl(sock->addr
  92. + SOCK_MS_DATA);
  93. length -= 4;
  94. off += 4;
  95. }
  96. if (length
  97. && !(TIFM_MS_STAT_EMP & readl(sock->addr + SOCK_MS_STATUS))) {
  98. host->io_word = readl(sock->addr + SOCK_MS_DATA);
  99. for (host->io_pos = 4; host->io_pos; --host->io_pos) {
  100. buf[off++] = host->io_word & 0xff;
  101. host->io_word >>= 8;
  102. length--;
  103. if (!length)
  104. break;
  105. }
  106. }
  107. return off;
  108. }
  109. static unsigned int tifm_ms_write_data(struct tifm_ms *host,
  110. unsigned char *buf, unsigned int length)
  111. {
  112. struct tifm_dev *sock = host->dev;
  113. unsigned int off = 0;
  114. if (host->io_pos) {
  115. while (host->io_pos < 4 && length) {
  116. host->io_word |= buf[off++] << (host->io_pos * 8);
  117. host->io_pos++;
  118. length--;
  119. }
  120. }
  121. if (host->io_pos == 4
  122. && !(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  123. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  124. sock->addr + SOCK_MS_SYSTEM);
  125. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  126. host->io_pos = 0;
  127. host->io_word = 0;
  128. } else if (host->io_pos) {
  129. return off;
  130. }
  131. if (!length)
  132. return off;
  133. while (!(TIFM_MS_STAT_FUL & readl(sock->addr + SOCK_MS_STATUS))) {
  134. if (length < 4)
  135. break;
  136. writel(TIFM_MS_SYS_FDIR | readl(sock->addr + SOCK_MS_SYSTEM),
  137. sock->addr + SOCK_MS_SYSTEM);
  138. __raw_writel(*(unsigned int *)(buf + off),
  139. sock->addr + SOCK_MS_DATA);
  140. length -= 4;
  141. off += 4;
  142. }
  143. switch (length) {
  144. case 3:
  145. host->io_word |= buf[off + 2] << 16;
  146. host->io_pos++;
  147. case 2:
  148. host->io_word |= buf[off + 1] << 8;
  149. host->io_pos++;
  150. case 1:
  151. host->io_word |= buf[off];
  152. host->io_pos++;
  153. }
  154. off += host->io_pos;
  155. return off;
  156. }
  157. static unsigned int tifm_ms_transfer_data(struct tifm_ms *host)
  158. {
  159. struct tifm_dev *sock = host->dev;
  160. unsigned int length;
  161. unsigned int off;
  162. unsigned int t_size, p_cnt;
  163. unsigned char *buf;
  164. struct page *pg;
  165. unsigned long flags = 0;
  166. if (host->req->long_data) {
  167. length = host->req->sg.length - host->block_pos;
  168. off = host->req->sg.offset + host->block_pos;
  169. } else {
  170. length = host->req->data_len - host->block_pos;
  171. off = 0;
  172. }
  173. dev_dbg(&sock->dev, "fifo data transfer, %d, %d\n", length,
  174. host->block_pos);
  175. while (length) {
  176. unsigned int uninitialized_var(p_off);
  177. if (host->req->long_data) {
  178. pg = nth_page(sg_page(&host->req->sg),
  179. off >> PAGE_SHIFT);
  180. p_off = offset_in_page(off);
  181. p_cnt = PAGE_SIZE - p_off;
  182. p_cnt = min(p_cnt, length);
  183. local_irq_save(flags);
  184. buf = kmap_atomic(pg, KM_BIO_SRC_IRQ) + p_off;
  185. } else {
  186. buf = host->req->data + host->block_pos;
  187. p_cnt = host->req->data_len - host->block_pos;
  188. }
  189. t_size = host->req->data_dir == WRITE
  190. ? tifm_ms_write_data(host, buf, p_cnt)
  191. : tifm_ms_read_data(host, buf, p_cnt);
  192. if (host->req->long_data) {
  193. kunmap_atomic(buf - p_off, KM_BIO_SRC_IRQ);
  194. local_irq_restore(flags);
  195. }
  196. if (!t_size)
  197. break;
  198. host->block_pos += t_size;
  199. length -= t_size;
  200. off += t_size;
  201. }
  202. dev_dbg(&sock->dev, "fifo data transfer, %d remaining\n", length);
  203. if (!length && (host->req->data_dir == WRITE)) {
  204. if (host->io_pos) {
  205. writel(TIFM_MS_SYS_FDIR
  206. | readl(sock->addr + SOCK_MS_SYSTEM),
  207. sock->addr + SOCK_MS_SYSTEM);
  208. writel(host->io_word, sock->addr + SOCK_MS_DATA);
  209. }
  210. writel(TIFM_MS_SYS_FDIR
  211. | readl(sock->addr + SOCK_MS_SYSTEM),
  212. sock->addr + SOCK_MS_SYSTEM);
  213. writel(0, sock->addr + SOCK_MS_DATA);
  214. } else {
  215. readl(sock->addr + SOCK_MS_DATA);
  216. }
  217. return length;
  218. }
  219. static int tifm_ms_issue_cmd(struct tifm_ms *host)
  220. {
  221. struct tifm_dev *sock = host->dev;
  222. unsigned char *data;
  223. unsigned int data_len, cmd, sys_param;
  224. host->cmd_flags = 0;
  225. host->block_pos = 0;
  226. host->io_pos = 0;
  227. host->io_word = 0;
  228. host->cmd_flags = 0;
  229. data = host->req->data;
  230. host->use_dma = !no_dma;
  231. if (host->req->long_data) {
  232. data_len = host->req->sg.length;
  233. if (!is_power_of_2(data_len))
  234. host->use_dma = 0;
  235. } else {
  236. data_len = host->req->data_len;
  237. host->use_dma = 0;
  238. }
  239. writel(TIFM_FIFO_INT_SETALL,
  240. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  241. writel(TIFM_FIFO_ENABLE,
  242. sock->addr + SOCK_FIFO_CONTROL);
  243. if (host->use_dma) {
  244. if (1 != tifm_map_sg(sock, &host->req->sg, 1,
  245. host->req->data_dir == READ
  246. ? PCI_DMA_FROMDEVICE
  247. : PCI_DMA_TODEVICE)) {
  248. host->req->error = -ENOMEM;
  249. return host->req->error;
  250. }
  251. data_len = sg_dma_len(&host->req->sg);
  252. writel(ilog2(data_len) - 2,
  253. sock->addr + SOCK_FIFO_PAGE_SIZE);
  254. writel(TIFM_FIFO_INTMASK,
  255. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  256. sys_param = TIFM_DMA_EN | (1 << 8);
  257. if (host->req->data_dir == WRITE)
  258. sys_param |= TIFM_DMA_TX;
  259. writel(TIFM_FIFO_INTMASK,
  260. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  261. writel(sg_dma_address(&host->req->sg),
  262. sock->addr + SOCK_DMA_ADDRESS);
  263. writel(sys_param, sock->addr + SOCK_DMA_CONTROL);
  264. } else {
  265. writel(host->mode_mask | TIFM_MS_SYS_FIFO,
  266. sock->addr + SOCK_MS_SYSTEM);
  267. writel(TIFM_FIFO_MORE,
  268. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_SET);
  269. }
  270. mod_timer(&host->timer, jiffies + host->timeout_jiffies);
  271. writel(TIFM_CTRL_LED | readl(sock->addr + SOCK_CONTROL),
  272. sock->addr + SOCK_CONTROL);
  273. host->req->error = 0;
  274. sys_param = readl(sock->addr + SOCK_MS_SYSTEM);
  275. sys_param |= TIFM_MS_SYS_INTCLR;
  276. if (host->use_dma)
  277. sys_param |= TIFM_MS_SYS_DMA;
  278. else
  279. sys_param &= ~TIFM_MS_SYS_DMA;
  280. writel(sys_param, sock->addr + SOCK_MS_SYSTEM);
  281. cmd = (host->req->tpc & 0xf) << 12;
  282. cmd |= data_len;
  283. writel(cmd, sock->addr + SOCK_MS_COMMAND);
  284. dev_dbg(&sock->dev, "executing TPC %x, %x\n", cmd, sys_param);
  285. return 0;
  286. }
  287. static void tifm_ms_complete_cmd(struct tifm_ms *host)
  288. {
  289. struct tifm_dev *sock = host->dev;
  290. struct memstick_host *msh = tifm_get_drvdata(sock);
  291. int rc;
  292. del_timer(&host->timer);
  293. host->req->int_reg = readl(sock->addr + SOCK_MS_STATUS) & 0xff;
  294. host->req->int_reg = (host->req->int_reg & 1)
  295. | ((host->req->int_reg << 4) & 0xe0);
  296. writel(TIFM_FIFO_INT_SETALL,
  297. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  298. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  299. if (host->use_dma) {
  300. tifm_unmap_sg(sock, &host->req->sg, 1,
  301. host->req->data_dir == READ
  302. ? PCI_DMA_FROMDEVICE
  303. : PCI_DMA_TODEVICE);
  304. }
  305. writel((~TIFM_CTRL_LED) & readl(sock->addr + SOCK_CONTROL),
  306. sock->addr + SOCK_CONTROL);
  307. dev_dbg(&sock->dev, "TPC complete\n");
  308. do {
  309. rc = memstick_next_req(msh, &host->req);
  310. } while (!rc && tifm_ms_issue_cmd(host));
  311. }
  312. static int tifm_ms_check_status(struct tifm_ms *host)
  313. {
  314. if (!host->req->error) {
  315. if (!(host->cmd_flags & CMD_READY))
  316. return 1;
  317. if (!(host->cmd_flags & FIFO_READY))
  318. return 1;
  319. if (host->req->need_card_int
  320. && !(host->cmd_flags & CARD_INT))
  321. return 1;
  322. }
  323. return 0;
  324. }
  325. /* Called from interrupt handler */
  326. static void tifm_ms_data_event(struct tifm_dev *sock)
  327. {
  328. struct tifm_ms *host;
  329. unsigned int fifo_status = 0, host_status = 0;
  330. int rc = 1;
  331. spin_lock(&sock->lock);
  332. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  333. fifo_status = readl(sock->addr + SOCK_DMA_FIFO_STATUS);
  334. host_status = readl(sock->addr + SOCK_MS_STATUS);
  335. dev_dbg(&sock->dev,
  336. "data event: fifo_status %x, host_status %x, flags %x\n",
  337. fifo_status, host_status, host->cmd_flags);
  338. if (host->req) {
  339. if (host->use_dma && (fifo_status & 1)) {
  340. host->cmd_flags |= FIFO_READY;
  341. rc = tifm_ms_check_status(host);
  342. }
  343. if (!host->use_dma && (fifo_status & TIFM_FIFO_MORE)) {
  344. if (!tifm_ms_transfer_data(host)) {
  345. host->cmd_flags |= FIFO_READY;
  346. rc = tifm_ms_check_status(host);
  347. }
  348. }
  349. }
  350. writel(fifo_status, sock->addr + SOCK_DMA_FIFO_STATUS);
  351. if (!rc)
  352. tifm_ms_complete_cmd(host);
  353. spin_unlock(&sock->lock);
  354. }
  355. /* Called from interrupt handler */
  356. static void tifm_ms_card_event(struct tifm_dev *sock)
  357. {
  358. struct tifm_ms *host;
  359. unsigned int host_status = 0;
  360. int rc = 1;
  361. spin_lock(&sock->lock);
  362. host = memstick_priv((struct memstick_host *)tifm_get_drvdata(sock));
  363. host_status = readl(sock->addr + SOCK_MS_STATUS);
  364. dev_dbg(&sock->dev, "host event: host_status %x, flags %x\n",
  365. host_status, host->cmd_flags);
  366. if (host->req) {
  367. if (host_status & TIFM_MS_STAT_TOE)
  368. host->req->error = -ETIME;
  369. else if (host_status & TIFM_MS_STAT_CRC)
  370. host->req->error = -EILSEQ;
  371. if (host_status & TIFM_MS_STAT_RDY)
  372. host->cmd_flags |= CMD_READY;
  373. if (host_status & TIFM_MS_STAT_MSINT)
  374. host->cmd_flags |= CARD_INT;
  375. rc = tifm_ms_check_status(host);
  376. }
  377. writel(TIFM_MS_SYS_INTCLR | readl(sock->addr + SOCK_MS_SYSTEM),
  378. sock->addr + SOCK_MS_SYSTEM);
  379. if (!rc)
  380. tifm_ms_complete_cmd(host);
  381. spin_unlock(&sock->lock);
  382. return;
  383. }
  384. static void tifm_ms_req_tasklet(unsigned long data)
  385. {
  386. struct memstick_host *msh = (struct memstick_host *)data;
  387. struct tifm_ms *host = memstick_priv(msh);
  388. struct tifm_dev *sock = host->dev;
  389. unsigned long flags;
  390. int rc;
  391. spin_lock_irqsave(&sock->lock, flags);
  392. if (!host->req) {
  393. if (host->eject) {
  394. do {
  395. rc = memstick_next_req(msh, &host->req);
  396. if (!rc)
  397. host->req->error = -ETIME;
  398. } while (!rc);
  399. spin_unlock_irqrestore(&sock->lock, flags);
  400. return;
  401. }
  402. do {
  403. rc = memstick_next_req(msh, &host->req);
  404. } while (!rc && tifm_ms_issue_cmd(host));
  405. }
  406. spin_unlock_irqrestore(&sock->lock, flags);
  407. }
  408. static void tifm_ms_dummy_submit(struct memstick_host *msh)
  409. {
  410. return;
  411. }
  412. static void tifm_ms_submit_req(struct memstick_host *msh)
  413. {
  414. struct tifm_ms *host = memstick_priv(msh);
  415. tasklet_schedule(&host->notify);
  416. }
  417. static int tifm_ms_set_param(struct memstick_host *msh,
  418. enum memstick_param param,
  419. int value)
  420. {
  421. struct tifm_ms *host = memstick_priv(msh);
  422. struct tifm_dev *sock = host->dev;
  423. switch (param) {
  424. case MEMSTICK_POWER:
  425. /* also affected by media detection mechanism */
  426. if (value == MEMSTICK_POWER_ON) {
  427. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  428. writel(TIFM_MS_SYS_RESET, sock->addr + SOCK_MS_SYSTEM);
  429. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  430. sock->addr + SOCK_MS_SYSTEM);
  431. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  432. } else if (value == MEMSTICK_POWER_OFF) {
  433. writel(TIFM_MS_SYS_FCLR | TIFM_MS_SYS_INTCLR,
  434. sock->addr + SOCK_MS_SYSTEM);
  435. writel(0xffffffff, sock->addr + SOCK_MS_STATUS);
  436. } else
  437. return -EINVAL;
  438. break;
  439. case MEMSTICK_INTERFACE:
  440. if (value == MEMSTICK_SERIAL) {
  441. host->mode_mask = TIFM_MS_SYS_SRAC | TIFM_MS_SYS_REI;
  442. writel((~TIFM_CTRL_FAST_CLK)
  443. & readl(sock->addr + SOCK_CONTROL),
  444. sock->addr + SOCK_CONTROL);
  445. } else if (value == MEMSTICK_PAR4) {
  446. host->mode_mask = 0;
  447. writel(TIFM_CTRL_FAST_CLK
  448. | readl(sock->addr + SOCK_CONTROL),
  449. sock->addr + SOCK_CONTROL);
  450. } else
  451. return -EINVAL;
  452. break;
  453. };
  454. return 0;
  455. }
  456. static void tifm_ms_abort(unsigned long data)
  457. {
  458. struct tifm_ms *host = (struct tifm_ms *)data;
  459. dev_dbg(&host->dev->dev, "status %x\n",
  460. readl(host->dev->addr + SOCK_MS_STATUS));
  461. printk(KERN_ERR
  462. "%s : card failed to respond for a long period of time "
  463. "(%x, %x)\n",
  464. dev_name(&host->dev->dev), host->req ? host->req->tpc : 0,
  465. host->cmd_flags);
  466. tifm_eject(host->dev);
  467. }
  468. static int tifm_ms_probe(struct tifm_dev *sock)
  469. {
  470. struct memstick_host *msh;
  471. struct tifm_ms *host;
  472. int rc = -EIO;
  473. if (!(TIFM_SOCK_STATE_OCCUPIED
  474. & readl(sock->addr + SOCK_PRESENT_STATE))) {
  475. printk(KERN_WARNING "%s : card gone, unexpectedly\n",
  476. dev_name(&sock->dev));
  477. return rc;
  478. }
  479. msh = memstick_alloc_host(sizeof(struct tifm_ms), &sock->dev);
  480. if (!msh)
  481. return -ENOMEM;
  482. host = memstick_priv(msh);
  483. tifm_set_drvdata(sock, msh);
  484. host->dev = sock;
  485. host->timeout_jiffies = msecs_to_jiffies(1000);
  486. setup_timer(&host->timer, tifm_ms_abort, (unsigned long)host);
  487. tasklet_init(&host->notify, tifm_ms_req_tasklet, (unsigned long)msh);
  488. msh->request = tifm_ms_submit_req;
  489. msh->set_param = tifm_ms_set_param;
  490. sock->card_event = tifm_ms_card_event;
  491. sock->data_event = tifm_ms_data_event;
  492. if (tifm_has_ms_pif(sock))
  493. msh->caps |= MEMSTICK_CAP_PAR4;
  494. rc = memstick_add_host(msh);
  495. if (!rc)
  496. return 0;
  497. memstick_free_host(msh);
  498. return rc;
  499. }
  500. static void tifm_ms_remove(struct tifm_dev *sock)
  501. {
  502. struct memstick_host *msh = tifm_get_drvdata(sock);
  503. struct tifm_ms *host = memstick_priv(msh);
  504. int rc = 0;
  505. unsigned long flags;
  506. msh->request = tifm_ms_dummy_submit;
  507. tasklet_kill(&host->notify);
  508. spin_lock_irqsave(&sock->lock, flags);
  509. host->eject = 1;
  510. if (host->req) {
  511. del_timer(&host->timer);
  512. writel(TIFM_FIFO_INT_SETALL,
  513. sock->addr + SOCK_DMA_FIFO_INT_ENABLE_CLEAR);
  514. writel(TIFM_DMA_RESET, sock->addr + SOCK_DMA_CONTROL);
  515. if (host->use_dma)
  516. tifm_unmap_sg(sock, &host->req->sg, 1,
  517. host->req->data_dir == READ
  518. ? PCI_DMA_TODEVICE
  519. : PCI_DMA_FROMDEVICE);
  520. host->req->error = -ETIME;
  521. do {
  522. rc = memstick_next_req(msh, &host->req);
  523. if (!rc)
  524. host->req->error = -ETIME;
  525. } while (!rc);
  526. }
  527. spin_unlock_irqrestore(&sock->lock, flags);
  528. memstick_remove_host(msh);
  529. memstick_free_host(msh);
  530. }
  531. #ifdef CONFIG_PM
  532. static int tifm_ms_suspend(struct tifm_dev *sock, pm_message_t state)
  533. {
  534. struct memstick_host *msh = tifm_get_drvdata(sock);
  535. memstick_suspend_host(msh);
  536. return 0;
  537. }
  538. static int tifm_ms_resume(struct tifm_dev *sock)
  539. {
  540. struct memstick_host *msh = tifm_get_drvdata(sock);
  541. memstick_resume_host(msh);
  542. return 0;
  543. }
  544. #else
  545. #define tifm_ms_suspend NULL
  546. #define tifm_ms_resume NULL
  547. #endif /* CONFIG_PM */
  548. static struct tifm_device_id tifm_ms_id_tbl[] = {
  549. { TIFM_TYPE_MS }, { 0 }
  550. };
  551. static struct tifm_driver tifm_ms_driver = {
  552. .driver = {
  553. .name = DRIVER_NAME,
  554. .owner = THIS_MODULE
  555. },
  556. .id_table = tifm_ms_id_tbl,
  557. .probe = tifm_ms_probe,
  558. .remove = tifm_ms_remove,
  559. .suspend = tifm_ms_suspend,
  560. .resume = tifm_ms_resume
  561. };
  562. static int __init tifm_ms_init(void)
  563. {
  564. return tifm_register_driver(&tifm_ms_driver);
  565. }
  566. static void __exit tifm_ms_exit(void)
  567. {
  568. tifm_unregister_driver(&tifm_ms_driver);
  569. }
  570. MODULE_AUTHOR("Alex Dubov");
  571. MODULE_DESCRIPTION("TI FlashMedia MemoryStick driver");
  572. MODULE_LICENSE("GPL");
  573. MODULE_DEVICE_TABLE(tifm, tifm_ms_id_tbl);
  574. module_init(tifm_ms_init);
  575. module_exit(tifm_ms_exit);