dm1105.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904
  1. /*
  2. * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
  3. *
  4. * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19. *
  20. */
  21. #include <linux/i2c.h>
  22. #include <linux/init.h>
  23. #include <linux/kernel.h>
  24. #include <linux/module.h>
  25. #include <linux/proc_fs.h>
  26. #include <linux/pci.h>
  27. #include <linux/dma-mapping.h>
  28. #include <linux/input.h>
  29. #include <media/ir-common.h>
  30. #include "demux.h"
  31. #include "dmxdev.h"
  32. #include "dvb_demux.h"
  33. #include "dvb_frontend.h"
  34. #include "dvb_net.h"
  35. #include "dvbdev.h"
  36. #include "dvb-pll.h"
  37. #include "stv0299.h"
  38. #include "stv0288.h"
  39. #include "stb6000.h"
  40. #include "si21xx.h"
  41. #include "cx24116.h"
  42. #include "z0194a.h"
  43. /* ----------------------------------------------- */
  44. /*
  45. * PCI ID's
  46. */
  47. #ifndef PCI_VENDOR_ID_TRIGEM
  48. #define PCI_VENDOR_ID_TRIGEM 0x109f
  49. #endif
  50. #ifndef PCI_VENDOR_ID_AXESS
  51. #define PCI_VENDOR_ID_AXESS 0x195d
  52. #endif
  53. #ifndef PCI_DEVICE_ID_DM1105
  54. #define PCI_DEVICE_ID_DM1105 0x036f
  55. #endif
  56. #ifndef PCI_DEVICE_ID_DW2002
  57. #define PCI_DEVICE_ID_DW2002 0x2002
  58. #endif
  59. #ifndef PCI_DEVICE_ID_DW2004
  60. #define PCI_DEVICE_ID_DW2004 0x2004
  61. #endif
  62. #ifndef PCI_DEVICE_ID_DM05
  63. #define PCI_DEVICE_ID_DM05 0x1105
  64. #endif
  65. /* ----------------------------------------------- */
  66. /* sdmc dm1105 registers */
  67. /* TS Control */
  68. #define DM1105_TSCTR 0x00
  69. #define DM1105_DTALENTH 0x04
  70. /* GPIO Interface */
  71. #define DM1105_GPIOVAL 0x08
  72. #define DM1105_GPIOCTR 0x0c
  73. /* PID serial number */
  74. #define DM1105_PIDN 0x10
  75. /* Odd-even secret key select */
  76. #define DM1105_CWSEL 0x14
  77. /* Host Command Interface */
  78. #define DM1105_HOST_CTR 0x18
  79. #define DM1105_HOST_AD 0x1c
  80. /* PCI Interface */
  81. #define DM1105_CR 0x30
  82. #define DM1105_RST 0x34
  83. #define DM1105_STADR 0x38
  84. #define DM1105_RLEN 0x3c
  85. #define DM1105_WRP 0x40
  86. #define DM1105_INTCNT 0x44
  87. #define DM1105_INTMAK 0x48
  88. #define DM1105_INTSTS 0x4c
  89. /* CW Value */
  90. #define DM1105_ODD 0x50
  91. #define DM1105_EVEN 0x58
  92. /* PID Value */
  93. #define DM1105_PID 0x60
  94. /* IR Control */
  95. #define DM1105_IRCTR 0x64
  96. #define DM1105_IRMODE 0x68
  97. #define DM1105_SYSTEMCODE 0x6c
  98. #define DM1105_IRCODE 0x70
  99. /* Unknown Values */
  100. #define DM1105_ENCRYPT 0x74
  101. #define DM1105_VER 0x7c
  102. /* I2C Interface */
  103. #define DM1105_I2CCTR 0x80
  104. #define DM1105_I2CSTS 0x81
  105. #define DM1105_I2CDAT 0x82
  106. #define DM1105_I2C_RA 0x83
  107. /* ----------------------------------------------- */
  108. /* Interrupt Mask Bits */
  109. #define INTMAK_TSIRQM 0x01
  110. #define INTMAK_HIRQM 0x04
  111. #define INTMAK_IRM 0x08
  112. #define INTMAK_ALLMASK (INTMAK_TSIRQM | \
  113. INTMAK_HIRQM | \
  114. INTMAK_IRM)
  115. #define INTMAK_NONEMASK 0x00
  116. /* Interrupt Status Bits */
  117. #define INTSTS_TSIRQ 0x01
  118. #define INTSTS_HIRQ 0x04
  119. #define INTSTS_IR 0x08
  120. /* IR Control Bits */
  121. #define DM1105_IR_EN 0x01
  122. #define DM1105_SYS_CHK 0x02
  123. #define DM1105_REP_FLG 0x08
  124. /* EEPROM addr */
  125. #define IIC_24C01_addr 0xa0
  126. /* Max board count */
  127. #define DM1105_MAX 0x04
  128. #define DRIVER_NAME "dm1105"
  129. #define DM1105_DMA_PACKETS 47
  130. #define DM1105_DMA_PACKET_LENGTH (128*4)
  131. #define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
  132. /* GPIO's for LNB power control */
  133. #define DM1105_LNB_MASK 0x00000000
  134. #define DM1105_LNB_13V 0x00010100
  135. #define DM1105_LNB_18V 0x00000100
  136. /* GPIO's for LNB power control for Axess DM05 */
  137. #define DM05_LNB_MASK 0x00000000
  138. #define DM05_LNB_13V 0x00020000
  139. #define DM05_LNB_18V 0x00030000
  140. static int ir_debug;
  141. module_param(ir_debug, int, 0644);
  142. MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
  143. DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
  144. /* infrared remote control */
  145. struct infrared {
  146. struct input_dev *input_dev;
  147. struct ir_input_state ir;
  148. char input_phys[32];
  149. struct work_struct work;
  150. u32 ir_command;
  151. };
  152. struct dm1105dvb {
  153. /* pci */
  154. struct pci_dev *pdev;
  155. u8 __iomem *io_mem;
  156. /* ir */
  157. struct infrared ir;
  158. /* dvb */
  159. struct dmx_frontend hw_frontend;
  160. struct dmx_frontend mem_frontend;
  161. struct dmxdev dmxdev;
  162. struct dvb_adapter dvb_adapter;
  163. struct dvb_demux demux;
  164. struct dvb_frontend *fe;
  165. struct dvb_net dvbnet;
  166. unsigned int full_ts_users;
  167. /* i2c */
  168. struct i2c_adapter i2c_adap;
  169. /* irq */
  170. struct work_struct work;
  171. struct workqueue_struct *wq;
  172. char wqn[16];
  173. /* dma */
  174. dma_addr_t dma_addr;
  175. unsigned char *ts_buf;
  176. u32 wrp;
  177. u32 nextwrp;
  178. u32 buffer_size;
  179. unsigned int PacketErrorCount;
  180. unsigned int dmarst;
  181. spinlock_t lock;
  182. };
  183. #define dm_io_mem(reg) ((unsigned long)(&dm1105dvb->io_mem[reg]))
  184. static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
  185. struct i2c_msg *msgs, int num)
  186. {
  187. struct dm1105dvb *dm1105dvb ;
  188. int addr, rc, i, j, k, len, byte, data;
  189. u8 status;
  190. dm1105dvb = i2c_adap->algo_data;
  191. for (i = 0; i < num; i++) {
  192. outb(0x00, dm_io_mem(DM1105_I2CCTR));
  193. if (msgs[i].flags & I2C_M_RD) {
  194. /* read bytes */
  195. addr = msgs[i].addr << 1;
  196. addr |= 1;
  197. outb(addr, dm_io_mem(DM1105_I2CDAT));
  198. for (byte = 0; byte < msgs[i].len; byte++)
  199. outb(0, dm_io_mem(DM1105_I2CDAT + byte + 1));
  200. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  201. for (j = 0; j < 55; j++) {
  202. mdelay(10);
  203. status = inb(dm_io_mem(DM1105_I2CSTS));
  204. if ((status & 0xc0) == 0x40)
  205. break;
  206. }
  207. if (j >= 55)
  208. return -1;
  209. for (byte = 0; byte < msgs[i].len; byte++) {
  210. rc = inb(dm_io_mem(DM1105_I2CDAT + byte + 1));
  211. if (rc < 0)
  212. goto err;
  213. msgs[i].buf[byte] = rc;
  214. }
  215. } else {
  216. if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
  217. /* prepaired for cx24116 firmware */
  218. /* Write in small blocks */
  219. len = msgs[i].len - 1;
  220. k = 1;
  221. do {
  222. outb(msgs[i].addr << 1, dm_io_mem(DM1105_I2CDAT));
  223. outb(0xf7, dm_io_mem(DM1105_I2CDAT + 1));
  224. for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
  225. data = msgs[i].buf[k+byte];
  226. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 2));
  227. }
  228. outb(0x82 + (len > 48 ? 48 : len), dm_io_mem(DM1105_I2CCTR));
  229. for (j = 0; j < 25; j++) {
  230. mdelay(10);
  231. status = inb(dm_io_mem(DM1105_I2CSTS));
  232. if ((status & 0xc0) == 0x40)
  233. break;
  234. }
  235. if (j >= 25)
  236. return -1;
  237. k += 48;
  238. len -= 48;
  239. } while (len > 0);
  240. } else {
  241. /* write bytes */
  242. outb(msgs[i].addr<<1, dm_io_mem(DM1105_I2CDAT));
  243. for (byte = 0; byte < msgs[i].len; byte++) {
  244. data = msgs[i].buf[byte];
  245. outb(data, dm_io_mem(DM1105_I2CDAT + byte + 1));
  246. }
  247. outb(0x81 + msgs[i].len, dm_io_mem(DM1105_I2CCTR));
  248. for (j = 0; j < 25; j++) {
  249. mdelay(10);
  250. status = inb(dm_io_mem(DM1105_I2CSTS));
  251. if ((status & 0xc0) == 0x40)
  252. break;
  253. }
  254. if (j >= 25)
  255. return -1;
  256. }
  257. }
  258. }
  259. return num;
  260. err:
  261. return rc;
  262. }
  263. static u32 functionality(struct i2c_adapter *adap)
  264. {
  265. return I2C_FUNC_I2C;
  266. }
  267. static struct i2c_algorithm dm1105_algo = {
  268. .master_xfer = dm1105_i2c_xfer,
  269. .functionality = functionality,
  270. };
  271. static inline struct dm1105dvb *feed_to_dm1105dvb(struct dvb_demux_feed *feed)
  272. {
  273. return container_of(feed->demux, struct dm1105dvb, demux);
  274. }
  275. static inline struct dm1105dvb *frontend_to_dm1105dvb(struct dvb_frontend *fe)
  276. {
  277. return container_of(fe->dvb, struct dm1105dvb, dvb_adapter);
  278. }
  279. static int dm1105dvb_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  280. {
  281. struct dm1105dvb *dm1105dvb = frontend_to_dm1105dvb(fe);
  282. u32 lnb_mask, lnb_13v, lnb_18v;
  283. switch (dm1105dvb->pdev->subsystem_device) {
  284. case PCI_DEVICE_ID_DM05:
  285. lnb_mask = DM05_LNB_MASK;
  286. lnb_13v = DM05_LNB_13V;
  287. lnb_18v = DM05_LNB_18V;
  288. break;
  289. default:
  290. lnb_mask = DM1105_LNB_MASK;
  291. lnb_13v = DM1105_LNB_13V;
  292. lnb_18v = DM1105_LNB_18V;
  293. }
  294. outl(lnb_mask, dm_io_mem(DM1105_GPIOCTR));
  295. if (voltage == SEC_VOLTAGE_18)
  296. outl(lnb_18v , dm_io_mem(DM1105_GPIOVAL));
  297. else
  298. outl(lnb_13v, dm_io_mem(DM1105_GPIOVAL));
  299. return 0;
  300. }
  301. static void dm1105dvb_set_dma_addr(struct dm1105dvb *dm1105dvb)
  302. {
  303. outl(cpu_to_le32(dm1105dvb->dma_addr), dm_io_mem(DM1105_STADR));
  304. }
  305. static int __devinit dm1105dvb_dma_map(struct dm1105dvb *dm1105dvb)
  306. {
  307. dm1105dvb->ts_buf = pci_alloc_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, &dm1105dvb->dma_addr);
  308. return !dm1105dvb->ts_buf;
  309. }
  310. static void dm1105dvb_dma_unmap(struct dm1105dvb *dm1105dvb)
  311. {
  312. pci_free_consistent(dm1105dvb->pdev, 6*DM1105_DMA_BYTES, dm1105dvb->ts_buf, dm1105dvb->dma_addr);
  313. }
  314. static void dm1105dvb_enable_irqs(struct dm1105dvb *dm1105dvb)
  315. {
  316. outb(INTMAK_ALLMASK, dm_io_mem(DM1105_INTMAK));
  317. outb(1, dm_io_mem(DM1105_CR));
  318. }
  319. static void dm1105dvb_disable_irqs(struct dm1105dvb *dm1105dvb)
  320. {
  321. outb(INTMAK_IRM, dm_io_mem(DM1105_INTMAK));
  322. outb(0, dm_io_mem(DM1105_CR));
  323. }
  324. static int dm1105dvb_start_feed(struct dvb_demux_feed *f)
  325. {
  326. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  327. if (dm1105dvb->full_ts_users++ == 0)
  328. dm1105dvb_enable_irqs(dm1105dvb);
  329. return 0;
  330. }
  331. static int dm1105dvb_stop_feed(struct dvb_demux_feed *f)
  332. {
  333. struct dm1105dvb *dm1105dvb = feed_to_dm1105dvb(f);
  334. if (--dm1105dvb->full_ts_users == 0)
  335. dm1105dvb_disable_irqs(dm1105dvb);
  336. return 0;
  337. }
  338. /* ir work handler */
  339. static void dm1105_emit_key(struct work_struct *work)
  340. {
  341. struct infrared *ir = container_of(work, struct infrared, work);
  342. u32 ircom = ir->ir_command;
  343. u8 data;
  344. if (ir_debug)
  345. printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
  346. data = (ircom >> 8) & 0x7f;
  347. ir_input_keydown(ir->input_dev, &ir->ir, data, data);
  348. ir_input_nokey(ir->input_dev, &ir->ir);
  349. }
  350. /* work handler */
  351. static void dm1105_dmx_buffer(struct work_struct *work)
  352. {
  353. struct dm1105dvb *dm1105dvb =
  354. container_of(work, struct dm1105dvb, work);
  355. unsigned int nbpackets;
  356. u32 oldwrp = dm1105dvb->wrp;
  357. u32 nextwrp = dm1105dvb->nextwrp;
  358. if (!((dm1105dvb->ts_buf[oldwrp] == 0x47) &&
  359. (dm1105dvb->ts_buf[oldwrp + 188] == 0x47) &&
  360. (dm1105dvb->ts_buf[oldwrp + 188 * 2] == 0x47))) {
  361. dm1105dvb->PacketErrorCount++;
  362. /* bad packet found */
  363. if ((dm1105dvb->PacketErrorCount >= 2) &&
  364. (dm1105dvb->dmarst == 0)) {
  365. outb(1, dm_io_mem(DM1105_RST));
  366. dm1105dvb->wrp = 0;
  367. dm1105dvb->PacketErrorCount = 0;
  368. dm1105dvb->dmarst = 0;
  369. return;
  370. }
  371. }
  372. if (nextwrp < oldwrp) {
  373. memcpy(dm1105dvb->ts_buf + dm1105dvb->buffer_size,
  374. dm1105dvb->ts_buf, nextwrp);
  375. nbpackets = ((dm1105dvb->buffer_size - oldwrp) + nextwrp) / 188;
  376. } else
  377. nbpackets = (nextwrp - oldwrp) / 188;
  378. dm1105dvb->wrp = nextwrp;
  379. dvb_dmx_swfilter_packets(&dm1105dvb->demux,
  380. &dm1105dvb->ts_buf[oldwrp], nbpackets);
  381. }
  382. static irqreturn_t dm1105dvb_irq(int irq, void *dev_id)
  383. {
  384. struct dm1105dvb *dm1105dvb = dev_id;
  385. /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
  386. unsigned int intsts = inb(dm_io_mem(DM1105_INTSTS));
  387. outb(intsts, dm_io_mem(DM1105_INTSTS));
  388. switch (intsts) {
  389. case INTSTS_TSIRQ:
  390. case (INTSTS_TSIRQ | INTSTS_IR):
  391. dm1105dvb->nextwrp = inl(dm_io_mem(DM1105_WRP)) -
  392. inl(dm_io_mem(DM1105_STADR));
  393. queue_work(dm1105dvb->wq, &dm1105dvb->work);
  394. break;
  395. case INTSTS_IR:
  396. dm1105dvb->ir.ir_command = inl(dm_io_mem(DM1105_IRCODE));
  397. schedule_work(&dm1105dvb->ir.work);
  398. break;
  399. }
  400. return IRQ_HANDLED;
  401. }
  402. int __devinit dm1105_ir_init(struct dm1105dvb *dm1105)
  403. {
  404. struct input_dev *input_dev;
  405. IR_KEYTAB_TYPE *ir_codes = ir_codes_dm1105_nec;
  406. int ir_type = IR_TYPE_OTHER;
  407. int err = -ENOMEM;
  408. input_dev = input_allocate_device();
  409. if (!input_dev)
  410. return -ENOMEM;
  411. dm1105->ir.input_dev = input_dev;
  412. snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
  413. "pci-%s/ir0", pci_name(dm1105->pdev));
  414. ir_input_init(input_dev, &dm1105->ir.ir, ir_type, ir_codes);
  415. input_dev->name = "DVB on-card IR receiver";
  416. input_dev->phys = dm1105->ir.input_phys;
  417. input_dev->id.bustype = BUS_PCI;
  418. input_dev->id.version = 1;
  419. if (dm1105->pdev->subsystem_vendor) {
  420. input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
  421. input_dev->id.product = dm1105->pdev->subsystem_device;
  422. } else {
  423. input_dev->id.vendor = dm1105->pdev->vendor;
  424. input_dev->id.product = dm1105->pdev->device;
  425. }
  426. input_dev->dev.parent = &dm1105->pdev->dev;
  427. INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
  428. err = input_register_device(input_dev);
  429. if (err) {
  430. input_free_device(input_dev);
  431. return err;
  432. }
  433. return 0;
  434. }
  435. void __devexit dm1105_ir_exit(struct dm1105dvb *dm1105)
  436. {
  437. input_unregister_device(dm1105->ir.input_dev);
  438. }
  439. static int __devinit dm1105dvb_hw_init(struct dm1105dvb *dm1105dvb)
  440. {
  441. dm1105dvb_disable_irqs(dm1105dvb);
  442. outb(0, dm_io_mem(DM1105_HOST_CTR));
  443. /*DATALEN 188,*/
  444. outb(188, dm_io_mem(DM1105_DTALENTH));
  445. /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
  446. outw(0xc10a, dm_io_mem(DM1105_TSCTR));
  447. /* map DMA and set address */
  448. dm1105dvb_dma_map(dm1105dvb);
  449. dm1105dvb_set_dma_addr(dm1105dvb);
  450. /* big buffer */
  451. outl(5*DM1105_DMA_BYTES, dm_io_mem(DM1105_RLEN));
  452. outb(47, dm_io_mem(DM1105_INTCNT));
  453. /* IR NEC mode enable */
  454. outb((DM1105_IR_EN | DM1105_SYS_CHK), dm_io_mem(DM1105_IRCTR));
  455. outb(0, dm_io_mem(DM1105_IRMODE));
  456. outw(0, dm_io_mem(DM1105_SYSTEMCODE));
  457. return 0;
  458. }
  459. static void dm1105dvb_hw_exit(struct dm1105dvb *dm1105dvb)
  460. {
  461. dm1105dvb_disable_irqs(dm1105dvb);
  462. /* IR disable */
  463. outb(0, dm_io_mem(DM1105_IRCTR));
  464. outb(INTMAK_NONEMASK, dm_io_mem(DM1105_INTMAK));
  465. dm1105dvb_dma_unmap(dm1105dvb);
  466. }
  467. static struct stv0299_config sharp_z0194a_config = {
  468. .demod_address = 0x68,
  469. .inittab = sharp_z0194a_inittab,
  470. .mclk = 88000000UL,
  471. .invert = 1,
  472. .skip_reinit = 0,
  473. .lock_output = STV0299_LOCKOUTPUT_1,
  474. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  475. .min_delay_ms = 100,
  476. .set_symbol_rate = sharp_z0194a_set_symbol_rate,
  477. };
  478. static struct stv0288_config earda_config = {
  479. .demod_address = 0x68,
  480. .min_delay_ms = 100,
  481. };
  482. static struct si21xx_config serit_config = {
  483. .demod_address = 0x68,
  484. .min_delay_ms = 100,
  485. };
  486. static struct cx24116_config serit_sp2633_config = {
  487. .demod_address = 0x55,
  488. };
  489. static int __devinit frontend_init(struct dm1105dvb *dm1105dvb)
  490. {
  491. int ret;
  492. switch (dm1105dvb->pdev->subsystem_device) {
  493. case PCI_DEVICE_ID_DW2004:
  494. dm1105dvb->fe = dvb_attach(
  495. cx24116_attach, &serit_sp2633_config,
  496. &dm1105dvb->i2c_adap);
  497. if (dm1105dvb->fe)
  498. dm1105dvb->fe->ops.set_voltage = dm1105dvb_set_voltage;
  499. break;
  500. default:
  501. dm1105dvb->fe = dvb_attach(
  502. stv0299_attach, &sharp_z0194a_config,
  503. &dm1105dvb->i2c_adap);
  504. if (dm1105dvb->fe) {
  505. dm1105dvb->fe->ops.set_voltage =
  506. dm1105dvb_set_voltage;
  507. dvb_attach(dvb_pll_attach, dm1105dvb->fe, 0x60,
  508. &dm1105dvb->i2c_adap, DVB_PLL_OPERA1);
  509. break;
  510. }
  511. dm1105dvb->fe = dvb_attach(
  512. stv0288_attach, &earda_config,
  513. &dm1105dvb->i2c_adap);
  514. if (dm1105dvb->fe) {
  515. dm1105dvb->fe->ops.set_voltage =
  516. dm1105dvb_set_voltage;
  517. dvb_attach(stb6000_attach, dm1105dvb->fe, 0x61,
  518. &dm1105dvb->i2c_adap);
  519. break;
  520. }
  521. dm1105dvb->fe = dvb_attach(
  522. si21xx_attach, &serit_config,
  523. &dm1105dvb->i2c_adap);
  524. if (dm1105dvb->fe)
  525. dm1105dvb->fe->ops.set_voltage =
  526. dm1105dvb_set_voltage;
  527. }
  528. if (!dm1105dvb->fe) {
  529. dev_err(&dm1105dvb->pdev->dev, "could not attach frontend\n");
  530. return -ENODEV;
  531. }
  532. ret = dvb_register_frontend(&dm1105dvb->dvb_adapter, dm1105dvb->fe);
  533. if (ret < 0) {
  534. if (dm1105dvb->fe->ops.release)
  535. dm1105dvb->fe->ops.release(dm1105dvb->fe);
  536. dm1105dvb->fe = NULL;
  537. return ret;
  538. }
  539. return 0;
  540. }
  541. static void __devinit dm1105dvb_read_mac(struct dm1105dvb *dm1105dvb, u8 *mac)
  542. {
  543. static u8 command[1] = { 0x28 };
  544. struct i2c_msg msg[] = {
  545. {
  546. .addr = IIC_24C01_addr >> 1,
  547. .flags = 0,
  548. .buf = command,
  549. .len = 1
  550. }, {
  551. .addr = IIC_24C01_addr >> 1,
  552. .flags = I2C_M_RD,
  553. .buf = mac,
  554. .len = 6
  555. },
  556. };
  557. dm1105_i2c_xfer(&dm1105dvb->i2c_adap, msg , 2);
  558. dev_info(&dm1105dvb->pdev->dev, "MAC %pM\n", mac);
  559. }
  560. static int __devinit dm1105_probe(struct pci_dev *pdev,
  561. const struct pci_device_id *ent)
  562. {
  563. struct dm1105dvb *dm1105dvb;
  564. struct dvb_adapter *dvb_adapter;
  565. struct dvb_demux *dvbdemux;
  566. struct dmx_demux *dmx;
  567. int ret = -ENOMEM;
  568. dm1105dvb = kzalloc(sizeof(struct dm1105dvb), GFP_KERNEL);
  569. if (!dm1105dvb)
  570. return -ENOMEM;
  571. dm1105dvb->pdev = pdev;
  572. dm1105dvb->buffer_size = 5 * DM1105_DMA_BYTES;
  573. dm1105dvb->PacketErrorCount = 0;
  574. dm1105dvb->dmarst = 0;
  575. ret = pci_enable_device(pdev);
  576. if (ret < 0)
  577. goto err_kfree;
  578. ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  579. if (ret < 0)
  580. goto err_pci_disable_device;
  581. pci_set_master(pdev);
  582. ret = pci_request_regions(pdev, DRIVER_NAME);
  583. if (ret < 0)
  584. goto err_pci_disable_device;
  585. dm1105dvb->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
  586. if (!dm1105dvb->io_mem) {
  587. ret = -EIO;
  588. goto err_pci_release_regions;
  589. }
  590. spin_lock_init(&dm1105dvb->lock);
  591. pci_set_drvdata(pdev, dm1105dvb);
  592. ret = dm1105dvb_hw_init(dm1105dvb);
  593. if (ret < 0)
  594. goto err_pci_iounmap;
  595. /* i2c */
  596. i2c_set_adapdata(&dm1105dvb->i2c_adap, dm1105dvb);
  597. strcpy(dm1105dvb->i2c_adap.name, DRIVER_NAME);
  598. dm1105dvb->i2c_adap.owner = THIS_MODULE;
  599. dm1105dvb->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
  600. dm1105dvb->i2c_adap.dev.parent = &pdev->dev;
  601. dm1105dvb->i2c_adap.algo = &dm1105_algo;
  602. dm1105dvb->i2c_adap.algo_data = dm1105dvb;
  603. ret = i2c_add_adapter(&dm1105dvb->i2c_adap);
  604. if (ret < 0)
  605. goto err_dm1105dvb_hw_exit;
  606. /* dvb */
  607. ret = dvb_register_adapter(&dm1105dvb->dvb_adapter, DRIVER_NAME,
  608. THIS_MODULE, &pdev->dev, adapter_nr);
  609. if (ret < 0)
  610. goto err_i2c_del_adapter;
  611. dvb_adapter = &dm1105dvb->dvb_adapter;
  612. dm1105dvb_read_mac(dm1105dvb, dvb_adapter->proposed_mac);
  613. dvbdemux = &dm1105dvb->demux;
  614. dvbdemux->filternum = 256;
  615. dvbdemux->feednum = 256;
  616. dvbdemux->start_feed = dm1105dvb_start_feed;
  617. dvbdemux->stop_feed = dm1105dvb_stop_feed;
  618. dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
  619. DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
  620. ret = dvb_dmx_init(dvbdemux);
  621. if (ret < 0)
  622. goto err_dvb_unregister_adapter;
  623. dmx = &dvbdemux->dmx;
  624. dm1105dvb->dmxdev.filternum = 256;
  625. dm1105dvb->dmxdev.demux = dmx;
  626. dm1105dvb->dmxdev.capabilities = 0;
  627. ret = dvb_dmxdev_init(&dm1105dvb->dmxdev, dvb_adapter);
  628. if (ret < 0)
  629. goto err_dvb_dmx_release;
  630. dm1105dvb->hw_frontend.source = DMX_FRONTEND_0;
  631. ret = dmx->add_frontend(dmx, &dm1105dvb->hw_frontend);
  632. if (ret < 0)
  633. goto err_dvb_dmxdev_release;
  634. dm1105dvb->mem_frontend.source = DMX_MEMORY_FE;
  635. ret = dmx->add_frontend(dmx, &dm1105dvb->mem_frontend);
  636. if (ret < 0)
  637. goto err_remove_hw_frontend;
  638. ret = dmx->connect_frontend(dmx, &dm1105dvb->hw_frontend);
  639. if (ret < 0)
  640. goto err_remove_mem_frontend;
  641. ret = frontend_init(dm1105dvb);
  642. if (ret < 0)
  643. goto err_disconnect_frontend;
  644. dvb_net_init(dvb_adapter, &dm1105dvb->dvbnet, dmx);
  645. dm1105_ir_init(dm1105dvb);
  646. INIT_WORK(&dm1105dvb->work, dm1105_dmx_buffer);
  647. sprintf(dm1105dvb->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
  648. dm1105dvb->wq = create_singlethread_workqueue(dm1105dvb->wqn);
  649. if (!dm1105dvb->wq)
  650. goto err_dvb_net;
  651. ret = request_irq(pdev->irq, dm1105dvb_irq, IRQF_SHARED,
  652. DRIVER_NAME, dm1105dvb);
  653. if (ret < 0)
  654. goto err_workqueue;
  655. return 0;
  656. err_workqueue:
  657. destroy_workqueue(dm1105dvb->wq);
  658. err_dvb_net:
  659. dvb_net_release(&dm1105dvb->dvbnet);
  660. err_disconnect_frontend:
  661. dmx->disconnect_frontend(dmx);
  662. err_remove_mem_frontend:
  663. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  664. err_remove_hw_frontend:
  665. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  666. err_dvb_dmxdev_release:
  667. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  668. err_dvb_dmx_release:
  669. dvb_dmx_release(dvbdemux);
  670. err_dvb_unregister_adapter:
  671. dvb_unregister_adapter(dvb_adapter);
  672. err_i2c_del_adapter:
  673. i2c_del_adapter(&dm1105dvb->i2c_adap);
  674. err_dm1105dvb_hw_exit:
  675. dm1105dvb_hw_exit(dm1105dvb);
  676. err_pci_iounmap:
  677. pci_iounmap(pdev, dm1105dvb->io_mem);
  678. err_pci_release_regions:
  679. pci_release_regions(pdev);
  680. err_pci_disable_device:
  681. pci_disable_device(pdev);
  682. err_kfree:
  683. pci_set_drvdata(pdev, NULL);
  684. kfree(dm1105dvb);
  685. return ret;
  686. }
  687. static void __devexit dm1105_remove(struct pci_dev *pdev)
  688. {
  689. struct dm1105dvb *dm1105dvb = pci_get_drvdata(pdev);
  690. struct dvb_adapter *dvb_adapter = &dm1105dvb->dvb_adapter;
  691. struct dvb_demux *dvbdemux = &dm1105dvb->demux;
  692. struct dmx_demux *dmx = &dvbdemux->dmx;
  693. dm1105_ir_exit(dm1105dvb);
  694. dmx->close(dmx);
  695. dvb_net_release(&dm1105dvb->dvbnet);
  696. if (dm1105dvb->fe)
  697. dvb_unregister_frontend(dm1105dvb->fe);
  698. dmx->disconnect_frontend(dmx);
  699. dmx->remove_frontend(dmx, &dm1105dvb->mem_frontend);
  700. dmx->remove_frontend(dmx, &dm1105dvb->hw_frontend);
  701. dvb_dmxdev_release(&dm1105dvb->dmxdev);
  702. dvb_dmx_release(dvbdemux);
  703. dvb_unregister_adapter(dvb_adapter);
  704. if (&dm1105dvb->i2c_adap)
  705. i2c_del_adapter(&dm1105dvb->i2c_adap);
  706. dm1105dvb_hw_exit(dm1105dvb);
  707. synchronize_irq(pdev->irq);
  708. free_irq(pdev->irq, dm1105dvb);
  709. pci_iounmap(pdev, dm1105dvb->io_mem);
  710. pci_release_regions(pdev);
  711. pci_disable_device(pdev);
  712. pci_set_drvdata(pdev, NULL);
  713. kfree(dm1105dvb);
  714. }
  715. static struct pci_device_id dm1105_id_table[] __devinitdata = {
  716. {
  717. .vendor = PCI_VENDOR_ID_TRIGEM,
  718. .device = PCI_DEVICE_ID_DM1105,
  719. .subvendor = PCI_ANY_ID,
  720. .subdevice = PCI_DEVICE_ID_DW2002,
  721. }, {
  722. .vendor = PCI_VENDOR_ID_TRIGEM,
  723. .device = PCI_DEVICE_ID_DM1105,
  724. .subvendor = PCI_ANY_ID,
  725. .subdevice = PCI_DEVICE_ID_DW2004,
  726. }, {
  727. .vendor = PCI_VENDOR_ID_AXESS,
  728. .device = PCI_DEVICE_ID_DM05,
  729. .subvendor = PCI_VENDOR_ID_AXESS,
  730. .subdevice = PCI_DEVICE_ID_DM05,
  731. }, {
  732. /* empty */
  733. },
  734. };
  735. MODULE_DEVICE_TABLE(pci, dm1105_id_table);
  736. static struct pci_driver dm1105_driver = {
  737. .name = DRIVER_NAME,
  738. .id_table = dm1105_id_table,
  739. .probe = dm1105_probe,
  740. .remove = __devexit_p(dm1105_remove),
  741. };
  742. static int __init dm1105_init(void)
  743. {
  744. return pci_register_driver(&dm1105_driver);
  745. }
  746. static void __exit dm1105_exit(void)
  747. {
  748. pci_unregister_driver(&dm1105_driver);
  749. }
  750. module_init(dm1105_init);
  751. module_exit(dm1105_exit);
  752. MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
  753. MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
  754. MODULE_LICENSE("GPL");