smu.c 31 KB

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  1. /*
  2. * PowerMac G5 SMU driver
  3. *
  4. * Copyright 2004 J. Mayer <l_indien@magic.fr>
  5. * Copyright 2005 Benjamin Herrenschmidt, IBM Corp.
  6. *
  7. * Released under the term of the GNU GPL v2.
  8. */
  9. /*
  10. * TODO:
  11. * - maybe add timeout to commands ?
  12. * - blocking version of time functions
  13. * - polling version of i2c commands (including timer that works with
  14. * interrupts off)
  15. * - maybe avoid some data copies with i2c by directly using the smu cmd
  16. * buffer and a lower level internal interface
  17. * - understand SMU -> CPU events and implement reception of them via
  18. * the userland interface
  19. */
  20. #include <linux/smp_lock.h>
  21. #include <linux/types.h>
  22. #include <linux/kernel.h>
  23. #include <linux/device.h>
  24. #include <linux/dmapool.h>
  25. #include <linux/bootmem.h>
  26. #include <linux/vmalloc.h>
  27. #include <linux/highmem.h>
  28. #include <linux/jiffies.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/rtc.h>
  31. #include <linux/completion.h>
  32. #include <linux/miscdevice.h>
  33. #include <linux/delay.h>
  34. #include <linux/sysdev.h>
  35. #include <linux/poll.h>
  36. #include <linux/mutex.h>
  37. #include <linux/of_device.h>
  38. #include <linux/of_platform.h>
  39. #include <asm/byteorder.h>
  40. #include <asm/io.h>
  41. #include <asm/prom.h>
  42. #include <asm/machdep.h>
  43. #include <asm/pmac_feature.h>
  44. #include <asm/smu.h>
  45. #include <asm/sections.h>
  46. #include <asm/abs_addr.h>
  47. #include <asm/uaccess.h>
  48. #define VERSION "0.7"
  49. #define AUTHOR "(c) 2005 Benjamin Herrenschmidt, IBM Corp."
  50. #undef DEBUG_SMU
  51. #ifdef DEBUG_SMU
  52. #define DPRINTK(fmt, args...) do { printk(KERN_DEBUG fmt , ##args); } while (0)
  53. #else
  54. #define DPRINTK(fmt, args...) do { } while (0)
  55. #endif
  56. /*
  57. * This is the command buffer passed to the SMU hardware
  58. */
  59. #define SMU_MAX_DATA 254
  60. struct smu_cmd_buf {
  61. u8 cmd;
  62. u8 length;
  63. u8 data[SMU_MAX_DATA];
  64. };
  65. struct smu_device {
  66. spinlock_t lock;
  67. struct device_node *of_node;
  68. struct of_device *of_dev;
  69. int doorbell; /* doorbell gpio */
  70. u32 __iomem *db_buf; /* doorbell buffer */
  71. struct device_node *db_node;
  72. unsigned int db_irq;
  73. int msg;
  74. struct device_node *msg_node;
  75. unsigned int msg_irq;
  76. struct smu_cmd_buf *cmd_buf; /* command buffer virtual */
  77. u32 cmd_buf_abs; /* command buffer absolute */
  78. struct list_head cmd_list;
  79. struct smu_cmd *cmd_cur; /* pending command */
  80. int broken_nap;
  81. struct list_head cmd_i2c_list;
  82. struct smu_i2c_cmd *cmd_i2c_cur; /* pending i2c command */
  83. struct timer_list i2c_timer;
  84. };
  85. /*
  86. * I don't think there will ever be more than one SMU, so
  87. * for now, just hard code that
  88. */
  89. static struct smu_device *smu;
  90. static DEFINE_MUTEX(smu_part_access);
  91. static int smu_irq_inited;
  92. static void smu_i2c_retry(unsigned long data);
  93. /*
  94. * SMU driver low level stuff
  95. */
  96. static void smu_start_cmd(void)
  97. {
  98. unsigned long faddr, fend;
  99. struct smu_cmd *cmd;
  100. if (list_empty(&smu->cmd_list))
  101. return;
  102. /* Fetch first command in queue */
  103. cmd = list_entry(smu->cmd_list.next, struct smu_cmd, link);
  104. smu->cmd_cur = cmd;
  105. list_del(&cmd->link);
  106. DPRINTK("SMU: starting cmd %x, %d bytes data\n", cmd->cmd,
  107. cmd->data_len);
  108. DPRINTK("SMU: data buffer: %02x %02x %02x %02x %02x %02x %02x %02x\n",
  109. ((u8 *)cmd->data_buf)[0], ((u8 *)cmd->data_buf)[1],
  110. ((u8 *)cmd->data_buf)[2], ((u8 *)cmd->data_buf)[3],
  111. ((u8 *)cmd->data_buf)[4], ((u8 *)cmd->data_buf)[5],
  112. ((u8 *)cmd->data_buf)[6], ((u8 *)cmd->data_buf)[7]);
  113. /* Fill the SMU command buffer */
  114. smu->cmd_buf->cmd = cmd->cmd;
  115. smu->cmd_buf->length = cmd->data_len;
  116. memcpy(smu->cmd_buf->data, cmd->data_buf, cmd->data_len);
  117. /* Flush command and data to RAM */
  118. faddr = (unsigned long)smu->cmd_buf;
  119. fend = faddr + smu->cmd_buf->length + 2;
  120. flush_inval_dcache_range(faddr, fend);
  121. /* We also disable NAP mode for the duration of the command
  122. * on U3 based machines.
  123. * This is slightly racy as it can be written back to 1 by a sysctl
  124. * but that never happens in practice. There seem to be an issue with
  125. * U3 based machines such as the iMac G5 where napping for the
  126. * whole duration of the command prevents the SMU from fetching it
  127. * from memory. This might be related to the strange i2c based
  128. * mechanism the SMU uses to access memory.
  129. */
  130. if (smu->broken_nap)
  131. powersave_nap = 0;
  132. /* This isn't exactly a DMA mapping here, I suspect
  133. * the SMU is actually communicating with us via i2c to the
  134. * northbridge or the CPU to access RAM.
  135. */
  136. writel(smu->cmd_buf_abs, smu->db_buf);
  137. /* Ring the SMU doorbell */
  138. pmac_do_feature_call(PMAC_FTR_WRITE_GPIO, NULL, smu->doorbell, 4);
  139. }
  140. static irqreturn_t smu_db_intr(int irq, void *arg)
  141. {
  142. unsigned long flags;
  143. struct smu_cmd *cmd;
  144. void (*done)(struct smu_cmd *cmd, void *misc) = NULL;
  145. void *misc = NULL;
  146. u8 gpio;
  147. int rc = 0;
  148. /* SMU completed the command, well, we hope, let's make sure
  149. * of it
  150. */
  151. spin_lock_irqsave(&smu->lock, flags);
  152. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  153. if ((gpio & 7) != 7) {
  154. spin_unlock_irqrestore(&smu->lock, flags);
  155. return IRQ_HANDLED;
  156. }
  157. cmd = smu->cmd_cur;
  158. smu->cmd_cur = NULL;
  159. if (cmd == NULL)
  160. goto bail;
  161. if (rc == 0) {
  162. unsigned long faddr;
  163. int reply_len;
  164. u8 ack;
  165. /* CPU might have brought back the cache line, so we need
  166. * to flush again before peeking at the SMU response. We
  167. * flush the entire buffer for now as we haven't read the
  168. * reply length (it's only 2 cache lines anyway)
  169. */
  170. faddr = (unsigned long)smu->cmd_buf;
  171. flush_inval_dcache_range(faddr, faddr + 256);
  172. /* Now check ack */
  173. ack = (~cmd->cmd) & 0xff;
  174. if (ack != smu->cmd_buf->cmd) {
  175. DPRINTK("SMU: incorrect ack, want %x got %x\n",
  176. ack, smu->cmd_buf->cmd);
  177. rc = -EIO;
  178. }
  179. reply_len = rc == 0 ? smu->cmd_buf->length : 0;
  180. DPRINTK("SMU: reply len: %d\n", reply_len);
  181. if (reply_len > cmd->reply_len) {
  182. printk(KERN_WARNING "SMU: reply buffer too small,"
  183. "got %d bytes for a %d bytes buffer\n",
  184. reply_len, cmd->reply_len);
  185. reply_len = cmd->reply_len;
  186. }
  187. cmd->reply_len = reply_len;
  188. if (cmd->reply_buf && reply_len)
  189. memcpy(cmd->reply_buf, smu->cmd_buf->data, reply_len);
  190. }
  191. /* Now complete the command. Write status last in order as we lost
  192. * ownership of the command structure as soon as it's no longer -1
  193. */
  194. done = cmd->done;
  195. misc = cmd->misc;
  196. mb();
  197. cmd->status = rc;
  198. /* Re-enable NAP mode */
  199. if (smu->broken_nap)
  200. powersave_nap = 1;
  201. bail:
  202. /* Start next command if any */
  203. smu_start_cmd();
  204. spin_unlock_irqrestore(&smu->lock, flags);
  205. /* Call command completion handler if any */
  206. if (done)
  207. done(cmd, misc);
  208. /* It's an edge interrupt, nothing to do */
  209. return IRQ_HANDLED;
  210. }
  211. static irqreturn_t smu_msg_intr(int irq, void *arg)
  212. {
  213. /* I don't quite know what to do with this one, we seem to never
  214. * receive it, so I suspect we have to arm it someway in the SMU
  215. * to start getting events that way.
  216. */
  217. printk(KERN_INFO "SMU: message interrupt !\n");
  218. /* It's an edge interrupt, nothing to do */
  219. return IRQ_HANDLED;
  220. }
  221. /*
  222. * Queued command management.
  223. *
  224. */
  225. int smu_queue_cmd(struct smu_cmd *cmd)
  226. {
  227. unsigned long flags;
  228. if (smu == NULL)
  229. return -ENODEV;
  230. if (cmd->data_len > SMU_MAX_DATA ||
  231. cmd->reply_len > SMU_MAX_DATA)
  232. return -EINVAL;
  233. cmd->status = 1;
  234. spin_lock_irqsave(&smu->lock, flags);
  235. list_add_tail(&cmd->link, &smu->cmd_list);
  236. if (smu->cmd_cur == NULL)
  237. smu_start_cmd();
  238. spin_unlock_irqrestore(&smu->lock, flags);
  239. /* Workaround for early calls when irq isn't available */
  240. if (!smu_irq_inited || smu->db_irq == NO_IRQ)
  241. smu_spinwait_cmd(cmd);
  242. return 0;
  243. }
  244. EXPORT_SYMBOL(smu_queue_cmd);
  245. int smu_queue_simple(struct smu_simple_cmd *scmd, u8 command,
  246. unsigned int data_len,
  247. void (*done)(struct smu_cmd *cmd, void *misc),
  248. void *misc, ...)
  249. {
  250. struct smu_cmd *cmd = &scmd->cmd;
  251. va_list list;
  252. int i;
  253. if (data_len > sizeof(scmd->buffer))
  254. return -EINVAL;
  255. memset(scmd, 0, sizeof(*scmd));
  256. cmd->cmd = command;
  257. cmd->data_len = data_len;
  258. cmd->data_buf = scmd->buffer;
  259. cmd->reply_len = sizeof(scmd->buffer);
  260. cmd->reply_buf = scmd->buffer;
  261. cmd->done = done;
  262. cmd->misc = misc;
  263. va_start(list, misc);
  264. for (i = 0; i < data_len; ++i)
  265. scmd->buffer[i] = (u8)va_arg(list, int);
  266. va_end(list);
  267. return smu_queue_cmd(cmd);
  268. }
  269. EXPORT_SYMBOL(smu_queue_simple);
  270. void smu_poll(void)
  271. {
  272. u8 gpio;
  273. if (smu == NULL)
  274. return;
  275. gpio = pmac_do_feature_call(PMAC_FTR_READ_GPIO, NULL, smu->doorbell);
  276. if ((gpio & 7) == 7)
  277. smu_db_intr(smu->db_irq, smu);
  278. }
  279. EXPORT_SYMBOL(smu_poll);
  280. void smu_done_complete(struct smu_cmd *cmd, void *misc)
  281. {
  282. struct completion *comp = misc;
  283. complete(comp);
  284. }
  285. EXPORT_SYMBOL(smu_done_complete);
  286. void smu_spinwait_cmd(struct smu_cmd *cmd)
  287. {
  288. while(cmd->status == 1)
  289. smu_poll();
  290. }
  291. EXPORT_SYMBOL(smu_spinwait_cmd);
  292. /* RTC low level commands */
  293. static inline int bcd2hex (int n)
  294. {
  295. return (((n & 0xf0) >> 4) * 10) + (n & 0xf);
  296. }
  297. static inline int hex2bcd (int n)
  298. {
  299. return ((n / 10) << 4) + (n % 10);
  300. }
  301. static inline void smu_fill_set_rtc_cmd(struct smu_cmd_buf *cmd_buf,
  302. struct rtc_time *time)
  303. {
  304. cmd_buf->cmd = 0x8e;
  305. cmd_buf->length = 8;
  306. cmd_buf->data[0] = 0x80;
  307. cmd_buf->data[1] = hex2bcd(time->tm_sec);
  308. cmd_buf->data[2] = hex2bcd(time->tm_min);
  309. cmd_buf->data[3] = hex2bcd(time->tm_hour);
  310. cmd_buf->data[4] = time->tm_wday;
  311. cmd_buf->data[5] = hex2bcd(time->tm_mday);
  312. cmd_buf->data[6] = hex2bcd(time->tm_mon) + 1;
  313. cmd_buf->data[7] = hex2bcd(time->tm_year - 100);
  314. }
  315. int smu_get_rtc_time(struct rtc_time *time, int spinwait)
  316. {
  317. struct smu_simple_cmd cmd;
  318. int rc;
  319. if (smu == NULL)
  320. return -ENODEV;
  321. memset(time, 0, sizeof(struct rtc_time));
  322. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 1, NULL, NULL,
  323. SMU_CMD_RTC_GET_DATETIME);
  324. if (rc)
  325. return rc;
  326. smu_spinwait_simple(&cmd);
  327. time->tm_sec = bcd2hex(cmd.buffer[0]);
  328. time->tm_min = bcd2hex(cmd.buffer[1]);
  329. time->tm_hour = bcd2hex(cmd.buffer[2]);
  330. time->tm_wday = bcd2hex(cmd.buffer[3]);
  331. time->tm_mday = bcd2hex(cmd.buffer[4]);
  332. time->tm_mon = bcd2hex(cmd.buffer[5]) - 1;
  333. time->tm_year = bcd2hex(cmd.buffer[6]) + 100;
  334. return 0;
  335. }
  336. int smu_set_rtc_time(struct rtc_time *time, int spinwait)
  337. {
  338. struct smu_simple_cmd cmd;
  339. int rc;
  340. if (smu == NULL)
  341. return -ENODEV;
  342. rc = smu_queue_simple(&cmd, SMU_CMD_RTC_COMMAND, 8, NULL, NULL,
  343. SMU_CMD_RTC_SET_DATETIME,
  344. hex2bcd(time->tm_sec),
  345. hex2bcd(time->tm_min),
  346. hex2bcd(time->tm_hour),
  347. time->tm_wday,
  348. hex2bcd(time->tm_mday),
  349. hex2bcd(time->tm_mon) + 1,
  350. hex2bcd(time->tm_year - 100));
  351. if (rc)
  352. return rc;
  353. smu_spinwait_simple(&cmd);
  354. return 0;
  355. }
  356. void smu_shutdown(void)
  357. {
  358. struct smu_simple_cmd cmd;
  359. if (smu == NULL)
  360. return;
  361. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 9, NULL, NULL,
  362. 'S', 'H', 'U', 'T', 'D', 'O', 'W', 'N', 0))
  363. return;
  364. smu_spinwait_simple(&cmd);
  365. for (;;)
  366. ;
  367. }
  368. void smu_restart(void)
  369. {
  370. struct smu_simple_cmd cmd;
  371. if (smu == NULL)
  372. return;
  373. if (smu_queue_simple(&cmd, SMU_CMD_POWER_COMMAND, 8, NULL, NULL,
  374. 'R', 'E', 'S', 'T', 'A', 'R', 'T', 0))
  375. return;
  376. smu_spinwait_simple(&cmd);
  377. for (;;)
  378. ;
  379. }
  380. int smu_present(void)
  381. {
  382. return smu != NULL;
  383. }
  384. EXPORT_SYMBOL(smu_present);
  385. int __init smu_init (void)
  386. {
  387. struct device_node *np;
  388. const u32 *data;
  389. int ret = 0;
  390. np = of_find_node_by_type(NULL, "smu");
  391. if (np == NULL)
  392. return -ENODEV;
  393. printk(KERN_INFO "SMU: Driver %s %s\n", VERSION, AUTHOR);
  394. if (smu_cmdbuf_abs == 0) {
  395. printk(KERN_ERR "SMU: Command buffer not allocated !\n");
  396. ret = -EINVAL;
  397. goto fail_np;
  398. }
  399. smu = alloc_bootmem(sizeof(struct smu_device));
  400. spin_lock_init(&smu->lock);
  401. INIT_LIST_HEAD(&smu->cmd_list);
  402. INIT_LIST_HEAD(&smu->cmd_i2c_list);
  403. smu->of_node = np;
  404. smu->db_irq = NO_IRQ;
  405. smu->msg_irq = NO_IRQ;
  406. /* smu_cmdbuf_abs is in the low 2G of RAM, can be converted to a
  407. * 32 bits value safely
  408. */
  409. smu->cmd_buf_abs = (u32)smu_cmdbuf_abs;
  410. smu->cmd_buf = (struct smu_cmd_buf *)abs_to_virt(smu_cmdbuf_abs);
  411. smu->db_node = of_find_node_by_name(NULL, "smu-doorbell");
  412. if (smu->db_node == NULL) {
  413. printk(KERN_ERR "SMU: Can't find doorbell GPIO !\n");
  414. ret = -ENXIO;
  415. goto fail_bootmem;
  416. }
  417. data = of_get_property(smu->db_node, "reg", NULL);
  418. if (data == NULL) {
  419. printk(KERN_ERR "SMU: Can't find doorbell GPIO address !\n");
  420. ret = -ENXIO;
  421. goto fail_db_node;
  422. }
  423. /* Current setup has one doorbell GPIO that does both doorbell
  424. * and ack. GPIOs are at 0x50, best would be to find that out
  425. * in the device-tree though.
  426. */
  427. smu->doorbell = *data;
  428. if (smu->doorbell < 0x50)
  429. smu->doorbell += 0x50;
  430. /* Now look for the smu-interrupt GPIO */
  431. do {
  432. smu->msg_node = of_find_node_by_name(NULL, "smu-interrupt");
  433. if (smu->msg_node == NULL)
  434. break;
  435. data = of_get_property(smu->msg_node, "reg", NULL);
  436. if (data == NULL) {
  437. of_node_put(smu->msg_node);
  438. smu->msg_node = NULL;
  439. break;
  440. }
  441. smu->msg = *data;
  442. if (smu->msg < 0x50)
  443. smu->msg += 0x50;
  444. } while(0);
  445. /* Doorbell buffer is currently hard-coded, I didn't find a proper
  446. * device-tree entry giving the address. Best would probably to use
  447. * an offset for K2 base though, but let's do it that way for now.
  448. */
  449. smu->db_buf = ioremap(0x8000860c, 0x1000);
  450. if (smu->db_buf == NULL) {
  451. printk(KERN_ERR "SMU: Can't map doorbell buffer pointer !\n");
  452. ret = -ENXIO;
  453. goto fail_msg_node;
  454. }
  455. /* U3 has an issue with NAP mode when issuing SMU commands */
  456. smu->broken_nap = pmac_get_uninorth_variant() < 4;
  457. if (smu->broken_nap)
  458. printk(KERN_INFO "SMU: using NAP mode workaround\n");
  459. sys_ctrler = SYS_CTRLER_SMU;
  460. return 0;
  461. fail_msg_node:
  462. if (smu->msg_node)
  463. of_node_put(smu->msg_node);
  464. fail_db_node:
  465. of_node_put(smu->db_node);
  466. fail_bootmem:
  467. free_bootmem((unsigned long)smu, sizeof(struct smu_device));
  468. smu = NULL;
  469. fail_np:
  470. of_node_put(np);
  471. return ret;
  472. }
  473. static int smu_late_init(void)
  474. {
  475. if (!smu)
  476. return 0;
  477. init_timer(&smu->i2c_timer);
  478. smu->i2c_timer.function = smu_i2c_retry;
  479. smu->i2c_timer.data = (unsigned long)smu;
  480. if (smu->db_node) {
  481. smu->db_irq = irq_of_parse_and_map(smu->db_node, 0);
  482. if (smu->db_irq == NO_IRQ)
  483. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  484. smu->db_node->full_name);
  485. }
  486. if (smu->msg_node) {
  487. smu->msg_irq = irq_of_parse_and_map(smu->msg_node, 0);
  488. if (smu->msg_irq == NO_IRQ)
  489. printk(KERN_ERR "smu: failed to map irq for node %s\n",
  490. smu->msg_node->full_name);
  491. }
  492. /*
  493. * Try to request the interrupts
  494. */
  495. if (smu->db_irq != NO_IRQ) {
  496. if (request_irq(smu->db_irq, smu_db_intr,
  497. IRQF_SHARED, "SMU doorbell", smu) < 0) {
  498. printk(KERN_WARNING "SMU: can't "
  499. "request interrupt %d\n",
  500. smu->db_irq);
  501. smu->db_irq = NO_IRQ;
  502. }
  503. }
  504. if (smu->msg_irq != NO_IRQ) {
  505. if (request_irq(smu->msg_irq, smu_msg_intr,
  506. IRQF_SHARED, "SMU message", smu) < 0) {
  507. printk(KERN_WARNING "SMU: can't "
  508. "request interrupt %d\n",
  509. smu->msg_irq);
  510. smu->msg_irq = NO_IRQ;
  511. }
  512. }
  513. smu_irq_inited = 1;
  514. return 0;
  515. }
  516. /* This has to be before arch_initcall as the low i2c stuff relies on the
  517. * above having been done before we reach arch_initcalls
  518. */
  519. core_initcall(smu_late_init);
  520. /*
  521. * sysfs visibility
  522. */
  523. static void smu_expose_childs(struct work_struct *unused)
  524. {
  525. struct device_node *np;
  526. for (np = NULL; (np = of_get_next_child(smu->of_node, np)) != NULL;)
  527. if (of_device_is_compatible(np, "smu-sensors"))
  528. of_platform_device_create(np, "smu-sensors",
  529. &smu->of_dev->dev);
  530. }
  531. static DECLARE_WORK(smu_expose_childs_work, smu_expose_childs);
  532. static int smu_platform_probe(struct of_device* dev,
  533. const struct of_device_id *match)
  534. {
  535. if (!smu)
  536. return -ENODEV;
  537. smu->of_dev = dev;
  538. /*
  539. * Ok, we are matched, now expose all i2c busses. We have to defer
  540. * that unfortunately or it would deadlock inside the device model
  541. */
  542. schedule_work(&smu_expose_childs_work);
  543. return 0;
  544. }
  545. static struct of_device_id smu_platform_match[] =
  546. {
  547. {
  548. .type = "smu",
  549. },
  550. {},
  551. };
  552. static struct of_platform_driver smu_of_platform_driver =
  553. {
  554. .name = "smu",
  555. .match_table = smu_platform_match,
  556. .probe = smu_platform_probe,
  557. };
  558. static int __init smu_init_sysfs(void)
  559. {
  560. /*
  561. * Due to sysfs bogosity, a sysdev is not a real device, so
  562. * we should in fact create both if we want sysdev semantics
  563. * for power management.
  564. * For now, we don't power manage machines with an SMU chip,
  565. * I'm a bit too far from figuring out how that works with those
  566. * new chipsets, but that will come back and bite us
  567. */
  568. of_register_platform_driver(&smu_of_platform_driver);
  569. return 0;
  570. }
  571. device_initcall(smu_init_sysfs);
  572. struct of_device *smu_get_ofdev(void)
  573. {
  574. if (!smu)
  575. return NULL;
  576. return smu->of_dev;
  577. }
  578. EXPORT_SYMBOL_GPL(smu_get_ofdev);
  579. /*
  580. * i2c interface
  581. */
  582. static void smu_i2c_complete_command(struct smu_i2c_cmd *cmd, int fail)
  583. {
  584. void (*done)(struct smu_i2c_cmd *cmd, void *misc) = cmd->done;
  585. void *misc = cmd->misc;
  586. unsigned long flags;
  587. /* Check for read case */
  588. if (!fail && cmd->read) {
  589. if (cmd->pdata[0] < 1)
  590. fail = 1;
  591. else
  592. memcpy(cmd->info.data, &cmd->pdata[1],
  593. cmd->info.datalen);
  594. }
  595. DPRINTK("SMU: completing, success: %d\n", !fail);
  596. /* Update status and mark no pending i2c command with lock
  597. * held so nobody comes in while we dequeue an eventual
  598. * pending next i2c command
  599. */
  600. spin_lock_irqsave(&smu->lock, flags);
  601. smu->cmd_i2c_cur = NULL;
  602. wmb();
  603. cmd->status = fail ? -EIO : 0;
  604. /* Is there another i2c command waiting ? */
  605. if (!list_empty(&smu->cmd_i2c_list)) {
  606. struct smu_i2c_cmd *newcmd;
  607. /* Fetch it, new current, remove from list */
  608. newcmd = list_entry(smu->cmd_i2c_list.next,
  609. struct smu_i2c_cmd, link);
  610. smu->cmd_i2c_cur = newcmd;
  611. list_del(&cmd->link);
  612. /* Queue with low level smu */
  613. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  614. if (smu->cmd_cur == NULL)
  615. smu_start_cmd();
  616. }
  617. spin_unlock_irqrestore(&smu->lock, flags);
  618. /* Call command completion handler if any */
  619. if (done)
  620. done(cmd, misc);
  621. }
  622. static void smu_i2c_retry(unsigned long data)
  623. {
  624. struct smu_i2c_cmd *cmd = smu->cmd_i2c_cur;
  625. DPRINTK("SMU: i2c failure, requeuing...\n");
  626. /* requeue command simply by resetting reply_len */
  627. cmd->pdata[0] = 0xff;
  628. cmd->scmd.reply_len = sizeof(cmd->pdata);
  629. smu_queue_cmd(&cmd->scmd);
  630. }
  631. static void smu_i2c_low_completion(struct smu_cmd *scmd, void *misc)
  632. {
  633. struct smu_i2c_cmd *cmd = misc;
  634. int fail = 0;
  635. DPRINTK("SMU: i2c compl. stage=%d status=%x pdata[0]=%x rlen: %x\n",
  636. cmd->stage, scmd->status, cmd->pdata[0], scmd->reply_len);
  637. /* Check for possible status */
  638. if (scmd->status < 0)
  639. fail = 1;
  640. else if (cmd->read) {
  641. if (cmd->stage == 0)
  642. fail = cmd->pdata[0] != 0;
  643. else
  644. fail = cmd->pdata[0] >= 0x80;
  645. } else {
  646. fail = cmd->pdata[0] != 0;
  647. }
  648. /* Handle failures by requeuing command, after 5ms interval
  649. */
  650. if (fail && --cmd->retries > 0) {
  651. DPRINTK("SMU: i2c failure, starting timer...\n");
  652. BUG_ON(cmd != smu->cmd_i2c_cur);
  653. if (!smu_irq_inited) {
  654. mdelay(5);
  655. smu_i2c_retry(0);
  656. return;
  657. }
  658. mod_timer(&smu->i2c_timer, jiffies + msecs_to_jiffies(5));
  659. return;
  660. }
  661. /* If failure or stage 1, command is complete */
  662. if (fail || cmd->stage != 0) {
  663. smu_i2c_complete_command(cmd, fail);
  664. return;
  665. }
  666. DPRINTK("SMU: going to stage 1\n");
  667. /* Ok, initial command complete, now poll status */
  668. scmd->reply_buf = cmd->pdata;
  669. scmd->reply_len = sizeof(cmd->pdata);
  670. scmd->data_buf = cmd->pdata;
  671. scmd->data_len = 1;
  672. cmd->pdata[0] = 0;
  673. cmd->stage = 1;
  674. cmd->retries = 20;
  675. smu_queue_cmd(scmd);
  676. }
  677. int smu_queue_i2c(struct smu_i2c_cmd *cmd)
  678. {
  679. unsigned long flags;
  680. if (smu == NULL)
  681. return -ENODEV;
  682. /* Fill most fields of scmd */
  683. cmd->scmd.cmd = SMU_CMD_I2C_COMMAND;
  684. cmd->scmd.done = smu_i2c_low_completion;
  685. cmd->scmd.misc = cmd;
  686. cmd->scmd.reply_buf = cmd->pdata;
  687. cmd->scmd.reply_len = sizeof(cmd->pdata);
  688. cmd->scmd.data_buf = (u8 *)(char *)&cmd->info;
  689. cmd->scmd.status = 1;
  690. cmd->stage = 0;
  691. cmd->pdata[0] = 0xff;
  692. cmd->retries = 20;
  693. cmd->status = 1;
  694. /* Check transfer type, sanitize some "info" fields
  695. * based on transfer type and do more checking
  696. */
  697. cmd->info.caddr = cmd->info.devaddr;
  698. cmd->read = cmd->info.devaddr & 0x01;
  699. switch(cmd->info.type) {
  700. case SMU_I2C_TRANSFER_SIMPLE:
  701. memset(&cmd->info.sublen, 0, 4);
  702. break;
  703. case SMU_I2C_TRANSFER_COMBINED:
  704. cmd->info.devaddr &= 0xfe;
  705. case SMU_I2C_TRANSFER_STDSUB:
  706. if (cmd->info.sublen > 3)
  707. return -EINVAL;
  708. break;
  709. default:
  710. return -EINVAL;
  711. }
  712. /* Finish setting up command based on transfer direction
  713. */
  714. if (cmd->read) {
  715. if (cmd->info.datalen > SMU_I2C_READ_MAX)
  716. return -EINVAL;
  717. memset(cmd->info.data, 0xff, cmd->info.datalen);
  718. cmd->scmd.data_len = 9;
  719. } else {
  720. if (cmd->info.datalen > SMU_I2C_WRITE_MAX)
  721. return -EINVAL;
  722. cmd->scmd.data_len = 9 + cmd->info.datalen;
  723. }
  724. DPRINTK("SMU: i2c enqueuing command\n");
  725. DPRINTK("SMU: %s, len=%d bus=%x addr=%x sub0=%x type=%x\n",
  726. cmd->read ? "read" : "write", cmd->info.datalen,
  727. cmd->info.bus, cmd->info.caddr,
  728. cmd->info.subaddr[0], cmd->info.type);
  729. /* Enqueue command in i2c list, and if empty, enqueue also in
  730. * main command list
  731. */
  732. spin_lock_irqsave(&smu->lock, flags);
  733. if (smu->cmd_i2c_cur == NULL) {
  734. smu->cmd_i2c_cur = cmd;
  735. list_add_tail(&cmd->scmd.link, &smu->cmd_list);
  736. if (smu->cmd_cur == NULL)
  737. smu_start_cmd();
  738. } else
  739. list_add_tail(&cmd->link, &smu->cmd_i2c_list);
  740. spin_unlock_irqrestore(&smu->lock, flags);
  741. return 0;
  742. }
  743. /*
  744. * Handling of "partitions"
  745. */
  746. static int smu_read_datablock(u8 *dest, unsigned int addr, unsigned int len)
  747. {
  748. DECLARE_COMPLETION_ONSTACK(comp);
  749. unsigned int chunk;
  750. struct smu_cmd cmd;
  751. int rc;
  752. u8 params[8];
  753. /* We currently use a chunk size of 0xe. We could check the
  754. * SMU firmware version and use bigger sizes though
  755. */
  756. chunk = 0xe;
  757. while (len) {
  758. unsigned int clen = min(len, chunk);
  759. cmd.cmd = SMU_CMD_MISC_ee_COMMAND;
  760. cmd.data_len = 7;
  761. cmd.data_buf = params;
  762. cmd.reply_len = chunk;
  763. cmd.reply_buf = dest;
  764. cmd.done = smu_done_complete;
  765. cmd.misc = &comp;
  766. params[0] = SMU_CMD_MISC_ee_GET_DATABLOCK_REC;
  767. params[1] = 0x4;
  768. *((u32 *)&params[2]) = addr;
  769. params[6] = clen;
  770. rc = smu_queue_cmd(&cmd);
  771. if (rc)
  772. return rc;
  773. wait_for_completion(&comp);
  774. if (cmd.status != 0)
  775. return rc;
  776. if (cmd.reply_len != clen) {
  777. printk(KERN_DEBUG "SMU: short read in "
  778. "smu_read_datablock, got: %d, want: %d\n",
  779. cmd.reply_len, clen);
  780. return -EIO;
  781. }
  782. len -= clen;
  783. addr += clen;
  784. dest += clen;
  785. }
  786. return 0;
  787. }
  788. static struct smu_sdbp_header *smu_create_sdb_partition(int id)
  789. {
  790. DECLARE_COMPLETION_ONSTACK(comp);
  791. struct smu_simple_cmd cmd;
  792. unsigned int addr, len, tlen;
  793. struct smu_sdbp_header *hdr;
  794. struct property *prop;
  795. /* First query the partition info */
  796. DPRINTK("SMU: Query partition infos ... (irq=%d)\n", smu->db_irq);
  797. smu_queue_simple(&cmd, SMU_CMD_PARTITION_COMMAND, 2,
  798. smu_done_complete, &comp,
  799. SMU_CMD_PARTITION_LATEST, id);
  800. wait_for_completion(&comp);
  801. DPRINTK("SMU: done, status: %d, reply_len: %d\n",
  802. cmd.cmd.status, cmd.cmd.reply_len);
  803. /* Partition doesn't exist (or other error) */
  804. if (cmd.cmd.status != 0 || cmd.cmd.reply_len != 6)
  805. return NULL;
  806. /* Fetch address and length from reply */
  807. addr = *((u16 *)cmd.buffer);
  808. len = cmd.buffer[3] << 2;
  809. /* Calucluate total length to allocate, including the 17 bytes
  810. * for "sdb-partition-XX" that we append at the end of the buffer
  811. */
  812. tlen = sizeof(struct property) + len + 18;
  813. prop = kzalloc(tlen, GFP_KERNEL);
  814. if (prop == NULL)
  815. return NULL;
  816. hdr = (struct smu_sdbp_header *)(prop + 1);
  817. prop->name = ((char *)prop) + tlen - 18;
  818. sprintf(prop->name, "sdb-partition-%02x", id);
  819. prop->length = len;
  820. prop->value = hdr;
  821. prop->next = NULL;
  822. /* Read the datablock */
  823. if (smu_read_datablock((u8 *)hdr, addr, len)) {
  824. printk(KERN_DEBUG "SMU: datablock read failed while reading "
  825. "partition %02x !\n", id);
  826. goto failure;
  827. }
  828. /* Got it, check a few things and create the property */
  829. if (hdr->id != id) {
  830. printk(KERN_DEBUG "SMU: Reading partition %02x and got "
  831. "%02x !\n", id, hdr->id);
  832. goto failure;
  833. }
  834. if (prom_add_property(smu->of_node, prop)) {
  835. printk(KERN_DEBUG "SMU: Failed creating sdb-partition-%02x "
  836. "property !\n", id);
  837. goto failure;
  838. }
  839. return hdr;
  840. failure:
  841. kfree(prop);
  842. return NULL;
  843. }
  844. /* Note: Only allowed to return error code in pointers (using ERR_PTR)
  845. * when interruptible is 1
  846. */
  847. const struct smu_sdbp_header *__smu_get_sdb_partition(int id,
  848. unsigned int *size, int interruptible)
  849. {
  850. char pname[32];
  851. const struct smu_sdbp_header *part;
  852. if (!smu)
  853. return NULL;
  854. sprintf(pname, "sdb-partition-%02x", id);
  855. DPRINTK("smu_get_sdb_partition(%02x)\n", id);
  856. if (interruptible) {
  857. int rc;
  858. rc = mutex_lock_interruptible(&smu_part_access);
  859. if (rc)
  860. return ERR_PTR(rc);
  861. } else
  862. mutex_lock(&smu_part_access);
  863. part = of_get_property(smu->of_node, pname, size);
  864. if (part == NULL) {
  865. DPRINTK("trying to extract from SMU ...\n");
  866. part = smu_create_sdb_partition(id);
  867. if (part != NULL && size)
  868. *size = part->len << 2;
  869. }
  870. mutex_unlock(&smu_part_access);
  871. return part;
  872. }
  873. const struct smu_sdbp_header *smu_get_sdb_partition(int id, unsigned int *size)
  874. {
  875. return __smu_get_sdb_partition(id, size, 0);
  876. }
  877. EXPORT_SYMBOL(smu_get_sdb_partition);
  878. /*
  879. * Userland driver interface
  880. */
  881. static LIST_HEAD(smu_clist);
  882. static DEFINE_SPINLOCK(smu_clist_lock);
  883. enum smu_file_mode {
  884. smu_file_commands,
  885. smu_file_events,
  886. smu_file_closing
  887. };
  888. struct smu_private
  889. {
  890. struct list_head list;
  891. enum smu_file_mode mode;
  892. int busy;
  893. struct smu_cmd cmd;
  894. spinlock_t lock;
  895. wait_queue_head_t wait;
  896. u8 buffer[SMU_MAX_DATA];
  897. };
  898. static int smu_open(struct inode *inode, struct file *file)
  899. {
  900. struct smu_private *pp;
  901. unsigned long flags;
  902. pp = kzalloc(sizeof(struct smu_private), GFP_KERNEL);
  903. if (pp == 0)
  904. return -ENOMEM;
  905. spin_lock_init(&pp->lock);
  906. pp->mode = smu_file_commands;
  907. init_waitqueue_head(&pp->wait);
  908. lock_kernel();
  909. spin_lock_irqsave(&smu_clist_lock, flags);
  910. list_add(&pp->list, &smu_clist);
  911. spin_unlock_irqrestore(&smu_clist_lock, flags);
  912. file->private_data = pp;
  913. unlock_kernel();
  914. return 0;
  915. }
  916. static void smu_user_cmd_done(struct smu_cmd *cmd, void *misc)
  917. {
  918. struct smu_private *pp = misc;
  919. wake_up_all(&pp->wait);
  920. }
  921. static ssize_t smu_write(struct file *file, const char __user *buf,
  922. size_t count, loff_t *ppos)
  923. {
  924. struct smu_private *pp = file->private_data;
  925. unsigned long flags;
  926. struct smu_user_cmd_hdr hdr;
  927. int rc = 0;
  928. if (pp->busy)
  929. return -EBUSY;
  930. else if (copy_from_user(&hdr, buf, sizeof(hdr)))
  931. return -EFAULT;
  932. else if (hdr.cmdtype == SMU_CMDTYPE_WANTS_EVENTS) {
  933. pp->mode = smu_file_events;
  934. return 0;
  935. } else if (hdr.cmdtype == SMU_CMDTYPE_GET_PARTITION) {
  936. const struct smu_sdbp_header *part;
  937. part = __smu_get_sdb_partition(hdr.cmd, NULL, 1);
  938. if (part == NULL)
  939. return -EINVAL;
  940. else if (IS_ERR(part))
  941. return PTR_ERR(part);
  942. return 0;
  943. } else if (hdr.cmdtype != SMU_CMDTYPE_SMU)
  944. return -EINVAL;
  945. else if (pp->mode != smu_file_commands)
  946. return -EBADFD;
  947. else if (hdr.data_len > SMU_MAX_DATA)
  948. return -EINVAL;
  949. spin_lock_irqsave(&pp->lock, flags);
  950. if (pp->busy) {
  951. spin_unlock_irqrestore(&pp->lock, flags);
  952. return -EBUSY;
  953. }
  954. pp->busy = 1;
  955. pp->cmd.status = 1;
  956. spin_unlock_irqrestore(&pp->lock, flags);
  957. if (copy_from_user(pp->buffer, buf + sizeof(hdr), hdr.data_len)) {
  958. pp->busy = 0;
  959. return -EFAULT;
  960. }
  961. pp->cmd.cmd = hdr.cmd;
  962. pp->cmd.data_len = hdr.data_len;
  963. pp->cmd.reply_len = SMU_MAX_DATA;
  964. pp->cmd.data_buf = pp->buffer;
  965. pp->cmd.reply_buf = pp->buffer;
  966. pp->cmd.done = smu_user_cmd_done;
  967. pp->cmd.misc = pp;
  968. rc = smu_queue_cmd(&pp->cmd);
  969. if (rc < 0)
  970. return rc;
  971. return count;
  972. }
  973. static ssize_t smu_read_command(struct file *file, struct smu_private *pp,
  974. char __user *buf, size_t count)
  975. {
  976. DECLARE_WAITQUEUE(wait, current);
  977. struct smu_user_reply_hdr hdr;
  978. unsigned long flags;
  979. int size, rc = 0;
  980. if (!pp->busy)
  981. return 0;
  982. if (count < sizeof(struct smu_user_reply_hdr))
  983. return -EOVERFLOW;
  984. spin_lock_irqsave(&pp->lock, flags);
  985. if (pp->cmd.status == 1) {
  986. if (file->f_flags & O_NONBLOCK)
  987. return -EAGAIN;
  988. add_wait_queue(&pp->wait, &wait);
  989. for (;;) {
  990. set_current_state(TASK_INTERRUPTIBLE);
  991. rc = 0;
  992. if (pp->cmd.status != 1)
  993. break;
  994. rc = -ERESTARTSYS;
  995. if (signal_pending(current))
  996. break;
  997. spin_unlock_irqrestore(&pp->lock, flags);
  998. schedule();
  999. spin_lock_irqsave(&pp->lock, flags);
  1000. }
  1001. set_current_state(TASK_RUNNING);
  1002. remove_wait_queue(&pp->wait, &wait);
  1003. }
  1004. spin_unlock_irqrestore(&pp->lock, flags);
  1005. if (rc)
  1006. return rc;
  1007. if (pp->cmd.status != 0)
  1008. pp->cmd.reply_len = 0;
  1009. size = sizeof(hdr) + pp->cmd.reply_len;
  1010. if (count < size)
  1011. size = count;
  1012. rc = size;
  1013. hdr.status = pp->cmd.status;
  1014. hdr.reply_len = pp->cmd.reply_len;
  1015. if (copy_to_user(buf, &hdr, sizeof(hdr)))
  1016. return -EFAULT;
  1017. size -= sizeof(hdr);
  1018. if (size && copy_to_user(buf + sizeof(hdr), pp->buffer, size))
  1019. return -EFAULT;
  1020. pp->busy = 0;
  1021. return rc;
  1022. }
  1023. static ssize_t smu_read_events(struct file *file, struct smu_private *pp,
  1024. char __user *buf, size_t count)
  1025. {
  1026. /* Not implemented */
  1027. msleep_interruptible(1000);
  1028. return 0;
  1029. }
  1030. static ssize_t smu_read(struct file *file, char __user *buf,
  1031. size_t count, loff_t *ppos)
  1032. {
  1033. struct smu_private *pp = file->private_data;
  1034. if (pp->mode == smu_file_commands)
  1035. return smu_read_command(file, pp, buf, count);
  1036. if (pp->mode == smu_file_events)
  1037. return smu_read_events(file, pp, buf, count);
  1038. return -EBADFD;
  1039. }
  1040. static unsigned int smu_fpoll(struct file *file, poll_table *wait)
  1041. {
  1042. struct smu_private *pp = file->private_data;
  1043. unsigned int mask = 0;
  1044. unsigned long flags;
  1045. if (pp == 0)
  1046. return 0;
  1047. if (pp->mode == smu_file_commands) {
  1048. poll_wait(file, &pp->wait, wait);
  1049. spin_lock_irqsave(&pp->lock, flags);
  1050. if (pp->busy && pp->cmd.status != 1)
  1051. mask |= POLLIN;
  1052. spin_unlock_irqrestore(&pp->lock, flags);
  1053. } if (pp->mode == smu_file_events) {
  1054. /* Not yet implemented */
  1055. }
  1056. return mask;
  1057. }
  1058. static int smu_release(struct inode *inode, struct file *file)
  1059. {
  1060. struct smu_private *pp = file->private_data;
  1061. unsigned long flags;
  1062. unsigned int busy;
  1063. if (pp == 0)
  1064. return 0;
  1065. file->private_data = NULL;
  1066. /* Mark file as closing to avoid races with new request */
  1067. spin_lock_irqsave(&pp->lock, flags);
  1068. pp->mode = smu_file_closing;
  1069. busy = pp->busy;
  1070. /* Wait for any pending request to complete */
  1071. if (busy && pp->cmd.status == 1) {
  1072. DECLARE_WAITQUEUE(wait, current);
  1073. add_wait_queue(&pp->wait, &wait);
  1074. for (;;) {
  1075. set_current_state(TASK_UNINTERRUPTIBLE);
  1076. if (pp->cmd.status != 1)
  1077. break;
  1078. spin_unlock_irqrestore(&pp->lock, flags);
  1079. schedule();
  1080. spin_lock_irqsave(&pp->lock, flags);
  1081. }
  1082. set_current_state(TASK_RUNNING);
  1083. remove_wait_queue(&pp->wait, &wait);
  1084. }
  1085. spin_unlock_irqrestore(&pp->lock, flags);
  1086. spin_lock_irqsave(&smu_clist_lock, flags);
  1087. list_del(&pp->list);
  1088. spin_unlock_irqrestore(&smu_clist_lock, flags);
  1089. kfree(pp);
  1090. return 0;
  1091. }
  1092. static const struct file_operations smu_device_fops = {
  1093. .llseek = no_llseek,
  1094. .read = smu_read,
  1095. .write = smu_write,
  1096. .poll = smu_fpoll,
  1097. .open = smu_open,
  1098. .release = smu_release,
  1099. };
  1100. static struct miscdevice pmu_device = {
  1101. MISC_DYNAMIC_MINOR, "smu", &smu_device_fops
  1102. };
  1103. static int smu_device_init(void)
  1104. {
  1105. if (!smu)
  1106. return -ENODEV;
  1107. if (misc_register(&pmu_device) < 0)
  1108. printk(KERN_ERR "via-pmu: cannot register misc device.\n");
  1109. return 0;
  1110. }
  1111. device_initcall(smu_device_init);