sc1200.c 9.2 KB

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  1. /*
  2. * Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
  3. * Copyright (C) 2007 Bartlomiej Zolnierkiewicz
  4. *
  5. * May be copied or modified under the terms of the GNU General Public License
  6. *
  7. * Development of this chipset driver was funded
  8. * by the nice folks at National Semiconductor.
  9. *
  10. * Documentation:
  11. * Available from National Semiconductor
  12. */
  13. #include <linux/module.h>
  14. #include <linux/types.h>
  15. #include <linux/kernel.h>
  16. #include <linux/pci.h>
  17. #include <linux/init.h>
  18. #include <linux/ide.h>
  19. #include <linux/pm.h>
  20. #include <asm/io.h>
  21. #define DRV_NAME "sc1200"
  22. #define SC1200_REV_A 0x00
  23. #define SC1200_REV_B1 0x01
  24. #define SC1200_REV_B3 0x02
  25. #define SC1200_REV_C1 0x03
  26. #define SC1200_REV_D1 0x04
  27. #define PCI_CLK_33 0x00
  28. #define PCI_CLK_48 0x01
  29. #define PCI_CLK_66 0x02
  30. #define PCI_CLK_33A 0x03
  31. static unsigned short sc1200_get_pci_clock (void)
  32. {
  33. unsigned char chip_id, silicon_revision;
  34. unsigned int pci_clock;
  35. /*
  36. * Check the silicon revision, as not all versions of the chip
  37. * have the register with the fast PCI bus timings.
  38. */
  39. chip_id = inb (0x903c);
  40. silicon_revision = inb (0x903d);
  41. // Read the fast pci clock frequency
  42. if (chip_id == 0x04 && silicon_revision < SC1200_REV_B1) {
  43. pci_clock = PCI_CLK_33;
  44. } else {
  45. // check clock generator configuration (cfcc)
  46. // the clock is in bits 8 and 9 of this word
  47. pci_clock = inw (0x901e);
  48. pci_clock >>= 8;
  49. pci_clock &= 0x03;
  50. if (pci_clock == PCI_CLK_33A)
  51. pci_clock = PCI_CLK_33;
  52. }
  53. return pci_clock;
  54. }
  55. /*
  56. * Here are the standard PIO mode 0-4 timings for each "format".
  57. * Format-0 uses fast data reg timings, with slower command reg timings.
  58. * Format-1 uses fast timings for all registers, but won't work with all drives.
  59. */
  60. static const unsigned int sc1200_pio_timings[4][5] =
  61. {{0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010}, // format0 33Mhz
  62. {0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010}, // format1, 33Mhz
  63. {0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021}, // format1, 48Mhz
  64. {0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131}}; // format1, 66Mhz
  65. /*
  66. * After chip reset, the PIO timings are set to 0x00009172, which is not valid.
  67. */
  68. //#define SC1200_BAD_PIO(timings) (((timings)&~0x80000000)==0x00009172)
  69. static void sc1200_tunepio(ide_drive_t *drive, u8 pio)
  70. {
  71. ide_hwif_t *hwif = drive->hwif;
  72. struct pci_dev *pdev = to_pci_dev(hwif->dev);
  73. unsigned int basereg = hwif->channel ? 0x50 : 0x40, format = 0;
  74. pci_read_config_dword(pdev, basereg + 4, &format);
  75. format = (format >> 31) & 1;
  76. if (format)
  77. format += sc1200_get_pci_clock();
  78. pci_write_config_dword(pdev, basereg + ((drive->dn & 1) << 3),
  79. sc1200_pio_timings[format][pio]);
  80. }
  81. /*
  82. * The SC1200 specifies that two drives sharing a cable cannot mix
  83. * UDMA/MDMA. It has to be one or the other, for the pair, though
  84. * different timings can still be chosen for each drive. We could
  85. * set the appropriate timing bits on the fly, but that might be
  86. * a bit confusing. So, for now we statically handle this requirement
  87. * by looking at our mate drive to see what it is capable of, before
  88. * choosing a mode for our own drive.
  89. */
  90. static u8 sc1200_udma_filter(ide_drive_t *drive)
  91. {
  92. ide_hwif_t *hwif = drive->hwif;
  93. ide_drive_t *mate = ide_get_pair_dev(drive);
  94. u16 *mateid;
  95. u8 mask = hwif->ultra_mask;
  96. if (mate == NULL)
  97. goto out;
  98. mateid = mate->id;
  99. if (ata_id_has_dma(mateid) && __ide_dma_bad_drive(mate) == 0) {
  100. if ((mateid[ATA_ID_FIELD_VALID] & 4) &&
  101. (mateid[ATA_ID_UDMA_MODES] & 7))
  102. goto out;
  103. if (mateid[ATA_ID_MWDMA_MODES] & 7)
  104. mask = 0;
  105. }
  106. out:
  107. return mask;
  108. }
  109. static void sc1200_set_dma_mode(ide_drive_t *drive, const u8 mode)
  110. {
  111. ide_hwif_t *hwif = drive->hwif;
  112. struct pci_dev *dev = to_pci_dev(hwif->dev);
  113. unsigned int reg, timings;
  114. unsigned short pci_clock;
  115. unsigned int basereg = hwif->channel ? 0x50 : 0x40;
  116. static const u32 udma_timing[3][3] = {
  117. { 0x00921250, 0x00911140, 0x00911030 },
  118. { 0x00932470, 0x00922260, 0x00922140 },
  119. { 0x009436a1, 0x00933481, 0x00923261 },
  120. };
  121. static const u32 mwdma_timing[3][3] = {
  122. { 0x00077771, 0x00012121, 0x00002020 },
  123. { 0x000bbbb2, 0x00024241, 0x00013131 },
  124. { 0x000ffff3, 0x00035352, 0x00015151 },
  125. };
  126. pci_clock = sc1200_get_pci_clock();
  127. /*
  128. * Note that each DMA mode has several timings associated with it.
  129. * The correct timing depends on the fast PCI clock freq.
  130. */
  131. if (mode >= XFER_UDMA_0)
  132. timings = udma_timing[pci_clock][mode - XFER_UDMA_0];
  133. else
  134. timings = mwdma_timing[pci_clock][mode - XFER_MW_DMA_0];
  135. if ((drive->dn & 1) == 0) {
  136. pci_read_config_dword(dev, basereg + 4, &reg);
  137. timings |= reg & 0x80000000; /* preserve PIO format bit */
  138. pci_write_config_dword(dev, basereg + 4, timings);
  139. } else
  140. pci_write_config_dword(dev, basereg + 12, timings);
  141. }
  142. /* Replacement for the standard ide_dma_end action in
  143. * dma_proc.
  144. *
  145. * returns 1 on error, 0 otherwise
  146. */
  147. static int sc1200_dma_end(ide_drive_t *drive)
  148. {
  149. ide_hwif_t *hwif = drive->hwif;
  150. unsigned long dma_base = hwif->dma_base;
  151. u8 dma_stat;
  152. dma_stat = inb(dma_base+2); /* get DMA status */
  153. if (!(dma_stat & 4))
  154. printk(" ide_dma_end dma_stat=%0x err=%x newerr=%x\n",
  155. dma_stat, ((dma_stat&7)!=4), ((dma_stat&2)==2));
  156. outb(dma_stat|0x1b, dma_base+2); /* clear the INTR & ERROR bits */
  157. outb(inb(dma_base)&~1, dma_base); /* !! DO THIS HERE !! stop DMA */
  158. return (dma_stat & 7) != 4; /* verify good DMA status */
  159. }
  160. /*
  161. * sc1200_set_pio_mode() handles setting of PIO modes
  162. * for both the chipset and drive.
  163. *
  164. * All existing BIOSs for this chipset guarantee that all drives
  165. * will have valid default PIO timings set up before we get here.
  166. */
  167. static void sc1200_set_pio_mode(ide_drive_t *drive, const u8 pio)
  168. {
  169. ide_hwif_t *hwif = drive->hwif;
  170. int mode = -1;
  171. /*
  172. * bad abuse of ->set_pio_mode interface
  173. */
  174. switch (pio) {
  175. case 200: mode = XFER_UDMA_0; break;
  176. case 201: mode = XFER_UDMA_1; break;
  177. case 202: mode = XFER_UDMA_2; break;
  178. case 100: mode = XFER_MW_DMA_0; break;
  179. case 101: mode = XFER_MW_DMA_1; break;
  180. case 102: mode = XFER_MW_DMA_2; break;
  181. }
  182. if (mode != -1) {
  183. printk("SC1200: %s: changing (U)DMA mode\n", drive->name);
  184. ide_dma_off_quietly(drive);
  185. if (ide_set_dma_mode(drive, mode) == 0 &&
  186. (drive->dev_flags & IDE_DFLAG_USING_DMA))
  187. hwif->dma_ops->dma_host_set(drive, 1);
  188. return;
  189. }
  190. sc1200_tunepio(drive, pio);
  191. }
  192. #ifdef CONFIG_PM
  193. struct sc1200_saved_state {
  194. u32 regs[8];
  195. };
  196. static int sc1200_suspend (struct pci_dev *dev, pm_message_t state)
  197. {
  198. printk("SC1200: suspend(%u)\n", state.event);
  199. /*
  200. * we only save state when going from full power to less
  201. */
  202. if (state.event == PM_EVENT_ON) {
  203. struct ide_host *host = pci_get_drvdata(dev);
  204. struct sc1200_saved_state *ss = host->host_priv;
  205. unsigned int r;
  206. /*
  207. * save timing registers
  208. * (this may be unnecessary if BIOS also does it)
  209. */
  210. for (r = 0; r < 8; r++)
  211. pci_read_config_dword(dev, 0x40 + r * 4, &ss->regs[r]);
  212. }
  213. pci_disable_device(dev);
  214. pci_set_power_state(dev, pci_choose_state(dev, state));
  215. return 0;
  216. }
  217. static int sc1200_resume (struct pci_dev *dev)
  218. {
  219. struct ide_host *host = pci_get_drvdata(dev);
  220. struct sc1200_saved_state *ss = host->host_priv;
  221. unsigned int r;
  222. int i;
  223. i = pci_enable_device(dev);
  224. if (i)
  225. return i;
  226. /*
  227. * restore timing registers
  228. * (this may be unnecessary if BIOS also does it)
  229. */
  230. for (r = 0; r < 8; r++)
  231. pci_write_config_dword(dev, 0x40 + r * 4, ss->regs[r]);
  232. return 0;
  233. }
  234. #endif
  235. static const struct ide_port_ops sc1200_port_ops = {
  236. .set_pio_mode = sc1200_set_pio_mode,
  237. .set_dma_mode = sc1200_set_dma_mode,
  238. .udma_filter = sc1200_udma_filter,
  239. };
  240. static const struct ide_dma_ops sc1200_dma_ops = {
  241. .dma_host_set = ide_dma_host_set,
  242. .dma_setup = ide_dma_setup,
  243. .dma_start = ide_dma_start,
  244. .dma_end = sc1200_dma_end,
  245. .dma_test_irq = ide_dma_test_irq,
  246. .dma_lost_irq = ide_dma_lost_irq,
  247. .dma_timer_expiry = ide_dma_sff_timer_expiry,
  248. .dma_sff_read_status = ide_dma_sff_read_status,
  249. };
  250. static const struct ide_port_info sc1200_chipset __devinitdata = {
  251. .name = DRV_NAME,
  252. .port_ops = &sc1200_port_ops,
  253. .dma_ops = &sc1200_dma_ops,
  254. .host_flags = IDE_HFLAG_SERIALIZE |
  255. IDE_HFLAG_POST_SET_MODE |
  256. IDE_HFLAG_ABUSE_DMA_MODES,
  257. .pio_mask = ATA_PIO4,
  258. .mwdma_mask = ATA_MWDMA2,
  259. .udma_mask = ATA_UDMA2,
  260. };
  261. static int __devinit sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
  262. {
  263. struct sc1200_saved_state *ss = NULL;
  264. int rc;
  265. #ifdef CONFIG_PM
  266. ss = kmalloc(sizeof(*ss), GFP_KERNEL);
  267. if (ss == NULL)
  268. return -ENOMEM;
  269. #endif
  270. rc = ide_pci_init_one(dev, &sc1200_chipset, ss);
  271. if (rc)
  272. kfree(ss);
  273. return rc;
  274. }
  275. static const struct pci_device_id sc1200_pci_tbl[] = {
  276. { PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), 0},
  277. { 0, },
  278. };
  279. MODULE_DEVICE_TABLE(pci, sc1200_pci_tbl);
  280. static struct pci_driver sc1200_pci_driver = {
  281. .name = "SC1200_IDE",
  282. .id_table = sc1200_pci_tbl,
  283. .probe = sc1200_init_one,
  284. .remove = ide_pci_remove,
  285. #ifdef CONFIG_PM
  286. .suspend = sc1200_suspend,
  287. .resume = sc1200_resume,
  288. #endif
  289. };
  290. static int __init sc1200_ide_init(void)
  291. {
  292. return ide_pci_register_driver(&sc1200_pci_driver);
  293. }
  294. static void __exit sc1200_ide_exit(void)
  295. {
  296. pci_unregister_driver(&sc1200_pci_driver);
  297. }
  298. module_init(sc1200_ide_init);
  299. module_exit(sc1200_ide_exit);
  300. MODULE_AUTHOR("Mark Lord");
  301. MODULE_DESCRIPTION("PCI driver module for NS SC1200 IDE");
  302. MODULE_LICENSE("GPL");