lis3lv02d.h 5.1 KB

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  1. /*
  2. * lis3lv02d.h - ST LIS3LV02DL accelerometer driver
  3. *
  4. * Copyright (C) 2007-2008 Yan Burman
  5. * Copyright (C) 2008 Eric Piel
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/platform_device.h>
  22. #include <linux/input-polldev.h>
  23. /*
  24. * The actual chip is STMicroelectronics LIS3LV02DL or LIS3LV02DQ that seems to
  25. * be connected via SPI. There exists also several similar chips (such as LIS302DL or
  26. * LIS3L02DQ) and they have slightly different registers, but we can provide a
  27. * common interface for all of them.
  28. * They can also be connected via I²C.
  29. */
  30. #include <linux/lis3lv02d.h>
  31. /* 2-byte registers */
  32. #define LIS_DOUBLE_ID 0x3A /* LIS3LV02D[LQ] */
  33. /* 1-byte registers */
  34. #define LIS_SINGLE_ID 0x3B /* LIS[32]02DL and others */
  35. enum lis3_reg {
  36. WHO_AM_I = 0x0F,
  37. OFFSET_X = 0x16,
  38. OFFSET_Y = 0x17,
  39. OFFSET_Z = 0x18,
  40. GAIN_X = 0x19,
  41. GAIN_Y = 0x1A,
  42. GAIN_Z = 0x1B,
  43. CTRL_REG1 = 0x20,
  44. CTRL_REG2 = 0x21,
  45. CTRL_REG3 = 0x22,
  46. HP_FILTER_RESET = 0x23,
  47. STATUS_REG = 0x27,
  48. OUTX_L = 0x28,
  49. OUTX_H = 0x29,
  50. OUTX = 0x29,
  51. OUTY_L = 0x2A,
  52. OUTY_H = 0x2B,
  53. OUTY = 0x2B,
  54. OUTZ_L = 0x2C,
  55. OUTZ_H = 0x2D,
  56. OUTZ = 0x2D,
  57. FF_WU_CFG = 0x30,
  58. FF_WU_SRC = 0x31,
  59. FF_WU_ACK = 0x32,
  60. FF_WU_THS_L = 0x34,
  61. FF_WU_THS_H = 0x35,
  62. FF_WU_DURATION = 0x36,
  63. };
  64. enum lis302d_reg {
  65. CLICK_CFG = 0x38,
  66. CLICK_SRC = 0x39,
  67. CLICK_THSY_X = 0x3B,
  68. CLICK_THSZ = 0x3C,
  69. CLICK_TIMELIMIT = 0x3D,
  70. CLICK_LATENCY = 0x3E,
  71. CLICK_WINDOW = 0x3F,
  72. };
  73. enum lis3lv02d_reg {
  74. DD_CFG = 0x38,
  75. DD_SRC = 0x39,
  76. DD_ACK = 0x3A,
  77. DD_THSI_L = 0x3C,
  78. DD_THSI_H = 0x3D,
  79. DD_THSE_L = 0x3E,
  80. DD_THSE_H = 0x3F,
  81. };
  82. enum lis3lv02d_ctrl1 {
  83. CTRL1_Xen = 0x01,
  84. CTRL1_Yen = 0x02,
  85. CTRL1_Zen = 0x04,
  86. CTRL1_ST = 0x08,
  87. CTRL1_DF0 = 0x10,
  88. CTRL1_DF1 = 0x20,
  89. CTRL1_PD0 = 0x40,
  90. CTRL1_PD1 = 0x80,
  91. };
  92. enum lis3lv02d_ctrl2 {
  93. CTRL2_DAS = 0x01,
  94. CTRL2_SIM = 0x02,
  95. CTRL2_DRDY = 0x04,
  96. CTRL2_IEN = 0x08,
  97. CTRL2_BOOT = 0x10,
  98. CTRL2_BLE = 0x20,
  99. CTRL2_BDU = 0x40, /* Block Data Update */
  100. CTRL2_FS = 0x80, /* Full Scale selection */
  101. };
  102. enum lis3lv02d_ctrl3 {
  103. CTRL3_CFS0 = 0x01,
  104. CTRL3_CFS1 = 0x02,
  105. CTRL3_FDS = 0x10,
  106. CTRL3_HPFF = 0x20,
  107. CTRL3_HPDD = 0x40,
  108. CTRL3_ECK = 0x80,
  109. };
  110. enum lis3lv02d_status_reg {
  111. STATUS_XDA = 0x01,
  112. STATUS_YDA = 0x02,
  113. STATUS_ZDA = 0x04,
  114. STATUS_XYZDA = 0x08,
  115. STATUS_XOR = 0x10,
  116. STATUS_YOR = 0x20,
  117. STATUS_ZOR = 0x40,
  118. STATUS_XYZOR = 0x80,
  119. };
  120. enum lis3lv02d_ff_wu_cfg {
  121. FF_WU_CFG_XLIE = 0x01,
  122. FF_WU_CFG_XHIE = 0x02,
  123. FF_WU_CFG_YLIE = 0x04,
  124. FF_WU_CFG_YHIE = 0x08,
  125. FF_WU_CFG_ZLIE = 0x10,
  126. FF_WU_CFG_ZHIE = 0x20,
  127. FF_WU_CFG_LIR = 0x40,
  128. FF_WU_CFG_AOI = 0x80,
  129. };
  130. enum lis3lv02d_ff_wu_src {
  131. FF_WU_SRC_XL = 0x01,
  132. FF_WU_SRC_XH = 0x02,
  133. FF_WU_SRC_YL = 0x04,
  134. FF_WU_SRC_YH = 0x08,
  135. FF_WU_SRC_ZL = 0x10,
  136. FF_WU_SRC_ZH = 0x20,
  137. FF_WU_SRC_IA = 0x40,
  138. };
  139. enum lis3lv02d_dd_cfg {
  140. DD_CFG_XLIE = 0x01,
  141. DD_CFG_XHIE = 0x02,
  142. DD_CFG_YLIE = 0x04,
  143. DD_CFG_YHIE = 0x08,
  144. DD_CFG_ZLIE = 0x10,
  145. DD_CFG_ZHIE = 0x20,
  146. DD_CFG_LIR = 0x40,
  147. DD_CFG_IEND = 0x80,
  148. };
  149. enum lis3lv02d_dd_src {
  150. DD_SRC_XL = 0x01,
  151. DD_SRC_XH = 0x02,
  152. DD_SRC_YL = 0x04,
  153. DD_SRC_YH = 0x08,
  154. DD_SRC_ZL = 0x10,
  155. DD_SRC_ZH = 0x20,
  156. DD_SRC_IA = 0x40,
  157. };
  158. struct axis_conversion {
  159. s8 x;
  160. s8 y;
  161. s8 z;
  162. };
  163. struct lis3lv02d {
  164. void *bus_priv; /* used by the bus layer only */
  165. int (*init) (struct lis3lv02d *lis3);
  166. int (*write) (struct lis3lv02d *lis3, int reg, u8 val);
  167. int (*read) (struct lis3lv02d *lis3, int reg, u8 *ret);
  168. u8 whoami; /* 3Ah: 2-byte registries, 3Bh: 1-byte registries */
  169. s16 (*read_data) (struct lis3lv02d *lis3, int reg);
  170. int mdps_max_val;
  171. struct input_polled_dev *idev; /* input device */
  172. struct platform_device *pdev; /* platform device */
  173. atomic_t count; /* interrupt count after last read */
  174. int xcalib; /* calibrated null value for x */
  175. int ycalib; /* calibrated null value for y */
  176. int zcalib; /* calibrated null value for z */
  177. struct axis_conversion ac; /* hw -> logical axis */
  178. u32 irq; /* IRQ number */
  179. struct fasync_struct *async_queue; /* queue for the misc device */
  180. wait_queue_head_t misc_wait; /* Wait queue for the misc device */
  181. unsigned long misc_opened; /* bit0: whether the device is open */
  182. struct lis3lv02d_platform_data *pdata; /* for passing board config */
  183. };
  184. int lis3lv02d_init_device(struct lis3lv02d *lis3);
  185. int lis3lv02d_joystick_enable(void);
  186. void lis3lv02d_joystick_disable(void);
  187. void lis3lv02d_poweroff(struct lis3lv02d *lis3);
  188. void lis3lv02d_poweron(struct lis3lv02d *lis3);
  189. int lis3lv02d_remove_fs(struct lis3lv02d *lis3);
  190. extern struct lis3lv02d lis3_dev;