radeon_mode.h 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398
  1. /*
  2. * Copyright 2000 ATI Technologies Inc., Markham, Ontario, and
  3. * VA Linux Systems Inc., Fremont, California.
  4. * Copyright 2008 Red Hat Inc.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice shall be included in
  14. * all copies or substantial portions of the Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. *
  24. * Original Authors:
  25. * Kevin E. Martin, Rickard E. Faith, Alan Hourihane
  26. *
  27. * Kernel port Author: Dave Airlie
  28. */
  29. #ifndef RADEON_MODE_H
  30. #define RADEON_MODE_H
  31. #include <drm_crtc.h>
  32. #include <drm_mode.h>
  33. #include <drm_edid.h>
  34. #include <linux/i2c.h>
  35. #include <linux/i2c-id.h>
  36. #include <linux/i2c-algo-bit.h>
  37. #define to_radeon_crtc(x) container_of(x, struct radeon_crtc, base)
  38. #define to_radeon_connector(x) container_of(x, struct radeon_connector, base)
  39. #define to_radeon_encoder(x) container_of(x, struct radeon_encoder, base)
  40. #define to_radeon_framebuffer(x) container_of(x, struct radeon_framebuffer, base)
  41. enum radeon_connector_type {
  42. CONNECTOR_NONE,
  43. CONNECTOR_VGA,
  44. CONNECTOR_DVI_I,
  45. CONNECTOR_DVI_D,
  46. CONNECTOR_DVI_A,
  47. CONNECTOR_STV,
  48. CONNECTOR_CTV,
  49. CONNECTOR_LVDS,
  50. CONNECTOR_DIGITAL,
  51. CONNECTOR_SCART,
  52. CONNECTOR_HDMI_TYPE_A,
  53. CONNECTOR_HDMI_TYPE_B,
  54. CONNECTOR_0XC,
  55. CONNECTOR_0XD,
  56. CONNECTOR_DIN,
  57. CONNECTOR_DISPLAY_PORT,
  58. CONNECTOR_UNSUPPORTED
  59. };
  60. enum radeon_dvi_type {
  61. DVI_AUTO,
  62. DVI_DIGITAL,
  63. DVI_ANALOG
  64. };
  65. enum radeon_rmx_type {
  66. RMX_OFF,
  67. RMX_FULL,
  68. RMX_CENTER,
  69. RMX_ASPECT
  70. };
  71. enum radeon_tv_std {
  72. TV_STD_NTSC,
  73. TV_STD_PAL,
  74. TV_STD_PAL_M,
  75. TV_STD_PAL_60,
  76. TV_STD_NTSC_J,
  77. TV_STD_SCART_PAL,
  78. TV_STD_SECAM,
  79. TV_STD_PAL_CN,
  80. };
  81. struct radeon_i2c_bus_rec {
  82. bool valid;
  83. uint32_t mask_clk_reg;
  84. uint32_t mask_data_reg;
  85. uint32_t a_clk_reg;
  86. uint32_t a_data_reg;
  87. uint32_t put_clk_reg;
  88. uint32_t put_data_reg;
  89. uint32_t get_clk_reg;
  90. uint32_t get_data_reg;
  91. uint32_t mask_clk_mask;
  92. uint32_t mask_data_mask;
  93. uint32_t put_clk_mask;
  94. uint32_t put_data_mask;
  95. uint32_t get_clk_mask;
  96. uint32_t get_data_mask;
  97. uint32_t a_clk_mask;
  98. uint32_t a_data_mask;
  99. };
  100. struct radeon_tmds_pll {
  101. uint32_t freq;
  102. uint32_t value;
  103. };
  104. #define RADEON_MAX_BIOS_CONNECTOR 16
  105. #define RADEON_PLL_USE_BIOS_DIVS (1 << 0)
  106. #define RADEON_PLL_NO_ODD_POST_DIV (1 << 1)
  107. #define RADEON_PLL_USE_REF_DIV (1 << 2)
  108. #define RADEON_PLL_LEGACY (1 << 3)
  109. #define RADEON_PLL_PREFER_LOW_REF_DIV (1 << 4)
  110. #define RADEON_PLL_PREFER_HIGH_REF_DIV (1 << 5)
  111. #define RADEON_PLL_PREFER_LOW_FB_DIV (1 << 6)
  112. #define RADEON_PLL_PREFER_HIGH_FB_DIV (1 << 7)
  113. #define RADEON_PLL_PREFER_LOW_POST_DIV (1 << 8)
  114. #define RADEON_PLL_PREFER_HIGH_POST_DIV (1 << 9)
  115. #define RADEON_PLL_USE_FRAC_FB_DIV (1 << 10)
  116. struct radeon_pll {
  117. uint16_t reference_freq;
  118. uint16_t reference_div;
  119. uint32_t pll_in_min;
  120. uint32_t pll_in_max;
  121. uint32_t pll_out_min;
  122. uint32_t pll_out_max;
  123. uint16_t xclk;
  124. uint32_t min_ref_div;
  125. uint32_t max_ref_div;
  126. uint32_t min_post_div;
  127. uint32_t max_post_div;
  128. uint32_t min_feedback_div;
  129. uint32_t max_feedback_div;
  130. uint32_t min_frac_feedback_div;
  131. uint32_t max_frac_feedback_div;
  132. uint32_t best_vco;
  133. };
  134. struct radeon_i2c_chan {
  135. struct drm_device *dev;
  136. struct i2c_adapter adapter;
  137. struct i2c_algo_bit_data algo;
  138. struct radeon_i2c_bus_rec rec;
  139. };
  140. /* mostly for macs, but really any system without connector tables */
  141. enum radeon_connector_table {
  142. CT_NONE,
  143. CT_GENERIC,
  144. CT_IBOOK,
  145. CT_POWERBOOK_EXTERNAL,
  146. CT_POWERBOOK_INTERNAL,
  147. CT_POWERBOOK_VGA,
  148. CT_MINI_EXTERNAL,
  149. CT_MINI_INTERNAL,
  150. CT_IMAC_G5_ISIGHT,
  151. CT_EMAC,
  152. };
  153. struct radeon_mode_info {
  154. struct atom_context *atom_context;
  155. enum radeon_connector_table connector_table;
  156. bool mode_config_initialized;
  157. };
  158. struct radeon_crtc {
  159. struct drm_crtc base;
  160. int crtc_id;
  161. u16 lut_r[256], lut_g[256], lut_b[256];
  162. bool enabled;
  163. bool can_tile;
  164. uint32_t crtc_offset;
  165. struct radeon_framebuffer *fbdev_fb;
  166. struct drm_mode_set mode_set;
  167. struct drm_gem_object *cursor_bo;
  168. uint64_t cursor_addr;
  169. int cursor_width;
  170. int cursor_height;
  171. };
  172. #define RADEON_USE_RMX 1
  173. struct radeon_native_mode {
  174. /* preferred mode */
  175. uint32_t panel_xres, panel_yres;
  176. uint32_t hoverplus, hsync_width;
  177. uint32_t hblank;
  178. uint32_t voverplus, vsync_width;
  179. uint32_t vblank;
  180. uint32_t dotclock;
  181. uint32_t flags;
  182. };
  183. struct radeon_encoder_primary_dac {
  184. /* legacy primary dac */
  185. uint32_t ps2_pdac_adj;
  186. };
  187. struct radeon_encoder_lvds {
  188. /* legacy lvds */
  189. uint16_t panel_vcc_delay;
  190. uint8_t panel_pwr_delay;
  191. uint8_t panel_digon_delay;
  192. uint8_t panel_blon_delay;
  193. uint16_t panel_ref_divider;
  194. uint8_t panel_post_divider;
  195. uint16_t panel_fb_divider;
  196. bool use_bios_dividers;
  197. uint32_t lvds_gen_cntl;
  198. /* panel mode */
  199. struct radeon_native_mode native_mode;
  200. };
  201. struct radeon_encoder_tv_dac {
  202. /* legacy tv dac */
  203. uint32_t ps2_tvdac_adj;
  204. uint32_t ntsc_tvdac_adj;
  205. uint32_t pal_tvdac_adj;
  206. enum radeon_tv_std tv_std;
  207. };
  208. struct radeon_encoder_int_tmds {
  209. /* legacy int tmds */
  210. struct radeon_tmds_pll tmds_pll[4];
  211. };
  212. struct radeon_encoder_atom_dig {
  213. /* atom dig */
  214. bool coherent_mode;
  215. int dig_block;
  216. /* atom lvds */
  217. uint32_t lvds_misc;
  218. uint16_t panel_pwr_delay;
  219. /* panel mode */
  220. struct radeon_native_mode native_mode;
  221. };
  222. struct radeon_encoder {
  223. struct drm_encoder base;
  224. uint32_t encoder_id;
  225. uint32_t devices;
  226. uint32_t flags;
  227. uint32_t pixel_clock;
  228. enum radeon_rmx_type rmx_type;
  229. struct radeon_native_mode native_mode;
  230. void *enc_priv;
  231. };
  232. struct radeon_connector_atom_dig {
  233. uint32_t igp_lane_info;
  234. bool linkb;
  235. };
  236. struct radeon_connector {
  237. struct drm_connector base;
  238. uint32_t connector_id;
  239. uint32_t devices;
  240. struct radeon_i2c_chan *ddc_bus;
  241. int use_digital;
  242. void *con_priv;
  243. };
  244. struct radeon_framebuffer {
  245. struct drm_framebuffer base;
  246. struct drm_gem_object *obj;
  247. };
  248. extern struct radeon_i2c_chan *radeon_i2c_create(struct drm_device *dev,
  249. struct radeon_i2c_bus_rec *rec,
  250. const char *name);
  251. extern void radeon_i2c_destroy(struct radeon_i2c_chan *i2c);
  252. extern bool radeon_ddc_probe(struct radeon_connector *radeon_connector);
  253. extern int radeon_ddc_get_modes(struct radeon_connector *radeon_connector);
  254. extern struct drm_encoder *radeon_best_encoder(struct drm_connector *connector);
  255. extern void radeon_compute_pll(struct radeon_pll *pll,
  256. uint64_t freq,
  257. uint32_t *dot_clock_p,
  258. uint32_t *fb_div_p,
  259. uint32_t *frac_fb_div_p,
  260. uint32_t *ref_div_p,
  261. uint32_t *post_div_p,
  262. int flags);
  263. struct drm_encoder *radeon_encoder_legacy_lvds_add(struct drm_device *dev, int bios_index);
  264. struct drm_encoder *radeon_encoder_legacy_primary_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  265. struct drm_encoder *radeon_encoder_legacy_tv_dac_add(struct drm_device *dev, int bios_index, int with_tv);
  266. struct drm_encoder *radeon_encoder_legacy_tmds_int_add(struct drm_device *dev, int bios_index);
  267. struct drm_encoder *radeon_encoder_legacy_tmds_ext_add(struct drm_device *dev, int bios_index);
  268. extern void atombios_external_tmds_setup(struct drm_encoder *encoder, int action);
  269. extern int atombios_get_encoder_mode(struct drm_encoder *encoder);
  270. extern void radeon_crtc_load_lut(struct drm_crtc *crtc);
  271. extern int atombios_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  272. struct drm_framebuffer *old_fb);
  273. extern int atombios_crtc_mode_set(struct drm_crtc *crtc,
  274. struct drm_display_mode *mode,
  275. struct drm_display_mode *adjusted_mode,
  276. int x, int y,
  277. struct drm_framebuffer *old_fb);
  278. extern void atombios_crtc_dpms(struct drm_crtc *crtc, int mode);
  279. extern int radeon_crtc_set_base(struct drm_crtc *crtc, int x, int y,
  280. struct drm_framebuffer *old_fb);
  281. extern void radeon_legacy_atom_set_surface(struct drm_crtc *crtc);
  282. extern int radeon_crtc_cursor_set(struct drm_crtc *crtc,
  283. struct drm_file *file_priv,
  284. uint32_t handle,
  285. uint32_t width,
  286. uint32_t height);
  287. extern int radeon_crtc_cursor_move(struct drm_crtc *crtc,
  288. int x, int y);
  289. extern bool radeon_atom_get_clock_info(struct drm_device *dev);
  290. extern bool radeon_combios_get_clock_info(struct drm_device *dev);
  291. extern struct radeon_encoder_atom_dig *
  292. radeon_atombios_get_lvds_info(struct radeon_encoder *encoder);
  293. extern struct radeon_encoder_int_tmds *
  294. radeon_atombios_get_tmds_info(struct radeon_encoder *encoder);
  295. extern struct radeon_encoder_primary_dac *
  296. radeon_atombios_get_primary_dac_info(struct radeon_encoder *encoder);
  297. extern struct radeon_encoder_tv_dac *
  298. radeon_atombios_get_tv_dac_info(struct radeon_encoder *encoder);
  299. extern struct radeon_encoder_lvds *
  300. radeon_combios_get_lvds_info(struct radeon_encoder *encoder);
  301. extern struct radeon_encoder_int_tmds *
  302. radeon_combios_get_tmds_info(struct radeon_encoder *encoder);
  303. extern void radeon_combios_get_ext_tmds_info(struct radeon_encoder *encoder);
  304. extern struct radeon_encoder_tv_dac *
  305. radeon_combios_get_tv_dac_info(struct radeon_encoder *encoder);
  306. extern struct radeon_encoder_primary_dac *
  307. radeon_combios_get_primary_dac_info(struct radeon_encoder *encoder);
  308. extern void radeon_combios_output_lock(struct drm_encoder *encoder, bool lock);
  309. extern void radeon_combios_initialize_bios_scratch_regs(struct drm_device *dev);
  310. extern void radeon_atom_output_lock(struct drm_encoder *encoder, bool lock);
  311. extern void radeon_atom_initialize_bios_scratch_regs(struct drm_device *dev);
  312. extern void
  313. radeon_atombios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  314. extern void
  315. radeon_atombios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  316. extern void
  317. radeon_combios_encoder_crtc_scratch_regs(struct drm_encoder *encoder, int crtc);
  318. extern void
  319. radeon_combios_encoder_dpms_scratch_regs(struct drm_encoder *encoder, bool on);
  320. extern void radeon_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green,
  321. u16 blue, int regno);
  322. struct drm_framebuffer *radeon_framebuffer_create(struct drm_device *dev,
  323. struct drm_mode_fb_cmd *mode_cmd,
  324. struct drm_gem_object *obj);
  325. int radeonfb_probe(struct drm_device *dev);
  326. int radeonfb_remove(struct drm_device *dev, struct drm_framebuffer *fb);
  327. bool radeon_get_legacy_connector_info_from_bios(struct drm_device *dev);
  328. bool radeon_get_legacy_connector_info_from_table(struct drm_device *dev);
  329. void radeon_atombios_init_crtc(struct drm_device *dev,
  330. struct radeon_crtc *radeon_crtc);
  331. void radeon_legacy_init_crtc(struct drm_device *dev,
  332. struct radeon_crtc *radeon_crtc);
  333. void radeon_i2c_do_lock(struct radeon_connector *radeon_connector, int lock_state);
  334. void radeon_get_clock_info(struct drm_device *dev);
  335. extern bool radeon_get_atom_connector_info_from_object_table(struct drm_device *dev);
  336. extern bool radeon_get_atom_connector_info_from_supported_devices_table(struct drm_device *dev);
  337. void radeon_rmx_mode_fixup(struct drm_encoder *encoder,
  338. struct drm_display_mode *mode,
  339. struct drm_display_mode *adjusted_mode);
  340. void radeon_enc_destroy(struct drm_encoder *encoder);
  341. void radeon_copy_fb(struct drm_device *dev, struct drm_gem_object *dst_obj);
  342. void radeon_combios_asic_init(struct drm_device *dev);
  343. extern int radeon_static_clocks_init(struct drm_device *dev);
  344. void radeon_init_disp_bw_legacy(struct drm_device *dev,
  345. struct drm_display_mode *mode1,
  346. uint32_t pixel_bytes1,
  347. struct drm_display_mode *mode2,
  348. uint32_t pixel_bytes2);
  349. void radeon_init_disp_bw_avivo(struct drm_device *dev,
  350. struct drm_display_mode *mode1,
  351. uint32_t pixel_bytes1,
  352. struct drm_display_mode *mode2,
  353. uint32_t pixel_bytes2);
  354. void radeon_init_disp_bandwidth(struct drm_device *dev);
  355. #endif