intel_crt.c 14 KB

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  1. /*
  2. * Copyright © 2006-2007 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21. * DEALINGS IN THE SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. */
  26. #include <linux/i2c.h>
  27. #include "drmP.h"
  28. #include "drm.h"
  29. #include "drm_crtc.h"
  30. #include "drm_crtc_helper.h"
  31. #include "intel_drv.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. static void intel_crt_dpms(struct drm_encoder *encoder, int mode)
  35. {
  36. struct drm_device *dev = encoder->dev;
  37. struct drm_i915_private *dev_priv = dev->dev_private;
  38. u32 temp, reg;
  39. if (IS_IGDNG(dev))
  40. reg = PCH_ADPA;
  41. else
  42. reg = ADPA;
  43. temp = I915_READ(reg);
  44. temp &= ~(ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE);
  45. temp &= ~ADPA_DAC_ENABLE;
  46. switch(mode) {
  47. case DRM_MODE_DPMS_ON:
  48. temp |= ADPA_DAC_ENABLE;
  49. break;
  50. case DRM_MODE_DPMS_STANDBY:
  51. temp |= ADPA_DAC_ENABLE | ADPA_HSYNC_CNTL_DISABLE;
  52. break;
  53. case DRM_MODE_DPMS_SUSPEND:
  54. temp |= ADPA_DAC_ENABLE | ADPA_VSYNC_CNTL_DISABLE;
  55. break;
  56. case DRM_MODE_DPMS_OFF:
  57. temp |= ADPA_HSYNC_CNTL_DISABLE | ADPA_VSYNC_CNTL_DISABLE;
  58. break;
  59. }
  60. I915_WRITE(reg, temp);
  61. }
  62. static int intel_crt_mode_valid(struct drm_connector *connector,
  63. struct drm_display_mode *mode)
  64. {
  65. struct drm_device *dev = connector->dev;
  66. int max_clock = 0;
  67. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  68. return MODE_NO_DBLESCAN;
  69. if (mode->clock < 25000)
  70. return MODE_CLOCK_LOW;
  71. if (!IS_I9XX(dev))
  72. max_clock = 350000;
  73. else
  74. max_clock = 400000;
  75. if (mode->clock > max_clock)
  76. return MODE_CLOCK_HIGH;
  77. return MODE_OK;
  78. }
  79. static bool intel_crt_mode_fixup(struct drm_encoder *encoder,
  80. struct drm_display_mode *mode,
  81. struct drm_display_mode *adjusted_mode)
  82. {
  83. return true;
  84. }
  85. static void intel_crt_mode_set(struct drm_encoder *encoder,
  86. struct drm_display_mode *mode,
  87. struct drm_display_mode *adjusted_mode)
  88. {
  89. struct drm_device *dev = encoder->dev;
  90. struct drm_crtc *crtc = encoder->crtc;
  91. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  92. struct drm_i915_private *dev_priv = dev->dev_private;
  93. int dpll_md_reg;
  94. u32 adpa, dpll_md;
  95. u32 adpa_reg;
  96. if (intel_crtc->pipe == 0)
  97. dpll_md_reg = DPLL_A_MD;
  98. else
  99. dpll_md_reg = DPLL_B_MD;
  100. if (IS_IGDNG(dev))
  101. adpa_reg = PCH_ADPA;
  102. else
  103. adpa_reg = ADPA;
  104. /*
  105. * Disable separate mode multiplier used when cloning SDVO to CRT
  106. * XXX this needs to be adjusted when we really are cloning
  107. */
  108. if (IS_I965G(dev) && !IS_IGDNG(dev)) {
  109. dpll_md = I915_READ(dpll_md_reg);
  110. I915_WRITE(dpll_md_reg,
  111. dpll_md & ~DPLL_MD_UDI_MULTIPLIER_MASK);
  112. }
  113. adpa = 0;
  114. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  115. adpa |= ADPA_HSYNC_ACTIVE_HIGH;
  116. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  117. adpa |= ADPA_VSYNC_ACTIVE_HIGH;
  118. if (intel_crtc->pipe == 0) {
  119. adpa |= ADPA_PIPE_A_SELECT;
  120. if (!IS_IGDNG(dev))
  121. I915_WRITE(BCLRPAT_A, 0);
  122. } else {
  123. adpa |= ADPA_PIPE_B_SELECT;
  124. if (!IS_IGDNG(dev))
  125. I915_WRITE(BCLRPAT_B, 0);
  126. }
  127. I915_WRITE(adpa_reg, adpa);
  128. }
  129. static bool intel_igdng_crt_detect_hotplug(struct drm_connector *connector)
  130. {
  131. struct drm_device *dev = connector->dev;
  132. struct drm_i915_private *dev_priv = dev->dev_private;
  133. u32 adpa, temp;
  134. bool ret;
  135. temp = adpa = I915_READ(PCH_ADPA);
  136. adpa &= ~ADPA_CRT_HOTPLUG_MASK;
  137. adpa |= (ADPA_CRT_HOTPLUG_PERIOD_128 |
  138. ADPA_CRT_HOTPLUG_WARMUP_10MS |
  139. ADPA_CRT_HOTPLUG_SAMPLE_4S |
  140. ADPA_CRT_HOTPLUG_VOLTAGE_50 | /* default */
  141. ADPA_CRT_HOTPLUG_VOLREF_325MV |
  142. ADPA_CRT_HOTPLUG_ENABLE |
  143. ADPA_CRT_HOTPLUG_FORCE_TRIGGER);
  144. DRM_DEBUG("pch crt adpa 0x%x", adpa);
  145. I915_WRITE(PCH_ADPA, adpa);
  146. /* This might not be needed as not specified in spec...*/
  147. udelay(1000);
  148. /* Check the status to see if both blue and green are on now */
  149. adpa = I915_READ(PCH_ADPA);
  150. if ((adpa & ADPA_CRT_HOTPLUG_MONITOR_MASK) ==
  151. ADPA_CRT_HOTPLUG_MONITOR_COLOR)
  152. ret = true;
  153. else
  154. ret = false;
  155. /* restore origin register */
  156. I915_WRITE(PCH_ADPA, temp);
  157. return ret;
  158. }
  159. /**
  160. * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect CRT presence.
  161. *
  162. * Not for i915G/i915GM
  163. *
  164. * \return true if CRT is connected.
  165. * \return false if CRT is disconnected.
  166. */
  167. static bool intel_crt_detect_hotplug(struct drm_connector *connector)
  168. {
  169. struct drm_device *dev = connector->dev;
  170. struct drm_i915_private *dev_priv = dev->dev_private;
  171. u32 hotplug_en;
  172. int i, tries = 0;
  173. if (IS_IGDNG(dev))
  174. return intel_igdng_crt_detect_hotplug(connector);
  175. /*
  176. * On 4 series desktop, CRT detect sequence need to be done twice
  177. * to get a reliable result.
  178. */
  179. if (IS_G4X(dev) && !IS_GM45(dev))
  180. tries = 2;
  181. else
  182. tries = 1;
  183. hotplug_en = I915_READ(PORT_HOTPLUG_EN);
  184. hotplug_en &= CRT_FORCE_HOTPLUG_MASK;
  185. hotplug_en |= CRT_HOTPLUG_FORCE_DETECT;
  186. if (IS_G4X(dev))
  187. hotplug_en |= CRT_HOTPLUG_ACTIVATION_PERIOD_64;
  188. hotplug_en |= CRT_HOTPLUG_VOLTAGE_COMPARE_50;
  189. for (i = 0; i < tries ; i++) {
  190. unsigned long timeout;
  191. /* turn on the FORCE_DETECT */
  192. I915_WRITE(PORT_HOTPLUG_EN, hotplug_en);
  193. timeout = jiffies + msecs_to_jiffies(1000);
  194. /* wait for FORCE_DETECT to go off */
  195. do {
  196. if (!(I915_READ(PORT_HOTPLUG_EN) &
  197. CRT_HOTPLUG_FORCE_DETECT))
  198. break;
  199. msleep(1);
  200. } while (time_after(timeout, jiffies));
  201. }
  202. if ((I915_READ(PORT_HOTPLUG_STAT) & CRT_HOTPLUG_MONITOR_MASK) ==
  203. CRT_HOTPLUG_MONITOR_COLOR)
  204. return true;
  205. return false;
  206. }
  207. static bool intel_crt_detect_ddc(struct drm_connector *connector)
  208. {
  209. struct intel_output *intel_output = to_intel_output(connector);
  210. /* CRT should always be at 0, but check anyway */
  211. if (intel_output->type != INTEL_OUTPUT_ANALOG)
  212. return false;
  213. return intel_ddc_probe(intel_output);
  214. }
  215. static enum drm_connector_status
  216. intel_crt_load_detect(struct drm_crtc *crtc, struct intel_output *intel_output)
  217. {
  218. struct drm_encoder *encoder = &intel_output->enc;
  219. struct drm_device *dev = encoder->dev;
  220. struct drm_i915_private *dev_priv = dev->dev_private;
  221. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  222. uint32_t pipe = intel_crtc->pipe;
  223. uint32_t save_bclrpat;
  224. uint32_t save_vtotal;
  225. uint32_t vtotal, vactive;
  226. uint32_t vsample;
  227. uint32_t vblank, vblank_start, vblank_end;
  228. uint32_t dsl;
  229. uint32_t bclrpat_reg;
  230. uint32_t vtotal_reg;
  231. uint32_t vblank_reg;
  232. uint32_t vsync_reg;
  233. uint32_t pipeconf_reg;
  234. uint32_t pipe_dsl_reg;
  235. uint8_t st00;
  236. enum drm_connector_status status;
  237. if (pipe == 0) {
  238. bclrpat_reg = BCLRPAT_A;
  239. vtotal_reg = VTOTAL_A;
  240. vblank_reg = VBLANK_A;
  241. vsync_reg = VSYNC_A;
  242. pipeconf_reg = PIPEACONF;
  243. pipe_dsl_reg = PIPEADSL;
  244. } else {
  245. bclrpat_reg = BCLRPAT_B;
  246. vtotal_reg = VTOTAL_B;
  247. vblank_reg = VBLANK_B;
  248. vsync_reg = VSYNC_B;
  249. pipeconf_reg = PIPEBCONF;
  250. pipe_dsl_reg = PIPEBDSL;
  251. }
  252. save_bclrpat = I915_READ(bclrpat_reg);
  253. save_vtotal = I915_READ(vtotal_reg);
  254. vblank = I915_READ(vblank_reg);
  255. vtotal = ((save_vtotal >> 16) & 0xfff) + 1;
  256. vactive = (save_vtotal & 0x7ff) + 1;
  257. vblank_start = (vblank & 0xfff) + 1;
  258. vblank_end = ((vblank >> 16) & 0xfff) + 1;
  259. /* Set the border color to purple. */
  260. I915_WRITE(bclrpat_reg, 0x500050);
  261. if (IS_I9XX(dev)) {
  262. uint32_t pipeconf = I915_READ(pipeconf_reg);
  263. I915_WRITE(pipeconf_reg, pipeconf | PIPECONF_FORCE_BORDER);
  264. /* Wait for next Vblank to substitue
  265. * border color for Color info */
  266. intel_wait_for_vblank(dev);
  267. st00 = I915_READ8(VGA_MSR_WRITE);
  268. status = ((st00 & (1 << 4)) != 0) ?
  269. connector_status_connected :
  270. connector_status_disconnected;
  271. I915_WRITE(pipeconf_reg, pipeconf);
  272. } else {
  273. bool restore_vblank = false;
  274. int count, detect;
  275. /*
  276. * If there isn't any border, add some.
  277. * Yes, this will flicker
  278. */
  279. if (vblank_start <= vactive && vblank_end >= vtotal) {
  280. uint32_t vsync = I915_READ(vsync_reg);
  281. uint32_t vsync_start = (vsync & 0xffff) + 1;
  282. vblank_start = vsync_start;
  283. I915_WRITE(vblank_reg,
  284. (vblank_start - 1) |
  285. ((vblank_end - 1) << 16));
  286. restore_vblank = true;
  287. }
  288. /* sample in the vertical border, selecting the larger one */
  289. if (vblank_start - vactive >= vtotal - vblank_end)
  290. vsample = (vblank_start + vactive) >> 1;
  291. else
  292. vsample = (vtotal + vblank_end) >> 1;
  293. /*
  294. * Wait for the border to be displayed
  295. */
  296. while (I915_READ(pipe_dsl_reg) >= vactive)
  297. ;
  298. while ((dsl = I915_READ(pipe_dsl_reg)) <= vsample)
  299. ;
  300. /*
  301. * Watch ST00 for an entire scanline
  302. */
  303. detect = 0;
  304. count = 0;
  305. do {
  306. count++;
  307. /* Read the ST00 VGA status register */
  308. st00 = I915_READ8(VGA_MSR_WRITE);
  309. if (st00 & (1 << 4))
  310. detect++;
  311. } while ((I915_READ(pipe_dsl_reg) == dsl));
  312. /* restore vblank if necessary */
  313. if (restore_vblank)
  314. I915_WRITE(vblank_reg, vblank);
  315. /*
  316. * If more than 3/4 of the scanline detected a monitor,
  317. * then it is assumed to be present. This works even on i830,
  318. * where there isn't any way to force the border color across
  319. * the screen
  320. */
  321. status = detect * 4 > count * 3 ?
  322. connector_status_connected :
  323. connector_status_disconnected;
  324. }
  325. /* Restore previous settings */
  326. I915_WRITE(bclrpat_reg, save_bclrpat);
  327. return status;
  328. }
  329. static enum drm_connector_status intel_crt_detect(struct drm_connector *connector)
  330. {
  331. struct drm_device *dev = connector->dev;
  332. struct intel_output *intel_output = to_intel_output(connector);
  333. struct drm_encoder *encoder = &intel_output->enc;
  334. struct drm_crtc *crtc;
  335. int dpms_mode;
  336. enum drm_connector_status status;
  337. if (IS_I9XX(dev) && !IS_I915G(dev) && !IS_I915GM(dev)) {
  338. if (intel_crt_detect_hotplug(connector))
  339. return connector_status_connected;
  340. else
  341. return connector_status_disconnected;
  342. }
  343. if (intel_crt_detect_ddc(connector))
  344. return connector_status_connected;
  345. /* for pre-945g platforms use load detect */
  346. if (encoder->crtc && encoder->crtc->enabled) {
  347. status = intel_crt_load_detect(encoder->crtc, intel_output);
  348. } else {
  349. crtc = intel_get_load_detect_pipe(intel_output,
  350. NULL, &dpms_mode);
  351. if (crtc) {
  352. status = intel_crt_load_detect(crtc, intel_output);
  353. intel_release_load_detect_pipe(intel_output, dpms_mode);
  354. } else
  355. status = connector_status_unknown;
  356. }
  357. return status;
  358. }
  359. static void intel_crt_destroy(struct drm_connector *connector)
  360. {
  361. struct intel_output *intel_output = to_intel_output(connector);
  362. intel_i2c_destroy(intel_output->ddc_bus);
  363. drm_sysfs_connector_remove(connector);
  364. drm_connector_cleanup(connector);
  365. kfree(connector);
  366. }
  367. static int intel_crt_get_modes(struct drm_connector *connector)
  368. {
  369. int ret;
  370. struct intel_output *intel_output = to_intel_output(connector);
  371. struct i2c_adapter *ddcbus;
  372. struct drm_device *dev = connector->dev;
  373. ret = intel_ddc_get_modes(intel_output);
  374. if (ret || !IS_G4X(dev))
  375. goto end;
  376. ddcbus = intel_output->ddc_bus;
  377. /* Try to probe digital port for output in DVI-I -> VGA mode. */
  378. intel_output->ddc_bus =
  379. intel_i2c_create(connector->dev, GPIOD, "CRTDDC_D");
  380. if (!intel_output->ddc_bus) {
  381. intel_output->ddc_bus = ddcbus;
  382. dev_printk(KERN_ERR, &connector->dev->pdev->dev,
  383. "DDC bus registration failed for CRTDDC_D.\n");
  384. goto end;
  385. }
  386. /* Try to get modes by GPIOD port */
  387. ret = intel_ddc_get_modes(intel_output);
  388. intel_i2c_destroy(ddcbus);
  389. end:
  390. return ret;
  391. }
  392. static int intel_crt_set_property(struct drm_connector *connector,
  393. struct drm_property *property,
  394. uint64_t value)
  395. {
  396. return 0;
  397. }
  398. /*
  399. * Routines for controlling stuff on the analog port
  400. */
  401. static const struct drm_encoder_helper_funcs intel_crt_helper_funcs = {
  402. .dpms = intel_crt_dpms,
  403. .mode_fixup = intel_crt_mode_fixup,
  404. .prepare = intel_encoder_prepare,
  405. .commit = intel_encoder_commit,
  406. .mode_set = intel_crt_mode_set,
  407. };
  408. static const struct drm_connector_funcs intel_crt_connector_funcs = {
  409. .dpms = drm_helper_connector_dpms,
  410. .detect = intel_crt_detect,
  411. .fill_modes = drm_helper_probe_single_connector_modes,
  412. .destroy = intel_crt_destroy,
  413. .set_property = intel_crt_set_property,
  414. };
  415. static const struct drm_connector_helper_funcs intel_crt_connector_helper_funcs = {
  416. .mode_valid = intel_crt_mode_valid,
  417. .get_modes = intel_crt_get_modes,
  418. .best_encoder = intel_best_encoder,
  419. };
  420. static void intel_crt_enc_destroy(struct drm_encoder *encoder)
  421. {
  422. drm_encoder_cleanup(encoder);
  423. }
  424. static const struct drm_encoder_funcs intel_crt_enc_funcs = {
  425. .destroy = intel_crt_enc_destroy,
  426. };
  427. void intel_crt_init(struct drm_device *dev)
  428. {
  429. struct drm_connector *connector;
  430. struct intel_output *intel_output;
  431. u32 i2c_reg;
  432. intel_output = kzalloc(sizeof(struct intel_output), GFP_KERNEL);
  433. if (!intel_output)
  434. return;
  435. connector = &intel_output->base;
  436. drm_connector_init(dev, &intel_output->base,
  437. &intel_crt_connector_funcs, DRM_MODE_CONNECTOR_VGA);
  438. drm_encoder_init(dev, &intel_output->enc, &intel_crt_enc_funcs,
  439. DRM_MODE_ENCODER_DAC);
  440. drm_mode_connector_attach_encoder(&intel_output->base,
  441. &intel_output->enc);
  442. /* Set up the DDC bus. */
  443. if (IS_IGDNG(dev))
  444. i2c_reg = PCH_GPIOA;
  445. else
  446. i2c_reg = GPIOA;
  447. intel_output->ddc_bus = intel_i2c_create(dev, i2c_reg, "CRTDDC_A");
  448. if (!intel_output->ddc_bus) {
  449. dev_printk(KERN_ERR, &dev->pdev->dev, "DDC bus registration "
  450. "failed.\n");
  451. return;
  452. }
  453. intel_output->type = INTEL_OUTPUT_ANALOG;
  454. connector->interlace_allowed = 0;
  455. connector->doublescan_allowed = 0;
  456. drm_encoder_helper_add(&intel_output->enc, &intel_crt_helper_funcs);
  457. drm_connector_helper_add(connector, &intel_crt_connector_helper_funcs);
  458. drm_sysfs_connector_add(connector);
  459. }