riscom8.c 38 KB

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  1. /*
  2. * linux/drivers/char/riscom.c -- RISCom/8 multiport serial driver.
  3. *
  4. * Copyright (C) 1994-1996 Dmitry Gorodchanin (pgmdsg@ibi.com)
  5. *
  6. * This code is loosely based on the Linux serial driver, written by
  7. * Linus Torvalds, Theodore T'so and others. The RISCom/8 card
  8. * programming info was obtained from various drivers for other OSes
  9. * (FreeBSD, ISC, etc), but no source code from those drivers were
  10. * directly included in this driver.
  11. *
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License as published by
  15. * the Free Software Foundation; either version 2 of the License, or
  16. * (at your option) any later version.
  17. *
  18. * This program is distributed in the hope that it will be useful,
  19. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  20. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  21. * GNU General Public License for more details.
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. *
  27. * Revision 1.1
  28. *
  29. * ChangeLog:
  30. * Arnaldo Carvalho de Melo <acme@conectiva.com.br> - 27-Jun-2001
  31. * - get rid of check_region and several cleanups
  32. */
  33. #include <linux/module.h>
  34. #include <linux/io.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/ioport.h>
  38. #include <linux/interrupt.h>
  39. #include <linux/errno.h>
  40. #include <linux/tty.h>
  41. #include <linux/mm.h>
  42. #include <linux/serial.h>
  43. #include <linux/fcntl.h>
  44. #include <linux/major.h>
  45. #include <linux/init.h>
  46. #include <linux/delay.h>
  47. #include <linux/tty_flip.h>
  48. #include <linux/smp_lock.h>
  49. #include <linux/spinlock.h>
  50. #include <linux/device.h>
  51. #include <linux/uaccess.h>
  52. #include "riscom8.h"
  53. #include "riscom8_reg.h"
  54. /* Am I paranoid or not ? ;-) */
  55. #define RISCOM_PARANOIA_CHECK
  56. /*
  57. * Crazy InteliCom/8 boards sometimes have swapped CTS & DSR signals.
  58. * You can slightly speed up things by #undefing the following option,
  59. * if you are REALLY sure that your board is correct one.
  60. */
  61. #define RISCOM_BRAIN_DAMAGED_CTS
  62. /*
  63. * The following defines are mostly for testing purposes. But if you need
  64. * some nice reporting in your syslog, you can define them also.
  65. */
  66. #undef RC_REPORT_FIFO
  67. #undef RC_REPORT_OVERRUN
  68. #define RISCOM_LEGAL_FLAGS \
  69. (ASYNC_HUP_NOTIFY | ASYNC_SAK | ASYNC_SPLIT_TERMIOS | \
  70. ASYNC_SPD_HI | ASYNC_SPEED_VHI | ASYNC_SESSION_LOCKOUT | \
  71. ASYNC_PGRP_LOCKOUT | ASYNC_CALLOUT_NOHUP)
  72. static struct tty_driver *riscom_driver;
  73. static DEFINE_SPINLOCK(riscom_lock);
  74. static struct riscom_board rc_board[RC_NBOARD] = {
  75. {
  76. .base = RC_IOBASE1,
  77. },
  78. {
  79. .base = RC_IOBASE2,
  80. },
  81. {
  82. .base = RC_IOBASE3,
  83. },
  84. {
  85. .base = RC_IOBASE4,
  86. },
  87. };
  88. static struct riscom_port rc_port[RC_NBOARD * RC_NPORT];
  89. /* RISCom/8 I/O ports addresses (without address translation) */
  90. static unsigned short rc_ioport[] = {
  91. #if 1
  92. 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x09, 0x0a, 0x0b, 0x0c,
  93. #else
  94. 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x09, 0x0a, 0x0b, 0x0c, 0x10,
  95. 0x11, 0x12, 0x18, 0x28, 0x31, 0x32, 0x39, 0x3a, 0x40, 0x41, 0x61, 0x62,
  96. 0x63, 0x64, 0x6b, 0x70, 0x71, 0x78, 0x7a, 0x7b, 0x7f, 0x100, 0x101
  97. #endif
  98. };
  99. #define RC_NIOPORT ARRAY_SIZE(rc_ioport)
  100. static int rc_paranoia_check(struct riscom_port const *port,
  101. char *name, const char *routine)
  102. {
  103. #ifdef RISCOM_PARANOIA_CHECK
  104. static const char badmagic[] = KERN_INFO
  105. "rc: Warning: bad riscom port magic number for device %s in %s\n";
  106. static const char badinfo[] = KERN_INFO
  107. "rc: Warning: null riscom port for device %s in %s\n";
  108. if (!port) {
  109. printk(badinfo, name, routine);
  110. return 1;
  111. }
  112. if (port->magic != RISCOM8_MAGIC) {
  113. printk(badmagic, name, routine);
  114. return 1;
  115. }
  116. #endif
  117. return 0;
  118. }
  119. /*
  120. *
  121. * Service functions for RISCom/8 driver.
  122. *
  123. */
  124. /* Get board number from pointer */
  125. static inline int board_No(struct riscom_board const *bp)
  126. {
  127. return bp - rc_board;
  128. }
  129. /* Get port number from pointer */
  130. static inline int port_No(struct riscom_port const *port)
  131. {
  132. return RC_PORT(port - rc_port);
  133. }
  134. /* Get pointer to board from pointer to port */
  135. static inline struct riscom_board *port_Board(struct riscom_port const *port)
  136. {
  137. return &rc_board[RC_BOARD(port - rc_port)];
  138. }
  139. /* Input Byte from CL CD180 register */
  140. static inline unsigned char rc_in(struct riscom_board const *bp,
  141. unsigned short reg)
  142. {
  143. return inb(bp->base + RC_TO_ISA(reg));
  144. }
  145. /* Output Byte to CL CD180 register */
  146. static inline void rc_out(struct riscom_board const *bp, unsigned short reg,
  147. unsigned char val)
  148. {
  149. outb(val, bp->base + RC_TO_ISA(reg));
  150. }
  151. /* Wait for Channel Command Register ready */
  152. static void rc_wait_CCR(struct riscom_board const *bp)
  153. {
  154. unsigned long delay;
  155. /* FIXME: need something more descriptive then 100000 :) */
  156. for (delay = 100000; delay; delay--)
  157. if (!rc_in(bp, CD180_CCR))
  158. return;
  159. printk(KERN_INFO "rc%d: Timeout waiting for CCR.\n", board_No(bp));
  160. }
  161. /*
  162. * RISCom/8 probe functions.
  163. */
  164. static int rc_request_io_range(struct riscom_board * const bp)
  165. {
  166. int i;
  167. for (i = 0; i < RC_NIOPORT; i++)
  168. if (!request_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1,
  169. "RISCom/8")) {
  170. goto out_release;
  171. }
  172. return 0;
  173. out_release:
  174. printk(KERN_INFO "rc%d: Skipping probe at 0x%03x. IO address in use.\n",
  175. board_No(bp), bp->base);
  176. while (--i >= 0)
  177. release_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1);
  178. return 1;
  179. }
  180. static void rc_release_io_range(struct riscom_board * const bp)
  181. {
  182. int i;
  183. for (i = 0; i < RC_NIOPORT; i++)
  184. release_region(RC_TO_ISA(rc_ioport[i]) + bp->base, 1);
  185. }
  186. /* Reset and setup CD180 chip */
  187. static void __init rc_init_CD180(struct riscom_board const *bp)
  188. {
  189. unsigned long flags;
  190. spin_lock_irqsave(&riscom_lock, flags);
  191. rc_out(bp, RC_CTOUT, 0); /* Clear timeout */
  192. rc_wait_CCR(bp); /* Wait for CCR ready */
  193. rc_out(bp, CD180_CCR, CCR_HARDRESET); /* Reset CD180 chip */
  194. spin_unlock_irqrestore(&riscom_lock, flags);
  195. msleep(50); /* Delay 0.05 sec */
  196. spin_lock_irqsave(&riscom_lock, flags);
  197. rc_out(bp, CD180_GIVR, RC_ID); /* Set ID for this chip */
  198. rc_out(bp, CD180_GICR, 0); /* Clear all bits */
  199. rc_out(bp, CD180_PILR1, RC_ACK_MINT); /* Prio for modem intr */
  200. rc_out(bp, CD180_PILR2, RC_ACK_TINT); /* Prio for tx intr */
  201. rc_out(bp, CD180_PILR3, RC_ACK_RINT); /* Prio for rx intr */
  202. /* Setting up prescaler. We need 4 ticks per 1 ms */
  203. rc_out(bp, CD180_PPRH, (RC_OSCFREQ/(1000000/RISCOM_TPS)) >> 8);
  204. rc_out(bp, CD180_PPRL, (RC_OSCFREQ/(1000000/RISCOM_TPS)) & 0xff);
  205. spin_unlock_irqrestore(&riscom_lock, flags);
  206. }
  207. /* Main probing routine, also sets irq. */
  208. static int __init rc_probe(struct riscom_board *bp)
  209. {
  210. unsigned char val1, val2;
  211. int irqs = 0;
  212. int retries;
  213. bp->irq = 0;
  214. if (rc_request_io_range(bp))
  215. return 1;
  216. /* Are the I/O ports here ? */
  217. rc_out(bp, CD180_PPRL, 0x5a);
  218. outb(0xff, 0x80);
  219. val1 = rc_in(bp, CD180_PPRL);
  220. rc_out(bp, CD180_PPRL, 0xa5);
  221. outb(0x00, 0x80);
  222. val2 = rc_in(bp, CD180_PPRL);
  223. if ((val1 != 0x5a) || (val2 != 0xa5)) {
  224. printk(KERN_ERR "rc%d: RISCom/8 Board at 0x%03x not found.\n",
  225. board_No(bp), bp->base);
  226. goto out_release;
  227. }
  228. /* It's time to find IRQ for this board */
  229. for (retries = 0; retries < 5 && irqs <= 0; retries++) {
  230. irqs = probe_irq_on();
  231. rc_init_CD180(bp); /* Reset CD180 chip */
  232. rc_out(bp, CD180_CAR, 2); /* Select port 2 */
  233. rc_wait_CCR(bp);
  234. rc_out(bp, CD180_CCR, CCR_TXEN); /* Enable transmitter */
  235. rc_out(bp, CD180_IER, IER_TXRDY);/* Enable tx empty intr */
  236. msleep(50);
  237. irqs = probe_irq_off(irqs);
  238. val1 = rc_in(bp, RC_BSR); /* Get Board Status reg */
  239. val2 = rc_in(bp, RC_ACK_TINT); /* ACK interrupt */
  240. rc_init_CD180(bp); /* Reset CD180 again */
  241. if ((val1 & RC_BSR_TINT) || (val2 != (RC_ID | GIVR_IT_TX))) {
  242. printk(KERN_ERR "rc%d: RISCom/8 Board at 0x%03x not "
  243. "found.\n", board_No(bp), bp->base);
  244. goto out_release;
  245. }
  246. }
  247. if (irqs <= 0) {
  248. printk(KERN_ERR "rc%d: Can't find IRQ for RISCom/8 board "
  249. "at 0x%03x.\n", board_No(bp), bp->base);
  250. goto out_release;
  251. }
  252. bp->irq = irqs;
  253. bp->flags |= RC_BOARD_PRESENT;
  254. printk(KERN_INFO "rc%d: RISCom/8 Rev. %c board detected at "
  255. "0x%03x, IRQ %d.\n",
  256. board_No(bp),
  257. (rc_in(bp, CD180_GFRCR) & 0x0f) + 'A', /* Board revision */
  258. bp->base, bp->irq);
  259. return 0;
  260. out_release:
  261. rc_release_io_range(bp);
  262. return 1;
  263. }
  264. /*
  265. *
  266. * Interrupt processing routines.
  267. *
  268. */
  269. static struct riscom_port *rc_get_port(struct riscom_board const *bp,
  270. unsigned char const *what)
  271. {
  272. unsigned char channel;
  273. struct riscom_port *port;
  274. channel = rc_in(bp, CD180_GICR) >> GICR_CHAN_OFF;
  275. if (channel < CD180_NCH) {
  276. port = &rc_port[board_No(bp) * RC_NPORT + channel];
  277. if (port->port.flags & ASYNC_INITIALIZED)
  278. return port;
  279. }
  280. printk(KERN_ERR "rc%d: %s interrupt from invalid port %d\n",
  281. board_No(bp), what, channel);
  282. return NULL;
  283. }
  284. static void rc_receive_exc(struct riscom_board const *bp)
  285. {
  286. struct riscom_port *port;
  287. struct tty_struct *tty;
  288. unsigned char status;
  289. unsigned char ch, flag;
  290. port = rc_get_port(bp, "Receive");
  291. if (port == NULL)
  292. return;
  293. tty = port->port.tty;
  294. #ifdef RC_REPORT_OVERRUN
  295. status = rc_in(bp, CD180_RCSR);
  296. if (status & RCSR_OE)
  297. port->overrun++;
  298. status &= port->mark_mask;
  299. #else
  300. status = rc_in(bp, CD180_RCSR) & port->mark_mask;
  301. #endif
  302. ch = rc_in(bp, CD180_RDR);
  303. if (!status)
  304. return;
  305. if (status & RCSR_TOUT) {
  306. printk(KERN_WARNING "rc%d: port %d: Receiver timeout. "
  307. "Hardware problems ?\n",
  308. board_No(bp), port_No(port));
  309. return;
  310. } else if (status & RCSR_BREAK) {
  311. printk(KERN_INFO "rc%d: port %d: Handling break...\n",
  312. board_No(bp), port_No(port));
  313. flag = TTY_BREAK;
  314. if (port->port.flags & ASYNC_SAK)
  315. do_SAK(tty);
  316. } else if (status & RCSR_PE)
  317. flag = TTY_PARITY;
  318. else if (status & RCSR_FE)
  319. flag = TTY_FRAME;
  320. else if (status & RCSR_OE)
  321. flag = TTY_OVERRUN;
  322. else
  323. flag = TTY_NORMAL;
  324. tty_insert_flip_char(tty, ch, flag);
  325. tty_flip_buffer_push(tty);
  326. }
  327. static void rc_receive(struct riscom_board const *bp)
  328. {
  329. struct riscom_port *port;
  330. struct tty_struct *tty;
  331. unsigned char count;
  332. port = rc_get_port(bp, "Receive");
  333. if (port == NULL)
  334. return;
  335. tty = port->port.tty;
  336. count = rc_in(bp, CD180_RDCR);
  337. #ifdef RC_REPORT_FIFO
  338. port->hits[count > 8 ? 9 : count]++;
  339. #endif
  340. while (count--) {
  341. if (tty_buffer_request_room(tty, 1) == 0) {
  342. printk(KERN_WARNING "rc%d: port %d: Working around "
  343. "flip buffer overflow.\n",
  344. board_No(bp), port_No(port));
  345. break;
  346. }
  347. tty_insert_flip_char(tty, rc_in(bp, CD180_RDR), TTY_NORMAL);
  348. }
  349. tty_flip_buffer_push(tty);
  350. }
  351. static void rc_transmit(struct riscom_board const *bp)
  352. {
  353. struct riscom_port *port;
  354. struct tty_struct *tty;
  355. unsigned char count;
  356. port = rc_get_port(bp, "Transmit");
  357. if (port == NULL)
  358. return;
  359. tty = port->port.tty;
  360. if (port->IER & IER_TXEMPTY) {
  361. /* FIFO drained */
  362. rc_out(bp, CD180_CAR, port_No(port));
  363. port->IER &= ~IER_TXEMPTY;
  364. rc_out(bp, CD180_IER, port->IER);
  365. return;
  366. }
  367. if ((port->xmit_cnt <= 0 && !port->break_length)
  368. || tty->stopped || tty->hw_stopped) {
  369. rc_out(bp, CD180_CAR, port_No(port));
  370. port->IER &= ~IER_TXRDY;
  371. rc_out(bp, CD180_IER, port->IER);
  372. return;
  373. }
  374. if (port->break_length) {
  375. if (port->break_length > 0) {
  376. if (port->COR2 & COR2_ETC) {
  377. rc_out(bp, CD180_TDR, CD180_C_ESC);
  378. rc_out(bp, CD180_TDR, CD180_C_SBRK);
  379. port->COR2 &= ~COR2_ETC;
  380. }
  381. count = min_t(int, port->break_length, 0xff);
  382. rc_out(bp, CD180_TDR, CD180_C_ESC);
  383. rc_out(bp, CD180_TDR, CD180_C_DELAY);
  384. rc_out(bp, CD180_TDR, count);
  385. port->break_length -= count;
  386. if (port->break_length == 0)
  387. port->break_length--;
  388. } else {
  389. rc_out(bp, CD180_TDR, CD180_C_ESC);
  390. rc_out(bp, CD180_TDR, CD180_C_EBRK);
  391. rc_out(bp, CD180_COR2, port->COR2);
  392. rc_wait_CCR(bp);
  393. rc_out(bp, CD180_CCR, CCR_CORCHG2);
  394. port->break_length = 0;
  395. }
  396. return;
  397. }
  398. count = CD180_NFIFO;
  399. do {
  400. rc_out(bp, CD180_TDR, port->port.xmit_buf[port->xmit_tail++]);
  401. port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE-1);
  402. if (--port->xmit_cnt <= 0)
  403. break;
  404. } while (--count > 0);
  405. if (port->xmit_cnt <= 0) {
  406. rc_out(bp, CD180_CAR, port_No(port));
  407. port->IER &= ~IER_TXRDY;
  408. rc_out(bp, CD180_IER, port->IER);
  409. }
  410. if (port->xmit_cnt <= port->wakeup_chars)
  411. tty_wakeup(tty);
  412. }
  413. static void rc_check_modem(struct riscom_board const *bp)
  414. {
  415. struct riscom_port *port;
  416. struct tty_struct *tty;
  417. unsigned char mcr;
  418. port = rc_get_port(bp, "Modem");
  419. if (port == NULL)
  420. return;
  421. tty = port->port.tty;
  422. mcr = rc_in(bp, CD180_MCR);
  423. if (mcr & MCR_CDCHG) {
  424. if (rc_in(bp, CD180_MSVR) & MSVR_CD)
  425. wake_up_interruptible(&port->port.open_wait);
  426. else
  427. tty_hangup(tty);
  428. }
  429. #ifdef RISCOM_BRAIN_DAMAGED_CTS
  430. if (mcr & MCR_CTSCHG) {
  431. if (rc_in(bp, CD180_MSVR) & MSVR_CTS) {
  432. tty->hw_stopped = 0;
  433. port->IER |= IER_TXRDY;
  434. if (port->xmit_cnt <= port->wakeup_chars)
  435. tty_wakeup(tty);
  436. } else {
  437. tty->hw_stopped = 1;
  438. port->IER &= ~IER_TXRDY;
  439. }
  440. rc_out(bp, CD180_IER, port->IER);
  441. }
  442. if (mcr & MCR_DSRCHG) {
  443. if (rc_in(bp, CD180_MSVR) & MSVR_DSR) {
  444. tty->hw_stopped = 0;
  445. port->IER |= IER_TXRDY;
  446. if (port->xmit_cnt <= port->wakeup_chars)
  447. tty_wakeup(tty);
  448. } else {
  449. tty->hw_stopped = 1;
  450. port->IER &= ~IER_TXRDY;
  451. }
  452. rc_out(bp, CD180_IER, port->IER);
  453. }
  454. #endif /* RISCOM_BRAIN_DAMAGED_CTS */
  455. /* Clear change bits */
  456. rc_out(bp, CD180_MCR, 0);
  457. }
  458. /* The main interrupt processing routine */
  459. static irqreturn_t rc_interrupt(int dummy, void *dev_id)
  460. {
  461. unsigned char status;
  462. unsigned char ack;
  463. struct riscom_board *bp = dev_id;
  464. unsigned long loop = 0;
  465. int handled = 0;
  466. if (!(bp->flags & RC_BOARD_ACTIVE))
  467. return IRQ_NONE;
  468. while ((++loop < 16) && ((status = ~(rc_in(bp, RC_BSR))) &
  469. (RC_BSR_TOUT | RC_BSR_TINT |
  470. RC_BSR_MINT | RC_BSR_RINT))) {
  471. handled = 1;
  472. if (status & RC_BSR_TOUT)
  473. printk(KERN_WARNING "rc%d: Got timeout. Hardware "
  474. "error?\n", board_No(bp));
  475. else if (status & RC_BSR_RINT) {
  476. ack = rc_in(bp, RC_ACK_RINT);
  477. if (ack == (RC_ID | GIVR_IT_RCV))
  478. rc_receive(bp);
  479. else if (ack == (RC_ID | GIVR_IT_REXC))
  480. rc_receive_exc(bp);
  481. else
  482. printk(KERN_WARNING "rc%d: Bad receive ack "
  483. "0x%02x.\n",
  484. board_No(bp), ack);
  485. } else if (status & RC_BSR_TINT) {
  486. ack = rc_in(bp, RC_ACK_TINT);
  487. if (ack == (RC_ID | GIVR_IT_TX))
  488. rc_transmit(bp);
  489. else
  490. printk(KERN_WARNING "rc%d: Bad transmit ack "
  491. "0x%02x.\n",
  492. board_No(bp), ack);
  493. } else /* if (status & RC_BSR_MINT) */ {
  494. ack = rc_in(bp, RC_ACK_MINT);
  495. if (ack == (RC_ID | GIVR_IT_MODEM))
  496. rc_check_modem(bp);
  497. else
  498. printk(KERN_WARNING "rc%d: Bad modem ack "
  499. "0x%02x.\n",
  500. board_No(bp), ack);
  501. }
  502. rc_out(bp, CD180_EOIR, 0); /* Mark end of interrupt */
  503. rc_out(bp, RC_CTOUT, 0); /* Clear timeout flag */
  504. }
  505. return IRQ_RETVAL(handled);
  506. }
  507. /*
  508. * Routines for open & close processing.
  509. */
  510. /* Called with disabled interrupts */
  511. static int rc_setup_board(struct riscom_board *bp)
  512. {
  513. int error;
  514. if (bp->flags & RC_BOARD_ACTIVE)
  515. return 0;
  516. error = request_irq(bp->irq, rc_interrupt, IRQF_DISABLED,
  517. "RISCom/8", bp);
  518. if (error)
  519. return error;
  520. rc_out(bp, RC_CTOUT, 0); /* Just in case */
  521. bp->DTR = ~0;
  522. rc_out(bp, RC_DTR, bp->DTR); /* Drop DTR on all ports */
  523. bp->flags |= RC_BOARD_ACTIVE;
  524. return 0;
  525. }
  526. /* Called with disabled interrupts */
  527. static void rc_shutdown_board(struct riscom_board *bp)
  528. {
  529. if (!(bp->flags & RC_BOARD_ACTIVE))
  530. return;
  531. bp->flags &= ~RC_BOARD_ACTIVE;
  532. free_irq(bp->irq, NULL);
  533. bp->DTR = ~0;
  534. rc_out(bp, RC_DTR, bp->DTR); /* Drop DTR on all ports */
  535. }
  536. /*
  537. * Setting up port characteristics.
  538. * Must be called with disabled interrupts
  539. */
  540. static void rc_change_speed(struct riscom_board *bp, struct riscom_port *port)
  541. {
  542. struct tty_struct *tty = port->port.tty;
  543. unsigned long baud;
  544. long tmp;
  545. unsigned char cor1 = 0, cor3 = 0;
  546. unsigned char mcor1 = 0, mcor2 = 0;
  547. port->IER = 0;
  548. port->COR2 = 0;
  549. port->MSVR = MSVR_RTS;
  550. baud = tty_get_baud_rate(tty);
  551. /* Select port on the board */
  552. rc_out(bp, CD180_CAR, port_No(port));
  553. if (!baud) {
  554. /* Drop DTR & exit */
  555. bp->DTR |= (1u << port_No(port));
  556. rc_out(bp, RC_DTR, bp->DTR);
  557. return;
  558. } else {
  559. /* Set DTR on */
  560. bp->DTR &= ~(1u << port_No(port));
  561. rc_out(bp, RC_DTR, bp->DTR);
  562. }
  563. /*
  564. * Now we must calculate some speed depended things
  565. */
  566. /* Set baud rate for port */
  567. tmp = (((RC_OSCFREQ + baud/2) / baud +
  568. CD180_TPC/2) / CD180_TPC);
  569. rc_out(bp, CD180_RBPRH, (tmp >> 8) & 0xff);
  570. rc_out(bp, CD180_TBPRH, (tmp >> 8) & 0xff);
  571. rc_out(bp, CD180_RBPRL, tmp & 0xff);
  572. rc_out(bp, CD180_TBPRL, tmp & 0xff);
  573. baud = (baud + 5) / 10; /* Estimated CPS */
  574. /* Two timer ticks seems enough to wakeup something like SLIP driver */
  575. tmp = ((baud + HZ/2) / HZ) * 2 - CD180_NFIFO;
  576. port->wakeup_chars = (tmp < 0) ? 0 : ((tmp >= SERIAL_XMIT_SIZE) ?
  577. SERIAL_XMIT_SIZE - 1 : tmp);
  578. /* Receiver timeout will be transmission time for 1.5 chars */
  579. tmp = (RISCOM_TPS + RISCOM_TPS/2 + baud/2) / baud;
  580. tmp = (tmp > 0xff) ? 0xff : tmp;
  581. rc_out(bp, CD180_RTPR, tmp);
  582. switch (C_CSIZE(tty)) {
  583. case CS5:
  584. cor1 |= COR1_5BITS;
  585. break;
  586. case CS6:
  587. cor1 |= COR1_6BITS;
  588. break;
  589. case CS7:
  590. cor1 |= COR1_7BITS;
  591. break;
  592. case CS8:
  593. cor1 |= COR1_8BITS;
  594. break;
  595. }
  596. if (C_CSTOPB(tty))
  597. cor1 |= COR1_2SB;
  598. cor1 |= COR1_IGNORE;
  599. if (C_PARENB(tty)) {
  600. cor1 |= COR1_NORMPAR;
  601. if (C_PARODD(tty))
  602. cor1 |= COR1_ODDP;
  603. if (I_INPCK(tty))
  604. cor1 &= ~COR1_IGNORE;
  605. }
  606. /* Set marking of some errors */
  607. port->mark_mask = RCSR_OE | RCSR_TOUT;
  608. if (I_INPCK(tty))
  609. port->mark_mask |= RCSR_FE | RCSR_PE;
  610. if (I_BRKINT(tty) || I_PARMRK(tty))
  611. port->mark_mask |= RCSR_BREAK;
  612. if (I_IGNPAR(tty))
  613. port->mark_mask &= ~(RCSR_FE | RCSR_PE);
  614. if (I_IGNBRK(tty)) {
  615. port->mark_mask &= ~RCSR_BREAK;
  616. if (I_IGNPAR(tty))
  617. /* Real raw mode. Ignore all */
  618. port->mark_mask &= ~RCSR_OE;
  619. }
  620. /* Enable Hardware Flow Control */
  621. if (C_CRTSCTS(tty)) {
  622. #ifdef RISCOM_BRAIN_DAMAGED_CTS
  623. port->IER |= IER_DSR | IER_CTS;
  624. mcor1 |= MCOR1_DSRZD | MCOR1_CTSZD;
  625. mcor2 |= MCOR2_DSROD | MCOR2_CTSOD;
  626. tty->hw_stopped = !(rc_in(bp, CD180_MSVR) &
  627. (MSVR_CTS|MSVR_DSR));
  628. #else
  629. port->COR2 |= COR2_CTSAE;
  630. #endif
  631. }
  632. /* Enable Software Flow Control. FIXME: I'm not sure about this */
  633. /* Some people reported that it works, but I still doubt */
  634. if (I_IXON(tty)) {
  635. port->COR2 |= COR2_TXIBE;
  636. cor3 |= (COR3_FCT | COR3_SCDE);
  637. if (I_IXANY(tty))
  638. port->COR2 |= COR2_IXM;
  639. rc_out(bp, CD180_SCHR1, START_CHAR(tty));
  640. rc_out(bp, CD180_SCHR2, STOP_CHAR(tty));
  641. rc_out(bp, CD180_SCHR3, START_CHAR(tty));
  642. rc_out(bp, CD180_SCHR4, STOP_CHAR(tty));
  643. }
  644. if (!C_CLOCAL(tty)) {
  645. /* Enable CD check */
  646. port->IER |= IER_CD;
  647. mcor1 |= MCOR1_CDZD;
  648. mcor2 |= MCOR2_CDOD;
  649. }
  650. if (C_CREAD(tty))
  651. /* Enable receiver */
  652. port->IER |= IER_RXD;
  653. /* Set input FIFO size (1-8 bytes) */
  654. cor3 |= RISCOM_RXFIFO;
  655. /* Setting up CD180 channel registers */
  656. rc_out(bp, CD180_COR1, cor1);
  657. rc_out(bp, CD180_COR2, port->COR2);
  658. rc_out(bp, CD180_COR3, cor3);
  659. /* Make CD180 know about registers change */
  660. rc_wait_CCR(bp);
  661. rc_out(bp, CD180_CCR, CCR_CORCHG1 | CCR_CORCHG2 | CCR_CORCHG3);
  662. /* Setting up modem option registers */
  663. rc_out(bp, CD180_MCOR1, mcor1);
  664. rc_out(bp, CD180_MCOR2, mcor2);
  665. /* Enable CD180 transmitter & receiver */
  666. rc_wait_CCR(bp);
  667. rc_out(bp, CD180_CCR, CCR_TXEN | CCR_RXEN);
  668. /* Enable interrupts */
  669. rc_out(bp, CD180_IER, port->IER);
  670. /* And finally set RTS on */
  671. rc_out(bp, CD180_MSVR, port->MSVR);
  672. }
  673. /* Must be called with interrupts enabled */
  674. static int rc_setup_port(struct riscom_board *bp, struct riscom_port *port)
  675. {
  676. unsigned long flags;
  677. if (port->port.flags & ASYNC_INITIALIZED)
  678. return 0;
  679. if (tty_port_alloc_xmit_buf(&port->port) < 0)
  680. return -ENOMEM;
  681. spin_lock_irqsave(&riscom_lock, flags);
  682. clear_bit(TTY_IO_ERROR, &port->port.tty->flags);
  683. if (port->port.count == 1)
  684. bp->count++;
  685. port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
  686. rc_change_speed(bp, port);
  687. port->port.flags |= ASYNC_INITIALIZED;
  688. spin_unlock_irqrestore(&riscom_lock, flags);
  689. return 0;
  690. }
  691. /* Must be called with interrupts disabled */
  692. static void rc_shutdown_port(struct tty_struct *tty,
  693. struct riscom_board *bp, struct riscom_port *port)
  694. {
  695. if (!(port->port.flags & ASYNC_INITIALIZED))
  696. return;
  697. #ifdef RC_REPORT_OVERRUN
  698. printk(KERN_INFO "rc%d: port %d: Total %ld overruns were detected.\n",
  699. board_No(bp), port_No(port), port->overrun);
  700. #endif
  701. #ifdef RC_REPORT_FIFO
  702. {
  703. int i;
  704. printk(KERN_INFO "rc%d: port %d: FIFO hits [ ",
  705. board_No(bp), port_No(port));
  706. for (i = 0; i < 10; i++)
  707. printk("%ld ", port->hits[i]);
  708. printk("].\n");
  709. }
  710. #endif
  711. tty_port_free_xmit_buf(&port->port);
  712. if (C_HUPCL(tty)) {
  713. /* Drop DTR */
  714. bp->DTR |= (1u << port_No(port));
  715. rc_out(bp, RC_DTR, bp->DTR);
  716. }
  717. /* Select port */
  718. rc_out(bp, CD180_CAR, port_No(port));
  719. /* Reset port */
  720. rc_wait_CCR(bp);
  721. rc_out(bp, CD180_CCR, CCR_SOFTRESET);
  722. /* Disable all interrupts from this port */
  723. port->IER = 0;
  724. rc_out(bp, CD180_IER, port->IER);
  725. set_bit(TTY_IO_ERROR, &tty->flags);
  726. port->port.flags &= ~ASYNC_INITIALIZED;
  727. if (--bp->count < 0) {
  728. printk(KERN_INFO "rc%d: rc_shutdown_port: "
  729. "bad board count: %d\n",
  730. board_No(bp), bp->count);
  731. bp->count = 0;
  732. }
  733. /*
  734. * If this is the last opened port on the board
  735. * shutdown whole board
  736. */
  737. if (!bp->count)
  738. rc_shutdown_board(bp);
  739. }
  740. static int carrier_raised(struct tty_port *port)
  741. {
  742. struct riscom_port *p = container_of(port, struct riscom_port, port);
  743. struct riscom_board *bp = port_Board(p);
  744. unsigned long flags;
  745. int CD;
  746. spin_lock_irqsave(&riscom_lock, flags);
  747. rc_out(bp, CD180_CAR, port_No(p));
  748. CD = rc_in(bp, CD180_MSVR) & MSVR_CD;
  749. rc_out(bp, CD180_MSVR, MSVR_RTS);
  750. bp->DTR &= ~(1u << port_No(p));
  751. rc_out(bp, RC_DTR, bp->DTR);
  752. spin_unlock_irqrestore(&riscom_lock, flags);
  753. return CD;
  754. }
  755. static int rc_open(struct tty_struct *tty, struct file *filp)
  756. {
  757. int board;
  758. int error;
  759. struct riscom_port *port;
  760. struct riscom_board *bp;
  761. board = RC_BOARD(tty->index);
  762. if (board >= RC_NBOARD || !(rc_board[board].flags & RC_BOARD_PRESENT))
  763. return -ENODEV;
  764. bp = &rc_board[board];
  765. port = rc_port + board * RC_NPORT + RC_PORT(tty->index);
  766. if (rc_paranoia_check(port, tty->name, "rc_open"))
  767. return -ENODEV;
  768. error = rc_setup_board(bp);
  769. if (error)
  770. return error;
  771. port->port.count++;
  772. tty->driver_data = port;
  773. port->port.tty = tty;
  774. error = rc_setup_port(bp, port);
  775. if (error == 0)
  776. error = tty_port_block_til_ready(&port->port, tty, filp);
  777. return error;
  778. }
  779. static void rc_flush_buffer(struct tty_struct *tty)
  780. {
  781. struct riscom_port *port = tty->driver_data;
  782. unsigned long flags;
  783. if (rc_paranoia_check(port, tty->name, "rc_flush_buffer"))
  784. return;
  785. spin_lock_irqsave(&riscom_lock, flags);
  786. port->xmit_cnt = port->xmit_head = port->xmit_tail = 0;
  787. spin_unlock_irqrestore(&riscom_lock, flags);
  788. tty_wakeup(tty);
  789. }
  790. static void rc_close(struct tty_struct *tty, struct file *filp)
  791. {
  792. struct riscom_port *port = tty->driver_data;
  793. struct riscom_board *bp;
  794. unsigned long flags;
  795. unsigned long timeout;
  796. if (!port || rc_paranoia_check(port, tty->name, "close"))
  797. return;
  798. bp = port_Board(port);
  799. if (tty_port_close_start(&port->port, tty, filp) == 0)
  800. return;
  801. /*
  802. * At this point we stop accepting input. To do this, we
  803. * disable the receive line status interrupts, and tell the
  804. * interrupt driver to stop checking the data ready bit in the
  805. * line status register.
  806. */
  807. spin_lock_irqsave(&riscom_lock, flags);
  808. port->IER &= ~IER_RXD;
  809. if (port->port.flags & ASYNC_INITIALIZED) {
  810. port->IER &= ~IER_TXRDY;
  811. port->IER |= IER_TXEMPTY;
  812. rc_out(bp, CD180_CAR, port_No(port));
  813. rc_out(bp, CD180_IER, port->IER);
  814. /*
  815. * Before we drop DTR, make sure the UART transmitter
  816. * has completely drained; this is especially
  817. * important if there is a transmit FIFO!
  818. */
  819. timeout = jiffies + HZ;
  820. while (port->IER & IER_TXEMPTY) {
  821. spin_unlock_irqrestore(&riscom_lock, flags);
  822. msleep_interruptible(jiffies_to_msecs(port->timeout));
  823. spin_lock_irqsave(&riscom_lock, flags);
  824. if (time_after(jiffies, timeout))
  825. break;
  826. }
  827. }
  828. rc_shutdown_port(tty, bp, port);
  829. rc_flush_buffer(tty);
  830. spin_unlock_irqrestore(&riscom_lock, flags);
  831. tty_port_close_end(&port->port, tty);
  832. }
  833. static int rc_write(struct tty_struct *tty,
  834. const unsigned char *buf, int count)
  835. {
  836. struct riscom_port *port = tty->driver_data;
  837. struct riscom_board *bp;
  838. int c, total = 0;
  839. unsigned long flags;
  840. if (rc_paranoia_check(port, tty->name, "rc_write"))
  841. return 0;
  842. bp = port_Board(port);
  843. while (1) {
  844. spin_lock_irqsave(&riscom_lock, flags);
  845. c = min_t(int, count, min(SERIAL_XMIT_SIZE - port->xmit_cnt - 1,
  846. SERIAL_XMIT_SIZE - port->xmit_head));
  847. if (c <= 0)
  848. break; /* lock continues to be held */
  849. memcpy(port->port.xmit_buf + port->xmit_head, buf, c);
  850. port->xmit_head = (port->xmit_head + c) & (SERIAL_XMIT_SIZE-1);
  851. port->xmit_cnt += c;
  852. spin_unlock_irqrestore(&riscom_lock, flags);
  853. buf += c;
  854. count -= c;
  855. total += c;
  856. }
  857. if (port->xmit_cnt && !tty->stopped && !tty->hw_stopped &&
  858. !(port->IER & IER_TXRDY)) {
  859. port->IER |= IER_TXRDY;
  860. rc_out(bp, CD180_CAR, port_No(port));
  861. rc_out(bp, CD180_IER, port->IER);
  862. }
  863. spin_unlock_irqrestore(&riscom_lock, flags);
  864. return total;
  865. }
  866. static int rc_put_char(struct tty_struct *tty, unsigned char ch)
  867. {
  868. struct riscom_port *port = tty->driver_data;
  869. unsigned long flags;
  870. int ret = 0;
  871. if (rc_paranoia_check(port, tty->name, "rc_put_char"))
  872. return 0;
  873. spin_lock_irqsave(&riscom_lock, flags);
  874. if (port->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
  875. goto out;
  876. port->port.xmit_buf[port->xmit_head++] = ch;
  877. port->xmit_head &= SERIAL_XMIT_SIZE - 1;
  878. port->xmit_cnt++;
  879. ret = 1;
  880. out:
  881. spin_unlock_irqrestore(&riscom_lock, flags);
  882. return ret;
  883. }
  884. static void rc_flush_chars(struct tty_struct *tty)
  885. {
  886. struct riscom_port *port = tty->driver_data;
  887. unsigned long flags;
  888. if (rc_paranoia_check(port, tty->name, "rc_flush_chars"))
  889. return;
  890. if (port->xmit_cnt <= 0 || tty->stopped || tty->hw_stopped)
  891. return;
  892. spin_lock_irqsave(&riscom_lock, flags);
  893. port->IER |= IER_TXRDY;
  894. rc_out(port_Board(port), CD180_CAR, port_No(port));
  895. rc_out(port_Board(port), CD180_IER, port->IER);
  896. spin_unlock_irqrestore(&riscom_lock, flags);
  897. }
  898. static int rc_write_room(struct tty_struct *tty)
  899. {
  900. struct riscom_port *port = tty->driver_data;
  901. int ret;
  902. if (rc_paranoia_check(port, tty->name, "rc_write_room"))
  903. return 0;
  904. ret = SERIAL_XMIT_SIZE - port->xmit_cnt - 1;
  905. if (ret < 0)
  906. ret = 0;
  907. return ret;
  908. }
  909. static int rc_chars_in_buffer(struct tty_struct *tty)
  910. {
  911. struct riscom_port *port = tty->driver_data;
  912. if (rc_paranoia_check(port, tty->name, "rc_chars_in_buffer"))
  913. return 0;
  914. return port->xmit_cnt;
  915. }
  916. static int rc_tiocmget(struct tty_struct *tty, struct file *file)
  917. {
  918. struct riscom_port *port = tty->driver_data;
  919. struct riscom_board *bp;
  920. unsigned char status;
  921. unsigned int result;
  922. unsigned long flags;
  923. if (rc_paranoia_check(port, tty->name, __func__))
  924. return -ENODEV;
  925. bp = port_Board(port);
  926. spin_lock_irqsave(&riscom_lock, flags);
  927. rc_out(bp, CD180_CAR, port_No(port));
  928. status = rc_in(bp, CD180_MSVR);
  929. result = rc_in(bp, RC_RI) & (1u << port_No(port)) ? 0 : TIOCM_RNG;
  930. spin_unlock_irqrestore(&riscom_lock, flags);
  931. result |= ((status & MSVR_RTS) ? TIOCM_RTS : 0)
  932. | ((status & MSVR_DTR) ? TIOCM_DTR : 0)
  933. | ((status & MSVR_CD) ? TIOCM_CAR : 0)
  934. | ((status & MSVR_DSR) ? TIOCM_DSR : 0)
  935. | ((status & MSVR_CTS) ? TIOCM_CTS : 0);
  936. return result;
  937. }
  938. static int rc_tiocmset(struct tty_struct *tty, struct file *file,
  939. unsigned int set, unsigned int clear)
  940. {
  941. struct riscom_port *port = tty->driver_data;
  942. unsigned long flags;
  943. struct riscom_board *bp;
  944. if (rc_paranoia_check(port, tty->name, __func__))
  945. return -ENODEV;
  946. bp = port_Board(port);
  947. spin_lock_irqsave(&riscom_lock, flags);
  948. if (set & TIOCM_RTS)
  949. port->MSVR |= MSVR_RTS;
  950. if (set & TIOCM_DTR)
  951. bp->DTR &= ~(1u << port_No(port));
  952. if (clear & TIOCM_RTS)
  953. port->MSVR &= ~MSVR_RTS;
  954. if (clear & TIOCM_DTR)
  955. bp->DTR |= (1u << port_No(port));
  956. rc_out(bp, CD180_CAR, port_No(port));
  957. rc_out(bp, CD180_MSVR, port->MSVR);
  958. rc_out(bp, RC_DTR, bp->DTR);
  959. spin_unlock_irqrestore(&riscom_lock, flags);
  960. return 0;
  961. }
  962. static int rc_send_break(struct tty_struct *tty, int length)
  963. {
  964. struct riscom_port *port = tty->driver_data;
  965. struct riscom_board *bp = port_Board(port);
  966. unsigned long flags;
  967. if (length == 0 || length == -1)
  968. return -EOPNOTSUPP;
  969. spin_lock_irqsave(&riscom_lock, flags);
  970. port->break_length = RISCOM_TPS / HZ * length;
  971. port->COR2 |= COR2_ETC;
  972. port->IER |= IER_TXRDY;
  973. rc_out(bp, CD180_CAR, port_No(port));
  974. rc_out(bp, CD180_COR2, port->COR2);
  975. rc_out(bp, CD180_IER, port->IER);
  976. rc_wait_CCR(bp);
  977. rc_out(bp, CD180_CCR, CCR_CORCHG2);
  978. rc_wait_CCR(bp);
  979. spin_unlock_irqrestore(&riscom_lock, flags);
  980. return 0;
  981. }
  982. static int rc_set_serial_info(struct riscom_port *port,
  983. struct serial_struct __user *newinfo)
  984. {
  985. struct serial_struct tmp;
  986. struct riscom_board *bp = port_Board(port);
  987. int change_speed;
  988. if (copy_from_user(&tmp, newinfo, sizeof(tmp)))
  989. return -EFAULT;
  990. #if 0
  991. if ((tmp.irq != bp->irq) ||
  992. (tmp.port != bp->base) ||
  993. (tmp.type != PORT_CIRRUS) ||
  994. (tmp.baud_base != (RC_OSCFREQ + CD180_TPC/2) / CD180_TPC) ||
  995. (tmp.custom_divisor != 0) ||
  996. (tmp.xmit_fifo_size != CD180_NFIFO) ||
  997. (tmp.flags & ~RISCOM_LEGAL_FLAGS))
  998. return -EINVAL;
  999. #endif
  1000. change_speed = ((port->port.flags & ASYNC_SPD_MASK) !=
  1001. (tmp.flags & ASYNC_SPD_MASK));
  1002. if (!capable(CAP_SYS_ADMIN)) {
  1003. if ((tmp.close_delay != port->port.close_delay) ||
  1004. (tmp.closing_wait != port->port.closing_wait) ||
  1005. ((tmp.flags & ~ASYNC_USR_MASK) !=
  1006. (port->port.flags & ~ASYNC_USR_MASK)))
  1007. return -EPERM;
  1008. port->port.flags = ((port->port.flags & ~ASYNC_USR_MASK) |
  1009. (tmp.flags & ASYNC_USR_MASK));
  1010. } else {
  1011. port->port.flags = ((port->port.flags & ~ASYNC_FLAGS) |
  1012. (tmp.flags & ASYNC_FLAGS));
  1013. port->port.close_delay = tmp.close_delay;
  1014. port->port.closing_wait = tmp.closing_wait;
  1015. }
  1016. if (change_speed) {
  1017. unsigned long flags;
  1018. spin_lock_irqsave(&riscom_lock, flags);
  1019. rc_change_speed(bp, port);
  1020. spin_unlock_irqrestore(&riscom_lock, flags);
  1021. }
  1022. return 0;
  1023. }
  1024. static int rc_get_serial_info(struct riscom_port *port,
  1025. struct serial_struct __user *retinfo)
  1026. {
  1027. struct serial_struct tmp;
  1028. struct riscom_board *bp = port_Board(port);
  1029. memset(&tmp, 0, sizeof(tmp));
  1030. tmp.type = PORT_CIRRUS;
  1031. tmp.line = port - rc_port;
  1032. tmp.port = bp->base;
  1033. tmp.irq = bp->irq;
  1034. tmp.flags = port->port.flags;
  1035. tmp.baud_base = (RC_OSCFREQ + CD180_TPC/2) / CD180_TPC;
  1036. tmp.close_delay = port->port.close_delay * HZ/100;
  1037. tmp.closing_wait = port->port.closing_wait * HZ/100;
  1038. tmp.xmit_fifo_size = CD180_NFIFO;
  1039. return copy_to_user(retinfo, &tmp, sizeof(tmp)) ? -EFAULT : 0;
  1040. }
  1041. static int rc_ioctl(struct tty_struct *tty, struct file *filp,
  1042. unsigned int cmd, unsigned long arg)
  1043. {
  1044. struct riscom_port *port = tty->driver_data;
  1045. void __user *argp = (void __user *)arg;
  1046. int retval;
  1047. if (rc_paranoia_check(port, tty->name, "rc_ioctl"))
  1048. return -ENODEV;
  1049. switch (cmd) {
  1050. case TIOCGSERIAL:
  1051. lock_kernel();
  1052. retval = rc_get_serial_info(port, argp);
  1053. unlock_kernel();
  1054. break;
  1055. case TIOCSSERIAL:
  1056. lock_kernel();
  1057. retval = rc_set_serial_info(port, argp);
  1058. unlock_kernel();
  1059. break;
  1060. default:
  1061. retval = -ENOIOCTLCMD;
  1062. }
  1063. return retval;
  1064. }
  1065. static void rc_throttle(struct tty_struct *tty)
  1066. {
  1067. struct riscom_port *port = tty->driver_data;
  1068. struct riscom_board *bp;
  1069. unsigned long flags;
  1070. if (rc_paranoia_check(port, tty->name, "rc_throttle"))
  1071. return;
  1072. bp = port_Board(port);
  1073. spin_lock_irqsave(&riscom_lock, flags);
  1074. port->MSVR &= ~MSVR_RTS;
  1075. rc_out(bp, CD180_CAR, port_No(port));
  1076. if (I_IXOFF(tty)) {
  1077. rc_wait_CCR(bp);
  1078. rc_out(bp, CD180_CCR, CCR_SSCH2);
  1079. rc_wait_CCR(bp);
  1080. }
  1081. rc_out(bp, CD180_MSVR, port->MSVR);
  1082. spin_unlock_irqrestore(&riscom_lock, flags);
  1083. }
  1084. static void rc_unthrottle(struct tty_struct *tty)
  1085. {
  1086. struct riscom_port *port = tty->driver_data;
  1087. struct riscom_board *bp;
  1088. unsigned long flags;
  1089. if (rc_paranoia_check(port, tty->name, "rc_unthrottle"))
  1090. return;
  1091. bp = port_Board(port);
  1092. spin_lock_irqsave(&riscom_lock, flags);
  1093. port->MSVR |= MSVR_RTS;
  1094. rc_out(bp, CD180_CAR, port_No(port));
  1095. if (I_IXOFF(tty)) {
  1096. rc_wait_CCR(bp);
  1097. rc_out(bp, CD180_CCR, CCR_SSCH1);
  1098. rc_wait_CCR(bp);
  1099. }
  1100. rc_out(bp, CD180_MSVR, port->MSVR);
  1101. spin_unlock_irqrestore(&riscom_lock, flags);
  1102. }
  1103. static void rc_stop(struct tty_struct *tty)
  1104. {
  1105. struct riscom_port *port = tty->driver_data;
  1106. struct riscom_board *bp;
  1107. unsigned long flags;
  1108. if (rc_paranoia_check(port, tty->name, "rc_stop"))
  1109. return;
  1110. bp = port_Board(port);
  1111. spin_lock_irqsave(&riscom_lock, flags);
  1112. port->IER &= ~IER_TXRDY;
  1113. rc_out(bp, CD180_CAR, port_No(port));
  1114. rc_out(bp, CD180_IER, port->IER);
  1115. spin_unlock_irqrestore(&riscom_lock, flags);
  1116. }
  1117. static void rc_start(struct tty_struct *tty)
  1118. {
  1119. struct riscom_port *port = tty->driver_data;
  1120. struct riscom_board *bp;
  1121. unsigned long flags;
  1122. if (rc_paranoia_check(port, tty->name, "rc_start"))
  1123. return;
  1124. bp = port_Board(port);
  1125. spin_lock_irqsave(&riscom_lock, flags);
  1126. if (port->xmit_cnt && port->port.xmit_buf && !(port->IER & IER_TXRDY)) {
  1127. port->IER |= IER_TXRDY;
  1128. rc_out(bp, CD180_CAR, port_No(port));
  1129. rc_out(bp, CD180_IER, port->IER);
  1130. }
  1131. spin_unlock_irqrestore(&riscom_lock, flags);
  1132. }
  1133. static void rc_hangup(struct tty_struct *tty)
  1134. {
  1135. struct riscom_port *port = tty->driver_data;
  1136. struct riscom_board *bp;
  1137. unsigned long flags;
  1138. if (rc_paranoia_check(port, tty->name, "rc_hangup"))
  1139. return;
  1140. bp = port_Board(port);
  1141. rc_shutdown_port(tty, bp, port);
  1142. spin_lock_irqsave(&port->port.lock, flags);
  1143. port->port.count = 0;
  1144. port->port.flags &= ~ASYNC_NORMAL_ACTIVE;
  1145. port->port.tty = NULL;
  1146. wake_up_interruptible(&port->port.open_wait);
  1147. spin_unlock_irqrestore(&port->port.lock, flags);
  1148. }
  1149. static void rc_set_termios(struct tty_struct *tty,
  1150. struct ktermios *old_termios)
  1151. {
  1152. struct riscom_port *port = tty->driver_data;
  1153. unsigned long flags;
  1154. if (rc_paranoia_check(port, tty->name, "rc_set_termios"))
  1155. return;
  1156. spin_lock_irqsave(&riscom_lock, flags);
  1157. rc_change_speed(port_Board(port), port);
  1158. spin_unlock_irqrestore(&riscom_lock, flags);
  1159. if ((old_termios->c_cflag & CRTSCTS) &&
  1160. !(tty->termios->c_cflag & CRTSCTS)) {
  1161. tty->hw_stopped = 0;
  1162. rc_start(tty);
  1163. }
  1164. }
  1165. static const struct tty_operations riscom_ops = {
  1166. .open = rc_open,
  1167. .close = rc_close,
  1168. .write = rc_write,
  1169. .put_char = rc_put_char,
  1170. .flush_chars = rc_flush_chars,
  1171. .write_room = rc_write_room,
  1172. .chars_in_buffer = rc_chars_in_buffer,
  1173. .flush_buffer = rc_flush_buffer,
  1174. .ioctl = rc_ioctl,
  1175. .throttle = rc_throttle,
  1176. .unthrottle = rc_unthrottle,
  1177. .set_termios = rc_set_termios,
  1178. .stop = rc_stop,
  1179. .start = rc_start,
  1180. .hangup = rc_hangup,
  1181. .tiocmget = rc_tiocmget,
  1182. .tiocmset = rc_tiocmset,
  1183. .break_ctl = rc_send_break,
  1184. };
  1185. static const struct tty_port_operations riscom_port_ops = {
  1186. .carrier_raised = carrier_raised,
  1187. };
  1188. static int __init rc_init_drivers(void)
  1189. {
  1190. int error;
  1191. int i;
  1192. riscom_driver = alloc_tty_driver(RC_NBOARD * RC_NPORT);
  1193. if (!riscom_driver)
  1194. return -ENOMEM;
  1195. riscom_driver->owner = THIS_MODULE;
  1196. riscom_driver->name = "ttyL";
  1197. riscom_driver->major = RISCOM8_NORMAL_MAJOR;
  1198. riscom_driver->type = TTY_DRIVER_TYPE_SERIAL;
  1199. riscom_driver->subtype = SERIAL_TYPE_NORMAL;
  1200. riscom_driver->init_termios = tty_std_termios;
  1201. riscom_driver->init_termios.c_cflag =
  1202. B9600 | CS8 | CREAD | HUPCL | CLOCAL;
  1203. riscom_driver->init_termios.c_ispeed = 9600;
  1204. riscom_driver->init_termios.c_ospeed = 9600;
  1205. riscom_driver->flags = TTY_DRIVER_REAL_RAW | TTY_DRIVER_HARDWARE_BREAK;
  1206. tty_set_operations(riscom_driver, &riscom_ops);
  1207. error = tty_register_driver(riscom_driver);
  1208. if (error != 0) {
  1209. put_tty_driver(riscom_driver);
  1210. printk(KERN_ERR "rc: Couldn't register RISCom/8 driver, "
  1211. "error = %d\n", error);
  1212. return 1;
  1213. }
  1214. memset(rc_port, 0, sizeof(rc_port));
  1215. for (i = 0; i < RC_NPORT * RC_NBOARD; i++) {
  1216. tty_port_init(&rc_port[i].port);
  1217. rc_port[i].port.ops = &riscom_port_ops;
  1218. rc_port[i].magic = RISCOM8_MAGIC;
  1219. }
  1220. return 0;
  1221. }
  1222. static void rc_release_drivers(void)
  1223. {
  1224. tty_unregister_driver(riscom_driver);
  1225. put_tty_driver(riscom_driver);
  1226. }
  1227. #ifndef MODULE
  1228. /*
  1229. * Called at boot time.
  1230. *
  1231. * You can specify IO base for up to RC_NBOARD cards,
  1232. * using line "riscom8=0xiobase1,0xiobase2,.." at LILO prompt.
  1233. * Note that there will be no probing at default
  1234. * addresses in this case.
  1235. *
  1236. */
  1237. static int __init riscom8_setup(char *str)
  1238. {
  1239. int ints[RC_NBOARD];
  1240. int i;
  1241. str = get_options(str, ARRAY_SIZE(ints), ints);
  1242. for (i = 0; i < RC_NBOARD; i++) {
  1243. if (i < ints[0])
  1244. rc_board[i].base = ints[i+1];
  1245. else
  1246. rc_board[i].base = 0;
  1247. }
  1248. return 1;
  1249. }
  1250. __setup("riscom8=", riscom8_setup);
  1251. #endif
  1252. static char banner[] __initdata =
  1253. KERN_INFO "rc: SDL RISCom/8 card driver v1.1, (c) D.Gorodchanin "
  1254. "1994-1996.\n";
  1255. static char no_boards_msg[] __initdata =
  1256. KERN_INFO "rc: No RISCom/8 boards detected.\n";
  1257. /*
  1258. * This routine must be called by kernel at boot time
  1259. */
  1260. static int __init riscom8_init(void)
  1261. {
  1262. int i;
  1263. int found = 0;
  1264. printk(banner);
  1265. if (rc_init_drivers())
  1266. return -EIO;
  1267. for (i = 0; i < RC_NBOARD; i++)
  1268. if (rc_board[i].base && !rc_probe(&rc_board[i]))
  1269. found++;
  1270. if (!found) {
  1271. rc_release_drivers();
  1272. printk(no_boards_msg);
  1273. return -EIO;
  1274. }
  1275. return 0;
  1276. }
  1277. #ifdef MODULE
  1278. static int iobase;
  1279. static int iobase1;
  1280. static int iobase2;
  1281. static int iobase3;
  1282. module_param(iobase, int, 0);
  1283. module_param(iobase1, int, 0);
  1284. module_param(iobase2, int, 0);
  1285. module_param(iobase3, int, 0);
  1286. MODULE_LICENSE("GPL");
  1287. MODULE_ALIAS_CHARDEV_MAJOR(RISCOM8_NORMAL_MAJOR);
  1288. #endif /* MODULE */
  1289. /*
  1290. * You can setup up to 4 boards (current value of RC_NBOARD)
  1291. * by specifying "iobase=0xXXX iobase1=0xXXX ..." as insmod parameter.
  1292. *
  1293. */
  1294. static int __init riscom8_init_module(void)
  1295. {
  1296. #ifdef MODULE
  1297. int i;
  1298. if (iobase || iobase1 || iobase2 || iobase3) {
  1299. for (i = 0; i < RC_NBOARD; i++)
  1300. rc_board[i].base = 0;
  1301. }
  1302. if (iobase)
  1303. rc_board[0].base = iobase;
  1304. if (iobase1)
  1305. rc_board[1].base = iobase1;
  1306. if (iobase2)
  1307. rc_board[2].base = iobase2;
  1308. if (iobase3)
  1309. rc_board[3].base = iobase3;
  1310. #endif /* MODULE */
  1311. return riscom8_init();
  1312. }
  1313. static void __exit riscom8_exit_module(void)
  1314. {
  1315. int i;
  1316. rc_release_drivers();
  1317. for (i = 0; i < RC_NBOARD; i++)
  1318. if (rc_board[i].flags & RC_BOARD_PRESENT)
  1319. rc_release_io_range(&rc_board[i]);
  1320. }
  1321. module_init(riscom8_init_module);
  1322. module_exit(riscom8_exit_module);