ambassador.c 67 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425
  1. /*
  2. Madge Ambassador ATM Adapter driver.
  3. Copyright (C) 1995-1999 Madge Networks Ltd.
  4. This program is free software; you can redistribute it and/or modify
  5. it under the terms of the GNU General Public License as published by
  6. the Free Software Foundation; either version 2 of the License, or
  7. (at your option) any later version.
  8. This program is distributed in the hope that it will be useful,
  9. but WITHOUT ANY WARRANTY; without even the implied warranty of
  10. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11. GNU General Public License for more details.
  12. You should have received a copy of the GNU General Public License
  13. along with this program; if not, write to the Free Software
  14. Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  15. The GNU GPL is contained in /usr/doc/copyright/GPL on a Debian
  16. system and in the file COPYING in the Linux kernel source.
  17. */
  18. /* * dedicated to the memory of Graham Gordon 1971-1998 * */
  19. #include <linux/module.h>
  20. #include <linux/types.h>
  21. #include <linux/pci.h>
  22. #include <linux/kernel.h>
  23. #include <linux/init.h>
  24. #include <linux/ioport.h>
  25. #include <linux/atmdev.h>
  26. #include <linux/delay.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/poison.h>
  29. #include <linux/bitrev.h>
  30. #include <linux/mutex.h>
  31. #include <linux/firmware.h>
  32. #include <linux/ihex.h>
  33. #include <asm/atomic.h>
  34. #include <asm/io.h>
  35. #include <asm/byteorder.h>
  36. #include "ambassador.h"
  37. #define maintainer_string "Giuliano Procida at Madge Networks <gprocida@madge.com>"
  38. #define description_string "Madge ATM Ambassador driver"
  39. #define version_string "1.2.4"
  40. static inline void __init show_version (void) {
  41. printk ("%s version %s\n", description_string, version_string);
  42. }
  43. /*
  44. Theory of Operation
  45. I Hardware, detection, initialisation and shutdown.
  46. 1. Supported Hardware
  47. This driver is for the PCI ATMizer-based Ambassador card (except
  48. very early versions). It is not suitable for the similar EISA "TR7"
  49. card. Commercially, both cards are known as Collage Server ATM
  50. adapters.
  51. The loader supports image transfer to the card, image start and few
  52. other miscellaneous commands.
  53. Only AAL5 is supported with vpi = 0 and vci in the range 0 to 1023.
  54. The cards are big-endian.
  55. 2. Detection
  56. Standard PCI stuff, the early cards are detected and rejected.
  57. 3. Initialisation
  58. The cards are reset and the self-test results are checked. The
  59. microcode image is then transferred and started. This waits for a
  60. pointer to a descriptor containing details of the host-based queues
  61. and buffers and various parameters etc. Once they are processed
  62. normal operations may begin. The BIA is read using a microcode
  63. command.
  64. 4. Shutdown
  65. This may be accomplished either by a card reset or via the microcode
  66. shutdown command. Further investigation required.
  67. 5. Persistent state
  68. The card reset does not affect PCI configuration (good) or the
  69. contents of several other "shared run-time registers" (bad) which
  70. include doorbell and interrupt control as well as EEPROM and PCI
  71. control. The driver must be careful when modifying these registers
  72. not to touch bits it does not use and to undo any changes at exit.
  73. II Driver software
  74. 0. Generalities
  75. The adapter is quite intelligent (fast) and has a simple interface
  76. (few features). VPI is always zero, 1024 VCIs are supported. There
  77. is limited cell rate support. UBR channels can be capped and ABR
  78. (explicit rate, but not EFCI) is supported. There is no CBR or VBR
  79. support.
  80. 1. Driver <-> Adapter Communication
  81. Apart from the basic loader commands, the driver communicates
  82. through three entities: the command queue (CQ), the transmit queue
  83. pair (TXQ) and the receive queue pairs (RXQ). These three entities
  84. are set up by the host and passed to the microcode just after it has
  85. been started.
  86. All queues are host-based circular queues. They are contiguous and
  87. (due to hardware limitations) have some restrictions as to their
  88. locations in (bus) memory. They are of the "full means the same as
  89. empty so don't do that" variety since the adapter uses pointers
  90. internally.
  91. The queue pairs work as follows: one queue is for supply to the
  92. adapter, items in it are pending and are owned by the adapter; the
  93. other is the queue for return from the adapter, items in it have
  94. been dealt with by the adapter. The host adds items to the supply
  95. (TX descriptors and free RX buffer descriptors) and removes items
  96. from the return (TX and RX completions). The adapter deals with out
  97. of order completions.
  98. Interrupts (card to host) and the doorbell (host to card) are used
  99. for signalling.
  100. 1. CQ
  101. This is to communicate "open VC", "close VC", "get stats" etc. to
  102. the adapter. At most one command is retired every millisecond by the
  103. card. There is no out of order completion or notification. The
  104. driver needs to check the return code of the command, waiting as
  105. appropriate.
  106. 2. TXQ
  107. TX supply items are of variable length (scatter gather support) and
  108. so the queue items are (more or less) pointers to the real thing.
  109. Each TX supply item contains a unique, host-supplied handle (the skb
  110. bus address seems most sensible as this works for Alphas as well,
  111. there is no need to do any endian conversions on the handles).
  112. TX return items consist of just the handles above.
  113. 3. RXQ (up to 4 of these with different lengths and buffer sizes)
  114. RX supply items consist of a unique, host-supplied handle (the skb
  115. bus address again) and a pointer to the buffer data area.
  116. RX return items consist of the handle above, the VC, length and a
  117. status word. This just screams "oh so easy" doesn't it?
  118. Note on RX pool sizes:
  119. Each pool should have enough buffers to handle a back-to-back stream
  120. of minimum sized frames on a single VC. For example:
  121. frame spacing = 3us (about right)
  122. delay = IRQ lat + RX handling + RX buffer replenish = 20 (us) (a guess)
  123. min number of buffers for one VC = 1 + delay/spacing (buffers)
  124. delay/spacing = latency = (20+2)/3 = 7 (buffers) (rounding up)
  125. The 20us delay assumes that there is no need to sleep; if we need to
  126. sleep to get buffers we are going to drop frames anyway.
  127. In fact, each pool should have enough buffers to support the
  128. simultaneous reassembly of a separate frame on each VC and cope with
  129. the case in which frames complete in round robin cell fashion on
  130. each VC.
  131. Only one frame can complete at each cell arrival, so if "n" VCs are
  132. open, the worst case is to have them all complete frames together
  133. followed by all starting new frames together.
  134. desired number of buffers = n + delay/spacing
  135. These are the extreme requirements, however, they are "n+k" for some
  136. "k" so we have only the constant to choose. This is the argument
  137. rx_lats which current defaults to 7.
  138. Actually, "n ? n+k : 0" is better and this is what is implemented,
  139. subject to the limit given by the pool size.
  140. 4. Driver locking
  141. Simple spinlocks are used around the TX and RX queue mechanisms.
  142. Anyone with a faster, working method is welcome to implement it.
  143. The adapter command queue is protected with a spinlock. We always
  144. wait for commands to complete.
  145. A more complex form of locking is used around parts of the VC open
  146. and close functions. There are three reasons for a lock: 1. we need
  147. to do atomic rate reservation and release (not used yet), 2. Opening
  148. sometimes involves two adapter commands which must not be separated
  149. by another command on the same VC, 3. the changes to RX pool size
  150. must be atomic. The lock needs to work over context switches, so we
  151. use a semaphore.
  152. III Hardware Features and Microcode Bugs
  153. 1. Byte Ordering
  154. *%^"$&%^$*&^"$(%^$#&^%$(&#%$*(&^#%!"!"!*!
  155. 2. Memory access
  156. All structures that are not accessed using DMA must be 4-byte
  157. aligned (not a problem) and must not cross 4MB boundaries.
  158. There is a DMA memory hole at E0000000-E00000FF (groan).
  159. TX fragments (DMA read) must not cross 4MB boundaries (would be 16MB
  160. but for a hardware bug).
  161. RX buffers (DMA write) must not cross 16MB boundaries and must
  162. include spare trailing bytes up to the next 4-byte boundary; they
  163. will be written with rubbish.
  164. The PLX likes to prefetch; if reading up to 4 u32 past the end of
  165. each TX fragment is not a problem, then TX can be made to go a
  166. little faster by passing a flag at init that disables a prefetch
  167. workaround. We do not pass this flag. (new microcode only)
  168. Now we:
  169. . Note that alloc_skb rounds up size to a 16byte boundary.
  170. . Ensure all areas do not traverse 4MB boundaries.
  171. . Ensure all areas do not start at a E00000xx bus address.
  172. (I cannot be certain, but this may always hold with Linux)
  173. . Make all failures cause a loud message.
  174. . Discard non-conforming SKBs (causes TX failure or RX fill delay).
  175. . Discard non-conforming TX fragment descriptors (the TX fails).
  176. In the future we could:
  177. . Allow RX areas that traverse 4MB (but not 16MB) boundaries.
  178. . Segment TX areas into some/more fragments, when necessary.
  179. . Relax checks for non-DMA items (ignore hole).
  180. . Give scatter-gather (iovec) requirements using ???. (?)
  181. 3. VC close is broken (only for new microcode)
  182. The VC close adapter microcode command fails to do anything if any
  183. frames have been received on the VC but none have been transmitted.
  184. Frames continue to be reassembled and passed (with IRQ) to the
  185. driver.
  186. IV To Do List
  187. . Fix bugs!
  188. . Timer code may be broken.
  189. . Deal with buggy VC close (somehow) in microcode 12.
  190. . Handle interrupted and/or non-blocking writes - is this a job for
  191. the protocol layer?
  192. . Add code to break up TX fragments when they span 4MB boundaries.
  193. . Add SUNI phy layer (need to know where SUNI lives on card).
  194. . Implement a tx_alloc fn to (a) satisfy TX alignment etc. and (b)
  195. leave extra headroom space for Ambassador TX descriptors.
  196. . Understand these elements of struct atm_vcc: recvq (proto?),
  197. sleep, callback, listenq, backlog_quota, reply and user_back.
  198. . Adjust TX/RX skb allocation to favour IP with LANE/CLIP (configurable).
  199. . Impose a TX-pending limit (2?) on each VC, help avoid TX q overflow.
  200. . Decide whether RX buffer recycling is or can be made completely safe;
  201. turn it back on. It looks like Werner is going to axe this.
  202. . Implement QoS changes on open VCs (involves extracting parts of VC open
  203. and close into separate functions and using them to make changes).
  204. . Hack on command queue so that someone can issue multiple commands and wait
  205. on the last one (OR only "no-op" or "wait" commands are waited for).
  206. . Eliminate need for while-schedule around do_command.
  207. */
  208. static void do_housekeeping (unsigned long arg);
  209. /********** globals **********/
  210. static unsigned short debug = 0;
  211. static unsigned int cmds = 8;
  212. static unsigned int txs = 32;
  213. static unsigned int rxs[NUM_RX_POOLS] = { 64, 64, 64, 64 };
  214. static unsigned int rxs_bs[NUM_RX_POOLS] = { 4080, 12240, 36720, 65535 };
  215. static unsigned int rx_lats = 7;
  216. static unsigned char pci_lat = 0;
  217. static const unsigned long onegigmask = -1 << 30;
  218. /********** access to adapter **********/
  219. static inline void wr_plain (const amb_dev * dev, size_t addr, u32 data) {
  220. PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x", addr, data);
  221. #ifdef AMB_MMIO
  222. dev->membase[addr / sizeof(u32)] = data;
  223. #else
  224. outl (data, dev->iobase + addr);
  225. #endif
  226. }
  227. static inline u32 rd_plain (const amb_dev * dev, size_t addr) {
  228. #ifdef AMB_MMIO
  229. u32 data = dev->membase[addr / sizeof(u32)];
  230. #else
  231. u32 data = inl (dev->iobase + addr);
  232. #endif
  233. PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x", addr, data);
  234. return data;
  235. }
  236. static inline void wr_mem (const amb_dev * dev, size_t addr, u32 data) {
  237. __be32 be = cpu_to_be32 (data);
  238. PRINTD (DBG_FLOW|DBG_REGS, "wr: %08zx <- %08x b[%08x]", addr, data, be);
  239. #ifdef AMB_MMIO
  240. dev->membase[addr / sizeof(u32)] = be;
  241. #else
  242. outl (be, dev->iobase + addr);
  243. #endif
  244. }
  245. static inline u32 rd_mem (const amb_dev * dev, size_t addr) {
  246. #ifdef AMB_MMIO
  247. __be32 be = dev->membase[addr / sizeof(u32)];
  248. #else
  249. __be32 be = inl (dev->iobase + addr);
  250. #endif
  251. u32 data = be32_to_cpu (be);
  252. PRINTD (DBG_FLOW|DBG_REGS, "rd: %08zx -> %08x b[%08x]", addr, data, be);
  253. return data;
  254. }
  255. /********** dump routines **********/
  256. static inline void dump_registers (const amb_dev * dev) {
  257. #ifdef DEBUG_AMBASSADOR
  258. if (debug & DBG_REGS) {
  259. size_t i;
  260. PRINTD (DBG_REGS, "reading PLX control: ");
  261. for (i = 0x00; i < 0x30; i += sizeof(u32))
  262. rd_mem (dev, i);
  263. PRINTD (DBG_REGS, "reading mailboxes: ");
  264. for (i = 0x40; i < 0x60; i += sizeof(u32))
  265. rd_mem (dev, i);
  266. PRINTD (DBG_REGS, "reading doorb irqev irqen reset:");
  267. for (i = 0x60; i < 0x70; i += sizeof(u32))
  268. rd_mem (dev, i);
  269. }
  270. #else
  271. (void) dev;
  272. #endif
  273. return;
  274. }
  275. static inline void dump_loader_block (volatile loader_block * lb) {
  276. #ifdef DEBUG_AMBASSADOR
  277. unsigned int i;
  278. PRINTDB (DBG_LOAD, "lb @ %p; res: %d, cmd: %d, pay:",
  279. lb, be32_to_cpu (lb->result), be32_to_cpu (lb->command));
  280. for (i = 0; i < MAX_COMMAND_DATA; ++i)
  281. PRINTDM (DBG_LOAD, " %08x", be32_to_cpu (lb->payload.data[i]));
  282. PRINTDE (DBG_LOAD, ", vld: %08x", be32_to_cpu (lb->valid));
  283. #else
  284. (void) lb;
  285. #endif
  286. return;
  287. }
  288. static inline void dump_command (command * cmd) {
  289. #ifdef DEBUG_AMBASSADOR
  290. unsigned int i;
  291. PRINTDB (DBG_CMD, "cmd @ %p, req: %08x, pars:",
  292. cmd, /*be32_to_cpu*/ (cmd->request));
  293. for (i = 0; i < 3; ++i)
  294. PRINTDM (DBG_CMD, " %08x", /*be32_to_cpu*/ (cmd->args.par[i]));
  295. PRINTDE (DBG_CMD, "");
  296. #else
  297. (void) cmd;
  298. #endif
  299. return;
  300. }
  301. static inline void dump_skb (char * prefix, unsigned int vc, struct sk_buff * skb) {
  302. #ifdef DEBUG_AMBASSADOR
  303. unsigned int i;
  304. unsigned char * data = skb->data;
  305. PRINTDB (DBG_DATA, "%s(%u) ", prefix, vc);
  306. for (i=0; i<skb->len && i < 256;i++)
  307. PRINTDM (DBG_DATA, "%02x ", data[i]);
  308. PRINTDE (DBG_DATA,"");
  309. #else
  310. (void) prefix;
  311. (void) vc;
  312. (void) skb;
  313. #endif
  314. return;
  315. }
  316. /********** check memory areas for use by Ambassador **********/
  317. /* see limitations under Hardware Features */
  318. static int check_area (void * start, size_t length) {
  319. // assumes length > 0
  320. const u32 fourmegmask = -1 << 22;
  321. const u32 twofivesixmask = -1 << 8;
  322. const u32 starthole = 0xE0000000;
  323. u32 startaddress = virt_to_bus (start);
  324. u32 lastaddress = startaddress+length-1;
  325. if ((startaddress ^ lastaddress) & fourmegmask ||
  326. (startaddress & twofivesixmask) == starthole) {
  327. PRINTK (KERN_ERR, "check_area failure: [%x,%x] - mail maintainer!",
  328. startaddress, lastaddress);
  329. return -1;
  330. } else {
  331. return 0;
  332. }
  333. }
  334. /********** free an skb (as per ATM device driver documentation) **********/
  335. static void amb_kfree_skb (struct sk_buff * skb) {
  336. if (ATM_SKB(skb)->vcc->pop) {
  337. ATM_SKB(skb)->vcc->pop (ATM_SKB(skb)->vcc, skb);
  338. } else {
  339. dev_kfree_skb_any (skb);
  340. }
  341. }
  342. /********** TX completion **********/
  343. static void tx_complete (amb_dev * dev, tx_out * tx) {
  344. tx_simple * tx_descr = bus_to_virt (tx->handle);
  345. struct sk_buff * skb = tx_descr->skb;
  346. PRINTD (DBG_FLOW|DBG_TX, "tx_complete %p %p", dev, tx);
  347. // VC layer stats
  348. atomic_inc(&ATM_SKB(skb)->vcc->stats->tx);
  349. // free the descriptor
  350. kfree (tx_descr);
  351. // free the skb
  352. amb_kfree_skb (skb);
  353. dev->stats.tx_ok++;
  354. return;
  355. }
  356. /********** RX completion **********/
  357. static void rx_complete (amb_dev * dev, rx_out * rx) {
  358. struct sk_buff * skb = bus_to_virt (rx->handle);
  359. u16 vc = be16_to_cpu (rx->vc);
  360. // unused: u16 lec_id = be16_to_cpu (rx->lec_id);
  361. u16 status = be16_to_cpu (rx->status);
  362. u16 rx_len = be16_to_cpu (rx->length);
  363. PRINTD (DBG_FLOW|DBG_RX, "rx_complete %p %p (len=%hu)", dev, rx, rx_len);
  364. // XXX move this in and add to VC stats ???
  365. if (!status) {
  366. struct atm_vcc * atm_vcc = dev->rxer[vc];
  367. dev->stats.rx.ok++;
  368. if (atm_vcc) {
  369. if (rx_len <= atm_vcc->qos.rxtp.max_sdu) {
  370. if (atm_charge (atm_vcc, skb->truesize)) {
  371. // prepare socket buffer
  372. ATM_SKB(skb)->vcc = atm_vcc;
  373. skb_put (skb, rx_len);
  374. dump_skb ("<<<", vc, skb);
  375. // VC layer stats
  376. atomic_inc(&atm_vcc->stats->rx);
  377. __net_timestamp(skb);
  378. // end of our responsability
  379. atm_vcc->push (atm_vcc, skb);
  380. return;
  381. } else {
  382. // someone fix this (message), please!
  383. PRINTD (DBG_INFO|DBG_RX, "dropped thanks to atm_charge (vc %hu, truesize %u)", vc, skb->truesize);
  384. // drop stats incremented in atm_charge
  385. }
  386. } else {
  387. PRINTK (KERN_INFO, "dropped over-size frame");
  388. // should we count this?
  389. atomic_inc(&atm_vcc->stats->rx_drop);
  390. }
  391. } else {
  392. PRINTD (DBG_WARN|DBG_RX, "got frame but RX closed for channel %hu", vc);
  393. // this is an adapter bug, only in new version of microcode
  394. }
  395. } else {
  396. dev->stats.rx.error++;
  397. if (status & CRC_ERR)
  398. dev->stats.rx.badcrc++;
  399. if (status & LEN_ERR)
  400. dev->stats.rx.toolong++;
  401. if (status & ABORT_ERR)
  402. dev->stats.rx.aborted++;
  403. if (status & UNUSED_ERR)
  404. dev->stats.rx.unused++;
  405. }
  406. dev_kfree_skb_any (skb);
  407. return;
  408. }
  409. /*
  410. Note on queue handling.
  411. Here "give" and "take" refer to queue entries and a queue (pair)
  412. rather than frames to or from the host or adapter. Empty frame
  413. buffers are given to the RX queue pair and returned unused or
  414. containing RX frames. TX frames (well, pointers to TX fragment
  415. lists) are given to the TX queue pair, completions are returned.
  416. */
  417. /********** command queue **********/
  418. // I really don't like this, but it's the best I can do at the moment
  419. // also, the callers are responsible for byte order as the microcode
  420. // sometimes does 16-bit accesses (yuk yuk yuk)
  421. static int command_do (amb_dev * dev, command * cmd) {
  422. amb_cq * cq = &dev->cq;
  423. volatile amb_cq_ptrs * ptrs = &cq->ptrs;
  424. command * my_slot;
  425. PRINTD (DBG_FLOW|DBG_CMD, "command_do %p", dev);
  426. if (test_bit (dead, &dev->flags))
  427. return 0;
  428. spin_lock (&cq->lock);
  429. // if not full...
  430. if (cq->pending < cq->maximum) {
  431. // remember my slot for later
  432. my_slot = ptrs->in;
  433. PRINTD (DBG_CMD, "command in slot %p", my_slot);
  434. dump_command (cmd);
  435. // copy command in
  436. *ptrs->in = *cmd;
  437. cq->pending++;
  438. ptrs->in = NEXTQ (ptrs->in, ptrs->start, ptrs->limit);
  439. // mail the command
  440. wr_mem (dev, offsetof(amb_mem, mb.adapter.cmd_address), virt_to_bus (ptrs->in));
  441. if (cq->pending > cq->high)
  442. cq->high = cq->pending;
  443. spin_unlock (&cq->lock);
  444. // these comments were in a while-loop before, msleep removes the loop
  445. // go to sleep
  446. // PRINTD (DBG_CMD, "wait: sleeping %lu for command", timeout);
  447. msleep(cq->pending);
  448. // wait for my slot to be reached (all waiters are here or above, until...)
  449. while (ptrs->out != my_slot) {
  450. PRINTD (DBG_CMD, "wait: command slot (now at %p)", ptrs->out);
  451. set_current_state(TASK_UNINTERRUPTIBLE);
  452. schedule();
  453. }
  454. // wait on my slot (... one gets to its slot, and... )
  455. while (ptrs->out->request != cpu_to_be32 (SRB_COMPLETE)) {
  456. PRINTD (DBG_CMD, "wait: command slot completion");
  457. set_current_state(TASK_UNINTERRUPTIBLE);
  458. schedule();
  459. }
  460. PRINTD (DBG_CMD, "command complete");
  461. // update queue (... moves the queue along to the next slot)
  462. spin_lock (&cq->lock);
  463. cq->pending--;
  464. // copy command out
  465. *cmd = *ptrs->out;
  466. ptrs->out = NEXTQ (ptrs->out, ptrs->start, ptrs->limit);
  467. spin_unlock (&cq->lock);
  468. return 0;
  469. } else {
  470. cq->filled++;
  471. spin_unlock (&cq->lock);
  472. return -EAGAIN;
  473. }
  474. }
  475. /********** TX queue pair **********/
  476. static int tx_give (amb_dev * dev, tx_in * tx) {
  477. amb_txq * txq = &dev->txq;
  478. unsigned long flags;
  479. PRINTD (DBG_FLOW|DBG_TX, "tx_give %p", dev);
  480. if (test_bit (dead, &dev->flags))
  481. return 0;
  482. spin_lock_irqsave (&txq->lock, flags);
  483. if (txq->pending < txq->maximum) {
  484. PRINTD (DBG_TX, "TX in slot %p", txq->in.ptr);
  485. *txq->in.ptr = *tx;
  486. txq->pending++;
  487. txq->in.ptr = NEXTQ (txq->in.ptr, txq->in.start, txq->in.limit);
  488. // hand over the TX and ring the bell
  489. wr_mem (dev, offsetof(amb_mem, mb.adapter.tx_address), virt_to_bus (txq->in.ptr));
  490. wr_mem (dev, offsetof(amb_mem, doorbell), TX_FRAME);
  491. if (txq->pending > txq->high)
  492. txq->high = txq->pending;
  493. spin_unlock_irqrestore (&txq->lock, flags);
  494. return 0;
  495. } else {
  496. txq->filled++;
  497. spin_unlock_irqrestore (&txq->lock, flags);
  498. return -EAGAIN;
  499. }
  500. }
  501. static int tx_take (amb_dev * dev) {
  502. amb_txq * txq = &dev->txq;
  503. unsigned long flags;
  504. PRINTD (DBG_FLOW|DBG_TX, "tx_take %p", dev);
  505. spin_lock_irqsave (&txq->lock, flags);
  506. if (txq->pending && txq->out.ptr->handle) {
  507. // deal with TX completion
  508. tx_complete (dev, txq->out.ptr);
  509. // mark unused again
  510. txq->out.ptr->handle = 0;
  511. // remove item
  512. txq->pending--;
  513. txq->out.ptr = NEXTQ (txq->out.ptr, txq->out.start, txq->out.limit);
  514. spin_unlock_irqrestore (&txq->lock, flags);
  515. return 0;
  516. } else {
  517. spin_unlock_irqrestore (&txq->lock, flags);
  518. return -1;
  519. }
  520. }
  521. /********** RX queue pairs **********/
  522. static int rx_give (amb_dev * dev, rx_in * rx, unsigned char pool) {
  523. amb_rxq * rxq = &dev->rxq[pool];
  524. unsigned long flags;
  525. PRINTD (DBG_FLOW|DBG_RX, "rx_give %p[%hu]", dev, pool);
  526. spin_lock_irqsave (&rxq->lock, flags);
  527. if (rxq->pending < rxq->maximum) {
  528. PRINTD (DBG_RX, "RX in slot %p", rxq->in.ptr);
  529. *rxq->in.ptr = *rx;
  530. rxq->pending++;
  531. rxq->in.ptr = NEXTQ (rxq->in.ptr, rxq->in.start, rxq->in.limit);
  532. // hand over the RX buffer
  533. wr_mem (dev, offsetof(amb_mem, mb.adapter.rx_address[pool]), virt_to_bus (rxq->in.ptr));
  534. spin_unlock_irqrestore (&rxq->lock, flags);
  535. return 0;
  536. } else {
  537. spin_unlock_irqrestore (&rxq->lock, flags);
  538. return -1;
  539. }
  540. }
  541. static int rx_take (amb_dev * dev, unsigned char pool) {
  542. amb_rxq * rxq = &dev->rxq[pool];
  543. unsigned long flags;
  544. PRINTD (DBG_FLOW|DBG_RX, "rx_take %p[%hu]", dev, pool);
  545. spin_lock_irqsave (&rxq->lock, flags);
  546. if (rxq->pending && (rxq->out.ptr->status || rxq->out.ptr->length)) {
  547. // deal with RX completion
  548. rx_complete (dev, rxq->out.ptr);
  549. // mark unused again
  550. rxq->out.ptr->status = 0;
  551. rxq->out.ptr->length = 0;
  552. // remove item
  553. rxq->pending--;
  554. rxq->out.ptr = NEXTQ (rxq->out.ptr, rxq->out.start, rxq->out.limit);
  555. if (rxq->pending < rxq->low)
  556. rxq->low = rxq->pending;
  557. spin_unlock_irqrestore (&rxq->lock, flags);
  558. return 0;
  559. } else {
  560. if (!rxq->pending && rxq->buffers_wanted)
  561. rxq->emptied++;
  562. spin_unlock_irqrestore (&rxq->lock, flags);
  563. return -1;
  564. }
  565. }
  566. /********** RX Pool handling **********/
  567. /* pre: buffers_wanted = 0, post: pending = 0 */
  568. static void drain_rx_pool (amb_dev * dev, unsigned char pool) {
  569. amb_rxq * rxq = &dev->rxq[pool];
  570. PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pool %p %hu", dev, pool);
  571. if (test_bit (dead, &dev->flags))
  572. return;
  573. /* we are not quite like the fill pool routines as we cannot just
  574. remove one buffer, we have to remove all of them, but we might as
  575. well pretend... */
  576. if (rxq->pending > rxq->buffers_wanted) {
  577. command cmd;
  578. cmd.request = cpu_to_be32 (SRB_FLUSH_BUFFER_Q);
  579. cmd.args.flush.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
  580. while (command_do (dev, &cmd))
  581. schedule();
  582. /* the pool may also be emptied via the interrupt handler */
  583. while (rxq->pending > rxq->buffers_wanted)
  584. if (rx_take (dev, pool))
  585. schedule();
  586. }
  587. return;
  588. }
  589. static void drain_rx_pools (amb_dev * dev) {
  590. unsigned char pool;
  591. PRINTD (DBG_FLOW|DBG_POOL, "drain_rx_pools %p", dev);
  592. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  593. drain_rx_pool (dev, pool);
  594. }
  595. static void fill_rx_pool (amb_dev * dev, unsigned char pool,
  596. gfp_t priority)
  597. {
  598. rx_in rx;
  599. amb_rxq * rxq;
  600. PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pool %p %hu %x", dev, pool, priority);
  601. if (test_bit (dead, &dev->flags))
  602. return;
  603. rxq = &dev->rxq[pool];
  604. while (rxq->pending < rxq->maximum && rxq->pending < rxq->buffers_wanted) {
  605. struct sk_buff * skb = alloc_skb (rxq->buffer_size, priority);
  606. if (!skb) {
  607. PRINTD (DBG_SKB|DBG_POOL, "failed to allocate skb for RX pool %hu", pool);
  608. return;
  609. }
  610. if (check_area (skb->data, skb->truesize)) {
  611. dev_kfree_skb_any (skb);
  612. return;
  613. }
  614. // cast needed as there is no %? for pointer differences
  615. PRINTD (DBG_SKB, "allocated skb at %p, head %p, area %li",
  616. skb, skb->head, (long) (skb_end_pointer(skb) - skb->head));
  617. rx.handle = virt_to_bus (skb);
  618. rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
  619. if (rx_give (dev, &rx, pool))
  620. dev_kfree_skb_any (skb);
  621. }
  622. return;
  623. }
  624. // top up all RX pools (can also be called as a bottom half)
  625. static void fill_rx_pools (amb_dev * dev) {
  626. unsigned char pool;
  627. PRINTD (DBG_FLOW|DBG_POOL, "fill_rx_pools %p", dev);
  628. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  629. fill_rx_pool (dev, pool, GFP_ATOMIC);
  630. return;
  631. }
  632. /********** enable host interrupts **********/
  633. static void interrupts_on (amb_dev * dev) {
  634. wr_plain (dev, offsetof(amb_mem, interrupt_control),
  635. rd_plain (dev, offsetof(amb_mem, interrupt_control))
  636. | AMB_INTERRUPT_BITS);
  637. }
  638. /********** disable host interrupts **********/
  639. static void interrupts_off (amb_dev * dev) {
  640. wr_plain (dev, offsetof(amb_mem, interrupt_control),
  641. rd_plain (dev, offsetof(amb_mem, interrupt_control))
  642. &~ AMB_INTERRUPT_BITS);
  643. }
  644. /********** interrupt handling **********/
  645. static irqreturn_t interrupt_handler(int irq, void *dev_id) {
  646. amb_dev * dev = dev_id;
  647. PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler: %p", dev_id);
  648. {
  649. u32 interrupt = rd_plain (dev, offsetof(amb_mem, interrupt));
  650. // for us or someone else sharing the same interrupt
  651. if (!interrupt) {
  652. PRINTD (DBG_IRQ, "irq not for me: %d", irq);
  653. return IRQ_NONE;
  654. }
  655. // definitely for us
  656. PRINTD (DBG_IRQ, "FYI: interrupt was %08x", interrupt);
  657. wr_plain (dev, offsetof(amb_mem, interrupt), -1);
  658. }
  659. {
  660. unsigned int irq_work = 0;
  661. unsigned char pool;
  662. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  663. while (!rx_take (dev, pool))
  664. ++irq_work;
  665. while (!tx_take (dev))
  666. ++irq_work;
  667. if (irq_work) {
  668. #ifdef FILL_RX_POOLS_IN_BH
  669. schedule_work (&dev->bh);
  670. #else
  671. fill_rx_pools (dev);
  672. #endif
  673. PRINTD (DBG_IRQ, "work done: %u", irq_work);
  674. } else {
  675. PRINTD (DBG_IRQ|DBG_WARN, "no work done");
  676. }
  677. }
  678. PRINTD (DBG_IRQ|DBG_FLOW, "interrupt_handler done: %p", dev_id);
  679. return IRQ_HANDLED;
  680. }
  681. /********** make rate (not quite as much fun as Horizon) **********/
  682. static int make_rate (unsigned int rate, rounding r,
  683. u16 * bits, unsigned int * actual) {
  684. unsigned char exp = -1; // hush gcc
  685. unsigned int man = -1; // hush gcc
  686. PRINTD (DBG_FLOW|DBG_QOS, "make_rate %u", rate);
  687. // rates in cells per second, ITU format (nasty 16-bit floating-point)
  688. // given 5-bit e and 9-bit m:
  689. // rate = EITHER (1+m/2^9)*2^e OR 0
  690. // bits = EITHER 1<<14 | e<<9 | m OR 0
  691. // (bit 15 is "reserved", bit 14 "non-zero")
  692. // smallest rate is 0 (special representation)
  693. // largest rate is (1+511/512)*2^31 = 4290772992 (< 2^32-1)
  694. // smallest non-zero rate is (1+0/512)*2^0 = 1 (> 0)
  695. // simple algorithm:
  696. // find position of top bit, this gives e
  697. // remove top bit and shift (rounding if feeling clever) by 9-e
  698. // ucode bug: please don't set bit 14! so 0 rate not representable
  699. if (rate > 0xffc00000U) {
  700. // larger than largest representable rate
  701. if (r == round_up) {
  702. return -EINVAL;
  703. } else {
  704. exp = 31;
  705. man = 511;
  706. }
  707. } else if (rate) {
  708. // representable rate
  709. exp = 31;
  710. man = rate;
  711. // invariant: rate = man*2^(exp-31)
  712. while (!(man & (1<<31))) {
  713. exp = exp - 1;
  714. man = man<<1;
  715. }
  716. // man has top bit set
  717. // rate = (2^31+(man-2^31))*2^(exp-31)
  718. // rate = (1+(man-2^31)/2^31)*2^exp
  719. man = man<<1;
  720. man &= 0xffffffffU; // a nop on 32-bit systems
  721. // rate = (1+man/2^32)*2^exp
  722. // exp is in the range 0 to 31, man is in the range 0 to 2^32-1
  723. // time to lose significance... we want m in the range 0 to 2^9-1
  724. // rounding presents a minor problem... we first decide which way
  725. // we are rounding (based on given rounding direction and possibly
  726. // the bits of the mantissa that are to be discarded).
  727. switch (r) {
  728. case round_down: {
  729. // just truncate
  730. man = man>>(32-9);
  731. break;
  732. }
  733. case round_up: {
  734. // check all bits that we are discarding
  735. if (man & (~0U>>9)) {
  736. man = (man>>(32-9)) + 1;
  737. if (man == (1<<9)) {
  738. // no need to check for round up outside of range
  739. man = 0;
  740. exp += 1;
  741. }
  742. } else {
  743. man = (man>>(32-9));
  744. }
  745. break;
  746. }
  747. case round_nearest: {
  748. // check msb that we are discarding
  749. if (man & (1<<(32-9-1))) {
  750. man = (man>>(32-9)) + 1;
  751. if (man == (1<<9)) {
  752. // no need to check for round up outside of range
  753. man = 0;
  754. exp += 1;
  755. }
  756. } else {
  757. man = (man>>(32-9));
  758. }
  759. break;
  760. }
  761. }
  762. } else {
  763. // zero rate - not representable
  764. if (r == round_down) {
  765. return -EINVAL;
  766. } else {
  767. exp = 0;
  768. man = 0;
  769. }
  770. }
  771. PRINTD (DBG_QOS, "rate: man=%u, exp=%hu", man, exp);
  772. if (bits)
  773. *bits = /* (1<<14) | */ (exp<<9) | man;
  774. if (actual)
  775. *actual = (exp >= 9)
  776. ? (1 << exp) + (man << (exp-9))
  777. : (1 << exp) + ((man + (1<<(9-exp-1))) >> (9-exp));
  778. return 0;
  779. }
  780. /********** Linux ATM Operations **********/
  781. // some are not yet implemented while others do not make sense for
  782. // this device
  783. /********** Open a VC **********/
  784. static int amb_open (struct atm_vcc * atm_vcc)
  785. {
  786. int error;
  787. struct atm_qos * qos;
  788. struct atm_trafprm * txtp;
  789. struct atm_trafprm * rxtp;
  790. u16 tx_rate_bits = -1; // hush gcc
  791. u16 tx_vc_bits = -1; // hush gcc
  792. u16 tx_frame_bits = -1; // hush gcc
  793. amb_dev * dev = AMB_DEV(atm_vcc->dev);
  794. amb_vcc * vcc;
  795. unsigned char pool = -1; // hush gcc
  796. short vpi = atm_vcc->vpi;
  797. int vci = atm_vcc->vci;
  798. PRINTD (DBG_FLOW|DBG_VCC, "amb_open %x %x", vpi, vci);
  799. #ifdef ATM_VPI_UNSPEC
  800. // UNSPEC is deprecated, remove this code eventually
  801. if (vpi == ATM_VPI_UNSPEC || vci == ATM_VCI_UNSPEC) {
  802. PRINTK (KERN_WARNING, "rejecting open with unspecified VPI/VCI (deprecated)");
  803. return -EINVAL;
  804. }
  805. #endif
  806. if (!(0 <= vpi && vpi < (1<<NUM_VPI_BITS) &&
  807. 0 <= vci && vci < (1<<NUM_VCI_BITS))) {
  808. PRINTD (DBG_WARN|DBG_VCC, "VPI/VCI out of range: %hd/%d", vpi, vci);
  809. return -EINVAL;
  810. }
  811. qos = &atm_vcc->qos;
  812. if (qos->aal != ATM_AAL5) {
  813. PRINTD (DBG_QOS, "AAL not supported");
  814. return -EINVAL;
  815. }
  816. // traffic parameters
  817. PRINTD (DBG_QOS, "TX:");
  818. txtp = &qos->txtp;
  819. if (txtp->traffic_class != ATM_NONE) {
  820. switch (txtp->traffic_class) {
  821. case ATM_UBR: {
  822. // we take "the PCR" as a rate-cap
  823. int pcr = atm_pcr_goal (txtp);
  824. if (!pcr) {
  825. // no rate cap
  826. tx_rate_bits = 0;
  827. tx_vc_bits = TX_UBR;
  828. tx_frame_bits = TX_FRAME_NOTCAP;
  829. } else {
  830. rounding r;
  831. if (pcr < 0) {
  832. r = round_down;
  833. pcr = -pcr;
  834. } else {
  835. r = round_up;
  836. }
  837. error = make_rate (pcr, r, &tx_rate_bits, NULL);
  838. if (error)
  839. return error;
  840. tx_vc_bits = TX_UBR_CAPPED;
  841. tx_frame_bits = TX_FRAME_CAPPED;
  842. }
  843. break;
  844. }
  845. #if 0
  846. case ATM_ABR: {
  847. pcr = atm_pcr_goal (txtp);
  848. PRINTD (DBG_QOS, "pcr goal = %d", pcr);
  849. break;
  850. }
  851. #endif
  852. default: {
  853. // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
  854. PRINTD (DBG_QOS, "request for non-UBR denied");
  855. return -EINVAL;
  856. }
  857. }
  858. PRINTD (DBG_QOS, "tx_rate_bits=%hx, tx_vc_bits=%hx",
  859. tx_rate_bits, tx_vc_bits);
  860. }
  861. PRINTD (DBG_QOS, "RX:");
  862. rxtp = &qos->rxtp;
  863. if (rxtp->traffic_class == ATM_NONE) {
  864. // do nothing
  865. } else {
  866. // choose an RX pool (arranged in increasing size)
  867. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  868. if ((unsigned int) rxtp->max_sdu <= dev->rxq[pool].buffer_size) {
  869. PRINTD (DBG_VCC|DBG_QOS|DBG_POOL, "chose pool %hu (max_sdu %u <= %u)",
  870. pool, rxtp->max_sdu, dev->rxq[pool].buffer_size);
  871. break;
  872. }
  873. if (pool == NUM_RX_POOLS) {
  874. PRINTD (DBG_WARN|DBG_VCC|DBG_QOS|DBG_POOL,
  875. "no pool suitable for VC (RX max_sdu %d is too large)",
  876. rxtp->max_sdu);
  877. return -EINVAL;
  878. }
  879. switch (rxtp->traffic_class) {
  880. case ATM_UBR: {
  881. break;
  882. }
  883. #if 0
  884. case ATM_ABR: {
  885. pcr = atm_pcr_goal (rxtp);
  886. PRINTD (DBG_QOS, "pcr goal = %d", pcr);
  887. break;
  888. }
  889. #endif
  890. default: {
  891. // PRINTD (DBG_QOS, "request for non-UBR/ABR denied");
  892. PRINTD (DBG_QOS, "request for non-UBR denied");
  893. return -EINVAL;
  894. }
  895. }
  896. }
  897. // get space for our vcc stuff
  898. vcc = kmalloc (sizeof(amb_vcc), GFP_KERNEL);
  899. if (!vcc) {
  900. PRINTK (KERN_ERR, "out of memory!");
  901. return -ENOMEM;
  902. }
  903. atm_vcc->dev_data = (void *) vcc;
  904. // no failures beyond this point
  905. // we are not really "immediately before allocating the connection
  906. // identifier in hardware", but it will just have to do!
  907. set_bit(ATM_VF_ADDR,&atm_vcc->flags);
  908. if (txtp->traffic_class != ATM_NONE) {
  909. command cmd;
  910. vcc->tx_frame_bits = tx_frame_bits;
  911. mutex_lock(&dev->vcc_sf);
  912. if (dev->rxer[vci]) {
  913. // RXer on the channel already, just modify rate...
  914. cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
  915. cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
  916. cmd.args.modify_rate.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
  917. while (command_do (dev, &cmd))
  918. schedule();
  919. // ... and TX flags, preserving the RX pool
  920. cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
  921. cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
  922. cmd.args.modify_flags.flags = cpu_to_be32
  923. ( (AMB_VCC(dev->rxer[vci])->rx_info.pool << SRB_POOL_SHIFT)
  924. | (tx_vc_bits << SRB_FLAGS_SHIFT) );
  925. while (command_do (dev, &cmd))
  926. schedule();
  927. } else {
  928. // no RXer on the channel, just open (with pool zero)
  929. cmd.request = cpu_to_be32 (SRB_OPEN_VC);
  930. cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
  931. cmd.args.open.flags = cpu_to_be32 (tx_vc_bits << SRB_FLAGS_SHIFT);
  932. cmd.args.open.rate = cpu_to_be32 (tx_rate_bits << SRB_RATE_SHIFT);
  933. while (command_do (dev, &cmd))
  934. schedule();
  935. }
  936. dev->txer[vci].tx_present = 1;
  937. mutex_unlock(&dev->vcc_sf);
  938. }
  939. if (rxtp->traffic_class != ATM_NONE) {
  940. command cmd;
  941. vcc->rx_info.pool = pool;
  942. mutex_lock(&dev->vcc_sf);
  943. /* grow RX buffer pool */
  944. if (!dev->rxq[pool].buffers_wanted)
  945. dev->rxq[pool].buffers_wanted = rx_lats;
  946. dev->rxq[pool].buffers_wanted += 1;
  947. fill_rx_pool (dev, pool, GFP_KERNEL);
  948. if (dev->txer[vci].tx_present) {
  949. // TXer on the channel already
  950. // switch (from pool zero) to this pool, preserving the TX bits
  951. cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
  952. cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
  953. cmd.args.modify_flags.flags = cpu_to_be32
  954. ( (pool << SRB_POOL_SHIFT)
  955. | (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT) );
  956. } else {
  957. // no TXer on the channel, open the VC (with no rate info)
  958. cmd.request = cpu_to_be32 (SRB_OPEN_VC);
  959. cmd.args.open.vc = cpu_to_be32 (vci); // vpi 0
  960. cmd.args.open.flags = cpu_to_be32 (pool << SRB_POOL_SHIFT);
  961. cmd.args.open.rate = cpu_to_be32 (0);
  962. }
  963. while (command_do (dev, &cmd))
  964. schedule();
  965. // this link allows RX frames through
  966. dev->rxer[vci] = atm_vcc;
  967. mutex_unlock(&dev->vcc_sf);
  968. }
  969. // indicate readiness
  970. set_bit(ATM_VF_READY,&atm_vcc->flags);
  971. return 0;
  972. }
  973. /********** Close a VC **********/
  974. static void amb_close (struct atm_vcc * atm_vcc) {
  975. amb_dev * dev = AMB_DEV (atm_vcc->dev);
  976. amb_vcc * vcc = AMB_VCC (atm_vcc);
  977. u16 vci = atm_vcc->vci;
  978. PRINTD (DBG_VCC|DBG_FLOW, "amb_close");
  979. // indicate unreadiness
  980. clear_bit(ATM_VF_READY,&atm_vcc->flags);
  981. // disable TXing
  982. if (atm_vcc->qos.txtp.traffic_class != ATM_NONE) {
  983. command cmd;
  984. mutex_lock(&dev->vcc_sf);
  985. if (dev->rxer[vci]) {
  986. // RXer still on the channel, just modify rate... XXX not really needed
  987. cmd.request = cpu_to_be32 (SRB_MODIFY_VC_RATE);
  988. cmd.args.modify_rate.vc = cpu_to_be32 (vci); // vpi 0
  989. cmd.args.modify_rate.rate = cpu_to_be32 (0);
  990. // ... and clear TX rate flags (XXX to stop RM cell output?), preserving RX pool
  991. } else {
  992. // no RXer on the channel, close channel
  993. cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
  994. cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
  995. }
  996. dev->txer[vci].tx_present = 0;
  997. while (command_do (dev, &cmd))
  998. schedule();
  999. mutex_unlock(&dev->vcc_sf);
  1000. }
  1001. // disable RXing
  1002. if (atm_vcc->qos.rxtp.traffic_class != ATM_NONE) {
  1003. command cmd;
  1004. // this is (the?) one reason why we need the amb_vcc struct
  1005. unsigned char pool = vcc->rx_info.pool;
  1006. mutex_lock(&dev->vcc_sf);
  1007. if (dev->txer[vci].tx_present) {
  1008. // TXer still on the channel, just go to pool zero XXX not really needed
  1009. cmd.request = cpu_to_be32 (SRB_MODIFY_VC_FLAGS);
  1010. cmd.args.modify_flags.vc = cpu_to_be32 (vci); // vpi 0
  1011. cmd.args.modify_flags.flags = cpu_to_be32
  1012. (dev->txer[vci].tx_vc_bits << SRB_FLAGS_SHIFT);
  1013. } else {
  1014. // no TXer on the channel, close the VC
  1015. cmd.request = cpu_to_be32 (SRB_CLOSE_VC);
  1016. cmd.args.close.vc = cpu_to_be32 (vci); // vpi 0
  1017. }
  1018. // forget the rxer - no more skbs will be pushed
  1019. if (atm_vcc != dev->rxer[vci])
  1020. PRINTK (KERN_ERR, "%s vcc=%p rxer[vci]=%p",
  1021. "arghhh! we're going to die!",
  1022. vcc, dev->rxer[vci]);
  1023. dev->rxer[vci] = NULL;
  1024. while (command_do (dev, &cmd))
  1025. schedule();
  1026. /* shrink RX buffer pool */
  1027. dev->rxq[pool].buffers_wanted -= 1;
  1028. if (dev->rxq[pool].buffers_wanted == rx_lats) {
  1029. dev->rxq[pool].buffers_wanted = 0;
  1030. drain_rx_pool (dev, pool);
  1031. }
  1032. mutex_unlock(&dev->vcc_sf);
  1033. }
  1034. // free our structure
  1035. kfree (vcc);
  1036. // say the VPI/VCI is free again
  1037. clear_bit(ATM_VF_ADDR,&atm_vcc->flags);
  1038. return;
  1039. }
  1040. /********** Set socket options for a VC **********/
  1041. // int amb_getsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
  1042. /********** Set socket options for a VC **********/
  1043. // int amb_setsockopt (struct atm_vcc * atm_vcc, int level, int optname, void * optval, int optlen);
  1044. /********** Send **********/
  1045. static int amb_send (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
  1046. amb_dev * dev = AMB_DEV(atm_vcc->dev);
  1047. amb_vcc * vcc = AMB_VCC(atm_vcc);
  1048. u16 vc = atm_vcc->vci;
  1049. unsigned int tx_len = skb->len;
  1050. unsigned char * tx_data = skb->data;
  1051. tx_simple * tx_descr;
  1052. tx_in tx;
  1053. if (test_bit (dead, &dev->flags))
  1054. return -EIO;
  1055. PRINTD (DBG_FLOW|DBG_TX, "amb_send vc %x data %p len %u",
  1056. vc, tx_data, tx_len);
  1057. dump_skb (">>>", vc, skb);
  1058. if (!dev->txer[vc].tx_present) {
  1059. PRINTK (KERN_ERR, "attempt to send on RX-only VC %x", vc);
  1060. return -EBADFD;
  1061. }
  1062. // this is a driver private field so we have to set it ourselves,
  1063. // despite the fact that we are _required_ to use it to check for a
  1064. // pop function
  1065. ATM_SKB(skb)->vcc = atm_vcc;
  1066. if (skb->len > (size_t) atm_vcc->qos.txtp.max_sdu) {
  1067. PRINTK (KERN_ERR, "sk_buff length greater than agreed max_sdu, dropping...");
  1068. return -EIO;
  1069. }
  1070. if (check_area (skb->data, skb->len)) {
  1071. atomic_inc(&atm_vcc->stats->tx_err);
  1072. return -ENOMEM; // ?
  1073. }
  1074. // allocate memory for fragments
  1075. tx_descr = kmalloc (sizeof(tx_simple), GFP_KERNEL);
  1076. if (!tx_descr) {
  1077. PRINTK (KERN_ERR, "could not allocate TX descriptor");
  1078. return -ENOMEM;
  1079. }
  1080. if (check_area (tx_descr, sizeof(tx_simple))) {
  1081. kfree (tx_descr);
  1082. return -ENOMEM;
  1083. }
  1084. PRINTD (DBG_TX, "fragment list allocated at %p", tx_descr);
  1085. tx_descr->skb = skb;
  1086. tx_descr->tx_frag.bytes = cpu_to_be32 (tx_len);
  1087. tx_descr->tx_frag.address = cpu_to_be32 (virt_to_bus (tx_data));
  1088. tx_descr->tx_frag_end.handle = virt_to_bus (tx_descr);
  1089. tx_descr->tx_frag_end.vc = 0;
  1090. tx_descr->tx_frag_end.next_descriptor_length = 0;
  1091. tx_descr->tx_frag_end.next_descriptor = 0;
  1092. #ifdef AMB_NEW_MICROCODE
  1093. tx_descr->tx_frag_end.cpcs_uu = 0;
  1094. tx_descr->tx_frag_end.cpi = 0;
  1095. tx_descr->tx_frag_end.pad = 0;
  1096. #endif
  1097. tx.vc = cpu_to_be16 (vcc->tx_frame_bits | vc);
  1098. tx.tx_descr_length = cpu_to_be16 (sizeof(tx_frag)+sizeof(tx_frag_end));
  1099. tx.tx_descr_addr = cpu_to_be32 (virt_to_bus (&tx_descr->tx_frag));
  1100. while (tx_give (dev, &tx))
  1101. schedule();
  1102. return 0;
  1103. }
  1104. /********** Change QoS on a VC **********/
  1105. // int amb_change_qos (struct atm_vcc * atm_vcc, struct atm_qos * qos, int flags);
  1106. /********** Free RX Socket Buffer **********/
  1107. #if 0
  1108. static void amb_free_rx_skb (struct atm_vcc * atm_vcc, struct sk_buff * skb) {
  1109. amb_dev * dev = AMB_DEV (atm_vcc->dev);
  1110. amb_vcc * vcc = AMB_VCC (atm_vcc);
  1111. unsigned char pool = vcc->rx_info.pool;
  1112. rx_in rx;
  1113. // This may be unsafe for various reasons that I cannot really guess
  1114. // at. However, I note that the ATM layer calls kfree_skb rather
  1115. // than dev_kfree_skb at this point so we are least covered as far
  1116. // as buffer locking goes. There may be bugs if pcap clones RX skbs.
  1117. PRINTD (DBG_FLOW|DBG_SKB, "amb_rx_free skb %p (atm_vcc %p, vcc %p)",
  1118. skb, atm_vcc, vcc);
  1119. rx.handle = virt_to_bus (skb);
  1120. rx.host_address = cpu_to_be32 (virt_to_bus (skb->data));
  1121. skb->data = skb->head;
  1122. skb->tail = skb->head;
  1123. skb->len = 0;
  1124. if (!rx_give (dev, &rx, pool)) {
  1125. // success
  1126. PRINTD (DBG_SKB|DBG_POOL, "recycled skb for pool %hu", pool);
  1127. return;
  1128. }
  1129. // just do what the ATM layer would have done
  1130. dev_kfree_skb_any (skb);
  1131. return;
  1132. }
  1133. #endif
  1134. /********** Proc File Output **********/
  1135. static int amb_proc_read (struct atm_dev * atm_dev, loff_t * pos, char * page) {
  1136. amb_dev * dev = AMB_DEV (atm_dev);
  1137. int left = *pos;
  1138. unsigned char pool;
  1139. PRINTD (DBG_FLOW, "amb_proc_read");
  1140. /* more diagnostics here? */
  1141. if (!left--) {
  1142. amb_stats * s = &dev->stats;
  1143. return sprintf (page,
  1144. "frames: TX OK %lu, RX OK %lu, RX bad %lu "
  1145. "(CRC %lu, long %lu, aborted %lu, unused %lu).\n",
  1146. s->tx_ok, s->rx.ok, s->rx.error,
  1147. s->rx.badcrc, s->rx.toolong,
  1148. s->rx.aborted, s->rx.unused);
  1149. }
  1150. if (!left--) {
  1151. amb_cq * c = &dev->cq;
  1152. return sprintf (page, "cmd queue [cur/hi/max]: %u/%u/%u. ",
  1153. c->pending, c->high, c->maximum);
  1154. }
  1155. if (!left--) {
  1156. amb_txq * t = &dev->txq;
  1157. return sprintf (page, "TX queue [cur/max high full]: %u/%u %u %u.\n",
  1158. t->pending, t->maximum, t->high, t->filled);
  1159. }
  1160. if (!left--) {
  1161. unsigned int count = sprintf (page, "RX queues [cur/max/req low empty]:");
  1162. for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
  1163. amb_rxq * r = &dev->rxq[pool];
  1164. count += sprintf (page+count, " %u/%u/%u %u %u",
  1165. r->pending, r->maximum, r->buffers_wanted, r->low, r->emptied);
  1166. }
  1167. count += sprintf (page+count, ".\n");
  1168. return count;
  1169. }
  1170. if (!left--) {
  1171. unsigned int count = sprintf (page, "RX buffer sizes:");
  1172. for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
  1173. amb_rxq * r = &dev->rxq[pool];
  1174. count += sprintf (page+count, " %u", r->buffer_size);
  1175. }
  1176. count += sprintf (page+count, ".\n");
  1177. return count;
  1178. }
  1179. #if 0
  1180. if (!left--) {
  1181. // suni block etc?
  1182. }
  1183. #endif
  1184. return 0;
  1185. }
  1186. /********** Operation Structure **********/
  1187. static const struct atmdev_ops amb_ops = {
  1188. .open = amb_open,
  1189. .close = amb_close,
  1190. .send = amb_send,
  1191. .proc_read = amb_proc_read,
  1192. .owner = THIS_MODULE,
  1193. };
  1194. /********** housekeeping **********/
  1195. static void do_housekeeping (unsigned long arg) {
  1196. amb_dev * dev = (amb_dev *) arg;
  1197. // could collect device-specific (not driver/atm-linux) stats here
  1198. // last resort refill once every ten seconds
  1199. fill_rx_pools (dev);
  1200. mod_timer(&dev->housekeeping, jiffies + 10*HZ);
  1201. return;
  1202. }
  1203. /********** creation of communication queues **********/
  1204. static int __devinit create_queues (amb_dev * dev, unsigned int cmds,
  1205. unsigned int txs, unsigned int * rxs,
  1206. unsigned int * rx_buffer_sizes) {
  1207. unsigned char pool;
  1208. size_t total = 0;
  1209. void * memory;
  1210. void * limit;
  1211. PRINTD (DBG_FLOW, "create_queues %p", dev);
  1212. total += cmds * sizeof(command);
  1213. total += txs * (sizeof(tx_in) + sizeof(tx_out));
  1214. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  1215. total += rxs[pool] * (sizeof(rx_in) + sizeof(rx_out));
  1216. memory = kmalloc (total, GFP_KERNEL);
  1217. if (!memory) {
  1218. PRINTK (KERN_ERR, "could not allocate queues");
  1219. return -ENOMEM;
  1220. }
  1221. if (check_area (memory, total)) {
  1222. PRINTK (KERN_ERR, "queues allocated in nasty area");
  1223. kfree (memory);
  1224. return -ENOMEM;
  1225. }
  1226. limit = memory + total;
  1227. PRINTD (DBG_INIT, "queues from %p to %p", memory, limit);
  1228. PRINTD (DBG_CMD, "command queue at %p", memory);
  1229. {
  1230. command * cmd = memory;
  1231. amb_cq * cq = &dev->cq;
  1232. cq->pending = 0;
  1233. cq->high = 0;
  1234. cq->maximum = cmds - 1;
  1235. cq->ptrs.start = cmd;
  1236. cq->ptrs.in = cmd;
  1237. cq->ptrs.out = cmd;
  1238. cq->ptrs.limit = cmd + cmds;
  1239. memory = cq->ptrs.limit;
  1240. }
  1241. PRINTD (DBG_TX, "TX queue pair at %p", memory);
  1242. {
  1243. tx_in * in = memory;
  1244. tx_out * out;
  1245. amb_txq * txq = &dev->txq;
  1246. txq->pending = 0;
  1247. txq->high = 0;
  1248. txq->filled = 0;
  1249. txq->maximum = txs - 1;
  1250. txq->in.start = in;
  1251. txq->in.ptr = in;
  1252. txq->in.limit = in + txs;
  1253. memory = txq->in.limit;
  1254. out = memory;
  1255. txq->out.start = out;
  1256. txq->out.ptr = out;
  1257. txq->out.limit = out + txs;
  1258. memory = txq->out.limit;
  1259. }
  1260. PRINTD (DBG_RX, "RX queue pairs at %p", memory);
  1261. for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
  1262. rx_in * in = memory;
  1263. rx_out * out;
  1264. amb_rxq * rxq = &dev->rxq[pool];
  1265. rxq->buffer_size = rx_buffer_sizes[pool];
  1266. rxq->buffers_wanted = 0;
  1267. rxq->pending = 0;
  1268. rxq->low = rxs[pool] - 1;
  1269. rxq->emptied = 0;
  1270. rxq->maximum = rxs[pool] - 1;
  1271. rxq->in.start = in;
  1272. rxq->in.ptr = in;
  1273. rxq->in.limit = in + rxs[pool];
  1274. memory = rxq->in.limit;
  1275. out = memory;
  1276. rxq->out.start = out;
  1277. rxq->out.ptr = out;
  1278. rxq->out.limit = out + rxs[pool];
  1279. memory = rxq->out.limit;
  1280. }
  1281. if (memory == limit) {
  1282. return 0;
  1283. } else {
  1284. PRINTK (KERN_ERR, "bad queue alloc %p != %p (tell maintainer)", memory, limit);
  1285. kfree (limit - total);
  1286. return -ENOMEM;
  1287. }
  1288. }
  1289. /********** destruction of communication queues **********/
  1290. static void destroy_queues (amb_dev * dev) {
  1291. // all queues assumed empty
  1292. void * memory = dev->cq.ptrs.start;
  1293. // includes txq.in, txq.out, rxq[].in and rxq[].out
  1294. PRINTD (DBG_FLOW, "destroy_queues %p", dev);
  1295. PRINTD (DBG_INIT, "freeing queues at %p", memory);
  1296. kfree (memory);
  1297. return;
  1298. }
  1299. /********** basic loader commands and error handling **********/
  1300. // centisecond timeouts - guessing away here
  1301. static unsigned int command_timeouts [] = {
  1302. [host_memory_test] = 15,
  1303. [read_adapter_memory] = 2,
  1304. [write_adapter_memory] = 2,
  1305. [adapter_start] = 50,
  1306. [get_version_number] = 10,
  1307. [interrupt_host] = 1,
  1308. [flash_erase_sector] = 1,
  1309. [adap_download_block] = 1,
  1310. [adap_erase_flash] = 1,
  1311. [adap_run_in_iram] = 1,
  1312. [adap_end_download] = 1
  1313. };
  1314. static unsigned int command_successes [] = {
  1315. [host_memory_test] = COMMAND_PASSED_TEST,
  1316. [read_adapter_memory] = COMMAND_READ_DATA_OK,
  1317. [write_adapter_memory] = COMMAND_WRITE_DATA_OK,
  1318. [adapter_start] = COMMAND_COMPLETE,
  1319. [get_version_number] = COMMAND_COMPLETE,
  1320. [interrupt_host] = COMMAND_COMPLETE,
  1321. [flash_erase_sector] = COMMAND_COMPLETE,
  1322. [adap_download_block] = COMMAND_COMPLETE,
  1323. [adap_erase_flash] = COMMAND_COMPLETE,
  1324. [adap_run_in_iram] = COMMAND_COMPLETE,
  1325. [adap_end_download] = COMMAND_COMPLETE
  1326. };
  1327. static int decode_loader_result (loader_command cmd, u32 result)
  1328. {
  1329. int res;
  1330. const char *msg;
  1331. if (result == command_successes[cmd])
  1332. return 0;
  1333. switch (result) {
  1334. case BAD_COMMAND:
  1335. res = -EINVAL;
  1336. msg = "bad command";
  1337. break;
  1338. case COMMAND_IN_PROGRESS:
  1339. res = -ETIMEDOUT;
  1340. msg = "command in progress";
  1341. break;
  1342. case COMMAND_PASSED_TEST:
  1343. res = 0;
  1344. msg = "command passed test";
  1345. break;
  1346. case COMMAND_FAILED_TEST:
  1347. res = -EIO;
  1348. msg = "command failed test";
  1349. break;
  1350. case COMMAND_READ_DATA_OK:
  1351. res = 0;
  1352. msg = "command read data ok";
  1353. break;
  1354. case COMMAND_READ_BAD_ADDRESS:
  1355. res = -EINVAL;
  1356. msg = "command read bad address";
  1357. break;
  1358. case COMMAND_WRITE_DATA_OK:
  1359. res = 0;
  1360. msg = "command write data ok";
  1361. break;
  1362. case COMMAND_WRITE_BAD_ADDRESS:
  1363. res = -EINVAL;
  1364. msg = "command write bad address";
  1365. break;
  1366. case COMMAND_WRITE_FLASH_FAILURE:
  1367. res = -EIO;
  1368. msg = "command write flash failure";
  1369. break;
  1370. case COMMAND_COMPLETE:
  1371. res = 0;
  1372. msg = "command complete";
  1373. break;
  1374. case COMMAND_FLASH_ERASE_FAILURE:
  1375. res = -EIO;
  1376. msg = "command flash erase failure";
  1377. break;
  1378. case COMMAND_WRITE_BAD_DATA:
  1379. res = -EINVAL;
  1380. msg = "command write bad data";
  1381. break;
  1382. default:
  1383. res = -EINVAL;
  1384. msg = "unknown error";
  1385. PRINTD (DBG_LOAD|DBG_ERR,
  1386. "decode_loader_result got %d=%x !",
  1387. result, result);
  1388. break;
  1389. }
  1390. PRINTK (KERN_ERR, "%s", msg);
  1391. return res;
  1392. }
  1393. static int __devinit do_loader_command (volatile loader_block * lb,
  1394. const amb_dev * dev, loader_command cmd) {
  1395. unsigned long timeout;
  1396. PRINTD (DBG_FLOW|DBG_LOAD, "do_loader_command");
  1397. /* do a command
  1398. Set the return value to zero, set the command type and set the
  1399. valid entry to the right magic value. The payload is already
  1400. correctly byte-ordered so we leave it alone. Hit the doorbell
  1401. with the bus address of this structure.
  1402. */
  1403. lb->result = 0;
  1404. lb->command = cpu_to_be32 (cmd);
  1405. lb->valid = cpu_to_be32 (DMA_VALID);
  1406. // dump_registers (dev);
  1407. // dump_loader_block (lb);
  1408. wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (lb) & ~onegigmask);
  1409. timeout = command_timeouts[cmd] * 10;
  1410. while (!lb->result || lb->result == cpu_to_be32 (COMMAND_IN_PROGRESS))
  1411. if (timeout) {
  1412. timeout = msleep_interruptible(timeout);
  1413. } else {
  1414. PRINTD (DBG_LOAD|DBG_ERR, "command %d timed out", cmd);
  1415. dump_registers (dev);
  1416. dump_loader_block (lb);
  1417. return -ETIMEDOUT;
  1418. }
  1419. if (cmd == adapter_start) {
  1420. // wait for start command to acknowledge...
  1421. timeout = 100;
  1422. while (rd_plain (dev, offsetof(amb_mem, doorbell)))
  1423. if (timeout) {
  1424. timeout = msleep_interruptible(timeout);
  1425. } else {
  1426. PRINTD (DBG_LOAD|DBG_ERR, "start command did not clear doorbell, res=%08x",
  1427. be32_to_cpu (lb->result));
  1428. dump_registers (dev);
  1429. return -ETIMEDOUT;
  1430. }
  1431. return 0;
  1432. } else {
  1433. return decode_loader_result (cmd, be32_to_cpu (lb->result));
  1434. }
  1435. }
  1436. /* loader: determine loader version */
  1437. static int __devinit get_loader_version (loader_block * lb,
  1438. const amb_dev * dev, u32 * version) {
  1439. int res;
  1440. PRINTD (DBG_FLOW|DBG_LOAD, "get_loader_version");
  1441. res = do_loader_command (lb, dev, get_version_number);
  1442. if (res)
  1443. return res;
  1444. if (version)
  1445. *version = be32_to_cpu (lb->payload.version);
  1446. return 0;
  1447. }
  1448. /* loader: write memory data blocks */
  1449. static int __devinit loader_write (loader_block* lb,
  1450. const amb_dev *dev,
  1451. const struct ihex_binrec *rec) {
  1452. transfer_block * tb = &lb->payload.transfer;
  1453. PRINTD (DBG_FLOW|DBG_LOAD, "loader_write");
  1454. tb->address = rec->addr;
  1455. tb->count = cpu_to_be32(be16_to_cpu(rec->len) / 4);
  1456. memcpy(tb->data, rec->data, be16_to_cpu(rec->len));
  1457. return do_loader_command (lb, dev, write_adapter_memory);
  1458. }
  1459. /* loader: verify memory data blocks */
  1460. static int __devinit loader_verify (loader_block * lb,
  1461. const amb_dev *dev,
  1462. const struct ihex_binrec *rec) {
  1463. transfer_block * tb = &lb->payload.transfer;
  1464. int res;
  1465. PRINTD (DBG_FLOW|DBG_LOAD, "loader_verify");
  1466. tb->address = rec->addr;
  1467. tb->count = cpu_to_be32(be16_to_cpu(rec->len) / 4);
  1468. res = do_loader_command (lb, dev, read_adapter_memory);
  1469. if (!res && memcmp(tb->data, rec->data, be16_to_cpu(rec->len)))
  1470. res = -EINVAL;
  1471. return res;
  1472. }
  1473. /* loader: start microcode */
  1474. static int __devinit loader_start (loader_block * lb,
  1475. const amb_dev * dev, u32 address) {
  1476. PRINTD (DBG_FLOW|DBG_LOAD, "loader_start");
  1477. lb->payload.start = cpu_to_be32 (address);
  1478. return do_loader_command (lb, dev, adapter_start);
  1479. }
  1480. /********** reset card **********/
  1481. static inline void sf (const char * msg)
  1482. {
  1483. PRINTK (KERN_ERR, "self-test failed: %s", msg);
  1484. }
  1485. static int amb_reset (amb_dev * dev, int diags) {
  1486. u32 word;
  1487. PRINTD (DBG_FLOW|DBG_LOAD, "amb_reset");
  1488. word = rd_plain (dev, offsetof(amb_mem, reset_control));
  1489. // put card into reset state
  1490. wr_plain (dev, offsetof(amb_mem, reset_control), word | AMB_RESET_BITS);
  1491. // wait a short while
  1492. udelay (10);
  1493. #if 1
  1494. // put card into known good state
  1495. wr_plain (dev, offsetof(amb_mem, interrupt_control), AMB_DOORBELL_BITS);
  1496. // clear all interrupts just in case
  1497. wr_plain (dev, offsetof(amb_mem, interrupt), -1);
  1498. #endif
  1499. // clear self-test done flag
  1500. wr_plain (dev, offsetof(amb_mem, mb.loader.ready), 0);
  1501. // take card out of reset state
  1502. wr_plain (dev, offsetof(amb_mem, reset_control), word &~ AMB_RESET_BITS);
  1503. if (diags) {
  1504. unsigned long timeout;
  1505. // 4.2 second wait
  1506. msleep(4200);
  1507. // half second time-out
  1508. timeout = 500;
  1509. while (!rd_plain (dev, offsetof(amb_mem, mb.loader.ready)))
  1510. if (timeout) {
  1511. timeout = msleep_interruptible(timeout);
  1512. } else {
  1513. PRINTD (DBG_LOAD|DBG_ERR, "reset timed out");
  1514. return -ETIMEDOUT;
  1515. }
  1516. // get results of self-test
  1517. // XXX double check byte-order
  1518. word = rd_mem (dev, offsetof(amb_mem, mb.loader.result));
  1519. if (word & SELF_TEST_FAILURE) {
  1520. if (word & GPINT_TST_FAILURE)
  1521. sf ("interrupt");
  1522. if (word & SUNI_DATA_PATTERN_FAILURE)
  1523. sf ("SUNI data pattern");
  1524. if (word & SUNI_DATA_BITS_FAILURE)
  1525. sf ("SUNI data bits");
  1526. if (word & SUNI_UTOPIA_FAILURE)
  1527. sf ("SUNI UTOPIA interface");
  1528. if (word & SUNI_FIFO_FAILURE)
  1529. sf ("SUNI cell buffer FIFO");
  1530. if (word & SRAM_FAILURE)
  1531. sf ("bad SRAM");
  1532. // better return value?
  1533. return -EIO;
  1534. }
  1535. }
  1536. return 0;
  1537. }
  1538. /********** transfer and start the microcode **********/
  1539. static int __devinit ucode_init (loader_block * lb, amb_dev * dev) {
  1540. const struct firmware *fw;
  1541. unsigned long start_address;
  1542. const struct ihex_binrec *rec;
  1543. int res;
  1544. res = request_ihex_firmware(&fw, "atmsar11.fw", &dev->pci_dev->dev);
  1545. if (res) {
  1546. PRINTK (KERN_ERR, "Cannot load microcode data");
  1547. return res;
  1548. }
  1549. /* First record contains just the start address */
  1550. rec = (const struct ihex_binrec *)fw->data;
  1551. if (be16_to_cpu(rec->len) != sizeof(__be32) || be32_to_cpu(rec->addr)) {
  1552. PRINTK (KERN_ERR, "Bad microcode data (no start record)");
  1553. return -EINVAL;
  1554. }
  1555. start_address = be32_to_cpup((__be32 *)rec->data);
  1556. rec = ihex_next_binrec(rec);
  1557. PRINTD (DBG_FLOW|DBG_LOAD, "ucode_init");
  1558. while (rec) {
  1559. PRINTD (DBG_LOAD, "starting region (%x, %u)", be32_to_cpu(rec->addr),
  1560. be16_to_cpu(rec->len));
  1561. if (be16_to_cpu(rec->len) > 4 * MAX_TRANSFER_DATA) {
  1562. PRINTK (KERN_ERR, "Bad microcode data (record too long)");
  1563. return -EINVAL;
  1564. }
  1565. if (be16_to_cpu(rec->len) & 3) {
  1566. PRINTK (KERN_ERR, "Bad microcode data (odd number of bytes)");
  1567. return -EINVAL;
  1568. }
  1569. res = loader_write(lb, dev, rec);
  1570. if (res)
  1571. break;
  1572. res = loader_verify(lb, dev, rec);
  1573. if (res)
  1574. break;
  1575. }
  1576. release_firmware(fw);
  1577. if (!res)
  1578. res = loader_start(lb, dev, start_address);
  1579. return res;
  1580. }
  1581. /********** give adapter parameters **********/
  1582. static inline __be32 bus_addr(void * addr) {
  1583. return cpu_to_be32 (virt_to_bus (addr));
  1584. }
  1585. static int __devinit amb_talk (amb_dev * dev) {
  1586. adap_talk_block a;
  1587. unsigned char pool;
  1588. unsigned long timeout;
  1589. PRINTD (DBG_FLOW, "amb_talk %p", dev);
  1590. a.command_start = bus_addr (dev->cq.ptrs.start);
  1591. a.command_end = bus_addr (dev->cq.ptrs.limit);
  1592. a.tx_start = bus_addr (dev->txq.in.start);
  1593. a.tx_end = bus_addr (dev->txq.in.limit);
  1594. a.txcom_start = bus_addr (dev->txq.out.start);
  1595. a.txcom_end = bus_addr (dev->txq.out.limit);
  1596. for (pool = 0; pool < NUM_RX_POOLS; ++pool) {
  1597. // the other "a" items are set up by the adapter
  1598. a.rec_struct[pool].buffer_start = bus_addr (dev->rxq[pool].in.start);
  1599. a.rec_struct[pool].buffer_end = bus_addr (dev->rxq[pool].in.limit);
  1600. a.rec_struct[pool].rx_start = bus_addr (dev->rxq[pool].out.start);
  1601. a.rec_struct[pool].rx_end = bus_addr (dev->rxq[pool].out.limit);
  1602. a.rec_struct[pool].buffer_size = cpu_to_be32 (dev->rxq[pool].buffer_size);
  1603. }
  1604. #ifdef AMB_NEW_MICROCODE
  1605. // disable fast PLX prefetching
  1606. a.init_flags = 0;
  1607. #endif
  1608. // pass the structure
  1609. wr_mem (dev, offsetof(amb_mem, doorbell), virt_to_bus (&a));
  1610. // 2.2 second wait (must not touch doorbell during 2 second DMA test)
  1611. msleep(2200);
  1612. // give the adapter another half second?
  1613. timeout = 500;
  1614. while (rd_plain (dev, offsetof(amb_mem, doorbell)))
  1615. if (timeout) {
  1616. timeout = msleep_interruptible(timeout);
  1617. } else {
  1618. PRINTD (DBG_INIT|DBG_ERR, "adapter init timed out");
  1619. return -ETIMEDOUT;
  1620. }
  1621. return 0;
  1622. }
  1623. // get microcode version
  1624. static void __devinit amb_ucode_version (amb_dev * dev) {
  1625. u32 major;
  1626. u32 minor;
  1627. command cmd;
  1628. cmd.request = cpu_to_be32 (SRB_GET_VERSION);
  1629. while (command_do (dev, &cmd)) {
  1630. set_current_state(TASK_UNINTERRUPTIBLE);
  1631. schedule();
  1632. }
  1633. major = be32_to_cpu (cmd.args.version.major);
  1634. minor = be32_to_cpu (cmd.args.version.minor);
  1635. PRINTK (KERN_INFO, "microcode version is %u.%u", major, minor);
  1636. }
  1637. // get end station address
  1638. static void __devinit amb_esi (amb_dev * dev, u8 * esi) {
  1639. u32 lower4;
  1640. u16 upper2;
  1641. command cmd;
  1642. cmd.request = cpu_to_be32 (SRB_GET_BIA);
  1643. while (command_do (dev, &cmd)) {
  1644. set_current_state(TASK_UNINTERRUPTIBLE);
  1645. schedule();
  1646. }
  1647. lower4 = be32_to_cpu (cmd.args.bia.lower4);
  1648. upper2 = be32_to_cpu (cmd.args.bia.upper2);
  1649. PRINTD (DBG_LOAD, "BIA: lower4: %08x, upper2 %04x", lower4, upper2);
  1650. if (esi) {
  1651. unsigned int i;
  1652. PRINTDB (DBG_INIT, "ESI:");
  1653. for (i = 0; i < ESI_LEN; ++i) {
  1654. if (i < 4)
  1655. esi[i] = bitrev8(lower4>>(8*i));
  1656. else
  1657. esi[i] = bitrev8(upper2>>(8*(i-4)));
  1658. PRINTDM (DBG_INIT, " %02x", esi[i]);
  1659. }
  1660. PRINTDE (DBG_INIT, "");
  1661. }
  1662. return;
  1663. }
  1664. static void fixup_plx_window (amb_dev *dev, loader_block *lb)
  1665. {
  1666. // fix up the PLX-mapped window base address to match the block
  1667. unsigned long blb;
  1668. u32 mapreg;
  1669. blb = virt_to_bus(lb);
  1670. // the kernel stack had better not ever cross a 1Gb boundary!
  1671. mapreg = rd_plain (dev, offsetof(amb_mem, stuff[10]));
  1672. mapreg &= ~onegigmask;
  1673. mapreg |= blb & onegigmask;
  1674. wr_plain (dev, offsetof(amb_mem, stuff[10]), mapreg);
  1675. return;
  1676. }
  1677. static int __devinit amb_init (amb_dev * dev)
  1678. {
  1679. loader_block lb;
  1680. u32 version;
  1681. if (amb_reset (dev, 1)) {
  1682. PRINTK (KERN_ERR, "card reset failed!");
  1683. } else {
  1684. fixup_plx_window (dev, &lb);
  1685. if (get_loader_version (&lb, dev, &version)) {
  1686. PRINTK (KERN_INFO, "failed to get loader version");
  1687. } else {
  1688. PRINTK (KERN_INFO, "loader version is %08x", version);
  1689. if (ucode_init (&lb, dev)) {
  1690. PRINTK (KERN_ERR, "microcode failure");
  1691. } else if (create_queues (dev, cmds, txs, rxs, rxs_bs)) {
  1692. PRINTK (KERN_ERR, "failed to get memory for queues");
  1693. } else {
  1694. if (amb_talk (dev)) {
  1695. PRINTK (KERN_ERR, "adapter did not accept queues");
  1696. } else {
  1697. amb_ucode_version (dev);
  1698. return 0;
  1699. } /* amb_talk */
  1700. destroy_queues (dev);
  1701. } /* create_queues, ucode_init */
  1702. amb_reset (dev, 0);
  1703. } /* get_loader_version */
  1704. } /* amb_reset */
  1705. return -EINVAL;
  1706. }
  1707. static void setup_dev(amb_dev *dev, struct pci_dev *pci_dev)
  1708. {
  1709. unsigned char pool;
  1710. // set up known dev items straight away
  1711. dev->pci_dev = pci_dev;
  1712. pci_set_drvdata(pci_dev, dev);
  1713. dev->iobase = pci_resource_start (pci_dev, 1);
  1714. dev->irq = pci_dev->irq;
  1715. dev->membase = bus_to_virt(pci_resource_start(pci_dev, 0));
  1716. // flags (currently only dead)
  1717. dev->flags = 0;
  1718. // Allocate cell rates (fibre)
  1719. // ATM_OC3_PCR = 1555200000/8/270*260/53 - 29/53
  1720. // to be really pedantic, this should be ATM_OC3c_PCR
  1721. dev->tx_avail = ATM_OC3_PCR;
  1722. dev->rx_avail = ATM_OC3_PCR;
  1723. #ifdef FILL_RX_POOLS_IN_BH
  1724. // initialise bottom half
  1725. INIT_WORK(&dev->bh, (void (*)(void *)) fill_rx_pools, dev);
  1726. #endif
  1727. // semaphore for txer/rxer modifications - we cannot use a
  1728. // spinlock as the critical region needs to switch processes
  1729. mutex_init(&dev->vcc_sf);
  1730. // queue manipulation spinlocks; we want atomic reads and
  1731. // writes to the queue descriptors (handles IRQ and SMP)
  1732. // consider replacing "int pending" -> "atomic_t available"
  1733. // => problem related to who gets to move queue pointers
  1734. spin_lock_init (&dev->cq.lock);
  1735. spin_lock_init (&dev->txq.lock);
  1736. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  1737. spin_lock_init (&dev->rxq[pool].lock);
  1738. }
  1739. static void setup_pci_dev(struct pci_dev *pci_dev)
  1740. {
  1741. unsigned char lat;
  1742. // enable bus master accesses
  1743. pci_set_master(pci_dev);
  1744. // frobnicate latency (upwards, usually)
  1745. pci_read_config_byte (pci_dev, PCI_LATENCY_TIMER, &lat);
  1746. if (!pci_lat)
  1747. pci_lat = (lat < MIN_PCI_LATENCY) ? MIN_PCI_LATENCY : lat;
  1748. if (lat != pci_lat) {
  1749. PRINTK (KERN_INFO, "Changing PCI latency timer from %hu to %hu",
  1750. lat, pci_lat);
  1751. pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, pci_lat);
  1752. }
  1753. }
  1754. static int __devinit amb_probe(struct pci_dev *pci_dev, const struct pci_device_id *pci_ent)
  1755. {
  1756. amb_dev * dev;
  1757. int err;
  1758. unsigned int irq;
  1759. err = pci_enable_device(pci_dev);
  1760. if (err < 0) {
  1761. PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
  1762. goto out;
  1763. }
  1764. // read resources from PCI configuration space
  1765. irq = pci_dev->irq;
  1766. if (pci_dev->device == PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD) {
  1767. PRINTK (KERN_ERR, "skipped broken (PLX rev 2) card");
  1768. err = -EINVAL;
  1769. goto out_disable;
  1770. }
  1771. PRINTD (DBG_INFO, "found Madge ATM adapter (amb) at"
  1772. " IO %llx, IRQ %u, MEM %p",
  1773. (unsigned long long)pci_resource_start(pci_dev, 1),
  1774. irq, bus_to_virt(pci_resource_start(pci_dev, 0)));
  1775. // check IO region
  1776. err = pci_request_region(pci_dev, 1, DEV_LABEL);
  1777. if (err < 0) {
  1778. PRINTK (KERN_ERR, "IO range already in use!");
  1779. goto out_disable;
  1780. }
  1781. dev = kzalloc(sizeof(amb_dev), GFP_KERNEL);
  1782. if (!dev) {
  1783. PRINTK (KERN_ERR, "out of memory!");
  1784. err = -ENOMEM;
  1785. goto out_release;
  1786. }
  1787. setup_dev(dev, pci_dev);
  1788. err = amb_init(dev);
  1789. if (err < 0) {
  1790. PRINTK (KERN_ERR, "adapter initialisation failure");
  1791. goto out_free;
  1792. }
  1793. setup_pci_dev(pci_dev);
  1794. // grab (but share) IRQ and install handler
  1795. err = request_irq(irq, interrupt_handler, IRQF_SHARED, DEV_LABEL, dev);
  1796. if (err < 0) {
  1797. PRINTK (KERN_ERR, "request IRQ failed!");
  1798. goto out_reset;
  1799. }
  1800. dev->atm_dev = atm_dev_register (DEV_LABEL, &amb_ops, -1, NULL);
  1801. if (!dev->atm_dev) {
  1802. PRINTD (DBG_ERR, "failed to register Madge ATM adapter");
  1803. err = -EINVAL;
  1804. goto out_free_irq;
  1805. }
  1806. PRINTD (DBG_INFO, "registered Madge ATM adapter (no. %d) (%p) at %p",
  1807. dev->atm_dev->number, dev, dev->atm_dev);
  1808. dev->atm_dev->dev_data = (void *) dev;
  1809. // register our address
  1810. amb_esi (dev, dev->atm_dev->esi);
  1811. // 0 bits for vpi, 10 bits for vci
  1812. dev->atm_dev->ci_range.vpi_bits = NUM_VPI_BITS;
  1813. dev->atm_dev->ci_range.vci_bits = NUM_VCI_BITS;
  1814. init_timer(&dev->housekeeping);
  1815. dev->housekeeping.function = do_housekeeping;
  1816. dev->housekeeping.data = (unsigned long) dev;
  1817. mod_timer(&dev->housekeeping, jiffies);
  1818. // enable host interrupts
  1819. interrupts_on (dev);
  1820. out:
  1821. return err;
  1822. out_free_irq:
  1823. free_irq(irq, dev);
  1824. out_reset:
  1825. amb_reset(dev, 0);
  1826. out_free:
  1827. kfree(dev);
  1828. out_release:
  1829. pci_release_region(pci_dev, 1);
  1830. out_disable:
  1831. pci_disable_device(pci_dev);
  1832. goto out;
  1833. }
  1834. static void __devexit amb_remove_one(struct pci_dev *pci_dev)
  1835. {
  1836. struct amb_dev *dev;
  1837. dev = pci_get_drvdata(pci_dev);
  1838. PRINTD(DBG_INFO|DBG_INIT, "closing %p (atm_dev = %p)", dev, dev->atm_dev);
  1839. del_timer_sync(&dev->housekeeping);
  1840. // the drain should not be necessary
  1841. drain_rx_pools(dev);
  1842. interrupts_off(dev);
  1843. amb_reset(dev, 0);
  1844. free_irq(dev->irq, dev);
  1845. pci_disable_device(pci_dev);
  1846. destroy_queues(dev);
  1847. atm_dev_deregister(dev->atm_dev);
  1848. kfree(dev);
  1849. pci_release_region(pci_dev, 1);
  1850. }
  1851. static void __init amb_check_args (void) {
  1852. unsigned char pool;
  1853. unsigned int max_rx_size;
  1854. #ifdef DEBUG_AMBASSADOR
  1855. PRINTK (KERN_NOTICE, "debug bitmap is %hx", debug &= DBG_MASK);
  1856. #else
  1857. if (debug)
  1858. PRINTK (KERN_NOTICE, "no debugging support");
  1859. #endif
  1860. if (cmds < MIN_QUEUE_SIZE)
  1861. PRINTK (KERN_NOTICE, "cmds has been raised to %u",
  1862. cmds = MIN_QUEUE_SIZE);
  1863. if (txs < MIN_QUEUE_SIZE)
  1864. PRINTK (KERN_NOTICE, "txs has been raised to %u",
  1865. txs = MIN_QUEUE_SIZE);
  1866. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  1867. if (rxs[pool] < MIN_QUEUE_SIZE)
  1868. PRINTK (KERN_NOTICE, "rxs[%hu] has been raised to %u",
  1869. pool, rxs[pool] = MIN_QUEUE_SIZE);
  1870. // buffers sizes should be greater than zero and strictly increasing
  1871. max_rx_size = 0;
  1872. for (pool = 0; pool < NUM_RX_POOLS; ++pool)
  1873. if (rxs_bs[pool] <= max_rx_size)
  1874. PRINTK (KERN_NOTICE, "useless pool (rxs_bs[%hu] = %u)",
  1875. pool, rxs_bs[pool]);
  1876. else
  1877. max_rx_size = rxs_bs[pool];
  1878. if (rx_lats < MIN_RX_BUFFERS)
  1879. PRINTK (KERN_NOTICE, "rx_lats has been raised to %u",
  1880. rx_lats = MIN_RX_BUFFERS);
  1881. return;
  1882. }
  1883. /********** module stuff **********/
  1884. MODULE_AUTHOR(maintainer_string);
  1885. MODULE_DESCRIPTION(description_string);
  1886. MODULE_LICENSE("GPL");
  1887. module_param(debug, ushort, 0644);
  1888. module_param(cmds, uint, 0);
  1889. module_param(txs, uint, 0);
  1890. module_param_array(rxs, uint, NULL, 0);
  1891. module_param_array(rxs_bs, uint, NULL, 0);
  1892. module_param(rx_lats, uint, 0);
  1893. module_param(pci_lat, byte, 0);
  1894. MODULE_PARM_DESC(debug, "debug bitmap, see .h file");
  1895. MODULE_PARM_DESC(cmds, "number of command queue entries");
  1896. MODULE_PARM_DESC(txs, "number of TX queue entries");
  1897. MODULE_PARM_DESC(rxs, "number of RX queue entries [" __MODULE_STRING(NUM_RX_POOLS) "]");
  1898. MODULE_PARM_DESC(rxs_bs, "size of RX buffers [" __MODULE_STRING(NUM_RX_POOLS) "]");
  1899. MODULE_PARM_DESC(rx_lats, "number of extra buffers to cope with RX latencies");
  1900. MODULE_PARM_DESC(pci_lat, "PCI latency in bus cycles");
  1901. /********** module entry **********/
  1902. static struct pci_device_id amb_pci_tbl[] = {
  1903. { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR, PCI_ANY_ID, PCI_ANY_ID,
  1904. 0, 0, 0 },
  1905. { PCI_VENDOR_ID_MADGE, PCI_DEVICE_ID_MADGE_AMBASSADOR_BAD, PCI_ANY_ID, PCI_ANY_ID,
  1906. 0, 0, 0 },
  1907. { 0, }
  1908. };
  1909. MODULE_DEVICE_TABLE(pci, amb_pci_tbl);
  1910. static struct pci_driver amb_driver = {
  1911. .name = "amb",
  1912. .probe = amb_probe,
  1913. .remove = __devexit_p(amb_remove_one),
  1914. .id_table = amb_pci_tbl,
  1915. };
  1916. static int __init amb_module_init (void)
  1917. {
  1918. PRINTD (DBG_FLOW|DBG_INIT, "init_module");
  1919. // sanity check - cast needed as printk does not support %Zu
  1920. if (sizeof(amb_mem) != 4*16 + 4*12) {
  1921. PRINTK (KERN_ERR, "Fix amb_mem (is %lu words).",
  1922. (unsigned long) sizeof(amb_mem));
  1923. return -ENOMEM;
  1924. }
  1925. show_version();
  1926. amb_check_args();
  1927. // get the juice
  1928. return pci_register_driver(&amb_driver);
  1929. }
  1930. /********** module exit **********/
  1931. static void __exit amb_module_exit (void)
  1932. {
  1933. PRINTD (DBG_FLOW|DBG_INIT, "cleanup_module");
  1934. pci_unregister_driver(&amb_driver);
  1935. }
  1936. module_init(amb_module_init);
  1937. module_exit(amb_module_exit);