async_tx.c 7.9 KB

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  1. /*
  2. * core routines for the asynchronous memory transfer/transform api
  3. *
  4. * Copyright © 2006, Intel Corporation.
  5. *
  6. * Dan Williams <dan.j.williams@intel.com>
  7. *
  8. * with architecture considerations by:
  9. * Neil Brown <neilb@suse.de>
  10. * Jeff Garzik <jeff@garzik.org>
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms and conditions of the GNU General Public License,
  14. * version 2, as published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope it will be useful, but WITHOUT
  17. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  18. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  19. * more details.
  20. *
  21. * You should have received a copy of the GNU General Public License along with
  22. * this program; if not, write to the Free Software Foundation, Inc.,
  23. * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  24. *
  25. */
  26. #include <linux/rculist.h>
  27. #include <linux/kernel.h>
  28. #include <linux/async_tx.h>
  29. #ifdef CONFIG_DMA_ENGINE
  30. static int __init async_tx_init(void)
  31. {
  32. async_dmaengine_get();
  33. printk(KERN_INFO "async_tx: api initialized (async)\n");
  34. return 0;
  35. }
  36. static void __exit async_tx_exit(void)
  37. {
  38. async_dmaengine_put();
  39. }
  40. /**
  41. * __async_tx_find_channel - find a channel to carry out the operation or let
  42. * the transaction execute synchronously
  43. * @depend_tx: transaction dependency
  44. * @tx_type: transaction type
  45. */
  46. struct dma_chan *
  47. __async_tx_find_channel(struct dma_async_tx_descriptor *depend_tx,
  48. enum dma_transaction_type tx_type)
  49. {
  50. /* see if we can keep the chain on one channel */
  51. if (depend_tx &&
  52. dma_has_cap(tx_type, depend_tx->chan->device->cap_mask))
  53. return depend_tx->chan;
  54. return async_dma_find_channel(tx_type);
  55. }
  56. EXPORT_SYMBOL_GPL(__async_tx_find_channel);
  57. #else
  58. static int __init async_tx_init(void)
  59. {
  60. printk(KERN_INFO "async_tx: api initialized (sync-only)\n");
  61. return 0;
  62. }
  63. static void __exit async_tx_exit(void)
  64. {
  65. do { } while (0);
  66. }
  67. #endif
  68. /**
  69. * async_tx_channel_switch - queue an interrupt descriptor with a dependency
  70. * pre-attached.
  71. * @depend_tx: the operation that must finish before the new operation runs
  72. * @tx: the new operation
  73. */
  74. static void
  75. async_tx_channel_switch(struct dma_async_tx_descriptor *depend_tx,
  76. struct dma_async_tx_descriptor *tx)
  77. {
  78. struct dma_chan *chan;
  79. struct dma_device *device;
  80. struct dma_async_tx_descriptor *intr_tx = (void *) ~0;
  81. /* first check to see if we can still append to depend_tx */
  82. spin_lock_bh(&depend_tx->lock);
  83. if (depend_tx->parent && depend_tx->chan == tx->chan) {
  84. tx->parent = depend_tx;
  85. depend_tx->next = tx;
  86. intr_tx = NULL;
  87. }
  88. spin_unlock_bh(&depend_tx->lock);
  89. if (!intr_tx)
  90. return;
  91. chan = depend_tx->chan;
  92. device = chan->device;
  93. /* see if we can schedule an interrupt
  94. * otherwise poll for completion
  95. */
  96. if (dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  97. intr_tx = device->device_prep_dma_interrupt(chan, 0);
  98. else
  99. intr_tx = NULL;
  100. if (intr_tx) {
  101. intr_tx->callback = NULL;
  102. intr_tx->callback_param = NULL;
  103. tx->parent = intr_tx;
  104. /* safe to set ->next outside the lock since we know we are
  105. * not submitted yet
  106. */
  107. intr_tx->next = tx;
  108. /* check if we need to append */
  109. spin_lock_bh(&depend_tx->lock);
  110. if (depend_tx->parent) {
  111. intr_tx->parent = depend_tx;
  112. depend_tx->next = intr_tx;
  113. async_tx_ack(intr_tx);
  114. intr_tx = NULL;
  115. }
  116. spin_unlock_bh(&depend_tx->lock);
  117. if (intr_tx) {
  118. intr_tx->parent = NULL;
  119. intr_tx->tx_submit(intr_tx);
  120. async_tx_ack(intr_tx);
  121. }
  122. } else {
  123. if (dma_wait_for_async_tx(depend_tx) == DMA_ERROR)
  124. panic("%s: DMA_ERROR waiting for depend_tx\n",
  125. __func__);
  126. tx->tx_submit(tx);
  127. }
  128. }
  129. /**
  130. * submit_disposition - while holding depend_tx->lock we must avoid submitting
  131. * new operations to prevent a circular locking dependency with
  132. * drivers that already hold a channel lock when calling
  133. * async_tx_run_dependencies.
  134. * @ASYNC_TX_SUBMITTED: we were able to append the new operation under the lock
  135. * @ASYNC_TX_CHANNEL_SWITCH: when the lock is dropped schedule a channel switch
  136. * @ASYNC_TX_DIRECT_SUBMIT: when the lock is dropped submit directly
  137. */
  138. enum submit_disposition {
  139. ASYNC_TX_SUBMITTED,
  140. ASYNC_TX_CHANNEL_SWITCH,
  141. ASYNC_TX_DIRECT_SUBMIT,
  142. };
  143. void
  144. async_tx_submit(struct dma_chan *chan, struct dma_async_tx_descriptor *tx,
  145. enum async_tx_flags flags, struct dma_async_tx_descriptor *depend_tx,
  146. dma_async_tx_callback cb_fn, void *cb_param)
  147. {
  148. tx->callback = cb_fn;
  149. tx->callback_param = cb_param;
  150. if (depend_tx) {
  151. enum submit_disposition s;
  152. /* sanity check the dependency chain:
  153. * 1/ if ack is already set then we cannot be sure
  154. * we are referring to the correct operation
  155. * 2/ dependencies are 1:1 i.e. two transactions can
  156. * not depend on the same parent
  157. */
  158. BUG_ON(async_tx_test_ack(depend_tx) || depend_tx->next ||
  159. tx->parent);
  160. /* the lock prevents async_tx_run_dependencies from missing
  161. * the setting of ->next when ->parent != NULL
  162. */
  163. spin_lock_bh(&depend_tx->lock);
  164. if (depend_tx->parent) {
  165. /* we have a parent so we can not submit directly
  166. * if we are staying on the same channel: append
  167. * else: channel switch
  168. */
  169. if (depend_tx->chan == chan) {
  170. tx->parent = depend_tx;
  171. depend_tx->next = tx;
  172. s = ASYNC_TX_SUBMITTED;
  173. } else
  174. s = ASYNC_TX_CHANNEL_SWITCH;
  175. } else {
  176. /* we do not have a parent so we may be able to submit
  177. * directly if we are staying on the same channel
  178. */
  179. if (depend_tx->chan == chan)
  180. s = ASYNC_TX_DIRECT_SUBMIT;
  181. else
  182. s = ASYNC_TX_CHANNEL_SWITCH;
  183. }
  184. spin_unlock_bh(&depend_tx->lock);
  185. switch (s) {
  186. case ASYNC_TX_SUBMITTED:
  187. break;
  188. case ASYNC_TX_CHANNEL_SWITCH:
  189. async_tx_channel_switch(depend_tx, tx);
  190. break;
  191. case ASYNC_TX_DIRECT_SUBMIT:
  192. tx->parent = NULL;
  193. tx->tx_submit(tx);
  194. break;
  195. }
  196. } else {
  197. tx->parent = NULL;
  198. tx->tx_submit(tx);
  199. }
  200. if (flags & ASYNC_TX_ACK)
  201. async_tx_ack(tx);
  202. if (depend_tx && (flags & ASYNC_TX_DEP_ACK))
  203. async_tx_ack(depend_tx);
  204. }
  205. EXPORT_SYMBOL_GPL(async_tx_submit);
  206. /**
  207. * async_trigger_callback - schedules the callback function to be run after
  208. * any dependent operations have been completed.
  209. * @flags: ASYNC_TX_ACK, ASYNC_TX_DEP_ACK
  210. * @depend_tx: 'callback' requires the completion of this transaction
  211. * @cb_fn: function to call after depend_tx completes
  212. * @cb_param: parameter to pass to the callback routine
  213. */
  214. struct dma_async_tx_descriptor *
  215. async_trigger_callback(enum async_tx_flags flags,
  216. struct dma_async_tx_descriptor *depend_tx,
  217. dma_async_tx_callback cb_fn, void *cb_param)
  218. {
  219. struct dma_chan *chan;
  220. struct dma_device *device;
  221. struct dma_async_tx_descriptor *tx;
  222. if (depend_tx) {
  223. chan = depend_tx->chan;
  224. device = chan->device;
  225. /* see if we can schedule an interrupt
  226. * otherwise poll for completion
  227. */
  228. if (device && !dma_has_cap(DMA_INTERRUPT, device->cap_mask))
  229. device = NULL;
  230. tx = device ? device->device_prep_dma_interrupt(chan, 0) : NULL;
  231. } else
  232. tx = NULL;
  233. if (tx) {
  234. pr_debug("%s: (async)\n", __func__);
  235. async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param);
  236. } else {
  237. pr_debug("%s: (sync)\n", __func__);
  238. /* wait for any prerequisite operations */
  239. async_tx_quiesce(&depend_tx);
  240. async_tx_sync_epilog(cb_fn, cb_param);
  241. }
  242. return tx;
  243. }
  244. EXPORT_SYMBOL_GPL(async_trigger_callback);
  245. /**
  246. * async_tx_quiesce - ensure tx is complete and freeable upon return
  247. * @tx - transaction to quiesce
  248. */
  249. void async_tx_quiesce(struct dma_async_tx_descriptor **tx)
  250. {
  251. if (*tx) {
  252. /* if ack is already set then we cannot be sure
  253. * we are referring to the correct operation
  254. */
  255. BUG_ON(async_tx_test_ack(*tx));
  256. if (dma_wait_for_async_tx(*tx) == DMA_ERROR)
  257. panic("DMA_ERROR waiting for transaction\n");
  258. async_tx_ack(*tx);
  259. *tx = NULL;
  260. }
  261. }
  262. EXPORT_SYMBOL_GPL(async_tx_quiesce);
  263. module_init(async_tx_init);
  264. module_exit(async_tx_exit);
  265. MODULE_AUTHOR("Intel Corporation");
  266. MODULE_DESCRIPTION("Asynchronous Bulk Memory Transactions API");
  267. MODULE_LICENSE("GPL");