common.c 14 KB

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  1. /*
  2. * Low-Level PCI Support for PC
  3. *
  4. * (c) 1999--2000 Martin Mares <mj@ucw.cz>
  5. */
  6. #include <linux/sched.h>
  7. #include <linux/pci.h>
  8. #include <linux/ioport.h>
  9. #include <linux/init.h>
  10. #include <linux/dmi.h>
  11. #include <asm/acpi.h>
  12. #include <asm/segment.h>
  13. #include <asm/io.h>
  14. #include <asm/smp.h>
  15. #include <asm/pci_x86.h>
  16. unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
  17. PCI_PROBE_MMCONF;
  18. unsigned int pci_early_dump_regs;
  19. static int pci_bf_sort;
  20. int pci_routeirq;
  21. int noioapicquirk;
  22. #ifdef CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS
  23. int noioapicreroute = 0;
  24. #else
  25. int noioapicreroute = 1;
  26. #endif
  27. int pcibios_last_bus = -1;
  28. unsigned long pirq_table_addr;
  29. struct pci_bus *pci_root_bus;
  30. struct pci_raw_ops *raw_pci_ops;
  31. struct pci_raw_ops *raw_pci_ext_ops;
  32. int raw_pci_read(unsigned int domain, unsigned int bus, unsigned int devfn,
  33. int reg, int len, u32 *val)
  34. {
  35. if (domain == 0 && reg < 256 && raw_pci_ops)
  36. return raw_pci_ops->read(domain, bus, devfn, reg, len, val);
  37. if (raw_pci_ext_ops)
  38. return raw_pci_ext_ops->read(domain, bus, devfn, reg, len, val);
  39. return -EINVAL;
  40. }
  41. int raw_pci_write(unsigned int domain, unsigned int bus, unsigned int devfn,
  42. int reg, int len, u32 val)
  43. {
  44. if (domain == 0 && reg < 256 && raw_pci_ops)
  45. return raw_pci_ops->write(domain, bus, devfn, reg, len, val);
  46. if (raw_pci_ext_ops)
  47. return raw_pci_ext_ops->write(domain, bus, devfn, reg, len, val);
  48. return -EINVAL;
  49. }
  50. static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *value)
  51. {
  52. return raw_pci_read(pci_domain_nr(bus), bus->number,
  53. devfn, where, size, value);
  54. }
  55. static int pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value)
  56. {
  57. return raw_pci_write(pci_domain_nr(bus), bus->number,
  58. devfn, where, size, value);
  59. }
  60. struct pci_ops pci_root_ops = {
  61. .read = pci_read,
  62. .write = pci_write,
  63. };
  64. /*
  65. * legacy, numa, and acpi all want to call pcibios_scan_root
  66. * from their initcalls. This flag prevents that.
  67. */
  68. int pcibios_scanned;
  69. /*
  70. * This interrupt-safe spinlock protects all accesses to PCI
  71. * configuration space.
  72. */
  73. DEFINE_SPINLOCK(pci_config_lock);
  74. static int __devinit can_skip_ioresource_align(const struct dmi_system_id *d)
  75. {
  76. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  77. printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
  78. return 0;
  79. }
  80. static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __devinitconst = {
  81. /*
  82. * Systems where PCI IO resource ISA alignment can be skipped
  83. * when the ISA enable bit in the bridge control is not set
  84. */
  85. {
  86. .callback = can_skip_ioresource_align,
  87. .ident = "IBM System x3800",
  88. .matches = {
  89. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  90. DMI_MATCH(DMI_PRODUCT_NAME, "x3800"),
  91. },
  92. },
  93. {
  94. .callback = can_skip_ioresource_align,
  95. .ident = "IBM System x3850",
  96. .matches = {
  97. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  98. DMI_MATCH(DMI_PRODUCT_NAME, "x3850"),
  99. },
  100. },
  101. {
  102. .callback = can_skip_ioresource_align,
  103. .ident = "IBM System x3950",
  104. .matches = {
  105. DMI_MATCH(DMI_SYS_VENDOR, "IBM"),
  106. DMI_MATCH(DMI_PRODUCT_NAME, "x3950"),
  107. },
  108. },
  109. {}
  110. };
  111. void __init dmi_check_skip_isa_align(void)
  112. {
  113. dmi_check_system(can_skip_pciprobe_dmi_table);
  114. }
  115. static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
  116. {
  117. struct resource *rom_r = &dev->resource[PCI_ROM_RESOURCE];
  118. if (pci_probe & PCI_NOASSIGN_ROMS) {
  119. if (rom_r->parent)
  120. return;
  121. if (rom_r->start) {
  122. /* we deal with BIOS assigned ROM later */
  123. return;
  124. }
  125. rom_r->start = rom_r->end = rom_r->flags = 0;
  126. }
  127. }
  128. /*
  129. * Called after each bus is probed, but before its children
  130. * are examined.
  131. */
  132. void __devinit pcibios_fixup_bus(struct pci_bus *b)
  133. {
  134. struct pci_dev *dev;
  135. /* root bus? */
  136. if (!b->parent)
  137. x86_pci_root_bus_res_quirks(b);
  138. pci_read_bridge_bases(b);
  139. list_for_each_entry(dev, &b->devices, bus_list)
  140. pcibios_fixup_device_resources(dev);
  141. }
  142. /*
  143. * Only use DMI information to set this if nothing was passed
  144. * on the kernel command line (which was parsed earlier).
  145. */
  146. static int __devinit set_bf_sort(const struct dmi_system_id *d)
  147. {
  148. if (pci_bf_sort == pci_bf_sort_default) {
  149. pci_bf_sort = pci_dmi_bf;
  150. printk(KERN_INFO "PCI: %s detected, enabling pci=bfsort.\n", d->ident);
  151. }
  152. return 0;
  153. }
  154. /*
  155. * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
  156. */
  157. #ifdef __i386__
  158. static int __devinit assign_all_busses(const struct dmi_system_id *d)
  159. {
  160. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  161. printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
  162. " (pci=assign-busses)\n", d->ident);
  163. return 0;
  164. }
  165. #endif
  166. static const struct dmi_system_id __devinitconst pciprobe_dmi_table[] = {
  167. #ifdef __i386__
  168. /*
  169. * Laptops which need pci=assign-busses to see Cardbus cards
  170. */
  171. {
  172. .callback = assign_all_busses,
  173. .ident = "Samsung X20 Laptop",
  174. .matches = {
  175. DMI_MATCH(DMI_SYS_VENDOR, "Samsung Electronics"),
  176. DMI_MATCH(DMI_PRODUCT_NAME, "SX20S"),
  177. },
  178. },
  179. #endif /* __i386__ */
  180. {
  181. .callback = set_bf_sort,
  182. .ident = "Dell PowerEdge 1950",
  183. .matches = {
  184. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  185. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1950"),
  186. },
  187. },
  188. {
  189. .callback = set_bf_sort,
  190. .ident = "Dell PowerEdge 1955",
  191. .matches = {
  192. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  193. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 1955"),
  194. },
  195. },
  196. {
  197. .callback = set_bf_sort,
  198. .ident = "Dell PowerEdge 2900",
  199. .matches = {
  200. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  201. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2900"),
  202. },
  203. },
  204. {
  205. .callback = set_bf_sort,
  206. .ident = "Dell PowerEdge 2950",
  207. .matches = {
  208. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  209. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge 2950"),
  210. },
  211. },
  212. {
  213. .callback = set_bf_sort,
  214. .ident = "Dell PowerEdge R900",
  215. .matches = {
  216. DMI_MATCH(DMI_SYS_VENDOR, "Dell"),
  217. DMI_MATCH(DMI_PRODUCT_NAME, "PowerEdge R900"),
  218. },
  219. },
  220. {
  221. .callback = set_bf_sort,
  222. .ident = "HP ProLiant BL20p G3",
  223. .matches = {
  224. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  225. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G3"),
  226. },
  227. },
  228. {
  229. .callback = set_bf_sort,
  230. .ident = "HP ProLiant BL20p G4",
  231. .matches = {
  232. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  233. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL20p G4"),
  234. },
  235. },
  236. {
  237. .callback = set_bf_sort,
  238. .ident = "HP ProLiant BL30p G1",
  239. .matches = {
  240. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  241. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL30p G1"),
  242. },
  243. },
  244. {
  245. .callback = set_bf_sort,
  246. .ident = "HP ProLiant BL25p G1",
  247. .matches = {
  248. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  249. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL25p G1"),
  250. },
  251. },
  252. {
  253. .callback = set_bf_sort,
  254. .ident = "HP ProLiant BL35p G1",
  255. .matches = {
  256. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  257. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL35p G1"),
  258. },
  259. },
  260. {
  261. .callback = set_bf_sort,
  262. .ident = "HP ProLiant BL45p G1",
  263. .matches = {
  264. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  265. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G1"),
  266. },
  267. },
  268. {
  269. .callback = set_bf_sort,
  270. .ident = "HP ProLiant BL45p G2",
  271. .matches = {
  272. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  273. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL45p G2"),
  274. },
  275. },
  276. {
  277. .callback = set_bf_sort,
  278. .ident = "HP ProLiant BL460c G1",
  279. .matches = {
  280. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  281. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL460c G1"),
  282. },
  283. },
  284. {
  285. .callback = set_bf_sort,
  286. .ident = "HP ProLiant BL465c G1",
  287. .matches = {
  288. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  289. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL465c G1"),
  290. },
  291. },
  292. {
  293. .callback = set_bf_sort,
  294. .ident = "HP ProLiant BL480c G1",
  295. .matches = {
  296. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  297. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL480c G1"),
  298. },
  299. },
  300. {
  301. .callback = set_bf_sort,
  302. .ident = "HP ProLiant BL685c G1",
  303. .matches = {
  304. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  305. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant BL685c G1"),
  306. },
  307. },
  308. {
  309. .callback = set_bf_sort,
  310. .ident = "HP ProLiant DL360",
  311. .matches = {
  312. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  313. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL360"),
  314. },
  315. },
  316. {
  317. .callback = set_bf_sort,
  318. .ident = "HP ProLiant DL380",
  319. .matches = {
  320. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  321. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL380"),
  322. },
  323. },
  324. #ifdef __i386__
  325. {
  326. .callback = assign_all_busses,
  327. .ident = "Compaq EVO N800c",
  328. .matches = {
  329. DMI_MATCH(DMI_SYS_VENDOR, "Compaq"),
  330. DMI_MATCH(DMI_PRODUCT_NAME, "EVO N800c"),
  331. },
  332. },
  333. #endif
  334. {
  335. .callback = set_bf_sort,
  336. .ident = "HP ProLiant DL385 G2",
  337. .matches = {
  338. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  339. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL385 G2"),
  340. },
  341. },
  342. {
  343. .callback = set_bf_sort,
  344. .ident = "HP ProLiant DL585 G2",
  345. .matches = {
  346. DMI_MATCH(DMI_SYS_VENDOR, "HP"),
  347. DMI_MATCH(DMI_PRODUCT_NAME, "ProLiant DL585 G2"),
  348. },
  349. },
  350. {}
  351. };
  352. void __init dmi_check_pciprobe(void)
  353. {
  354. dmi_check_system(pciprobe_dmi_table);
  355. }
  356. struct pci_bus * __devinit pcibios_scan_root(int busnum)
  357. {
  358. struct pci_bus *bus = NULL;
  359. struct pci_sysdata *sd;
  360. while ((bus = pci_find_next_bus(bus)) != NULL) {
  361. if (bus->number == busnum) {
  362. /* Already scanned */
  363. return bus;
  364. }
  365. }
  366. /* Allocate per-root-bus (not per bus) arch-specific data.
  367. * TODO: leak; this memory is never freed.
  368. * It's arguable whether it's worth the trouble to care.
  369. */
  370. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  371. if (!sd) {
  372. printk(KERN_ERR "PCI: OOM, not probing PCI bus %02x\n", busnum);
  373. return NULL;
  374. }
  375. sd->node = get_mp_bus_to_node(busnum);
  376. printk(KERN_DEBUG "PCI: Probing PCI hardware (bus %02x)\n", busnum);
  377. bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd);
  378. if (!bus)
  379. kfree(sd);
  380. return bus;
  381. }
  382. extern u8 pci_cache_line_size;
  383. int __init pcibios_init(void)
  384. {
  385. struct cpuinfo_x86 *c = &boot_cpu_data;
  386. if (!raw_pci_ops) {
  387. printk(KERN_WARNING "PCI: System does not support PCI\n");
  388. return 0;
  389. }
  390. /*
  391. * Assume PCI cacheline size of 32 bytes for all x86s except K7/K8
  392. * and P4. It's also good for 386/486s (which actually have 16)
  393. * as quite a few PCI devices do not support smaller values.
  394. */
  395. pci_cache_line_size = 32 >> 2;
  396. if (c->x86 >= 6 && c->x86_vendor == X86_VENDOR_AMD)
  397. pci_cache_line_size = 64 >> 2; /* K7 & K8 */
  398. else if (c->x86 > 6 && c->x86_vendor == X86_VENDOR_INTEL)
  399. pci_cache_line_size = 128 >> 2; /* P4 */
  400. pcibios_resource_survey();
  401. if (pci_bf_sort >= pci_force_bf)
  402. pci_sort_breadthfirst();
  403. return 0;
  404. }
  405. char * __devinit pcibios_setup(char *str)
  406. {
  407. if (!strcmp(str, "off")) {
  408. pci_probe = 0;
  409. return NULL;
  410. } else if (!strcmp(str, "bfsort")) {
  411. pci_bf_sort = pci_force_bf;
  412. return NULL;
  413. } else if (!strcmp(str, "nobfsort")) {
  414. pci_bf_sort = pci_force_nobf;
  415. return NULL;
  416. }
  417. #ifdef CONFIG_PCI_BIOS
  418. else if (!strcmp(str, "bios")) {
  419. pci_probe = PCI_PROBE_BIOS;
  420. return NULL;
  421. } else if (!strcmp(str, "nobios")) {
  422. pci_probe &= ~PCI_PROBE_BIOS;
  423. return NULL;
  424. } else if (!strcmp(str, "biosirq")) {
  425. pci_probe |= PCI_BIOS_IRQ_SCAN;
  426. return NULL;
  427. } else if (!strncmp(str, "pirqaddr=", 9)) {
  428. pirq_table_addr = simple_strtoul(str+9, NULL, 0);
  429. return NULL;
  430. }
  431. #endif
  432. #ifdef CONFIG_PCI_DIRECT
  433. else if (!strcmp(str, "conf1")) {
  434. pci_probe = PCI_PROBE_CONF1 | PCI_NO_CHECKS;
  435. return NULL;
  436. }
  437. else if (!strcmp(str, "conf2")) {
  438. pci_probe = PCI_PROBE_CONF2 | PCI_NO_CHECKS;
  439. return NULL;
  440. }
  441. #endif
  442. #ifdef CONFIG_PCI_MMCONFIG
  443. else if (!strcmp(str, "nommconf")) {
  444. pci_probe &= ~PCI_PROBE_MMCONF;
  445. return NULL;
  446. }
  447. else if (!strcmp(str, "check_enable_amd_mmconf")) {
  448. pci_probe |= PCI_CHECK_ENABLE_AMD_MMCONF;
  449. return NULL;
  450. }
  451. #endif
  452. else if (!strcmp(str, "noacpi")) {
  453. acpi_noirq_set();
  454. return NULL;
  455. }
  456. else if (!strcmp(str, "noearly")) {
  457. pci_probe |= PCI_PROBE_NOEARLY;
  458. return NULL;
  459. }
  460. #ifndef CONFIG_X86_VISWS
  461. else if (!strcmp(str, "usepirqmask")) {
  462. pci_probe |= PCI_USE_PIRQ_MASK;
  463. return NULL;
  464. } else if (!strncmp(str, "irqmask=", 8)) {
  465. pcibios_irq_mask = simple_strtol(str+8, NULL, 0);
  466. return NULL;
  467. } else if (!strncmp(str, "lastbus=", 8)) {
  468. pcibios_last_bus = simple_strtol(str+8, NULL, 0);
  469. return NULL;
  470. }
  471. #endif
  472. else if (!strcmp(str, "rom")) {
  473. pci_probe |= PCI_ASSIGN_ROMS;
  474. return NULL;
  475. } else if (!strcmp(str, "norom")) {
  476. pci_probe |= PCI_NOASSIGN_ROMS;
  477. return NULL;
  478. } else if (!strcmp(str, "assign-busses")) {
  479. pci_probe |= PCI_ASSIGN_ALL_BUSSES;
  480. return NULL;
  481. } else if (!strcmp(str, "use_crs")) {
  482. pci_probe |= PCI_USE__CRS;
  483. return NULL;
  484. } else if (!strcmp(str, "earlydump")) {
  485. pci_early_dump_regs = 1;
  486. return NULL;
  487. } else if (!strcmp(str, "routeirq")) {
  488. pci_routeirq = 1;
  489. return NULL;
  490. } else if (!strcmp(str, "skip_isa_align")) {
  491. pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
  492. return NULL;
  493. } else if (!strcmp(str, "noioapicquirk")) {
  494. noioapicquirk = 1;
  495. return NULL;
  496. } else if (!strcmp(str, "ioapicreroute")) {
  497. if (noioapicreroute != -1)
  498. noioapicreroute = 0;
  499. return NULL;
  500. } else if (!strcmp(str, "noioapicreroute")) {
  501. if (noioapicreroute != -1)
  502. noioapicreroute = 1;
  503. return NULL;
  504. }
  505. return str;
  506. }
  507. unsigned int pcibios_assign_all_busses(void)
  508. {
  509. return (pci_probe & PCI_ASSIGN_ALL_BUSSES) ? 1 : 0;
  510. }
  511. int pcibios_enable_device(struct pci_dev *dev, int mask)
  512. {
  513. int err;
  514. if ((err = pci_enable_resources(dev, mask)) < 0)
  515. return err;
  516. if (!pci_dev_msi_enabled(dev))
  517. return pcibios_enable_irq(dev);
  518. return 0;
  519. }
  520. void pcibios_disable_device (struct pci_dev *dev)
  521. {
  522. if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
  523. pcibios_disable_irq(dev);
  524. }
  525. int pci_ext_cfg_avail(struct pci_dev *dev)
  526. {
  527. if (raw_pci_ext_ops)
  528. return 1;
  529. else
  530. return 0;
  531. }
  532. struct pci_bus * __devinit pci_scan_bus_on_node(int busno, struct pci_ops *ops, int node)
  533. {
  534. struct pci_bus *bus = NULL;
  535. struct pci_sysdata *sd;
  536. /*
  537. * Allocate per-root-bus (not per bus) arch-specific data.
  538. * TODO: leak; this memory is never freed.
  539. * It's arguable whether it's worth the trouble to care.
  540. */
  541. sd = kzalloc(sizeof(*sd), GFP_KERNEL);
  542. if (!sd) {
  543. printk(KERN_ERR "PCI: OOM, skipping PCI bus %02x\n", busno);
  544. return NULL;
  545. }
  546. sd->node = node;
  547. bus = pci_scan_bus(busno, ops, sd);
  548. if (!bus)
  549. kfree(sd);
  550. return bus;
  551. }
  552. struct pci_bus * __devinit pci_scan_bus_with_sysdata(int busno)
  553. {
  554. return pci_scan_bus_on_node(busno, &pci_root_ops, -1);
  555. }