mmu.c 75 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903190419051906190719081909191019111912191319141915191619171918191919201921192219231924192519261927192819291930193119321933193419351936193719381939194019411942194319441945194619471948194919501951195219531954195519561957195819591960196119621963196419651966196719681969197019711972197319741975197619771978197919801981198219831984198519861987198819891990199119921993199419951996199719981999200020012002200320042005200620072008200920102011201220132014201520162017201820192020202120222023202420252026202720282029203020312032203320342035203620372038203920402041204220432044204520462047204820492050205120522053205420552056205720582059206020612062206320642065206620672068206920702071207220732074207520762077207820792080208120822083208420852086208720882089209020912092209320942095209620972098209921002101210221032104210521062107210821092110211121122113211421152116211721182119212021212122212321242125212621272128212921302131213221332134213521362137213821392140214121422143214421452146214721482149215021512152215321542155215621572158215921602161216221632164216521662167216821692170217121722173217421752176217721782179218021812182218321842185218621872188218921902191219221932194219521962197219821992200220122022203220422052206220722082209221022112212221322142215221622172218221922202221222222232224222522262227222822292230223122322233223422352236223722382239224022412242224322442245224622472248224922502251225222532254225522562257225822592260226122622263226422652266226722682269227022712272227322742275227622772278227922802281228222832284228522862287228822892290229122922293229422952296229722982299230023012302230323042305230623072308230923102311231223132314231523162317231823192320232123222323232423252326232723282329233023312332233323342335233623372338233923402341234223432344234523462347234823492350235123522353235423552356235723582359236023612362236323642365236623672368236923702371237223732374237523762377237823792380238123822383238423852386238723882389239023912392239323942395239623972398239924002401240224032404240524062407240824092410241124122413241424152416241724182419242024212422242324242425242624272428242924302431243224332434243524362437243824392440244124422443244424452446244724482449245024512452245324542455245624572458245924602461246224632464246524662467246824692470247124722473247424752476247724782479248024812482248324842485248624872488248924902491249224932494249524962497249824992500250125022503250425052506250725082509251025112512251325142515251625172518251925202521252225232524252525262527252825292530253125322533253425352536253725382539254025412542254325442545254625472548254925502551255225532554255525562557255825592560256125622563256425652566256725682569257025712572257325742575257625772578257925802581258225832584258525862587258825892590259125922593259425952596259725982599260026012602260326042605260626072608260926102611261226132614261526162617261826192620262126222623262426252626262726282629263026312632263326342635263626372638263926402641264226432644264526462647264826492650265126522653265426552656265726582659266026612662266326642665266626672668266926702671267226732674267526762677267826792680268126822683268426852686268726882689269026912692269326942695269626972698269927002701270227032704270527062707270827092710271127122713271427152716271727182719272027212722272327242725272627272728272927302731273227332734273527362737273827392740274127422743274427452746274727482749275027512752275327542755275627572758275927602761276227632764276527662767276827692770277127722773277427752776277727782779278027812782278327842785278627872788278927902791279227932794279527962797279827992800280128022803280428052806280728082809281028112812281328142815281628172818281928202821282228232824282528262827282828292830283128322833283428352836283728382839284028412842284328442845284628472848284928502851285228532854285528562857285828592860286128622863286428652866286728682869287028712872287328742875287628772878287928802881288228832884288528862887288828892890289128922893289428952896289728982899290029012902290329042905290629072908290929102911291229132914291529162917291829192920292129222923292429252926292729282929293029312932293329342935293629372938293929402941294229432944294529462947294829492950295129522953295429552956295729582959296029612962296329642965296629672968296929702971297229732974297529762977297829792980298129822983298429852986298729882989299029912992299329942995299629972998299930003001300230033004300530063007300830093010301130123013301430153016301730183019302030213022302330243025302630273028302930303031303230333034303530363037303830393040304130423043304430453046304730483049305030513052305330543055305630573058305930603061306230633064306530663067306830693070307130723073307430753076307730783079308030813082308330843085308630873088308930903091309230933094309530963097309830993100310131023103310431053106310731083109311031113112311331143115311631173118311931203121312231233124312531263127312831293130313131323133313431353136313731383139314031413142314331443145314631473148314931503151315231533154315531563157315831593160316131623163316431653166316731683169317031713172317331743175317631773178317931803181
  1. /*
  2. * Kernel-based Virtual Machine driver for Linux
  3. *
  4. * This module enables machines with Intel VT-x extensions to run virtual
  5. * machines without emulation or binary translation.
  6. *
  7. * MMU support
  8. *
  9. * Copyright (C) 2006 Qumranet, Inc.
  10. *
  11. * Authors:
  12. * Yaniv Kamay <yaniv@qumranet.com>
  13. * Avi Kivity <avi@qumranet.com>
  14. *
  15. * This work is licensed under the terms of the GNU GPL, version 2. See
  16. * the COPYING file in the top-level directory.
  17. *
  18. */
  19. #include "mmu.h"
  20. #include <linux/kvm_host.h>
  21. #include <linux/types.h>
  22. #include <linux/string.h>
  23. #include <linux/mm.h>
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <linux/swap.h>
  27. #include <linux/hugetlb.h>
  28. #include <linux/compiler.h>
  29. #include <asm/page.h>
  30. #include <asm/cmpxchg.h>
  31. #include <asm/io.h>
  32. #include <asm/vmx.h>
  33. /*
  34. * When setting this variable to true it enables Two-Dimensional-Paging
  35. * where the hardware walks 2 page tables:
  36. * 1. the guest-virtual to guest-physical
  37. * 2. while doing 1. it walks guest-physical to host-physical
  38. * If the hardware supports that we don't need to do shadow paging.
  39. */
  40. bool tdp_enabled = false;
  41. #undef MMU_DEBUG
  42. #undef AUDIT
  43. #ifdef AUDIT
  44. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg);
  45. #else
  46. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg) {}
  47. #endif
  48. #ifdef MMU_DEBUG
  49. #define pgprintk(x...) do { if (dbg) printk(x); } while (0)
  50. #define rmap_printk(x...) do { if (dbg) printk(x); } while (0)
  51. #else
  52. #define pgprintk(x...) do { } while (0)
  53. #define rmap_printk(x...) do { } while (0)
  54. #endif
  55. #if defined(MMU_DEBUG) || defined(AUDIT)
  56. static int dbg = 0;
  57. module_param(dbg, bool, 0644);
  58. #endif
  59. static int oos_shadow = 1;
  60. module_param(oos_shadow, bool, 0644);
  61. #ifndef MMU_DEBUG
  62. #define ASSERT(x) do { } while (0)
  63. #else
  64. #define ASSERT(x) \
  65. if (!(x)) { \
  66. printk(KERN_WARNING "assertion failed %s:%d: %s\n", \
  67. __FILE__, __LINE__, #x); \
  68. }
  69. #endif
  70. #define PT_FIRST_AVAIL_BITS_SHIFT 9
  71. #define PT64_SECOND_AVAIL_BITS_SHIFT 52
  72. #define VALID_PAGE(x) ((x) != INVALID_PAGE)
  73. #define PT64_LEVEL_BITS 9
  74. #define PT64_LEVEL_SHIFT(level) \
  75. (PAGE_SHIFT + (level - 1) * PT64_LEVEL_BITS)
  76. #define PT64_LEVEL_MASK(level) \
  77. (((1ULL << PT64_LEVEL_BITS) - 1) << PT64_LEVEL_SHIFT(level))
  78. #define PT64_INDEX(address, level)\
  79. (((address) >> PT64_LEVEL_SHIFT(level)) & ((1 << PT64_LEVEL_BITS) - 1))
  80. #define PT32_LEVEL_BITS 10
  81. #define PT32_LEVEL_SHIFT(level) \
  82. (PAGE_SHIFT + (level - 1) * PT32_LEVEL_BITS)
  83. #define PT32_LEVEL_MASK(level) \
  84. (((1ULL << PT32_LEVEL_BITS) - 1) << PT32_LEVEL_SHIFT(level))
  85. #define PT32_INDEX(address, level)\
  86. (((address) >> PT32_LEVEL_SHIFT(level)) & ((1 << PT32_LEVEL_BITS) - 1))
  87. #define PT64_BASE_ADDR_MASK (((1ULL << 52) - 1) & ~(u64)(PAGE_SIZE-1))
  88. #define PT64_DIR_BASE_ADDR_MASK \
  89. (PT64_BASE_ADDR_MASK & ~((1ULL << (PAGE_SHIFT + PT64_LEVEL_BITS)) - 1))
  90. #define PT32_BASE_ADDR_MASK PAGE_MASK
  91. #define PT32_DIR_BASE_ADDR_MASK \
  92. (PAGE_MASK & ~((1ULL << (PAGE_SHIFT + PT32_LEVEL_BITS)) - 1))
  93. #define PT64_PERM_MASK (PT_PRESENT_MASK | PT_WRITABLE_MASK | PT_USER_MASK \
  94. | PT64_NX_MASK)
  95. #define PFERR_PRESENT_MASK (1U << 0)
  96. #define PFERR_WRITE_MASK (1U << 1)
  97. #define PFERR_USER_MASK (1U << 2)
  98. #define PFERR_RSVD_MASK (1U << 3)
  99. #define PFERR_FETCH_MASK (1U << 4)
  100. #define PT_DIRECTORY_LEVEL 2
  101. #define PT_PAGE_TABLE_LEVEL 1
  102. #define RMAP_EXT 4
  103. #define ACC_EXEC_MASK 1
  104. #define ACC_WRITE_MASK PT_WRITABLE_MASK
  105. #define ACC_USER_MASK PT_USER_MASK
  106. #define ACC_ALL (ACC_EXEC_MASK | ACC_WRITE_MASK | ACC_USER_MASK)
  107. #define SHADOW_PT_INDEX(addr, level) PT64_INDEX(addr, level)
  108. struct kvm_rmap_desc {
  109. u64 *shadow_ptes[RMAP_EXT];
  110. struct kvm_rmap_desc *more;
  111. };
  112. struct kvm_shadow_walk_iterator {
  113. u64 addr;
  114. hpa_t shadow_addr;
  115. int level;
  116. u64 *sptep;
  117. unsigned index;
  118. };
  119. #define for_each_shadow_entry(_vcpu, _addr, _walker) \
  120. for (shadow_walk_init(&(_walker), _vcpu, _addr); \
  121. shadow_walk_okay(&(_walker)); \
  122. shadow_walk_next(&(_walker)))
  123. struct kvm_unsync_walk {
  124. int (*entry) (struct kvm_mmu_page *sp, struct kvm_unsync_walk *walk);
  125. };
  126. typedef int (*mmu_parent_walk_fn) (struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp);
  127. static struct kmem_cache *pte_chain_cache;
  128. static struct kmem_cache *rmap_desc_cache;
  129. static struct kmem_cache *mmu_page_header_cache;
  130. static u64 __read_mostly shadow_trap_nonpresent_pte;
  131. static u64 __read_mostly shadow_notrap_nonpresent_pte;
  132. static u64 __read_mostly shadow_base_present_pte;
  133. static u64 __read_mostly shadow_nx_mask;
  134. static u64 __read_mostly shadow_x_mask; /* mutual exclusive with nx_mask */
  135. static u64 __read_mostly shadow_user_mask;
  136. static u64 __read_mostly shadow_accessed_mask;
  137. static u64 __read_mostly shadow_dirty_mask;
  138. static inline u64 rsvd_bits(int s, int e)
  139. {
  140. return ((1ULL << (e - s + 1)) - 1) << s;
  141. }
  142. void kvm_mmu_set_nonpresent_ptes(u64 trap_pte, u64 notrap_pte)
  143. {
  144. shadow_trap_nonpresent_pte = trap_pte;
  145. shadow_notrap_nonpresent_pte = notrap_pte;
  146. }
  147. EXPORT_SYMBOL_GPL(kvm_mmu_set_nonpresent_ptes);
  148. void kvm_mmu_set_base_ptes(u64 base_pte)
  149. {
  150. shadow_base_present_pte = base_pte;
  151. }
  152. EXPORT_SYMBOL_GPL(kvm_mmu_set_base_ptes);
  153. void kvm_mmu_set_mask_ptes(u64 user_mask, u64 accessed_mask,
  154. u64 dirty_mask, u64 nx_mask, u64 x_mask)
  155. {
  156. shadow_user_mask = user_mask;
  157. shadow_accessed_mask = accessed_mask;
  158. shadow_dirty_mask = dirty_mask;
  159. shadow_nx_mask = nx_mask;
  160. shadow_x_mask = x_mask;
  161. }
  162. EXPORT_SYMBOL_GPL(kvm_mmu_set_mask_ptes);
  163. static int is_write_protection(struct kvm_vcpu *vcpu)
  164. {
  165. return vcpu->arch.cr0 & X86_CR0_WP;
  166. }
  167. static int is_cpuid_PSE36(void)
  168. {
  169. return 1;
  170. }
  171. static int is_nx(struct kvm_vcpu *vcpu)
  172. {
  173. return vcpu->arch.shadow_efer & EFER_NX;
  174. }
  175. static int is_shadow_present_pte(u64 pte)
  176. {
  177. return pte != shadow_trap_nonpresent_pte
  178. && pte != shadow_notrap_nonpresent_pte;
  179. }
  180. static int is_large_pte(u64 pte)
  181. {
  182. return pte & PT_PAGE_SIZE_MASK;
  183. }
  184. static int is_writeble_pte(unsigned long pte)
  185. {
  186. return pte & PT_WRITABLE_MASK;
  187. }
  188. static int is_dirty_pte(unsigned long pte)
  189. {
  190. return pte & shadow_dirty_mask;
  191. }
  192. static int is_rmap_pte(u64 pte)
  193. {
  194. return is_shadow_present_pte(pte);
  195. }
  196. static pfn_t spte_to_pfn(u64 pte)
  197. {
  198. return (pte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  199. }
  200. static gfn_t pse36_gfn_delta(u32 gpte)
  201. {
  202. int shift = 32 - PT32_DIR_PSE36_SHIFT - PAGE_SHIFT;
  203. return (gpte & PT32_DIR_PSE36_MASK) << shift;
  204. }
  205. static void set_shadow_pte(u64 *sptep, u64 spte)
  206. {
  207. #ifdef CONFIG_X86_64
  208. set_64bit((unsigned long *)sptep, spte);
  209. #else
  210. set_64bit((unsigned long long *)sptep, spte);
  211. #endif
  212. }
  213. static int mmu_topup_memory_cache(struct kvm_mmu_memory_cache *cache,
  214. struct kmem_cache *base_cache, int min)
  215. {
  216. void *obj;
  217. if (cache->nobjs >= min)
  218. return 0;
  219. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  220. obj = kmem_cache_zalloc(base_cache, GFP_KERNEL);
  221. if (!obj)
  222. return -ENOMEM;
  223. cache->objects[cache->nobjs++] = obj;
  224. }
  225. return 0;
  226. }
  227. static void mmu_free_memory_cache(struct kvm_mmu_memory_cache *mc)
  228. {
  229. while (mc->nobjs)
  230. kfree(mc->objects[--mc->nobjs]);
  231. }
  232. static int mmu_topup_memory_cache_page(struct kvm_mmu_memory_cache *cache,
  233. int min)
  234. {
  235. struct page *page;
  236. if (cache->nobjs >= min)
  237. return 0;
  238. while (cache->nobjs < ARRAY_SIZE(cache->objects)) {
  239. page = alloc_page(GFP_KERNEL);
  240. if (!page)
  241. return -ENOMEM;
  242. set_page_private(page, 0);
  243. cache->objects[cache->nobjs++] = page_address(page);
  244. }
  245. return 0;
  246. }
  247. static void mmu_free_memory_cache_page(struct kvm_mmu_memory_cache *mc)
  248. {
  249. while (mc->nobjs)
  250. free_page((unsigned long)mc->objects[--mc->nobjs]);
  251. }
  252. static int mmu_topup_memory_caches(struct kvm_vcpu *vcpu)
  253. {
  254. int r;
  255. r = mmu_topup_memory_cache(&vcpu->arch.mmu_pte_chain_cache,
  256. pte_chain_cache, 4);
  257. if (r)
  258. goto out;
  259. r = mmu_topup_memory_cache(&vcpu->arch.mmu_rmap_desc_cache,
  260. rmap_desc_cache, 4);
  261. if (r)
  262. goto out;
  263. r = mmu_topup_memory_cache_page(&vcpu->arch.mmu_page_cache, 8);
  264. if (r)
  265. goto out;
  266. r = mmu_topup_memory_cache(&vcpu->arch.mmu_page_header_cache,
  267. mmu_page_header_cache, 4);
  268. out:
  269. return r;
  270. }
  271. static void mmu_free_memory_caches(struct kvm_vcpu *vcpu)
  272. {
  273. mmu_free_memory_cache(&vcpu->arch.mmu_pte_chain_cache);
  274. mmu_free_memory_cache(&vcpu->arch.mmu_rmap_desc_cache);
  275. mmu_free_memory_cache_page(&vcpu->arch.mmu_page_cache);
  276. mmu_free_memory_cache(&vcpu->arch.mmu_page_header_cache);
  277. }
  278. static void *mmu_memory_cache_alloc(struct kvm_mmu_memory_cache *mc,
  279. size_t size)
  280. {
  281. void *p;
  282. BUG_ON(!mc->nobjs);
  283. p = mc->objects[--mc->nobjs];
  284. return p;
  285. }
  286. static struct kvm_pte_chain *mmu_alloc_pte_chain(struct kvm_vcpu *vcpu)
  287. {
  288. return mmu_memory_cache_alloc(&vcpu->arch.mmu_pte_chain_cache,
  289. sizeof(struct kvm_pte_chain));
  290. }
  291. static void mmu_free_pte_chain(struct kvm_pte_chain *pc)
  292. {
  293. kfree(pc);
  294. }
  295. static struct kvm_rmap_desc *mmu_alloc_rmap_desc(struct kvm_vcpu *vcpu)
  296. {
  297. return mmu_memory_cache_alloc(&vcpu->arch.mmu_rmap_desc_cache,
  298. sizeof(struct kvm_rmap_desc));
  299. }
  300. static void mmu_free_rmap_desc(struct kvm_rmap_desc *rd)
  301. {
  302. kfree(rd);
  303. }
  304. /*
  305. * Return the pointer to the largepage write count for a given
  306. * gfn, handling slots that are not large page aligned.
  307. */
  308. static int *slot_largepage_idx(gfn_t gfn, struct kvm_memory_slot *slot)
  309. {
  310. unsigned long idx;
  311. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  312. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  313. return &slot->lpage_info[idx].write_count;
  314. }
  315. static void account_shadowed(struct kvm *kvm, gfn_t gfn)
  316. {
  317. int *write_count;
  318. gfn = unalias_gfn(kvm, gfn);
  319. write_count = slot_largepage_idx(gfn,
  320. gfn_to_memslot_unaliased(kvm, gfn));
  321. *write_count += 1;
  322. }
  323. static void unaccount_shadowed(struct kvm *kvm, gfn_t gfn)
  324. {
  325. int *write_count;
  326. gfn = unalias_gfn(kvm, gfn);
  327. write_count = slot_largepage_idx(gfn,
  328. gfn_to_memslot_unaliased(kvm, gfn));
  329. *write_count -= 1;
  330. WARN_ON(*write_count < 0);
  331. }
  332. static int has_wrprotected_page(struct kvm *kvm, gfn_t gfn)
  333. {
  334. struct kvm_memory_slot *slot;
  335. int *largepage_idx;
  336. gfn = unalias_gfn(kvm, gfn);
  337. slot = gfn_to_memslot_unaliased(kvm, gfn);
  338. if (slot) {
  339. largepage_idx = slot_largepage_idx(gfn, slot);
  340. return *largepage_idx;
  341. }
  342. return 1;
  343. }
  344. static int host_largepage_backed(struct kvm *kvm, gfn_t gfn)
  345. {
  346. struct vm_area_struct *vma;
  347. unsigned long addr;
  348. int ret = 0;
  349. addr = gfn_to_hva(kvm, gfn);
  350. if (kvm_is_error_hva(addr))
  351. return ret;
  352. down_read(&current->mm->mmap_sem);
  353. vma = find_vma(current->mm, addr);
  354. if (vma && is_vm_hugetlb_page(vma))
  355. ret = 1;
  356. up_read(&current->mm->mmap_sem);
  357. return ret;
  358. }
  359. static int is_largepage_backed(struct kvm_vcpu *vcpu, gfn_t large_gfn)
  360. {
  361. struct kvm_memory_slot *slot;
  362. if (has_wrprotected_page(vcpu->kvm, large_gfn))
  363. return 0;
  364. if (!host_largepage_backed(vcpu->kvm, large_gfn))
  365. return 0;
  366. slot = gfn_to_memslot(vcpu->kvm, large_gfn);
  367. if (slot && slot->dirty_bitmap)
  368. return 0;
  369. return 1;
  370. }
  371. /*
  372. * Take gfn and return the reverse mapping to it.
  373. * Note: gfn must be unaliased before this function get called
  374. */
  375. static unsigned long *gfn_to_rmap(struct kvm *kvm, gfn_t gfn, int lpage)
  376. {
  377. struct kvm_memory_slot *slot;
  378. unsigned long idx;
  379. slot = gfn_to_memslot(kvm, gfn);
  380. if (!lpage)
  381. return &slot->rmap[gfn - slot->base_gfn];
  382. idx = (gfn / KVM_PAGES_PER_HPAGE) -
  383. (slot->base_gfn / KVM_PAGES_PER_HPAGE);
  384. return &slot->lpage_info[idx].rmap_pde;
  385. }
  386. /*
  387. * Reverse mapping data structures:
  388. *
  389. * If rmapp bit zero is zero, then rmapp point to the shadw page table entry
  390. * that points to page_address(page).
  391. *
  392. * If rmapp bit zero is one, (then rmap & ~1) points to a struct kvm_rmap_desc
  393. * containing more mappings.
  394. */
  395. static void rmap_add(struct kvm_vcpu *vcpu, u64 *spte, gfn_t gfn, int lpage)
  396. {
  397. struct kvm_mmu_page *sp;
  398. struct kvm_rmap_desc *desc;
  399. unsigned long *rmapp;
  400. int i;
  401. if (!is_rmap_pte(*spte))
  402. return;
  403. gfn = unalias_gfn(vcpu->kvm, gfn);
  404. sp = page_header(__pa(spte));
  405. sp->gfns[spte - sp->spt] = gfn;
  406. rmapp = gfn_to_rmap(vcpu->kvm, gfn, lpage);
  407. if (!*rmapp) {
  408. rmap_printk("rmap_add: %p %llx 0->1\n", spte, *spte);
  409. *rmapp = (unsigned long)spte;
  410. } else if (!(*rmapp & 1)) {
  411. rmap_printk("rmap_add: %p %llx 1->many\n", spte, *spte);
  412. desc = mmu_alloc_rmap_desc(vcpu);
  413. desc->shadow_ptes[0] = (u64 *)*rmapp;
  414. desc->shadow_ptes[1] = spte;
  415. *rmapp = (unsigned long)desc | 1;
  416. } else {
  417. rmap_printk("rmap_add: %p %llx many->many\n", spte, *spte);
  418. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  419. while (desc->shadow_ptes[RMAP_EXT-1] && desc->more)
  420. desc = desc->more;
  421. if (desc->shadow_ptes[RMAP_EXT-1]) {
  422. desc->more = mmu_alloc_rmap_desc(vcpu);
  423. desc = desc->more;
  424. }
  425. for (i = 0; desc->shadow_ptes[i]; ++i)
  426. ;
  427. desc->shadow_ptes[i] = spte;
  428. }
  429. }
  430. static void rmap_desc_remove_entry(unsigned long *rmapp,
  431. struct kvm_rmap_desc *desc,
  432. int i,
  433. struct kvm_rmap_desc *prev_desc)
  434. {
  435. int j;
  436. for (j = RMAP_EXT - 1; !desc->shadow_ptes[j] && j > i; --j)
  437. ;
  438. desc->shadow_ptes[i] = desc->shadow_ptes[j];
  439. desc->shadow_ptes[j] = NULL;
  440. if (j != 0)
  441. return;
  442. if (!prev_desc && !desc->more)
  443. *rmapp = (unsigned long)desc->shadow_ptes[0];
  444. else
  445. if (prev_desc)
  446. prev_desc->more = desc->more;
  447. else
  448. *rmapp = (unsigned long)desc->more | 1;
  449. mmu_free_rmap_desc(desc);
  450. }
  451. static void rmap_remove(struct kvm *kvm, u64 *spte)
  452. {
  453. struct kvm_rmap_desc *desc;
  454. struct kvm_rmap_desc *prev_desc;
  455. struct kvm_mmu_page *sp;
  456. pfn_t pfn;
  457. unsigned long *rmapp;
  458. int i;
  459. if (!is_rmap_pte(*spte))
  460. return;
  461. sp = page_header(__pa(spte));
  462. pfn = spte_to_pfn(*spte);
  463. if (*spte & shadow_accessed_mask)
  464. kvm_set_pfn_accessed(pfn);
  465. if (is_writeble_pte(*spte))
  466. kvm_release_pfn_dirty(pfn);
  467. else
  468. kvm_release_pfn_clean(pfn);
  469. rmapp = gfn_to_rmap(kvm, sp->gfns[spte - sp->spt], is_large_pte(*spte));
  470. if (!*rmapp) {
  471. printk(KERN_ERR "rmap_remove: %p %llx 0->BUG\n", spte, *spte);
  472. BUG();
  473. } else if (!(*rmapp & 1)) {
  474. rmap_printk("rmap_remove: %p %llx 1->0\n", spte, *spte);
  475. if ((u64 *)*rmapp != spte) {
  476. printk(KERN_ERR "rmap_remove: %p %llx 1->BUG\n",
  477. spte, *spte);
  478. BUG();
  479. }
  480. *rmapp = 0;
  481. } else {
  482. rmap_printk("rmap_remove: %p %llx many->many\n", spte, *spte);
  483. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  484. prev_desc = NULL;
  485. while (desc) {
  486. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i)
  487. if (desc->shadow_ptes[i] == spte) {
  488. rmap_desc_remove_entry(rmapp,
  489. desc, i,
  490. prev_desc);
  491. return;
  492. }
  493. prev_desc = desc;
  494. desc = desc->more;
  495. }
  496. BUG();
  497. }
  498. }
  499. static u64 *rmap_next(struct kvm *kvm, unsigned long *rmapp, u64 *spte)
  500. {
  501. struct kvm_rmap_desc *desc;
  502. struct kvm_rmap_desc *prev_desc;
  503. u64 *prev_spte;
  504. int i;
  505. if (!*rmapp)
  506. return NULL;
  507. else if (!(*rmapp & 1)) {
  508. if (!spte)
  509. return (u64 *)*rmapp;
  510. return NULL;
  511. }
  512. desc = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  513. prev_desc = NULL;
  514. prev_spte = NULL;
  515. while (desc) {
  516. for (i = 0; i < RMAP_EXT && desc->shadow_ptes[i]; ++i) {
  517. if (prev_spte == spte)
  518. return desc->shadow_ptes[i];
  519. prev_spte = desc->shadow_ptes[i];
  520. }
  521. desc = desc->more;
  522. }
  523. return NULL;
  524. }
  525. static int rmap_write_protect(struct kvm *kvm, u64 gfn)
  526. {
  527. unsigned long *rmapp;
  528. u64 *spte;
  529. int write_protected = 0;
  530. gfn = unalias_gfn(kvm, gfn);
  531. rmapp = gfn_to_rmap(kvm, gfn, 0);
  532. spte = rmap_next(kvm, rmapp, NULL);
  533. while (spte) {
  534. BUG_ON(!spte);
  535. BUG_ON(!(*spte & PT_PRESENT_MASK));
  536. rmap_printk("rmap_write_protect: spte %p %llx\n", spte, *spte);
  537. if (is_writeble_pte(*spte)) {
  538. set_shadow_pte(spte, *spte & ~PT_WRITABLE_MASK);
  539. write_protected = 1;
  540. }
  541. spte = rmap_next(kvm, rmapp, spte);
  542. }
  543. if (write_protected) {
  544. pfn_t pfn;
  545. spte = rmap_next(kvm, rmapp, NULL);
  546. pfn = spte_to_pfn(*spte);
  547. kvm_set_pfn_dirty(pfn);
  548. }
  549. /* check for huge page mappings */
  550. rmapp = gfn_to_rmap(kvm, gfn, 1);
  551. spte = rmap_next(kvm, rmapp, NULL);
  552. while (spte) {
  553. BUG_ON(!spte);
  554. BUG_ON(!(*spte & PT_PRESENT_MASK));
  555. BUG_ON((*spte & (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK)) != (PT_PAGE_SIZE_MASK|PT_PRESENT_MASK));
  556. pgprintk("rmap_write_protect(large): spte %p %llx %lld\n", spte, *spte, gfn);
  557. if (is_writeble_pte(*spte)) {
  558. rmap_remove(kvm, spte);
  559. --kvm->stat.lpages;
  560. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  561. spte = NULL;
  562. write_protected = 1;
  563. }
  564. spte = rmap_next(kvm, rmapp, spte);
  565. }
  566. return write_protected;
  567. }
  568. static int kvm_unmap_rmapp(struct kvm *kvm, unsigned long *rmapp)
  569. {
  570. u64 *spte;
  571. int need_tlb_flush = 0;
  572. while ((spte = rmap_next(kvm, rmapp, NULL))) {
  573. BUG_ON(!(*spte & PT_PRESENT_MASK));
  574. rmap_printk("kvm_rmap_unmap_hva: spte %p %llx\n", spte, *spte);
  575. rmap_remove(kvm, spte);
  576. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  577. need_tlb_flush = 1;
  578. }
  579. return need_tlb_flush;
  580. }
  581. static int kvm_handle_hva(struct kvm *kvm, unsigned long hva,
  582. int (*handler)(struct kvm *kvm, unsigned long *rmapp))
  583. {
  584. int i;
  585. int retval = 0;
  586. /*
  587. * If mmap_sem isn't taken, we can look the memslots with only
  588. * the mmu_lock by skipping over the slots with userspace_addr == 0.
  589. */
  590. for (i = 0; i < kvm->nmemslots; i++) {
  591. struct kvm_memory_slot *memslot = &kvm->memslots[i];
  592. unsigned long start = memslot->userspace_addr;
  593. unsigned long end;
  594. /* mmu_lock protects userspace_addr */
  595. if (!start)
  596. continue;
  597. end = start + (memslot->npages << PAGE_SHIFT);
  598. if (hva >= start && hva < end) {
  599. gfn_t gfn_offset = (hva - start) >> PAGE_SHIFT;
  600. retval |= handler(kvm, &memslot->rmap[gfn_offset]);
  601. retval |= handler(kvm,
  602. &memslot->lpage_info[
  603. gfn_offset /
  604. KVM_PAGES_PER_HPAGE].rmap_pde);
  605. }
  606. }
  607. return retval;
  608. }
  609. int kvm_unmap_hva(struct kvm *kvm, unsigned long hva)
  610. {
  611. return kvm_handle_hva(kvm, hva, kvm_unmap_rmapp);
  612. }
  613. static int kvm_age_rmapp(struct kvm *kvm, unsigned long *rmapp)
  614. {
  615. u64 *spte;
  616. int young = 0;
  617. /* always return old for EPT */
  618. if (!shadow_accessed_mask)
  619. return 0;
  620. spte = rmap_next(kvm, rmapp, NULL);
  621. while (spte) {
  622. int _young;
  623. u64 _spte = *spte;
  624. BUG_ON(!(_spte & PT_PRESENT_MASK));
  625. _young = _spte & PT_ACCESSED_MASK;
  626. if (_young) {
  627. young = 1;
  628. clear_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  629. }
  630. spte = rmap_next(kvm, rmapp, spte);
  631. }
  632. return young;
  633. }
  634. int kvm_age_hva(struct kvm *kvm, unsigned long hva)
  635. {
  636. return kvm_handle_hva(kvm, hva, kvm_age_rmapp);
  637. }
  638. #ifdef MMU_DEBUG
  639. static int is_empty_shadow_page(u64 *spt)
  640. {
  641. u64 *pos;
  642. u64 *end;
  643. for (pos = spt, end = pos + PAGE_SIZE / sizeof(u64); pos != end; pos++)
  644. if (is_shadow_present_pte(*pos)) {
  645. printk(KERN_ERR "%s: %p %llx\n", __func__,
  646. pos, *pos);
  647. return 0;
  648. }
  649. return 1;
  650. }
  651. #endif
  652. static void kvm_mmu_free_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  653. {
  654. ASSERT(is_empty_shadow_page(sp->spt));
  655. list_del(&sp->link);
  656. __free_page(virt_to_page(sp->spt));
  657. __free_page(virt_to_page(sp->gfns));
  658. kfree(sp);
  659. ++kvm->arch.n_free_mmu_pages;
  660. }
  661. static unsigned kvm_page_table_hashfn(gfn_t gfn)
  662. {
  663. return gfn & ((1 << KVM_MMU_HASH_SHIFT) - 1);
  664. }
  665. static struct kvm_mmu_page *kvm_mmu_alloc_page(struct kvm_vcpu *vcpu,
  666. u64 *parent_pte)
  667. {
  668. struct kvm_mmu_page *sp;
  669. sp = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_header_cache, sizeof *sp);
  670. sp->spt = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  671. sp->gfns = mmu_memory_cache_alloc(&vcpu->arch.mmu_page_cache, PAGE_SIZE);
  672. set_page_private(virt_to_page(sp->spt), (unsigned long)sp);
  673. list_add(&sp->link, &vcpu->kvm->arch.active_mmu_pages);
  674. INIT_LIST_HEAD(&sp->oos_link);
  675. bitmap_zero(sp->slot_bitmap, KVM_MEMORY_SLOTS + KVM_PRIVATE_MEM_SLOTS);
  676. sp->multimapped = 0;
  677. sp->parent_pte = parent_pte;
  678. --vcpu->kvm->arch.n_free_mmu_pages;
  679. return sp;
  680. }
  681. static void mmu_page_add_parent_pte(struct kvm_vcpu *vcpu,
  682. struct kvm_mmu_page *sp, u64 *parent_pte)
  683. {
  684. struct kvm_pte_chain *pte_chain;
  685. struct hlist_node *node;
  686. int i;
  687. if (!parent_pte)
  688. return;
  689. if (!sp->multimapped) {
  690. u64 *old = sp->parent_pte;
  691. if (!old) {
  692. sp->parent_pte = parent_pte;
  693. return;
  694. }
  695. sp->multimapped = 1;
  696. pte_chain = mmu_alloc_pte_chain(vcpu);
  697. INIT_HLIST_HEAD(&sp->parent_ptes);
  698. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  699. pte_chain->parent_ptes[0] = old;
  700. }
  701. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link) {
  702. if (pte_chain->parent_ptes[NR_PTE_CHAIN_ENTRIES-1])
  703. continue;
  704. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i)
  705. if (!pte_chain->parent_ptes[i]) {
  706. pte_chain->parent_ptes[i] = parent_pte;
  707. return;
  708. }
  709. }
  710. pte_chain = mmu_alloc_pte_chain(vcpu);
  711. BUG_ON(!pte_chain);
  712. hlist_add_head(&pte_chain->link, &sp->parent_ptes);
  713. pte_chain->parent_ptes[0] = parent_pte;
  714. }
  715. static void mmu_page_remove_parent_pte(struct kvm_mmu_page *sp,
  716. u64 *parent_pte)
  717. {
  718. struct kvm_pte_chain *pte_chain;
  719. struct hlist_node *node;
  720. int i;
  721. if (!sp->multimapped) {
  722. BUG_ON(sp->parent_pte != parent_pte);
  723. sp->parent_pte = NULL;
  724. return;
  725. }
  726. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  727. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  728. if (!pte_chain->parent_ptes[i])
  729. break;
  730. if (pte_chain->parent_ptes[i] != parent_pte)
  731. continue;
  732. while (i + 1 < NR_PTE_CHAIN_ENTRIES
  733. && pte_chain->parent_ptes[i + 1]) {
  734. pte_chain->parent_ptes[i]
  735. = pte_chain->parent_ptes[i + 1];
  736. ++i;
  737. }
  738. pte_chain->parent_ptes[i] = NULL;
  739. if (i == 0) {
  740. hlist_del(&pte_chain->link);
  741. mmu_free_pte_chain(pte_chain);
  742. if (hlist_empty(&sp->parent_ptes)) {
  743. sp->multimapped = 0;
  744. sp->parent_pte = NULL;
  745. }
  746. }
  747. return;
  748. }
  749. BUG();
  750. }
  751. static void mmu_parent_walk(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp,
  752. mmu_parent_walk_fn fn)
  753. {
  754. struct kvm_pte_chain *pte_chain;
  755. struct hlist_node *node;
  756. struct kvm_mmu_page *parent_sp;
  757. int i;
  758. if (!sp->multimapped && sp->parent_pte) {
  759. parent_sp = page_header(__pa(sp->parent_pte));
  760. fn(vcpu, parent_sp);
  761. mmu_parent_walk(vcpu, parent_sp, fn);
  762. return;
  763. }
  764. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  765. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  766. if (!pte_chain->parent_ptes[i])
  767. break;
  768. parent_sp = page_header(__pa(pte_chain->parent_ptes[i]));
  769. fn(vcpu, parent_sp);
  770. mmu_parent_walk(vcpu, parent_sp, fn);
  771. }
  772. }
  773. static void kvm_mmu_update_unsync_bitmap(u64 *spte)
  774. {
  775. unsigned int index;
  776. struct kvm_mmu_page *sp = page_header(__pa(spte));
  777. index = spte - sp->spt;
  778. if (!__test_and_set_bit(index, sp->unsync_child_bitmap))
  779. sp->unsync_children++;
  780. WARN_ON(!sp->unsync_children);
  781. }
  782. static void kvm_mmu_update_parents_unsync(struct kvm_mmu_page *sp)
  783. {
  784. struct kvm_pte_chain *pte_chain;
  785. struct hlist_node *node;
  786. int i;
  787. if (!sp->parent_pte)
  788. return;
  789. if (!sp->multimapped) {
  790. kvm_mmu_update_unsync_bitmap(sp->parent_pte);
  791. return;
  792. }
  793. hlist_for_each_entry(pte_chain, node, &sp->parent_ptes, link)
  794. for (i = 0; i < NR_PTE_CHAIN_ENTRIES; ++i) {
  795. if (!pte_chain->parent_ptes[i])
  796. break;
  797. kvm_mmu_update_unsync_bitmap(pte_chain->parent_ptes[i]);
  798. }
  799. }
  800. static int unsync_walk_fn(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  801. {
  802. kvm_mmu_update_parents_unsync(sp);
  803. return 1;
  804. }
  805. static void kvm_mmu_mark_parents_unsync(struct kvm_vcpu *vcpu,
  806. struct kvm_mmu_page *sp)
  807. {
  808. mmu_parent_walk(vcpu, sp, unsync_walk_fn);
  809. kvm_mmu_update_parents_unsync(sp);
  810. }
  811. static void nonpaging_prefetch_page(struct kvm_vcpu *vcpu,
  812. struct kvm_mmu_page *sp)
  813. {
  814. int i;
  815. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  816. sp->spt[i] = shadow_trap_nonpresent_pte;
  817. }
  818. static int nonpaging_sync_page(struct kvm_vcpu *vcpu,
  819. struct kvm_mmu_page *sp)
  820. {
  821. return 1;
  822. }
  823. static void nonpaging_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  824. {
  825. }
  826. #define KVM_PAGE_ARRAY_NR 16
  827. struct kvm_mmu_pages {
  828. struct mmu_page_and_offset {
  829. struct kvm_mmu_page *sp;
  830. unsigned int idx;
  831. } page[KVM_PAGE_ARRAY_NR];
  832. unsigned int nr;
  833. };
  834. #define for_each_unsync_children(bitmap, idx) \
  835. for (idx = find_first_bit(bitmap, 512); \
  836. idx < 512; \
  837. idx = find_next_bit(bitmap, 512, idx+1))
  838. static int mmu_pages_add(struct kvm_mmu_pages *pvec, struct kvm_mmu_page *sp,
  839. int idx)
  840. {
  841. int i;
  842. if (sp->unsync)
  843. for (i=0; i < pvec->nr; i++)
  844. if (pvec->page[i].sp == sp)
  845. return 0;
  846. pvec->page[pvec->nr].sp = sp;
  847. pvec->page[pvec->nr].idx = idx;
  848. pvec->nr++;
  849. return (pvec->nr == KVM_PAGE_ARRAY_NR);
  850. }
  851. static int __mmu_unsync_walk(struct kvm_mmu_page *sp,
  852. struct kvm_mmu_pages *pvec)
  853. {
  854. int i, ret, nr_unsync_leaf = 0;
  855. for_each_unsync_children(sp->unsync_child_bitmap, i) {
  856. u64 ent = sp->spt[i];
  857. if (is_shadow_present_pte(ent) && !is_large_pte(ent)) {
  858. struct kvm_mmu_page *child;
  859. child = page_header(ent & PT64_BASE_ADDR_MASK);
  860. if (child->unsync_children) {
  861. if (mmu_pages_add(pvec, child, i))
  862. return -ENOSPC;
  863. ret = __mmu_unsync_walk(child, pvec);
  864. if (!ret)
  865. __clear_bit(i, sp->unsync_child_bitmap);
  866. else if (ret > 0)
  867. nr_unsync_leaf += ret;
  868. else
  869. return ret;
  870. }
  871. if (child->unsync) {
  872. nr_unsync_leaf++;
  873. if (mmu_pages_add(pvec, child, i))
  874. return -ENOSPC;
  875. }
  876. }
  877. }
  878. if (find_first_bit(sp->unsync_child_bitmap, 512) == 512)
  879. sp->unsync_children = 0;
  880. return nr_unsync_leaf;
  881. }
  882. static int mmu_unsync_walk(struct kvm_mmu_page *sp,
  883. struct kvm_mmu_pages *pvec)
  884. {
  885. if (!sp->unsync_children)
  886. return 0;
  887. mmu_pages_add(pvec, sp, 0);
  888. return __mmu_unsync_walk(sp, pvec);
  889. }
  890. static struct kvm_mmu_page *kvm_mmu_lookup_page(struct kvm *kvm, gfn_t gfn)
  891. {
  892. unsigned index;
  893. struct hlist_head *bucket;
  894. struct kvm_mmu_page *sp;
  895. struct hlist_node *node;
  896. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  897. index = kvm_page_table_hashfn(gfn);
  898. bucket = &kvm->arch.mmu_page_hash[index];
  899. hlist_for_each_entry(sp, node, bucket, hash_link)
  900. if (sp->gfn == gfn && !sp->role.direct
  901. && !sp->role.invalid) {
  902. pgprintk("%s: found role %x\n",
  903. __func__, sp->role.word);
  904. return sp;
  905. }
  906. return NULL;
  907. }
  908. static void kvm_unlink_unsync_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  909. {
  910. WARN_ON(!sp->unsync);
  911. sp->unsync = 0;
  912. --kvm->stat.mmu_unsync;
  913. }
  914. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp);
  915. static int kvm_sync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  916. {
  917. if (sp->role.glevels != vcpu->arch.mmu.root_level) {
  918. kvm_mmu_zap_page(vcpu->kvm, sp);
  919. return 1;
  920. }
  921. if (rmap_write_protect(vcpu->kvm, sp->gfn))
  922. kvm_flush_remote_tlbs(vcpu->kvm);
  923. kvm_unlink_unsync_page(vcpu->kvm, sp);
  924. if (vcpu->arch.mmu.sync_page(vcpu, sp)) {
  925. kvm_mmu_zap_page(vcpu->kvm, sp);
  926. return 1;
  927. }
  928. kvm_mmu_flush_tlb(vcpu);
  929. return 0;
  930. }
  931. struct mmu_page_path {
  932. struct kvm_mmu_page *parent[PT64_ROOT_LEVEL-1];
  933. unsigned int idx[PT64_ROOT_LEVEL-1];
  934. };
  935. #define for_each_sp(pvec, sp, parents, i) \
  936. for (i = mmu_pages_next(&pvec, &parents, -1), \
  937. sp = pvec.page[i].sp; \
  938. i < pvec.nr && ({ sp = pvec.page[i].sp; 1;}); \
  939. i = mmu_pages_next(&pvec, &parents, i))
  940. static int mmu_pages_next(struct kvm_mmu_pages *pvec,
  941. struct mmu_page_path *parents,
  942. int i)
  943. {
  944. int n;
  945. for (n = i+1; n < pvec->nr; n++) {
  946. struct kvm_mmu_page *sp = pvec->page[n].sp;
  947. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  948. parents->idx[0] = pvec->page[n].idx;
  949. return n;
  950. }
  951. parents->parent[sp->role.level-2] = sp;
  952. parents->idx[sp->role.level-1] = pvec->page[n].idx;
  953. }
  954. return n;
  955. }
  956. static void mmu_pages_clear_parents(struct mmu_page_path *parents)
  957. {
  958. struct kvm_mmu_page *sp;
  959. unsigned int level = 0;
  960. do {
  961. unsigned int idx = parents->idx[level];
  962. sp = parents->parent[level];
  963. if (!sp)
  964. return;
  965. --sp->unsync_children;
  966. WARN_ON((int)sp->unsync_children < 0);
  967. __clear_bit(idx, sp->unsync_child_bitmap);
  968. level++;
  969. } while (level < PT64_ROOT_LEVEL-1 && !sp->unsync_children);
  970. }
  971. static void kvm_mmu_pages_init(struct kvm_mmu_page *parent,
  972. struct mmu_page_path *parents,
  973. struct kvm_mmu_pages *pvec)
  974. {
  975. parents->parent[parent->role.level-1] = NULL;
  976. pvec->nr = 0;
  977. }
  978. static void mmu_sync_children(struct kvm_vcpu *vcpu,
  979. struct kvm_mmu_page *parent)
  980. {
  981. int i;
  982. struct kvm_mmu_page *sp;
  983. struct mmu_page_path parents;
  984. struct kvm_mmu_pages pages;
  985. kvm_mmu_pages_init(parent, &parents, &pages);
  986. while (mmu_unsync_walk(parent, &pages)) {
  987. int protected = 0;
  988. for_each_sp(pages, sp, parents, i)
  989. protected |= rmap_write_protect(vcpu->kvm, sp->gfn);
  990. if (protected)
  991. kvm_flush_remote_tlbs(vcpu->kvm);
  992. for_each_sp(pages, sp, parents, i) {
  993. kvm_sync_page(vcpu, sp);
  994. mmu_pages_clear_parents(&parents);
  995. }
  996. cond_resched_lock(&vcpu->kvm->mmu_lock);
  997. kvm_mmu_pages_init(parent, &parents, &pages);
  998. }
  999. }
  1000. static struct kvm_mmu_page *kvm_mmu_get_page(struct kvm_vcpu *vcpu,
  1001. gfn_t gfn,
  1002. gva_t gaddr,
  1003. unsigned level,
  1004. int direct,
  1005. unsigned access,
  1006. u64 *parent_pte)
  1007. {
  1008. union kvm_mmu_page_role role;
  1009. unsigned index;
  1010. unsigned quadrant;
  1011. struct hlist_head *bucket;
  1012. struct kvm_mmu_page *sp;
  1013. struct hlist_node *node, *tmp;
  1014. role = vcpu->arch.mmu.base_role;
  1015. role.level = level;
  1016. role.direct = direct;
  1017. role.access = access;
  1018. if (vcpu->arch.mmu.root_level <= PT32_ROOT_LEVEL) {
  1019. quadrant = gaddr >> (PAGE_SHIFT + (PT64_PT_BITS * level));
  1020. quadrant &= (1 << ((PT32_PT_BITS - PT64_PT_BITS) * level)) - 1;
  1021. role.quadrant = quadrant;
  1022. }
  1023. pgprintk("%s: looking gfn %lx role %x\n", __func__,
  1024. gfn, role.word);
  1025. index = kvm_page_table_hashfn(gfn);
  1026. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1027. hlist_for_each_entry_safe(sp, node, tmp, bucket, hash_link)
  1028. if (sp->gfn == gfn) {
  1029. if (sp->unsync)
  1030. if (kvm_sync_page(vcpu, sp))
  1031. continue;
  1032. if (sp->role.word != role.word)
  1033. continue;
  1034. mmu_page_add_parent_pte(vcpu, sp, parent_pte);
  1035. if (sp->unsync_children) {
  1036. set_bit(KVM_REQ_MMU_SYNC, &vcpu->requests);
  1037. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1038. }
  1039. pgprintk("%s: found\n", __func__);
  1040. return sp;
  1041. }
  1042. ++vcpu->kvm->stat.mmu_cache_miss;
  1043. sp = kvm_mmu_alloc_page(vcpu, parent_pte);
  1044. if (!sp)
  1045. return sp;
  1046. pgprintk("%s: adding gfn %lx role %x\n", __func__, gfn, role.word);
  1047. sp->gfn = gfn;
  1048. sp->role = role;
  1049. hlist_add_head(&sp->hash_link, bucket);
  1050. if (!direct) {
  1051. if (rmap_write_protect(vcpu->kvm, gfn))
  1052. kvm_flush_remote_tlbs(vcpu->kvm);
  1053. account_shadowed(vcpu->kvm, gfn);
  1054. }
  1055. if (shadow_trap_nonpresent_pte != shadow_notrap_nonpresent_pte)
  1056. vcpu->arch.mmu.prefetch_page(vcpu, sp);
  1057. else
  1058. nonpaging_prefetch_page(vcpu, sp);
  1059. return sp;
  1060. }
  1061. static void shadow_walk_init(struct kvm_shadow_walk_iterator *iterator,
  1062. struct kvm_vcpu *vcpu, u64 addr)
  1063. {
  1064. iterator->addr = addr;
  1065. iterator->shadow_addr = vcpu->arch.mmu.root_hpa;
  1066. iterator->level = vcpu->arch.mmu.shadow_root_level;
  1067. if (iterator->level == PT32E_ROOT_LEVEL) {
  1068. iterator->shadow_addr
  1069. = vcpu->arch.mmu.pae_root[(addr >> 30) & 3];
  1070. iterator->shadow_addr &= PT64_BASE_ADDR_MASK;
  1071. --iterator->level;
  1072. if (!iterator->shadow_addr)
  1073. iterator->level = 0;
  1074. }
  1075. }
  1076. static bool shadow_walk_okay(struct kvm_shadow_walk_iterator *iterator)
  1077. {
  1078. if (iterator->level < PT_PAGE_TABLE_LEVEL)
  1079. return false;
  1080. iterator->index = SHADOW_PT_INDEX(iterator->addr, iterator->level);
  1081. iterator->sptep = ((u64 *)__va(iterator->shadow_addr)) + iterator->index;
  1082. return true;
  1083. }
  1084. static void shadow_walk_next(struct kvm_shadow_walk_iterator *iterator)
  1085. {
  1086. iterator->shadow_addr = *iterator->sptep & PT64_BASE_ADDR_MASK;
  1087. --iterator->level;
  1088. }
  1089. static void kvm_mmu_page_unlink_children(struct kvm *kvm,
  1090. struct kvm_mmu_page *sp)
  1091. {
  1092. unsigned i;
  1093. u64 *pt;
  1094. u64 ent;
  1095. pt = sp->spt;
  1096. if (sp->role.level == PT_PAGE_TABLE_LEVEL) {
  1097. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1098. if (is_shadow_present_pte(pt[i]))
  1099. rmap_remove(kvm, &pt[i]);
  1100. pt[i] = shadow_trap_nonpresent_pte;
  1101. }
  1102. return;
  1103. }
  1104. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1105. ent = pt[i];
  1106. if (is_shadow_present_pte(ent)) {
  1107. if (!is_large_pte(ent)) {
  1108. ent &= PT64_BASE_ADDR_MASK;
  1109. mmu_page_remove_parent_pte(page_header(ent),
  1110. &pt[i]);
  1111. } else {
  1112. --kvm->stat.lpages;
  1113. rmap_remove(kvm, &pt[i]);
  1114. }
  1115. }
  1116. pt[i] = shadow_trap_nonpresent_pte;
  1117. }
  1118. }
  1119. static void kvm_mmu_put_page(struct kvm_mmu_page *sp, u64 *parent_pte)
  1120. {
  1121. mmu_page_remove_parent_pte(sp, parent_pte);
  1122. }
  1123. static void kvm_mmu_reset_last_pte_updated(struct kvm *kvm)
  1124. {
  1125. int i;
  1126. for (i = 0; i < KVM_MAX_VCPUS; ++i)
  1127. if (kvm->vcpus[i])
  1128. kvm->vcpus[i]->arch.last_pte_updated = NULL;
  1129. }
  1130. static void kvm_mmu_unlink_parents(struct kvm *kvm, struct kvm_mmu_page *sp)
  1131. {
  1132. u64 *parent_pte;
  1133. while (sp->multimapped || sp->parent_pte) {
  1134. if (!sp->multimapped)
  1135. parent_pte = sp->parent_pte;
  1136. else {
  1137. struct kvm_pte_chain *chain;
  1138. chain = container_of(sp->parent_ptes.first,
  1139. struct kvm_pte_chain, link);
  1140. parent_pte = chain->parent_ptes[0];
  1141. }
  1142. BUG_ON(!parent_pte);
  1143. kvm_mmu_put_page(sp, parent_pte);
  1144. set_shadow_pte(parent_pte, shadow_trap_nonpresent_pte);
  1145. }
  1146. }
  1147. static int mmu_zap_unsync_children(struct kvm *kvm,
  1148. struct kvm_mmu_page *parent)
  1149. {
  1150. int i, zapped = 0;
  1151. struct mmu_page_path parents;
  1152. struct kvm_mmu_pages pages;
  1153. if (parent->role.level == PT_PAGE_TABLE_LEVEL)
  1154. return 0;
  1155. kvm_mmu_pages_init(parent, &parents, &pages);
  1156. while (mmu_unsync_walk(parent, &pages)) {
  1157. struct kvm_mmu_page *sp;
  1158. for_each_sp(pages, sp, parents, i) {
  1159. kvm_mmu_zap_page(kvm, sp);
  1160. mmu_pages_clear_parents(&parents);
  1161. }
  1162. zapped += pages.nr;
  1163. kvm_mmu_pages_init(parent, &parents, &pages);
  1164. }
  1165. return zapped;
  1166. }
  1167. static int kvm_mmu_zap_page(struct kvm *kvm, struct kvm_mmu_page *sp)
  1168. {
  1169. int ret;
  1170. ++kvm->stat.mmu_shadow_zapped;
  1171. ret = mmu_zap_unsync_children(kvm, sp);
  1172. kvm_mmu_page_unlink_children(kvm, sp);
  1173. kvm_mmu_unlink_parents(kvm, sp);
  1174. kvm_flush_remote_tlbs(kvm);
  1175. if (!sp->role.invalid && !sp->role.direct)
  1176. unaccount_shadowed(kvm, sp->gfn);
  1177. if (sp->unsync)
  1178. kvm_unlink_unsync_page(kvm, sp);
  1179. if (!sp->root_count) {
  1180. hlist_del(&sp->hash_link);
  1181. kvm_mmu_free_page(kvm, sp);
  1182. } else {
  1183. sp->role.invalid = 1;
  1184. list_move(&sp->link, &kvm->arch.active_mmu_pages);
  1185. kvm_reload_remote_mmus(kvm);
  1186. }
  1187. kvm_mmu_reset_last_pte_updated(kvm);
  1188. return ret;
  1189. }
  1190. /*
  1191. * Changing the number of mmu pages allocated to the vm
  1192. * Note: if kvm_nr_mmu_pages is too small, you will get dead lock
  1193. */
  1194. void kvm_mmu_change_mmu_pages(struct kvm *kvm, unsigned int kvm_nr_mmu_pages)
  1195. {
  1196. /*
  1197. * If we set the number of mmu pages to be smaller be than the
  1198. * number of actived pages , we must to free some mmu pages before we
  1199. * change the value
  1200. */
  1201. if ((kvm->arch.n_alloc_mmu_pages - kvm->arch.n_free_mmu_pages) >
  1202. kvm_nr_mmu_pages) {
  1203. int n_used_mmu_pages = kvm->arch.n_alloc_mmu_pages
  1204. - kvm->arch.n_free_mmu_pages;
  1205. while (n_used_mmu_pages > kvm_nr_mmu_pages) {
  1206. struct kvm_mmu_page *page;
  1207. page = container_of(kvm->arch.active_mmu_pages.prev,
  1208. struct kvm_mmu_page, link);
  1209. kvm_mmu_zap_page(kvm, page);
  1210. n_used_mmu_pages--;
  1211. }
  1212. kvm->arch.n_free_mmu_pages = 0;
  1213. }
  1214. else
  1215. kvm->arch.n_free_mmu_pages += kvm_nr_mmu_pages
  1216. - kvm->arch.n_alloc_mmu_pages;
  1217. kvm->arch.n_alloc_mmu_pages = kvm_nr_mmu_pages;
  1218. }
  1219. static int kvm_mmu_unprotect_page(struct kvm *kvm, gfn_t gfn)
  1220. {
  1221. unsigned index;
  1222. struct hlist_head *bucket;
  1223. struct kvm_mmu_page *sp;
  1224. struct hlist_node *node, *n;
  1225. int r;
  1226. pgprintk("%s: looking for gfn %lx\n", __func__, gfn);
  1227. r = 0;
  1228. index = kvm_page_table_hashfn(gfn);
  1229. bucket = &kvm->arch.mmu_page_hash[index];
  1230. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link)
  1231. if (sp->gfn == gfn && !sp->role.direct) {
  1232. pgprintk("%s: gfn %lx role %x\n", __func__, gfn,
  1233. sp->role.word);
  1234. r = 1;
  1235. if (kvm_mmu_zap_page(kvm, sp))
  1236. n = bucket->first;
  1237. }
  1238. return r;
  1239. }
  1240. static void mmu_unshadow(struct kvm *kvm, gfn_t gfn)
  1241. {
  1242. unsigned index;
  1243. struct hlist_head *bucket;
  1244. struct kvm_mmu_page *sp;
  1245. struct hlist_node *node, *nn;
  1246. index = kvm_page_table_hashfn(gfn);
  1247. bucket = &kvm->arch.mmu_page_hash[index];
  1248. hlist_for_each_entry_safe(sp, node, nn, bucket, hash_link) {
  1249. if (sp->gfn == gfn && !sp->role.direct
  1250. && !sp->role.invalid) {
  1251. pgprintk("%s: zap %lx %x\n",
  1252. __func__, gfn, sp->role.word);
  1253. kvm_mmu_zap_page(kvm, sp);
  1254. }
  1255. }
  1256. }
  1257. static void page_header_update_slot(struct kvm *kvm, void *pte, gfn_t gfn)
  1258. {
  1259. int slot = memslot_id(kvm, gfn_to_memslot(kvm, gfn));
  1260. struct kvm_mmu_page *sp = page_header(__pa(pte));
  1261. __set_bit(slot, sp->slot_bitmap);
  1262. }
  1263. static void mmu_convert_notrap(struct kvm_mmu_page *sp)
  1264. {
  1265. int i;
  1266. u64 *pt = sp->spt;
  1267. if (shadow_trap_nonpresent_pte == shadow_notrap_nonpresent_pte)
  1268. return;
  1269. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  1270. if (pt[i] == shadow_notrap_nonpresent_pte)
  1271. set_shadow_pte(&pt[i], shadow_trap_nonpresent_pte);
  1272. }
  1273. }
  1274. struct page *gva_to_page(struct kvm_vcpu *vcpu, gva_t gva)
  1275. {
  1276. struct page *page;
  1277. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  1278. if (gpa == UNMAPPED_GVA)
  1279. return NULL;
  1280. page = gfn_to_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  1281. return page;
  1282. }
  1283. /*
  1284. * The function is based on mtrr_type_lookup() in
  1285. * arch/x86/kernel/cpu/mtrr/generic.c
  1286. */
  1287. static int get_mtrr_type(struct mtrr_state_type *mtrr_state,
  1288. u64 start, u64 end)
  1289. {
  1290. int i;
  1291. u64 base, mask;
  1292. u8 prev_match, curr_match;
  1293. int num_var_ranges = KVM_NR_VAR_MTRR;
  1294. if (!mtrr_state->enabled)
  1295. return 0xFF;
  1296. /* Make end inclusive end, instead of exclusive */
  1297. end--;
  1298. /* Look in fixed ranges. Just return the type as per start */
  1299. if (mtrr_state->have_fixed && (start < 0x100000)) {
  1300. int idx;
  1301. if (start < 0x80000) {
  1302. idx = 0;
  1303. idx += (start >> 16);
  1304. return mtrr_state->fixed_ranges[idx];
  1305. } else if (start < 0xC0000) {
  1306. idx = 1 * 8;
  1307. idx += ((start - 0x80000) >> 14);
  1308. return mtrr_state->fixed_ranges[idx];
  1309. } else if (start < 0x1000000) {
  1310. idx = 3 * 8;
  1311. idx += ((start - 0xC0000) >> 12);
  1312. return mtrr_state->fixed_ranges[idx];
  1313. }
  1314. }
  1315. /*
  1316. * Look in variable ranges
  1317. * Look of multiple ranges matching this address and pick type
  1318. * as per MTRR precedence
  1319. */
  1320. if (!(mtrr_state->enabled & 2))
  1321. return mtrr_state->def_type;
  1322. prev_match = 0xFF;
  1323. for (i = 0; i < num_var_ranges; ++i) {
  1324. unsigned short start_state, end_state;
  1325. if (!(mtrr_state->var_ranges[i].mask_lo & (1 << 11)))
  1326. continue;
  1327. base = (((u64)mtrr_state->var_ranges[i].base_hi) << 32) +
  1328. (mtrr_state->var_ranges[i].base_lo & PAGE_MASK);
  1329. mask = (((u64)mtrr_state->var_ranges[i].mask_hi) << 32) +
  1330. (mtrr_state->var_ranges[i].mask_lo & PAGE_MASK);
  1331. start_state = ((start & mask) == (base & mask));
  1332. end_state = ((end & mask) == (base & mask));
  1333. if (start_state != end_state)
  1334. return 0xFE;
  1335. if ((start & mask) != (base & mask))
  1336. continue;
  1337. curr_match = mtrr_state->var_ranges[i].base_lo & 0xff;
  1338. if (prev_match == 0xFF) {
  1339. prev_match = curr_match;
  1340. continue;
  1341. }
  1342. if (prev_match == MTRR_TYPE_UNCACHABLE ||
  1343. curr_match == MTRR_TYPE_UNCACHABLE)
  1344. return MTRR_TYPE_UNCACHABLE;
  1345. if ((prev_match == MTRR_TYPE_WRBACK &&
  1346. curr_match == MTRR_TYPE_WRTHROUGH) ||
  1347. (prev_match == MTRR_TYPE_WRTHROUGH &&
  1348. curr_match == MTRR_TYPE_WRBACK)) {
  1349. prev_match = MTRR_TYPE_WRTHROUGH;
  1350. curr_match = MTRR_TYPE_WRTHROUGH;
  1351. }
  1352. if (prev_match != curr_match)
  1353. return MTRR_TYPE_UNCACHABLE;
  1354. }
  1355. if (prev_match != 0xFF)
  1356. return prev_match;
  1357. return mtrr_state->def_type;
  1358. }
  1359. u8 kvm_get_guest_memory_type(struct kvm_vcpu *vcpu, gfn_t gfn)
  1360. {
  1361. u8 mtrr;
  1362. mtrr = get_mtrr_type(&vcpu->arch.mtrr_state, gfn << PAGE_SHIFT,
  1363. (gfn << PAGE_SHIFT) + PAGE_SIZE);
  1364. if (mtrr == 0xfe || mtrr == 0xff)
  1365. mtrr = MTRR_TYPE_WRBACK;
  1366. return mtrr;
  1367. }
  1368. EXPORT_SYMBOL_GPL(kvm_get_guest_memory_type);
  1369. static int kvm_unsync_page(struct kvm_vcpu *vcpu, struct kvm_mmu_page *sp)
  1370. {
  1371. unsigned index;
  1372. struct hlist_head *bucket;
  1373. struct kvm_mmu_page *s;
  1374. struct hlist_node *node, *n;
  1375. index = kvm_page_table_hashfn(sp->gfn);
  1376. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  1377. /* don't unsync if pagetable is shadowed with multiple roles */
  1378. hlist_for_each_entry_safe(s, node, n, bucket, hash_link) {
  1379. if (s->gfn != sp->gfn || s->role.direct)
  1380. continue;
  1381. if (s->role.word != sp->role.word)
  1382. return 1;
  1383. }
  1384. ++vcpu->kvm->stat.mmu_unsync;
  1385. sp->unsync = 1;
  1386. kvm_mmu_mark_parents_unsync(vcpu, sp);
  1387. mmu_convert_notrap(sp);
  1388. return 0;
  1389. }
  1390. static int mmu_need_write_protect(struct kvm_vcpu *vcpu, gfn_t gfn,
  1391. bool can_unsync)
  1392. {
  1393. struct kvm_mmu_page *shadow;
  1394. shadow = kvm_mmu_lookup_page(vcpu->kvm, gfn);
  1395. if (shadow) {
  1396. if (shadow->role.level != PT_PAGE_TABLE_LEVEL)
  1397. return 1;
  1398. if (shadow->unsync)
  1399. return 0;
  1400. if (can_unsync && oos_shadow)
  1401. return kvm_unsync_page(vcpu, shadow);
  1402. return 1;
  1403. }
  1404. return 0;
  1405. }
  1406. static int set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1407. unsigned pte_access, int user_fault,
  1408. int write_fault, int dirty, int largepage,
  1409. gfn_t gfn, pfn_t pfn, bool speculative,
  1410. bool can_unsync)
  1411. {
  1412. u64 spte;
  1413. int ret = 0;
  1414. /*
  1415. * We don't set the accessed bit, since we sometimes want to see
  1416. * whether the guest actually used the pte (in order to detect
  1417. * demand paging).
  1418. */
  1419. spte = shadow_base_present_pte | shadow_dirty_mask;
  1420. if (!speculative)
  1421. spte |= shadow_accessed_mask;
  1422. if (!dirty)
  1423. pte_access &= ~ACC_WRITE_MASK;
  1424. if (pte_access & ACC_EXEC_MASK)
  1425. spte |= shadow_x_mask;
  1426. else
  1427. spte |= shadow_nx_mask;
  1428. if (pte_access & ACC_USER_MASK)
  1429. spte |= shadow_user_mask;
  1430. if (largepage)
  1431. spte |= PT_PAGE_SIZE_MASK;
  1432. if (tdp_enabled)
  1433. spte |= kvm_x86_ops->get_mt_mask(vcpu, gfn,
  1434. kvm_is_mmio_pfn(pfn));
  1435. spte |= (u64)pfn << PAGE_SHIFT;
  1436. if ((pte_access & ACC_WRITE_MASK)
  1437. || (write_fault && !is_write_protection(vcpu) && !user_fault)) {
  1438. if (largepage && has_wrprotected_page(vcpu->kvm, gfn)) {
  1439. ret = 1;
  1440. spte = shadow_trap_nonpresent_pte;
  1441. goto set_pte;
  1442. }
  1443. spte |= PT_WRITABLE_MASK;
  1444. /*
  1445. * Optimization: for pte sync, if spte was writable the hash
  1446. * lookup is unnecessary (and expensive). Write protection
  1447. * is responsibility of mmu_get_page / kvm_sync_page.
  1448. * Same reasoning can be applied to dirty page accounting.
  1449. */
  1450. if (!can_unsync && is_writeble_pte(*shadow_pte))
  1451. goto set_pte;
  1452. if (mmu_need_write_protect(vcpu, gfn, can_unsync)) {
  1453. pgprintk("%s: found shadow page for %lx, marking ro\n",
  1454. __func__, gfn);
  1455. ret = 1;
  1456. pte_access &= ~ACC_WRITE_MASK;
  1457. if (is_writeble_pte(spte))
  1458. spte &= ~PT_WRITABLE_MASK;
  1459. }
  1460. }
  1461. if (pte_access & ACC_WRITE_MASK)
  1462. mark_page_dirty(vcpu->kvm, gfn);
  1463. set_pte:
  1464. set_shadow_pte(shadow_pte, spte);
  1465. return ret;
  1466. }
  1467. static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte,
  1468. unsigned pt_access, unsigned pte_access,
  1469. int user_fault, int write_fault, int dirty,
  1470. int *ptwrite, int largepage, gfn_t gfn,
  1471. pfn_t pfn, bool speculative)
  1472. {
  1473. int was_rmapped = 0;
  1474. int was_writeble = is_writeble_pte(*shadow_pte);
  1475. pgprintk("%s: spte %llx access %x write_fault %d"
  1476. " user_fault %d gfn %lx\n",
  1477. __func__, *shadow_pte, pt_access,
  1478. write_fault, user_fault, gfn);
  1479. if (is_rmap_pte(*shadow_pte)) {
  1480. /*
  1481. * If we overwrite a PTE page pointer with a 2MB PMD, unlink
  1482. * the parent of the now unreachable PTE.
  1483. */
  1484. if (largepage && !is_large_pte(*shadow_pte)) {
  1485. struct kvm_mmu_page *child;
  1486. u64 pte = *shadow_pte;
  1487. child = page_header(pte & PT64_BASE_ADDR_MASK);
  1488. mmu_page_remove_parent_pte(child, shadow_pte);
  1489. } else if (pfn != spte_to_pfn(*shadow_pte)) {
  1490. pgprintk("hfn old %lx new %lx\n",
  1491. spte_to_pfn(*shadow_pte), pfn);
  1492. rmap_remove(vcpu->kvm, shadow_pte);
  1493. } else
  1494. was_rmapped = 1;
  1495. }
  1496. if (set_spte(vcpu, shadow_pte, pte_access, user_fault, write_fault,
  1497. dirty, largepage, gfn, pfn, speculative, true)) {
  1498. if (write_fault)
  1499. *ptwrite = 1;
  1500. kvm_x86_ops->tlb_flush(vcpu);
  1501. }
  1502. pgprintk("%s: setting spte %llx\n", __func__, *shadow_pte);
  1503. pgprintk("instantiating %s PTE (%s) at %ld (%llx) addr %p\n",
  1504. is_large_pte(*shadow_pte)? "2MB" : "4kB",
  1505. is_present_pte(*shadow_pte)?"RW":"R", gfn,
  1506. *shadow_pte, shadow_pte);
  1507. if (!was_rmapped && is_large_pte(*shadow_pte))
  1508. ++vcpu->kvm->stat.lpages;
  1509. page_header_update_slot(vcpu->kvm, shadow_pte, gfn);
  1510. if (!was_rmapped) {
  1511. rmap_add(vcpu, shadow_pte, gfn, largepage);
  1512. if (!is_rmap_pte(*shadow_pte))
  1513. kvm_release_pfn_clean(pfn);
  1514. } else {
  1515. if (was_writeble)
  1516. kvm_release_pfn_dirty(pfn);
  1517. else
  1518. kvm_release_pfn_clean(pfn);
  1519. }
  1520. if (speculative) {
  1521. vcpu->arch.last_pte_updated = shadow_pte;
  1522. vcpu->arch.last_pte_gfn = gfn;
  1523. }
  1524. }
  1525. static void nonpaging_new_cr3(struct kvm_vcpu *vcpu)
  1526. {
  1527. }
  1528. static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write,
  1529. int largepage, gfn_t gfn, pfn_t pfn)
  1530. {
  1531. struct kvm_shadow_walk_iterator iterator;
  1532. struct kvm_mmu_page *sp;
  1533. int pt_write = 0;
  1534. gfn_t pseudo_gfn;
  1535. for_each_shadow_entry(vcpu, (u64)gfn << PAGE_SHIFT, iterator) {
  1536. if (iterator.level == PT_PAGE_TABLE_LEVEL
  1537. || (largepage && iterator.level == PT_DIRECTORY_LEVEL)) {
  1538. mmu_set_spte(vcpu, iterator.sptep, ACC_ALL, ACC_ALL,
  1539. 0, write, 1, &pt_write,
  1540. largepage, gfn, pfn, false);
  1541. ++vcpu->stat.pf_fixed;
  1542. break;
  1543. }
  1544. if (*iterator.sptep == shadow_trap_nonpresent_pte) {
  1545. pseudo_gfn = (iterator.addr & PT64_DIR_BASE_ADDR_MASK) >> PAGE_SHIFT;
  1546. sp = kvm_mmu_get_page(vcpu, pseudo_gfn, iterator.addr,
  1547. iterator.level - 1,
  1548. 1, ACC_ALL, iterator.sptep);
  1549. if (!sp) {
  1550. pgprintk("nonpaging_map: ENOMEM\n");
  1551. kvm_release_pfn_clean(pfn);
  1552. return -ENOMEM;
  1553. }
  1554. set_shadow_pte(iterator.sptep,
  1555. __pa(sp->spt)
  1556. | PT_PRESENT_MASK | PT_WRITABLE_MASK
  1557. | shadow_user_mask | shadow_x_mask);
  1558. }
  1559. }
  1560. return pt_write;
  1561. }
  1562. static int nonpaging_map(struct kvm_vcpu *vcpu, gva_t v, int write, gfn_t gfn)
  1563. {
  1564. int r;
  1565. int largepage = 0;
  1566. pfn_t pfn;
  1567. unsigned long mmu_seq;
  1568. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1569. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1570. largepage = 1;
  1571. }
  1572. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1573. smp_rmb();
  1574. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1575. /* mmio */
  1576. if (is_error_pfn(pfn)) {
  1577. kvm_release_pfn_clean(pfn);
  1578. return 1;
  1579. }
  1580. spin_lock(&vcpu->kvm->mmu_lock);
  1581. if (mmu_notifier_retry(vcpu, mmu_seq))
  1582. goto out_unlock;
  1583. kvm_mmu_free_some_pages(vcpu);
  1584. r = __direct_map(vcpu, v, write, largepage, gfn, pfn);
  1585. spin_unlock(&vcpu->kvm->mmu_lock);
  1586. return r;
  1587. out_unlock:
  1588. spin_unlock(&vcpu->kvm->mmu_lock);
  1589. kvm_release_pfn_clean(pfn);
  1590. return 0;
  1591. }
  1592. static void mmu_free_roots(struct kvm_vcpu *vcpu)
  1593. {
  1594. int i;
  1595. struct kvm_mmu_page *sp;
  1596. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1597. return;
  1598. spin_lock(&vcpu->kvm->mmu_lock);
  1599. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1600. hpa_t root = vcpu->arch.mmu.root_hpa;
  1601. sp = page_header(root);
  1602. --sp->root_count;
  1603. if (!sp->root_count && sp->role.invalid)
  1604. kvm_mmu_zap_page(vcpu->kvm, sp);
  1605. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1606. spin_unlock(&vcpu->kvm->mmu_lock);
  1607. return;
  1608. }
  1609. for (i = 0; i < 4; ++i) {
  1610. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1611. if (root) {
  1612. root &= PT64_BASE_ADDR_MASK;
  1613. sp = page_header(root);
  1614. --sp->root_count;
  1615. if (!sp->root_count && sp->role.invalid)
  1616. kvm_mmu_zap_page(vcpu->kvm, sp);
  1617. }
  1618. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  1619. }
  1620. spin_unlock(&vcpu->kvm->mmu_lock);
  1621. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1622. }
  1623. static int mmu_check_root(struct kvm_vcpu *vcpu, gfn_t root_gfn)
  1624. {
  1625. int ret = 0;
  1626. if (!kvm_is_visible_gfn(vcpu->kvm, root_gfn)) {
  1627. set_bit(KVM_REQ_TRIPLE_FAULT, &vcpu->requests);
  1628. ret = 1;
  1629. }
  1630. return ret;
  1631. }
  1632. static int mmu_alloc_roots(struct kvm_vcpu *vcpu)
  1633. {
  1634. int i;
  1635. gfn_t root_gfn;
  1636. struct kvm_mmu_page *sp;
  1637. int direct = 0;
  1638. root_gfn = vcpu->arch.cr3 >> PAGE_SHIFT;
  1639. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1640. hpa_t root = vcpu->arch.mmu.root_hpa;
  1641. ASSERT(!VALID_PAGE(root));
  1642. if (tdp_enabled)
  1643. direct = 1;
  1644. if (mmu_check_root(vcpu, root_gfn))
  1645. return 1;
  1646. sp = kvm_mmu_get_page(vcpu, root_gfn, 0,
  1647. PT64_ROOT_LEVEL, direct,
  1648. ACC_ALL, NULL);
  1649. root = __pa(sp->spt);
  1650. ++sp->root_count;
  1651. vcpu->arch.mmu.root_hpa = root;
  1652. return 0;
  1653. }
  1654. direct = !is_paging(vcpu);
  1655. if (tdp_enabled)
  1656. direct = 1;
  1657. for (i = 0; i < 4; ++i) {
  1658. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1659. ASSERT(!VALID_PAGE(root));
  1660. if (vcpu->arch.mmu.root_level == PT32E_ROOT_LEVEL) {
  1661. if (!is_present_pte(vcpu->arch.pdptrs[i])) {
  1662. vcpu->arch.mmu.pae_root[i] = 0;
  1663. continue;
  1664. }
  1665. root_gfn = vcpu->arch.pdptrs[i] >> PAGE_SHIFT;
  1666. } else if (vcpu->arch.mmu.root_level == 0)
  1667. root_gfn = 0;
  1668. if (mmu_check_root(vcpu, root_gfn))
  1669. return 1;
  1670. sp = kvm_mmu_get_page(vcpu, root_gfn, i << 30,
  1671. PT32_ROOT_LEVEL, direct,
  1672. ACC_ALL, NULL);
  1673. root = __pa(sp->spt);
  1674. ++sp->root_count;
  1675. vcpu->arch.mmu.pae_root[i] = root | PT_PRESENT_MASK;
  1676. }
  1677. vcpu->arch.mmu.root_hpa = __pa(vcpu->arch.mmu.pae_root);
  1678. return 0;
  1679. }
  1680. static void mmu_sync_roots(struct kvm_vcpu *vcpu)
  1681. {
  1682. int i;
  1683. struct kvm_mmu_page *sp;
  1684. if (!VALID_PAGE(vcpu->arch.mmu.root_hpa))
  1685. return;
  1686. if (vcpu->arch.mmu.shadow_root_level == PT64_ROOT_LEVEL) {
  1687. hpa_t root = vcpu->arch.mmu.root_hpa;
  1688. sp = page_header(root);
  1689. mmu_sync_children(vcpu, sp);
  1690. return;
  1691. }
  1692. for (i = 0; i < 4; ++i) {
  1693. hpa_t root = vcpu->arch.mmu.pae_root[i];
  1694. if (root && VALID_PAGE(root)) {
  1695. root &= PT64_BASE_ADDR_MASK;
  1696. sp = page_header(root);
  1697. mmu_sync_children(vcpu, sp);
  1698. }
  1699. }
  1700. }
  1701. void kvm_mmu_sync_roots(struct kvm_vcpu *vcpu)
  1702. {
  1703. spin_lock(&vcpu->kvm->mmu_lock);
  1704. mmu_sync_roots(vcpu);
  1705. spin_unlock(&vcpu->kvm->mmu_lock);
  1706. }
  1707. static gpa_t nonpaging_gva_to_gpa(struct kvm_vcpu *vcpu, gva_t vaddr)
  1708. {
  1709. return vaddr;
  1710. }
  1711. static int nonpaging_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  1712. u32 error_code)
  1713. {
  1714. gfn_t gfn;
  1715. int r;
  1716. pgprintk("%s: gva %lx error %x\n", __func__, gva, error_code);
  1717. r = mmu_topup_memory_caches(vcpu);
  1718. if (r)
  1719. return r;
  1720. ASSERT(vcpu);
  1721. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1722. gfn = gva >> PAGE_SHIFT;
  1723. return nonpaging_map(vcpu, gva & PAGE_MASK,
  1724. error_code & PFERR_WRITE_MASK, gfn);
  1725. }
  1726. static int tdp_page_fault(struct kvm_vcpu *vcpu, gva_t gpa,
  1727. u32 error_code)
  1728. {
  1729. pfn_t pfn;
  1730. int r;
  1731. int largepage = 0;
  1732. gfn_t gfn = gpa >> PAGE_SHIFT;
  1733. unsigned long mmu_seq;
  1734. ASSERT(vcpu);
  1735. ASSERT(VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1736. r = mmu_topup_memory_caches(vcpu);
  1737. if (r)
  1738. return r;
  1739. if (is_largepage_backed(vcpu, gfn & ~(KVM_PAGES_PER_HPAGE-1))) {
  1740. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  1741. largepage = 1;
  1742. }
  1743. mmu_seq = vcpu->kvm->mmu_notifier_seq;
  1744. smp_rmb();
  1745. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  1746. if (is_error_pfn(pfn)) {
  1747. kvm_release_pfn_clean(pfn);
  1748. return 1;
  1749. }
  1750. spin_lock(&vcpu->kvm->mmu_lock);
  1751. if (mmu_notifier_retry(vcpu, mmu_seq))
  1752. goto out_unlock;
  1753. kvm_mmu_free_some_pages(vcpu);
  1754. r = __direct_map(vcpu, gpa, error_code & PFERR_WRITE_MASK,
  1755. largepage, gfn, pfn);
  1756. spin_unlock(&vcpu->kvm->mmu_lock);
  1757. return r;
  1758. out_unlock:
  1759. spin_unlock(&vcpu->kvm->mmu_lock);
  1760. kvm_release_pfn_clean(pfn);
  1761. return 0;
  1762. }
  1763. static void nonpaging_free(struct kvm_vcpu *vcpu)
  1764. {
  1765. mmu_free_roots(vcpu);
  1766. }
  1767. static int nonpaging_init_context(struct kvm_vcpu *vcpu)
  1768. {
  1769. struct kvm_mmu *context = &vcpu->arch.mmu;
  1770. context->new_cr3 = nonpaging_new_cr3;
  1771. context->page_fault = nonpaging_page_fault;
  1772. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1773. context->free = nonpaging_free;
  1774. context->prefetch_page = nonpaging_prefetch_page;
  1775. context->sync_page = nonpaging_sync_page;
  1776. context->invlpg = nonpaging_invlpg;
  1777. context->root_level = 0;
  1778. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1779. context->root_hpa = INVALID_PAGE;
  1780. return 0;
  1781. }
  1782. void kvm_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  1783. {
  1784. ++vcpu->stat.tlb_flush;
  1785. kvm_x86_ops->tlb_flush(vcpu);
  1786. }
  1787. static void paging_new_cr3(struct kvm_vcpu *vcpu)
  1788. {
  1789. pgprintk("%s: cr3 %lx\n", __func__, vcpu->arch.cr3);
  1790. mmu_free_roots(vcpu);
  1791. }
  1792. static void inject_page_fault(struct kvm_vcpu *vcpu,
  1793. u64 addr,
  1794. u32 err_code)
  1795. {
  1796. kvm_inject_page_fault(vcpu, addr, err_code);
  1797. }
  1798. static void paging_free(struct kvm_vcpu *vcpu)
  1799. {
  1800. nonpaging_free(vcpu);
  1801. }
  1802. static bool is_rsvd_bits_set(struct kvm_vcpu *vcpu, u64 gpte, int level)
  1803. {
  1804. int bit7;
  1805. bit7 = (gpte >> 7) & 1;
  1806. return (gpte & vcpu->arch.mmu.rsvd_bits_mask[bit7][level-1]) != 0;
  1807. }
  1808. #define PTTYPE 64
  1809. #include "paging_tmpl.h"
  1810. #undef PTTYPE
  1811. #define PTTYPE 32
  1812. #include "paging_tmpl.h"
  1813. #undef PTTYPE
  1814. static void reset_rsvds_bits_mask(struct kvm_vcpu *vcpu, int level)
  1815. {
  1816. struct kvm_mmu *context = &vcpu->arch.mmu;
  1817. int maxphyaddr = cpuid_maxphyaddr(vcpu);
  1818. u64 exb_bit_rsvd = 0;
  1819. if (!is_nx(vcpu))
  1820. exb_bit_rsvd = rsvd_bits(63, 63);
  1821. switch (level) {
  1822. case PT32_ROOT_LEVEL:
  1823. /* no rsvd bits for 2 level 4K page table entries */
  1824. context->rsvd_bits_mask[0][1] = 0;
  1825. context->rsvd_bits_mask[0][0] = 0;
  1826. if (is_cpuid_PSE36())
  1827. /* 36bits PSE 4MB page */
  1828. context->rsvd_bits_mask[1][1] = rsvd_bits(17, 21);
  1829. else
  1830. /* 32 bits PSE 4MB page */
  1831. context->rsvd_bits_mask[1][1] = rsvd_bits(13, 21);
  1832. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1833. break;
  1834. case PT32E_ROOT_LEVEL:
  1835. context->rsvd_bits_mask[0][2] =
  1836. rsvd_bits(maxphyaddr, 63) |
  1837. rsvd_bits(7, 8) | rsvd_bits(1, 2); /* PDPTE */
  1838. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1839. rsvd_bits(maxphyaddr, 62); /* PDE */
  1840. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1841. rsvd_bits(maxphyaddr, 62); /* PTE */
  1842. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1843. rsvd_bits(maxphyaddr, 62) |
  1844. rsvd_bits(13, 20); /* large page */
  1845. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1846. break;
  1847. case PT64_ROOT_LEVEL:
  1848. context->rsvd_bits_mask[0][3] = exb_bit_rsvd |
  1849. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1850. context->rsvd_bits_mask[0][2] = exb_bit_rsvd |
  1851. rsvd_bits(maxphyaddr, 51) | rsvd_bits(7, 8);
  1852. context->rsvd_bits_mask[0][1] = exb_bit_rsvd |
  1853. rsvd_bits(maxphyaddr, 51);
  1854. context->rsvd_bits_mask[0][0] = exb_bit_rsvd |
  1855. rsvd_bits(maxphyaddr, 51);
  1856. context->rsvd_bits_mask[1][3] = context->rsvd_bits_mask[0][3];
  1857. context->rsvd_bits_mask[1][2] = context->rsvd_bits_mask[0][2];
  1858. context->rsvd_bits_mask[1][1] = exb_bit_rsvd |
  1859. rsvd_bits(maxphyaddr, 51) |
  1860. rsvd_bits(13, 20); /* large page */
  1861. context->rsvd_bits_mask[1][0] = context->rsvd_bits_mask[1][0];
  1862. break;
  1863. }
  1864. }
  1865. static int paging64_init_context_common(struct kvm_vcpu *vcpu, int level)
  1866. {
  1867. struct kvm_mmu *context = &vcpu->arch.mmu;
  1868. ASSERT(is_pae(vcpu));
  1869. context->new_cr3 = paging_new_cr3;
  1870. context->page_fault = paging64_page_fault;
  1871. context->gva_to_gpa = paging64_gva_to_gpa;
  1872. context->prefetch_page = paging64_prefetch_page;
  1873. context->sync_page = paging64_sync_page;
  1874. context->invlpg = paging64_invlpg;
  1875. context->free = paging_free;
  1876. context->root_level = level;
  1877. context->shadow_root_level = level;
  1878. context->root_hpa = INVALID_PAGE;
  1879. return 0;
  1880. }
  1881. static int paging64_init_context(struct kvm_vcpu *vcpu)
  1882. {
  1883. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1884. return paging64_init_context_common(vcpu, PT64_ROOT_LEVEL);
  1885. }
  1886. static int paging32_init_context(struct kvm_vcpu *vcpu)
  1887. {
  1888. struct kvm_mmu *context = &vcpu->arch.mmu;
  1889. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1890. context->new_cr3 = paging_new_cr3;
  1891. context->page_fault = paging32_page_fault;
  1892. context->gva_to_gpa = paging32_gva_to_gpa;
  1893. context->free = paging_free;
  1894. context->prefetch_page = paging32_prefetch_page;
  1895. context->sync_page = paging32_sync_page;
  1896. context->invlpg = paging32_invlpg;
  1897. context->root_level = PT32_ROOT_LEVEL;
  1898. context->shadow_root_level = PT32E_ROOT_LEVEL;
  1899. context->root_hpa = INVALID_PAGE;
  1900. return 0;
  1901. }
  1902. static int paging32E_init_context(struct kvm_vcpu *vcpu)
  1903. {
  1904. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1905. return paging64_init_context_common(vcpu, PT32E_ROOT_LEVEL);
  1906. }
  1907. static int init_kvm_tdp_mmu(struct kvm_vcpu *vcpu)
  1908. {
  1909. struct kvm_mmu *context = &vcpu->arch.mmu;
  1910. context->new_cr3 = nonpaging_new_cr3;
  1911. context->page_fault = tdp_page_fault;
  1912. context->free = nonpaging_free;
  1913. context->prefetch_page = nonpaging_prefetch_page;
  1914. context->sync_page = nonpaging_sync_page;
  1915. context->invlpg = nonpaging_invlpg;
  1916. context->shadow_root_level = kvm_x86_ops->get_tdp_level();
  1917. context->root_hpa = INVALID_PAGE;
  1918. if (!is_paging(vcpu)) {
  1919. context->gva_to_gpa = nonpaging_gva_to_gpa;
  1920. context->root_level = 0;
  1921. } else if (is_long_mode(vcpu)) {
  1922. reset_rsvds_bits_mask(vcpu, PT64_ROOT_LEVEL);
  1923. context->gva_to_gpa = paging64_gva_to_gpa;
  1924. context->root_level = PT64_ROOT_LEVEL;
  1925. } else if (is_pae(vcpu)) {
  1926. reset_rsvds_bits_mask(vcpu, PT32E_ROOT_LEVEL);
  1927. context->gva_to_gpa = paging64_gva_to_gpa;
  1928. context->root_level = PT32E_ROOT_LEVEL;
  1929. } else {
  1930. reset_rsvds_bits_mask(vcpu, PT32_ROOT_LEVEL);
  1931. context->gva_to_gpa = paging32_gva_to_gpa;
  1932. context->root_level = PT32_ROOT_LEVEL;
  1933. }
  1934. return 0;
  1935. }
  1936. static int init_kvm_softmmu(struct kvm_vcpu *vcpu)
  1937. {
  1938. int r;
  1939. ASSERT(vcpu);
  1940. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  1941. if (!is_paging(vcpu))
  1942. r = nonpaging_init_context(vcpu);
  1943. else if (is_long_mode(vcpu))
  1944. r = paging64_init_context(vcpu);
  1945. else if (is_pae(vcpu))
  1946. r = paging32E_init_context(vcpu);
  1947. else
  1948. r = paging32_init_context(vcpu);
  1949. vcpu->arch.mmu.base_role.glevels = vcpu->arch.mmu.root_level;
  1950. return r;
  1951. }
  1952. static int init_kvm_mmu(struct kvm_vcpu *vcpu)
  1953. {
  1954. vcpu->arch.update_pte.pfn = bad_pfn;
  1955. if (tdp_enabled)
  1956. return init_kvm_tdp_mmu(vcpu);
  1957. else
  1958. return init_kvm_softmmu(vcpu);
  1959. }
  1960. static void destroy_kvm_mmu(struct kvm_vcpu *vcpu)
  1961. {
  1962. ASSERT(vcpu);
  1963. if (VALID_PAGE(vcpu->arch.mmu.root_hpa)) {
  1964. vcpu->arch.mmu.free(vcpu);
  1965. vcpu->arch.mmu.root_hpa = INVALID_PAGE;
  1966. }
  1967. }
  1968. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu)
  1969. {
  1970. destroy_kvm_mmu(vcpu);
  1971. return init_kvm_mmu(vcpu);
  1972. }
  1973. EXPORT_SYMBOL_GPL(kvm_mmu_reset_context);
  1974. int kvm_mmu_load(struct kvm_vcpu *vcpu)
  1975. {
  1976. int r;
  1977. r = mmu_topup_memory_caches(vcpu);
  1978. if (r)
  1979. goto out;
  1980. spin_lock(&vcpu->kvm->mmu_lock);
  1981. kvm_mmu_free_some_pages(vcpu);
  1982. r = mmu_alloc_roots(vcpu);
  1983. mmu_sync_roots(vcpu);
  1984. spin_unlock(&vcpu->kvm->mmu_lock);
  1985. if (r)
  1986. goto out;
  1987. kvm_x86_ops->set_cr3(vcpu, vcpu->arch.mmu.root_hpa);
  1988. kvm_mmu_flush_tlb(vcpu);
  1989. out:
  1990. return r;
  1991. }
  1992. EXPORT_SYMBOL_GPL(kvm_mmu_load);
  1993. void kvm_mmu_unload(struct kvm_vcpu *vcpu)
  1994. {
  1995. mmu_free_roots(vcpu);
  1996. }
  1997. static void mmu_pte_write_zap_pte(struct kvm_vcpu *vcpu,
  1998. struct kvm_mmu_page *sp,
  1999. u64 *spte)
  2000. {
  2001. u64 pte;
  2002. struct kvm_mmu_page *child;
  2003. pte = *spte;
  2004. if (is_shadow_present_pte(pte)) {
  2005. if (sp->role.level == PT_PAGE_TABLE_LEVEL ||
  2006. is_large_pte(pte))
  2007. rmap_remove(vcpu->kvm, spte);
  2008. else {
  2009. child = page_header(pte & PT64_BASE_ADDR_MASK);
  2010. mmu_page_remove_parent_pte(child, spte);
  2011. }
  2012. }
  2013. set_shadow_pte(spte, shadow_trap_nonpresent_pte);
  2014. if (is_large_pte(pte))
  2015. --vcpu->kvm->stat.lpages;
  2016. }
  2017. static void mmu_pte_write_new_pte(struct kvm_vcpu *vcpu,
  2018. struct kvm_mmu_page *sp,
  2019. u64 *spte,
  2020. const void *new)
  2021. {
  2022. if (sp->role.level != PT_PAGE_TABLE_LEVEL) {
  2023. if (!vcpu->arch.update_pte.largepage ||
  2024. sp->role.glevels == PT32_ROOT_LEVEL) {
  2025. ++vcpu->kvm->stat.mmu_pde_zapped;
  2026. return;
  2027. }
  2028. }
  2029. ++vcpu->kvm->stat.mmu_pte_updated;
  2030. if (sp->role.glevels == PT32_ROOT_LEVEL)
  2031. paging32_update_pte(vcpu, sp, spte, new);
  2032. else
  2033. paging64_update_pte(vcpu, sp, spte, new);
  2034. }
  2035. static bool need_remote_flush(u64 old, u64 new)
  2036. {
  2037. if (!is_shadow_present_pte(old))
  2038. return false;
  2039. if (!is_shadow_present_pte(new))
  2040. return true;
  2041. if ((old ^ new) & PT64_BASE_ADDR_MASK)
  2042. return true;
  2043. old ^= PT64_NX_MASK;
  2044. new ^= PT64_NX_MASK;
  2045. return (old & ~new & PT64_PERM_MASK) != 0;
  2046. }
  2047. static void mmu_pte_write_flush_tlb(struct kvm_vcpu *vcpu, u64 old, u64 new)
  2048. {
  2049. if (need_remote_flush(old, new))
  2050. kvm_flush_remote_tlbs(vcpu->kvm);
  2051. else
  2052. kvm_mmu_flush_tlb(vcpu);
  2053. }
  2054. static bool last_updated_pte_accessed(struct kvm_vcpu *vcpu)
  2055. {
  2056. u64 *spte = vcpu->arch.last_pte_updated;
  2057. return !!(spte && (*spte & shadow_accessed_mask));
  2058. }
  2059. static void mmu_guess_page_from_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2060. const u8 *new, int bytes)
  2061. {
  2062. gfn_t gfn;
  2063. int r;
  2064. u64 gpte = 0;
  2065. pfn_t pfn;
  2066. vcpu->arch.update_pte.largepage = 0;
  2067. if (bytes != 4 && bytes != 8)
  2068. return;
  2069. /*
  2070. * Assume that the pte write on a page table of the same type
  2071. * as the current vcpu paging mode. This is nearly always true
  2072. * (might be false while changing modes). Note it is verified later
  2073. * by update_pte().
  2074. */
  2075. if (is_pae(vcpu)) {
  2076. /* Handle a 32-bit guest writing two halves of a 64-bit gpte */
  2077. if ((bytes == 4) && (gpa % 4 == 0)) {
  2078. r = kvm_read_guest(vcpu->kvm, gpa & ~(u64)7, &gpte, 8);
  2079. if (r)
  2080. return;
  2081. memcpy((void *)&gpte + (gpa % 8), new, 4);
  2082. } else if ((bytes == 8) && (gpa % 8 == 0)) {
  2083. memcpy((void *)&gpte, new, 8);
  2084. }
  2085. } else {
  2086. if ((bytes == 4) && (gpa % 4 == 0))
  2087. memcpy((void *)&gpte, new, 4);
  2088. }
  2089. if (!is_present_pte(gpte))
  2090. return;
  2091. gfn = (gpte & PT64_BASE_ADDR_MASK) >> PAGE_SHIFT;
  2092. if (is_large_pte(gpte) && is_largepage_backed(vcpu, gfn)) {
  2093. gfn &= ~(KVM_PAGES_PER_HPAGE-1);
  2094. vcpu->arch.update_pte.largepage = 1;
  2095. }
  2096. vcpu->arch.update_pte.mmu_seq = vcpu->kvm->mmu_notifier_seq;
  2097. smp_rmb();
  2098. pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2099. if (is_error_pfn(pfn)) {
  2100. kvm_release_pfn_clean(pfn);
  2101. return;
  2102. }
  2103. vcpu->arch.update_pte.gfn = gfn;
  2104. vcpu->arch.update_pte.pfn = pfn;
  2105. }
  2106. static void kvm_mmu_access_page(struct kvm_vcpu *vcpu, gfn_t gfn)
  2107. {
  2108. u64 *spte = vcpu->arch.last_pte_updated;
  2109. if (spte
  2110. && vcpu->arch.last_pte_gfn == gfn
  2111. && shadow_accessed_mask
  2112. && !(*spte & shadow_accessed_mask)
  2113. && is_shadow_present_pte(*spte))
  2114. set_bit(PT_ACCESSED_SHIFT, (unsigned long *)spte);
  2115. }
  2116. void kvm_mmu_pte_write(struct kvm_vcpu *vcpu, gpa_t gpa,
  2117. const u8 *new, int bytes,
  2118. bool guest_initiated)
  2119. {
  2120. gfn_t gfn = gpa >> PAGE_SHIFT;
  2121. struct kvm_mmu_page *sp;
  2122. struct hlist_node *node, *n;
  2123. struct hlist_head *bucket;
  2124. unsigned index;
  2125. u64 entry, gentry;
  2126. u64 *spte;
  2127. unsigned offset = offset_in_page(gpa);
  2128. unsigned pte_size;
  2129. unsigned page_offset;
  2130. unsigned misaligned;
  2131. unsigned quadrant;
  2132. int level;
  2133. int flooded = 0;
  2134. int npte;
  2135. int r;
  2136. pgprintk("%s: gpa %llx bytes %d\n", __func__, gpa, bytes);
  2137. mmu_guess_page_from_pte_write(vcpu, gpa, new, bytes);
  2138. spin_lock(&vcpu->kvm->mmu_lock);
  2139. kvm_mmu_access_page(vcpu, gfn);
  2140. kvm_mmu_free_some_pages(vcpu);
  2141. ++vcpu->kvm->stat.mmu_pte_write;
  2142. kvm_mmu_audit(vcpu, "pre pte write");
  2143. if (guest_initiated) {
  2144. if (gfn == vcpu->arch.last_pt_write_gfn
  2145. && !last_updated_pte_accessed(vcpu)) {
  2146. ++vcpu->arch.last_pt_write_count;
  2147. if (vcpu->arch.last_pt_write_count >= 3)
  2148. flooded = 1;
  2149. } else {
  2150. vcpu->arch.last_pt_write_gfn = gfn;
  2151. vcpu->arch.last_pt_write_count = 1;
  2152. vcpu->arch.last_pte_updated = NULL;
  2153. }
  2154. }
  2155. index = kvm_page_table_hashfn(gfn);
  2156. bucket = &vcpu->kvm->arch.mmu_page_hash[index];
  2157. hlist_for_each_entry_safe(sp, node, n, bucket, hash_link) {
  2158. if (sp->gfn != gfn || sp->role.direct || sp->role.invalid)
  2159. continue;
  2160. pte_size = sp->role.glevels == PT32_ROOT_LEVEL ? 4 : 8;
  2161. misaligned = (offset ^ (offset + bytes - 1)) & ~(pte_size - 1);
  2162. misaligned |= bytes < 4;
  2163. if (misaligned || flooded) {
  2164. /*
  2165. * Misaligned accesses are too much trouble to fix
  2166. * up; also, they usually indicate a page is not used
  2167. * as a page table.
  2168. *
  2169. * If we're seeing too many writes to a page,
  2170. * it may no longer be a page table, or we may be
  2171. * forking, in which case it is better to unmap the
  2172. * page.
  2173. */
  2174. pgprintk("misaligned: gpa %llx bytes %d role %x\n",
  2175. gpa, bytes, sp->role.word);
  2176. if (kvm_mmu_zap_page(vcpu->kvm, sp))
  2177. n = bucket->first;
  2178. ++vcpu->kvm->stat.mmu_flooded;
  2179. continue;
  2180. }
  2181. page_offset = offset;
  2182. level = sp->role.level;
  2183. npte = 1;
  2184. if (sp->role.glevels == PT32_ROOT_LEVEL) {
  2185. page_offset <<= 1; /* 32->64 */
  2186. /*
  2187. * A 32-bit pde maps 4MB while the shadow pdes map
  2188. * only 2MB. So we need to double the offset again
  2189. * and zap two pdes instead of one.
  2190. */
  2191. if (level == PT32_ROOT_LEVEL) {
  2192. page_offset &= ~7; /* kill rounding error */
  2193. page_offset <<= 1;
  2194. npte = 2;
  2195. }
  2196. quadrant = page_offset >> PAGE_SHIFT;
  2197. page_offset &= ~PAGE_MASK;
  2198. if (quadrant != sp->role.quadrant)
  2199. continue;
  2200. }
  2201. spte = &sp->spt[page_offset / sizeof(*spte)];
  2202. if ((gpa & (pte_size - 1)) || (bytes < pte_size)) {
  2203. gentry = 0;
  2204. r = kvm_read_guest_atomic(vcpu->kvm,
  2205. gpa & ~(u64)(pte_size - 1),
  2206. &gentry, pte_size);
  2207. new = (const void *)&gentry;
  2208. if (r < 0)
  2209. new = NULL;
  2210. }
  2211. while (npte--) {
  2212. entry = *spte;
  2213. mmu_pte_write_zap_pte(vcpu, sp, spte);
  2214. if (new)
  2215. mmu_pte_write_new_pte(vcpu, sp, spte, new);
  2216. mmu_pte_write_flush_tlb(vcpu, entry, *spte);
  2217. ++spte;
  2218. }
  2219. }
  2220. kvm_mmu_audit(vcpu, "post pte write");
  2221. spin_unlock(&vcpu->kvm->mmu_lock);
  2222. if (!is_error_pfn(vcpu->arch.update_pte.pfn)) {
  2223. kvm_release_pfn_clean(vcpu->arch.update_pte.pfn);
  2224. vcpu->arch.update_pte.pfn = bad_pfn;
  2225. }
  2226. }
  2227. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva)
  2228. {
  2229. gpa_t gpa;
  2230. int r;
  2231. gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, gva);
  2232. spin_lock(&vcpu->kvm->mmu_lock);
  2233. r = kvm_mmu_unprotect_page(vcpu->kvm, gpa >> PAGE_SHIFT);
  2234. spin_unlock(&vcpu->kvm->mmu_lock);
  2235. return r;
  2236. }
  2237. EXPORT_SYMBOL_GPL(kvm_mmu_unprotect_page_virt);
  2238. void __kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu)
  2239. {
  2240. while (vcpu->kvm->arch.n_free_mmu_pages < KVM_REFILL_PAGES) {
  2241. struct kvm_mmu_page *sp;
  2242. sp = container_of(vcpu->kvm->arch.active_mmu_pages.prev,
  2243. struct kvm_mmu_page, link);
  2244. kvm_mmu_zap_page(vcpu->kvm, sp);
  2245. ++vcpu->kvm->stat.mmu_recycled;
  2246. }
  2247. }
  2248. int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t cr2, u32 error_code)
  2249. {
  2250. int r;
  2251. enum emulation_result er;
  2252. r = vcpu->arch.mmu.page_fault(vcpu, cr2, error_code);
  2253. if (r < 0)
  2254. goto out;
  2255. if (!r) {
  2256. r = 1;
  2257. goto out;
  2258. }
  2259. r = mmu_topup_memory_caches(vcpu);
  2260. if (r)
  2261. goto out;
  2262. er = emulate_instruction(vcpu, vcpu->run, cr2, error_code, 0);
  2263. switch (er) {
  2264. case EMULATE_DONE:
  2265. return 1;
  2266. case EMULATE_DO_MMIO:
  2267. ++vcpu->stat.mmio_exits;
  2268. return 0;
  2269. case EMULATE_FAIL:
  2270. kvm_report_emulation_failure(vcpu, "pagetable");
  2271. return 1;
  2272. default:
  2273. BUG();
  2274. }
  2275. out:
  2276. return r;
  2277. }
  2278. EXPORT_SYMBOL_GPL(kvm_mmu_page_fault);
  2279. void kvm_mmu_invlpg(struct kvm_vcpu *vcpu, gva_t gva)
  2280. {
  2281. vcpu->arch.mmu.invlpg(vcpu, gva);
  2282. kvm_mmu_flush_tlb(vcpu);
  2283. ++vcpu->stat.invlpg;
  2284. }
  2285. EXPORT_SYMBOL_GPL(kvm_mmu_invlpg);
  2286. void kvm_enable_tdp(void)
  2287. {
  2288. tdp_enabled = true;
  2289. }
  2290. EXPORT_SYMBOL_GPL(kvm_enable_tdp);
  2291. void kvm_disable_tdp(void)
  2292. {
  2293. tdp_enabled = false;
  2294. }
  2295. EXPORT_SYMBOL_GPL(kvm_disable_tdp);
  2296. static void free_mmu_pages(struct kvm_vcpu *vcpu)
  2297. {
  2298. free_page((unsigned long)vcpu->arch.mmu.pae_root);
  2299. }
  2300. static int alloc_mmu_pages(struct kvm_vcpu *vcpu)
  2301. {
  2302. struct page *page;
  2303. int i;
  2304. ASSERT(vcpu);
  2305. if (vcpu->kvm->arch.n_requested_mmu_pages)
  2306. vcpu->kvm->arch.n_free_mmu_pages =
  2307. vcpu->kvm->arch.n_requested_mmu_pages;
  2308. else
  2309. vcpu->kvm->arch.n_free_mmu_pages =
  2310. vcpu->kvm->arch.n_alloc_mmu_pages;
  2311. /*
  2312. * When emulating 32-bit mode, cr3 is only 32 bits even on x86_64.
  2313. * Therefore we need to allocate shadow page tables in the first
  2314. * 4GB of memory, which happens to fit the DMA32 zone.
  2315. */
  2316. page = alloc_page(GFP_KERNEL | __GFP_DMA32);
  2317. if (!page)
  2318. goto error_1;
  2319. vcpu->arch.mmu.pae_root = page_address(page);
  2320. for (i = 0; i < 4; ++i)
  2321. vcpu->arch.mmu.pae_root[i] = INVALID_PAGE;
  2322. return 0;
  2323. error_1:
  2324. free_mmu_pages(vcpu);
  2325. return -ENOMEM;
  2326. }
  2327. int kvm_mmu_create(struct kvm_vcpu *vcpu)
  2328. {
  2329. ASSERT(vcpu);
  2330. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2331. return alloc_mmu_pages(vcpu);
  2332. }
  2333. int kvm_mmu_setup(struct kvm_vcpu *vcpu)
  2334. {
  2335. ASSERT(vcpu);
  2336. ASSERT(!VALID_PAGE(vcpu->arch.mmu.root_hpa));
  2337. return init_kvm_mmu(vcpu);
  2338. }
  2339. void kvm_mmu_destroy(struct kvm_vcpu *vcpu)
  2340. {
  2341. ASSERT(vcpu);
  2342. destroy_kvm_mmu(vcpu);
  2343. free_mmu_pages(vcpu);
  2344. mmu_free_memory_caches(vcpu);
  2345. }
  2346. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot)
  2347. {
  2348. struct kvm_mmu_page *sp;
  2349. list_for_each_entry(sp, &kvm->arch.active_mmu_pages, link) {
  2350. int i;
  2351. u64 *pt;
  2352. if (!test_bit(slot, sp->slot_bitmap))
  2353. continue;
  2354. pt = sp->spt;
  2355. for (i = 0; i < PT64_ENT_PER_PAGE; ++i)
  2356. /* avoid RMW */
  2357. if (pt[i] & PT_WRITABLE_MASK)
  2358. pt[i] &= ~PT_WRITABLE_MASK;
  2359. }
  2360. kvm_flush_remote_tlbs(kvm);
  2361. }
  2362. void kvm_mmu_zap_all(struct kvm *kvm)
  2363. {
  2364. struct kvm_mmu_page *sp, *node;
  2365. spin_lock(&kvm->mmu_lock);
  2366. list_for_each_entry_safe(sp, node, &kvm->arch.active_mmu_pages, link)
  2367. if (kvm_mmu_zap_page(kvm, sp))
  2368. node = container_of(kvm->arch.active_mmu_pages.next,
  2369. struct kvm_mmu_page, link);
  2370. spin_unlock(&kvm->mmu_lock);
  2371. kvm_flush_remote_tlbs(kvm);
  2372. }
  2373. static void kvm_mmu_remove_one_alloc_mmu_page(struct kvm *kvm)
  2374. {
  2375. struct kvm_mmu_page *page;
  2376. page = container_of(kvm->arch.active_mmu_pages.prev,
  2377. struct kvm_mmu_page, link);
  2378. kvm_mmu_zap_page(kvm, page);
  2379. }
  2380. static int mmu_shrink(int nr_to_scan, gfp_t gfp_mask)
  2381. {
  2382. struct kvm *kvm;
  2383. struct kvm *kvm_freed = NULL;
  2384. int cache_count = 0;
  2385. spin_lock(&kvm_lock);
  2386. list_for_each_entry(kvm, &vm_list, vm_list) {
  2387. int npages;
  2388. if (!down_read_trylock(&kvm->slots_lock))
  2389. continue;
  2390. spin_lock(&kvm->mmu_lock);
  2391. npages = kvm->arch.n_alloc_mmu_pages -
  2392. kvm->arch.n_free_mmu_pages;
  2393. cache_count += npages;
  2394. if (!kvm_freed && nr_to_scan > 0 && npages > 0) {
  2395. kvm_mmu_remove_one_alloc_mmu_page(kvm);
  2396. cache_count--;
  2397. kvm_freed = kvm;
  2398. }
  2399. nr_to_scan--;
  2400. spin_unlock(&kvm->mmu_lock);
  2401. up_read(&kvm->slots_lock);
  2402. }
  2403. if (kvm_freed)
  2404. list_move_tail(&kvm_freed->vm_list, &vm_list);
  2405. spin_unlock(&kvm_lock);
  2406. return cache_count;
  2407. }
  2408. static struct shrinker mmu_shrinker = {
  2409. .shrink = mmu_shrink,
  2410. .seeks = DEFAULT_SEEKS * 10,
  2411. };
  2412. static void mmu_destroy_caches(void)
  2413. {
  2414. if (pte_chain_cache)
  2415. kmem_cache_destroy(pte_chain_cache);
  2416. if (rmap_desc_cache)
  2417. kmem_cache_destroy(rmap_desc_cache);
  2418. if (mmu_page_header_cache)
  2419. kmem_cache_destroy(mmu_page_header_cache);
  2420. }
  2421. void kvm_mmu_module_exit(void)
  2422. {
  2423. mmu_destroy_caches();
  2424. unregister_shrinker(&mmu_shrinker);
  2425. }
  2426. int kvm_mmu_module_init(void)
  2427. {
  2428. pte_chain_cache = kmem_cache_create("kvm_pte_chain",
  2429. sizeof(struct kvm_pte_chain),
  2430. 0, 0, NULL);
  2431. if (!pte_chain_cache)
  2432. goto nomem;
  2433. rmap_desc_cache = kmem_cache_create("kvm_rmap_desc",
  2434. sizeof(struct kvm_rmap_desc),
  2435. 0, 0, NULL);
  2436. if (!rmap_desc_cache)
  2437. goto nomem;
  2438. mmu_page_header_cache = kmem_cache_create("kvm_mmu_page_header",
  2439. sizeof(struct kvm_mmu_page),
  2440. 0, 0, NULL);
  2441. if (!mmu_page_header_cache)
  2442. goto nomem;
  2443. register_shrinker(&mmu_shrinker);
  2444. return 0;
  2445. nomem:
  2446. mmu_destroy_caches();
  2447. return -ENOMEM;
  2448. }
  2449. /*
  2450. * Caculate mmu pages needed for kvm.
  2451. */
  2452. unsigned int kvm_mmu_calculate_mmu_pages(struct kvm *kvm)
  2453. {
  2454. int i;
  2455. unsigned int nr_mmu_pages;
  2456. unsigned int nr_pages = 0;
  2457. for (i = 0; i < kvm->nmemslots; i++)
  2458. nr_pages += kvm->memslots[i].npages;
  2459. nr_mmu_pages = nr_pages * KVM_PERMILLE_MMU_PAGES / 1000;
  2460. nr_mmu_pages = max(nr_mmu_pages,
  2461. (unsigned int) KVM_MIN_ALLOC_MMU_PAGES);
  2462. return nr_mmu_pages;
  2463. }
  2464. static void *pv_mmu_peek_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2465. unsigned len)
  2466. {
  2467. if (len > buffer->len)
  2468. return NULL;
  2469. return buffer->ptr;
  2470. }
  2471. static void *pv_mmu_read_buffer(struct kvm_pv_mmu_op_buffer *buffer,
  2472. unsigned len)
  2473. {
  2474. void *ret;
  2475. ret = pv_mmu_peek_buffer(buffer, len);
  2476. if (!ret)
  2477. return ret;
  2478. buffer->ptr += len;
  2479. buffer->len -= len;
  2480. buffer->processed += len;
  2481. return ret;
  2482. }
  2483. static int kvm_pv_mmu_write(struct kvm_vcpu *vcpu,
  2484. gpa_t addr, gpa_t value)
  2485. {
  2486. int bytes = 8;
  2487. int r;
  2488. if (!is_long_mode(vcpu) && !is_pae(vcpu))
  2489. bytes = 4;
  2490. r = mmu_topup_memory_caches(vcpu);
  2491. if (r)
  2492. return r;
  2493. if (!emulator_write_phys(vcpu, addr, &value, bytes))
  2494. return -EFAULT;
  2495. return 1;
  2496. }
  2497. static int kvm_pv_mmu_flush_tlb(struct kvm_vcpu *vcpu)
  2498. {
  2499. kvm_set_cr3(vcpu, vcpu->arch.cr3);
  2500. return 1;
  2501. }
  2502. static int kvm_pv_mmu_release_pt(struct kvm_vcpu *vcpu, gpa_t addr)
  2503. {
  2504. spin_lock(&vcpu->kvm->mmu_lock);
  2505. mmu_unshadow(vcpu->kvm, addr >> PAGE_SHIFT);
  2506. spin_unlock(&vcpu->kvm->mmu_lock);
  2507. return 1;
  2508. }
  2509. static int kvm_pv_mmu_op_one(struct kvm_vcpu *vcpu,
  2510. struct kvm_pv_mmu_op_buffer *buffer)
  2511. {
  2512. struct kvm_mmu_op_header *header;
  2513. header = pv_mmu_peek_buffer(buffer, sizeof *header);
  2514. if (!header)
  2515. return 0;
  2516. switch (header->op) {
  2517. case KVM_MMU_OP_WRITE_PTE: {
  2518. struct kvm_mmu_op_write_pte *wpte;
  2519. wpte = pv_mmu_read_buffer(buffer, sizeof *wpte);
  2520. if (!wpte)
  2521. return 0;
  2522. return kvm_pv_mmu_write(vcpu, wpte->pte_phys,
  2523. wpte->pte_val);
  2524. }
  2525. case KVM_MMU_OP_FLUSH_TLB: {
  2526. struct kvm_mmu_op_flush_tlb *ftlb;
  2527. ftlb = pv_mmu_read_buffer(buffer, sizeof *ftlb);
  2528. if (!ftlb)
  2529. return 0;
  2530. return kvm_pv_mmu_flush_tlb(vcpu);
  2531. }
  2532. case KVM_MMU_OP_RELEASE_PT: {
  2533. struct kvm_mmu_op_release_pt *rpt;
  2534. rpt = pv_mmu_read_buffer(buffer, sizeof *rpt);
  2535. if (!rpt)
  2536. return 0;
  2537. return kvm_pv_mmu_release_pt(vcpu, rpt->pt_phys);
  2538. }
  2539. default: return 0;
  2540. }
  2541. }
  2542. int kvm_pv_mmu_op(struct kvm_vcpu *vcpu, unsigned long bytes,
  2543. gpa_t addr, unsigned long *ret)
  2544. {
  2545. int r;
  2546. struct kvm_pv_mmu_op_buffer *buffer = &vcpu->arch.mmu_op_buffer;
  2547. buffer->ptr = buffer->buf;
  2548. buffer->len = min_t(unsigned long, bytes, sizeof buffer->buf);
  2549. buffer->processed = 0;
  2550. r = kvm_read_guest(vcpu->kvm, addr, buffer->buf, buffer->len);
  2551. if (r)
  2552. goto out;
  2553. while (buffer->len) {
  2554. r = kvm_pv_mmu_op_one(vcpu, buffer);
  2555. if (r < 0)
  2556. goto out;
  2557. if (r == 0)
  2558. break;
  2559. }
  2560. r = 1;
  2561. out:
  2562. *ret = buffer->processed;
  2563. return r;
  2564. }
  2565. #ifdef AUDIT
  2566. static const char *audit_msg;
  2567. static gva_t canonicalize(gva_t gva)
  2568. {
  2569. #ifdef CONFIG_X86_64
  2570. gva = (long long)(gva << 16) >> 16;
  2571. #endif
  2572. return gva;
  2573. }
  2574. static void audit_mappings_page(struct kvm_vcpu *vcpu, u64 page_pte,
  2575. gva_t va, int level)
  2576. {
  2577. u64 *pt = __va(page_pte & PT64_BASE_ADDR_MASK);
  2578. int i;
  2579. gva_t va_delta = 1ul << (PAGE_SHIFT + 9 * (level - 1));
  2580. for (i = 0; i < PT64_ENT_PER_PAGE; ++i, va += va_delta) {
  2581. u64 ent = pt[i];
  2582. if (ent == shadow_trap_nonpresent_pte)
  2583. continue;
  2584. va = canonicalize(va);
  2585. if (level > 1) {
  2586. if (ent == shadow_notrap_nonpresent_pte)
  2587. printk(KERN_ERR "audit: (%s) nontrapping pte"
  2588. " in nonleaf level: levels %d gva %lx"
  2589. " level %d pte %llx\n", audit_msg,
  2590. vcpu->arch.mmu.root_level, va, level, ent);
  2591. else
  2592. audit_mappings_page(vcpu, ent, va, level - 1);
  2593. } else {
  2594. gpa_t gpa = vcpu->arch.mmu.gva_to_gpa(vcpu, va);
  2595. gfn_t gfn = gpa >> PAGE_SHIFT;
  2596. pfn_t pfn = gfn_to_pfn(vcpu->kvm, gfn);
  2597. hpa_t hpa = (hpa_t)pfn << PAGE_SHIFT;
  2598. if (is_shadow_present_pte(ent)
  2599. && (ent & PT64_BASE_ADDR_MASK) != hpa)
  2600. printk(KERN_ERR "xx audit error: (%s) levels %d"
  2601. " gva %lx gpa %llx hpa %llx ent %llx %d\n",
  2602. audit_msg, vcpu->arch.mmu.root_level,
  2603. va, gpa, hpa, ent,
  2604. is_shadow_present_pte(ent));
  2605. else if (ent == shadow_notrap_nonpresent_pte
  2606. && !is_error_hpa(hpa))
  2607. printk(KERN_ERR "audit: (%s) notrap shadow,"
  2608. " valid guest gva %lx\n", audit_msg, va);
  2609. kvm_release_pfn_clean(pfn);
  2610. }
  2611. }
  2612. }
  2613. static void audit_mappings(struct kvm_vcpu *vcpu)
  2614. {
  2615. unsigned i;
  2616. if (vcpu->arch.mmu.root_level == 4)
  2617. audit_mappings_page(vcpu, vcpu->arch.mmu.root_hpa, 0, 4);
  2618. else
  2619. for (i = 0; i < 4; ++i)
  2620. if (vcpu->arch.mmu.pae_root[i] & PT_PRESENT_MASK)
  2621. audit_mappings_page(vcpu,
  2622. vcpu->arch.mmu.pae_root[i],
  2623. i << 30,
  2624. 2);
  2625. }
  2626. static int count_rmaps(struct kvm_vcpu *vcpu)
  2627. {
  2628. int nmaps = 0;
  2629. int i, j, k;
  2630. for (i = 0; i < KVM_MEMORY_SLOTS; ++i) {
  2631. struct kvm_memory_slot *m = &vcpu->kvm->memslots[i];
  2632. struct kvm_rmap_desc *d;
  2633. for (j = 0; j < m->npages; ++j) {
  2634. unsigned long *rmapp = &m->rmap[j];
  2635. if (!*rmapp)
  2636. continue;
  2637. if (!(*rmapp & 1)) {
  2638. ++nmaps;
  2639. continue;
  2640. }
  2641. d = (struct kvm_rmap_desc *)(*rmapp & ~1ul);
  2642. while (d) {
  2643. for (k = 0; k < RMAP_EXT; ++k)
  2644. if (d->shadow_ptes[k])
  2645. ++nmaps;
  2646. else
  2647. break;
  2648. d = d->more;
  2649. }
  2650. }
  2651. }
  2652. return nmaps;
  2653. }
  2654. static int count_writable_mappings(struct kvm_vcpu *vcpu)
  2655. {
  2656. int nmaps = 0;
  2657. struct kvm_mmu_page *sp;
  2658. int i;
  2659. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2660. u64 *pt = sp->spt;
  2661. if (sp->role.level != PT_PAGE_TABLE_LEVEL)
  2662. continue;
  2663. for (i = 0; i < PT64_ENT_PER_PAGE; ++i) {
  2664. u64 ent = pt[i];
  2665. if (!(ent & PT_PRESENT_MASK))
  2666. continue;
  2667. if (!(ent & PT_WRITABLE_MASK))
  2668. continue;
  2669. ++nmaps;
  2670. }
  2671. }
  2672. return nmaps;
  2673. }
  2674. static void audit_rmap(struct kvm_vcpu *vcpu)
  2675. {
  2676. int n_rmap = count_rmaps(vcpu);
  2677. int n_actual = count_writable_mappings(vcpu);
  2678. if (n_rmap != n_actual)
  2679. printk(KERN_ERR "%s: (%s) rmap %d actual %d\n",
  2680. __func__, audit_msg, n_rmap, n_actual);
  2681. }
  2682. static void audit_write_protection(struct kvm_vcpu *vcpu)
  2683. {
  2684. struct kvm_mmu_page *sp;
  2685. struct kvm_memory_slot *slot;
  2686. unsigned long *rmapp;
  2687. gfn_t gfn;
  2688. list_for_each_entry(sp, &vcpu->kvm->arch.active_mmu_pages, link) {
  2689. if (sp->role.direct)
  2690. continue;
  2691. gfn = unalias_gfn(vcpu->kvm, sp->gfn);
  2692. slot = gfn_to_memslot_unaliased(vcpu->kvm, sp->gfn);
  2693. rmapp = &slot->rmap[gfn - slot->base_gfn];
  2694. if (*rmapp)
  2695. printk(KERN_ERR "%s: (%s) shadow page has writable"
  2696. " mappings: gfn %lx role %x\n",
  2697. __func__, audit_msg, sp->gfn,
  2698. sp->role.word);
  2699. }
  2700. }
  2701. static void kvm_mmu_audit(struct kvm_vcpu *vcpu, const char *msg)
  2702. {
  2703. int olddbg = dbg;
  2704. dbg = 0;
  2705. audit_msg = msg;
  2706. audit_rmap(vcpu);
  2707. audit_write_protection(vcpu);
  2708. audit_mappings(vcpu);
  2709. dbg = olddbg;
  2710. }
  2711. #endif