microcode_intel.c 14 KB

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  1. /*
  2. * Intel CPU Microcode Update Driver for Linux
  3. *
  4. * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
  5. * 2006 Shaohua Li <shaohua.li@intel.com>
  6. *
  7. * This driver allows to upgrade microcode on Intel processors
  8. * belonging to IA-32 family - PentiumPro, Pentium II,
  9. * Pentium III, Xeon, Pentium 4, etc.
  10. *
  11. * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture
  12. * Software Developer's Manual
  13. * Order Number 253668 or free download from:
  14. *
  15. * http://developer.intel.com/design/pentium4/manuals/253668.htm
  16. *
  17. * For more information, go to http://www.urbanmyth.org/microcode
  18. *
  19. * This program is free software; you can redistribute it and/or
  20. * modify it under the terms of the GNU General Public License
  21. * as published by the Free Software Foundation; either version
  22. * 2 of the License, or (at your option) any later version.
  23. *
  24. * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com>
  25. * Initial release.
  26. * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com>
  27. * Added read() support + cleanups.
  28. * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com>
  29. * Added 'device trimming' support. open(O_WRONLY) zeroes
  30. * and frees the saved copy of applied microcode.
  31. * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com>
  32. * Made to use devfs (/dev/cpu/microcode) + cleanups.
  33. * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com>
  34. * Added misc device support (now uses both devfs and misc).
  35. * Added MICROCODE_IOCFREE ioctl to clear memory.
  36. * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com>
  37. * Messages for error cases (non Intel & no suitable microcode).
  38. * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com>
  39. * Removed ->release(). Removed exclusive open and status bitmap.
  40. * Added microcode_rwsem to serialize read()/write()/ioctl().
  41. * Removed global kernel lock usage.
  42. * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com>
  43. * Write 0 to 0x8B msr and then cpuid before reading revision,
  44. * so that it works even if there were no update done by the
  45. * BIOS. Otherwise, reading from 0x8B gives junk (which happened
  46. * to be 0 on my machine which is why it worked even when I
  47. * disabled update by the BIOS)
  48. * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix.
  49. * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and
  50. * Tigran Aivazian <tigran@veritas.com>
  51. * Intel Pentium 4 processor support and bugfixes.
  52. * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com>
  53. * Bugfix for HT (Hyper-Threading) enabled processors
  54. * whereby processor resources are shared by all logical processors
  55. * in a single CPU package.
  56. * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and
  57. * Tigran Aivazian <tigran@veritas.com>,
  58. * Serialize updates as required on HT processors due to
  59. * speculative nature of implementation.
  60. * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com>
  61. * Fix the panic when writing zero-length microcode chunk.
  62. * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>,
  63. * Jun Nakajima <jun.nakajima@intel.com>
  64. * Support for the microcode updates in the new format.
  65. * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com>
  66. * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl
  67. * because we no longer hold a copy of applied microcode
  68. * in kernel memory.
  69. * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com>
  70. * Fix sigmatch() macro to handle old CPUs with pf == 0.
  71. * Thanks to Stuart Swales for pointing out this bug.
  72. */
  73. #include <linux/firmware.h>
  74. #include <linux/uaccess.h>
  75. #include <linux/kernel.h>
  76. #include <linux/module.h>
  77. #include <linux/vmalloc.h>
  78. #include <asm/microcode.h>
  79. #include <asm/processor.h>
  80. #include <asm/msr.h>
  81. MODULE_DESCRIPTION("Microcode Update Driver");
  82. MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>");
  83. MODULE_LICENSE("GPL");
  84. struct microcode_header_intel {
  85. unsigned int hdrver;
  86. unsigned int rev;
  87. unsigned int date;
  88. unsigned int sig;
  89. unsigned int cksum;
  90. unsigned int ldrver;
  91. unsigned int pf;
  92. unsigned int datasize;
  93. unsigned int totalsize;
  94. unsigned int reserved[3];
  95. };
  96. struct microcode_intel {
  97. struct microcode_header_intel hdr;
  98. unsigned int bits[0];
  99. };
  100. /* microcode format is extended from prescott processors */
  101. struct extended_signature {
  102. unsigned int sig;
  103. unsigned int pf;
  104. unsigned int cksum;
  105. };
  106. struct extended_sigtable {
  107. unsigned int count;
  108. unsigned int cksum;
  109. unsigned int reserved[3];
  110. struct extended_signature sigs[0];
  111. };
  112. #define DEFAULT_UCODE_DATASIZE (2000)
  113. #define MC_HEADER_SIZE (sizeof(struct microcode_header_intel))
  114. #define DEFAULT_UCODE_TOTALSIZE (DEFAULT_UCODE_DATASIZE + MC_HEADER_SIZE)
  115. #define EXT_HEADER_SIZE (sizeof(struct extended_sigtable))
  116. #define EXT_SIGNATURE_SIZE (sizeof(struct extended_signature))
  117. #define DWSIZE (sizeof(u32))
  118. #define get_totalsize(mc) \
  119. (((struct microcode_intel *)mc)->hdr.totalsize ? \
  120. ((struct microcode_intel *)mc)->hdr.totalsize : \
  121. DEFAULT_UCODE_TOTALSIZE)
  122. #define get_datasize(mc) \
  123. (((struct microcode_intel *)mc)->hdr.datasize ? \
  124. ((struct microcode_intel *)mc)->hdr.datasize : DEFAULT_UCODE_DATASIZE)
  125. #define sigmatch(s1, s2, p1, p2) \
  126. (((s1) == (s2)) && (((p1) & (p2)) || (((p1) == 0) && ((p2) == 0))))
  127. #define exttable_size(et) ((et)->count * EXT_SIGNATURE_SIZE + EXT_HEADER_SIZE)
  128. static int collect_cpu_info(int cpu_num, struct cpu_signature *csig)
  129. {
  130. struct cpuinfo_x86 *c = &cpu_data(cpu_num);
  131. unsigned int val[2];
  132. memset(csig, 0, sizeof(*csig));
  133. if (c->x86_vendor != X86_VENDOR_INTEL || c->x86 < 6 ||
  134. cpu_has(c, X86_FEATURE_IA64)) {
  135. printk(KERN_ERR "microcode: CPU%d not a capable Intel "
  136. "processor\n", cpu_num);
  137. return -1;
  138. }
  139. csig->sig = cpuid_eax(0x00000001);
  140. if ((c->x86_model >= 5) || (c->x86 > 6)) {
  141. /* get processor flags from MSR 0x17 */
  142. rdmsr(MSR_IA32_PLATFORM_ID, val[0], val[1]);
  143. csig->pf = 1 << ((val[1] >> 18) & 7);
  144. }
  145. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  146. /* see notes above for revision 1.07. Apparent chip bug */
  147. sync_core();
  148. /* get the current revision from MSR 0x8B */
  149. rdmsr(MSR_IA32_UCODE_REV, val[0], csig->rev);
  150. printk(KERN_INFO "microcode: CPU%d sig=0x%x, pf=0x%x, revision=0x%x\n",
  151. cpu_num, csig->sig, csig->pf, csig->rev);
  152. return 0;
  153. }
  154. static inline int update_match_cpu(struct cpu_signature *csig, int sig, int pf)
  155. {
  156. return (!sigmatch(sig, csig->sig, pf, csig->pf)) ? 0 : 1;
  157. }
  158. static inline int
  159. update_match_revision(struct microcode_header_intel *mc_header, int rev)
  160. {
  161. return (mc_header->rev <= rev) ? 0 : 1;
  162. }
  163. static int microcode_sanity_check(void *mc)
  164. {
  165. unsigned long total_size, data_size, ext_table_size;
  166. struct microcode_header_intel *mc_header = mc;
  167. struct extended_sigtable *ext_header = NULL;
  168. int sum, orig_sum, ext_sigcount = 0, i;
  169. struct extended_signature *ext_sig;
  170. total_size = get_totalsize(mc_header);
  171. data_size = get_datasize(mc_header);
  172. if (data_size + MC_HEADER_SIZE > total_size) {
  173. printk(KERN_ERR "microcode: error! "
  174. "Bad data size in microcode data file\n");
  175. return -EINVAL;
  176. }
  177. if (mc_header->ldrver != 1 || mc_header->hdrver != 1) {
  178. printk(KERN_ERR "microcode: error! "
  179. "Unknown microcode update format\n");
  180. return -EINVAL;
  181. }
  182. ext_table_size = total_size - (MC_HEADER_SIZE + data_size);
  183. if (ext_table_size) {
  184. if ((ext_table_size < EXT_HEADER_SIZE)
  185. || ((ext_table_size - EXT_HEADER_SIZE) % EXT_SIGNATURE_SIZE)) {
  186. printk(KERN_ERR "microcode: error! "
  187. "Small exttable size in microcode data file\n");
  188. return -EINVAL;
  189. }
  190. ext_header = mc + MC_HEADER_SIZE + data_size;
  191. if (ext_table_size != exttable_size(ext_header)) {
  192. printk(KERN_ERR "microcode: error! "
  193. "Bad exttable size in microcode data file\n");
  194. return -EFAULT;
  195. }
  196. ext_sigcount = ext_header->count;
  197. }
  198. /* check extended table checksum */
  199. if (ext_table_size) {
  200. int ext_table_sum = 0;
  201. int *ext_tablep = (int *)ext_header;
  202. i = ext_table_size / DWSIZE;
  203. while (i--)
  204. ext_table_sum += ext_tablep[i];
  205. if (ext_table_sum) {
  206. printk(KERN_WARNING "microcode: aborting, "
  207. "bad extended signature table checksum\n");
  208. return -EINVAL;
  209. }
  210. }
  211. /* calculate the checksum */
  212. orig_sum = 0;
  213. i = (MC_HEADER_SIZE + data_size) / DWSIZE;
  214. while (i--)
  215. orig_sum += ((int *)mc)[i];
  216. if (orig_sum) {
  217. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  218. return -EINVAL;
  219. }
  220. if (!ext_table_size)
  221. return 0;
  222. /* check extended signature checksum */
  223. for (i = 0; i < ext_sigcount; i++) {
  224. ext_sig = (void *)ext_header + EXT_HEADER_SIZE +
  225. EXT_SIGNATURE_SIZE * i;
  226. sum = orig_sum
  227. - (mc_header->sig + mc_header->pf + mc_header->cksum)
  228. + (ext_sig->sig + ext_sig->pf + ext_sig->cksum);
  229. if (sum) {
  230. printk(KERN_ERR "microcode: aborting, bad checksum\n");
  231. return -EINVAL;
  232. }
  233. }
  234. return 0;
  235. }
  236. /*
  237. * return 0 - no update found
  238. * return 1 - found update
  239. */
  240. static int
  241. get_matching_microcode(struct cpu_signature *cpu_sig, void *mc, int rev)
  242. {
  243. struct microcode_header_intel *mc_header = mc;
  244. struct extended_sigtable *ext_header;
  245. unsigned long total_size = get_totalsize(mc_header);
  246. int ext_sigcount, i;
  247. struct extended_signature *ext_sig;
  248. if (!update_match_revision(mc_header, rev))
  249. return 0;
  250. if (update_match_cpu(cpu_sig, mc_header->sig, mc_header->pf))
  251. return 1;
  252. /* Look for ext. headers: */
  253. if (total_size <= get_datasize(mc_header) + MC_HEADER_SIZE)
  254. return 0;
  255. ext_header = mc + get_datasize(mc_header) + MC_HEADER_SIZE;
  256. ext_sigcount = ext_header->count;
  257. ext_sig = (void *)ext_header + EXT_HEADER_SIZE;
  258. for (i = 0; i < ext_sigcount; i++) {
  259. if (update_match_cpu(cpu_sig, ext_sig->sig, ext_sig->pf))
  260. return 1;
  261. ext_sig++;
  262. }
  263. return 0;
  264. }
  265. static int apply_microcode(int cpu)
  266. {
  267. struct microcode_intel *mc_intel;
  268. struct ucode_cpu_info *uci;
  269. unsigned int val[2];
  270. int cpu_num;
  271. cpu_num = raw_smp_processor_id();
  272. uci = ucode_cpu_info + cpu;
  273. mc_intel = uci->mc;
  274. /* We should bind the task to the CPU */
  275. BUG_ON(cpu_num != cpu);
  276. if (mc_intel == NULL)
  277. return 0;
  278. /* write microcode via MSR 0x79 */
  279. wrmsr(MSR_IA32_UCODE_WRITE,
  280. (unsigned long) mc_intel->bits,
  281. (unsigned long) mc_intel->bits >> 16 >> 16);
  282. wrmsr(MSR_IA32_UCODE_REV, 0, 0);
  283. /* see notes above for revision 1.07. Apparent chip bug */
  284. sync_core();
  285. /* get the current revision from MSR 0x8B */
  286. rdmsr(MSR_IA32_UCODE_REV, val[0], val[1]);
  287. if (val[1] != mc_intel->hdr.rev) {
  288. printk(KERN_ERR "microcode: CPU%d update "
  289. "to revision 0x%x failed\n",
  290. cpu_num, mc_intel->hdr.rev);
  291. return -1;
  292. }
  293. printk(KERN_INFO "microcode: CPU%d updated to revision "
  294. "0x%x, date = %04x-%02x-%02x \n",
  295. cpu_num, val[1],
  296. mc_intel->hdr.date & 0xffff,
  297. mc_intel->hdr.date >> 24,
  298. (mc_intel->hdr.date >> 16) & 0xff);
  299. uci->cpu_sig.rev = val[1];
  300. return 0;
  301. }
  302. static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
  303. int (*get_ucode_data)(void *, const void *, size_t))
  304. {
  305. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  306. u8 *ucode_ptr = data, *new_mc = NULL, *mc;
  307. int new_rev = uci->cpu_sig.rev;
  308. unsigned int leftover = size;
  309. enum ucode_state state = UCODE_OK;
  310. while (leftover) {
  311. struct microcode_header_intel mc_header;
  312. unsigned int mc_size;
  313. if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
  314. break;
  315. mc_size = get_totalsize(&mc_header);
  316. if (!mc_size || mc_size > leftover) {
  317. printk(KERN_ERR "microcode: error!"
  318. "Bad data in microcode data file\n");
  319. break;
  320. }
  321. mc = vmalloc(mc_size);
  322. if (!mc)
  323. break;
  324. if (get_ucode_data(mc, ucode_ptr, mc_size) ||
  325. microcode_sanity_check(mc) < 0) {
  326. vfree(mc);
  327. break;
  328. }
  329. if (get_matching_microcode(&uci->cpu_sig, mc, new_rev)) {
  330. if (new_mc)
  331. vfree(new_mc);
  332. new_rev = mc_header.rev;
  333. new_mc = mc;
  334. } else
  335. vfree(mc);
  336. ucode_ptr += mc_size;
  337. leftover -= mc_size;
  338. }
  339. if (leftover) {
  340. if (new_mc)
  341. vfree(new_mc);
  342. state = UCODE_ERROR;
  343. goto out;
  344. }
  345. if (!new_mc) {
  346. state = UCODE_NFOUND;
  347. goto out;
  348. }
  349. if (uci->mc)
  350. vfree(uci->mc);
  351. uci->mc = (struct microcode_intel *)new_mc;
  352. pr_debug("microcode: CPU%d found a matching microcode update with"
  353. " version 0x%x (current=0x%x)\n",
  354. cpu, new_rev, uci->cpu_sig.rev);
  355. out:
  356. return state;
  357. }
  358. static int get_ucode_fw(void *to, const void *from, size_t n)
  359. {
  360. memcpy(to, from, n);
  361. return 0;
  362. }
  363. static enum ucode_state request_microcode_fw(int cpu, struct device *device)
  364. {
  365. char name[30];
  366. struct cpuinfo_x86 *c = &cpu_data(cpu);
  367. const struct firmware *firmware;
  368. enum ucode_state ret;
  369. sprintf(name, "intel-ucode/%02x-%02x-%02x",
  370. c->x86, c->x86_model, c->x86_mask);
  371. if (request_firmware(&firmware, name, device)) {
  372. pr_debug("microcode: data file %s load failed\n", name);
  373. return UCODE_NFOUND;
  374. }
  375. ret = generic_load_microcode(cpu, (void *)firmware->data,
  376. firmware->size, &get_ucode_fw);
  377. release_firmware(firmware);
  378. return ret;
  379. }
  380. static int get_ucode_user(void *to, const void *from, size_t n)
  381. {
  382. return copy_from_user(to, from, n);
  383. }
  384. static enum ucode_state
  385. request_microcode_user(int cpu, const void __user *buf, size_t size)
  386. {
  387. return generic_load_microcode(cpu, (void *)buf, size, &get_ucode_user);
  388. }
  389. static void microcode_fini_cpu(int cpu)
  390. {
  391. struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  392. vfree(uci->mc);
  393. uci->mc = NULL;
  394. }
  395. static struct microcode_ops microcode_intel_ops = {
  396. .request_microcode_user = request_microcode_user,
  397. .request_microcode_fw = request_microcode_fw,
  398. .collect_cpu_info = collect_cpu_info,
  399. .apply_microcode = apply_microcode,
  400. .microcode_fini_cpu = microcode_fini_cpu,
  401. };
  402. struct microcode_ops * __init init_intel_microcode(void)
  403. {
  404. return &microcode_intel_ops;
  405. }