sun4d_irq.c 14 KB

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  1. /*
  2. * arch/sparc/kernel/sun4d_irq.c:
  3. * SS1000/SC2000 interrupt handling.
  4. *
  5. * Copyright (C) 1997,1998 Jakub Jelinek (jj@sunsite.mff.cuni.cz)
  6. * Heavily based on arch/sparc/kernel/irq.c.
  7. */
  8. #include <linux/errno.h>
  9. #include <linux/linkage.h>
  10. #include <linux/kernel_stat.h>
  11. #include <linux/signal.h>
  12. #include <linux/sched.h>
  13. #include <linux/ptrace.h>
  14. #include <linux/interrupt.h>
  15. #include <linux/slab.h>
  16. #include <linux/random.h>
  17. #include <linux/init.h>
  18. #include <linux/smp.h>
  19. #include <linux/spinlock.h>
  20. #include <linux/seq_file.h>
  21. #include <linux/of.h>
  22. #include <linux/of_device.h>
  23. #include <asm/ptrace.h>
  24. #include <asm/processor.h>
  25. #include <asm/system.h>
  26. #include <asm/psr.h>
  27. #include <asm/smp.h>
  28. #include <asm/vaddrs.h>
  29. #include <asm/timer.h>
  30. #include <asm/openprom.h>
  31. #include <asm/oplib.h>
  32. #include <asm/traps.h>
  33. #include <asm/irq.h>
  34. #include <asm/io.h>
  35. #include <asm/pgalloc.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/sbi.h>
  38. #include <asm/cacheflush.h>
  39. #include <asm/irq_regs.h>
  40. #include "kernel.h"
  41. #include "irq.h"
  42. /* If you trust current SCSI layer to handle different SCSI IRQs, enable this. I don't trust it... -jj */
  43. /* #define DISTRIBUTE_IRQS */
  44. struct sun4d_timer_regs {
  45. u32 l10_timer_limit;
  46. u32 l10_cur_countx;
  47. u32 l10_limit_noclear;
  48. u32 ctrl;
  49. u32 l10_cur_count;
  50. };
  51. static struct sun4d_timer_regs __iomem *sun4d_timers;
  52. #define TIMER_IRQ 10
  53. #define MAX_STATIC_ALLOC 4
  54. extern int static_irq_count;
  55. static unsigned char sbus_tid[32];
  56. static struct irqaction *irq_action[NR_IRQS];
  57. extern spinlock_t irq_action_lock;
  58. static struct sbus_action {
  59. struct irqaction *action;
  60. /* For SMP this needs to be extended */
  61. } *sbus_actions;
  62. static int pil_to_sbus[] = {
  63. 0, 0, 1, 2, 0, 3, 0, 4, 0, 5, 0, 6, 0, 7, 0, 0,
  64. };
  65. static int sbus_to_pil[] = {
  66. 0, 2, 3, 5, 7, 9, 11, 13,
  67. };
  68. static int nsbi;
  69. /* Exported for sun4d_smp.c */
  70. DEFINE_SPINLOCK(sun4d_imsk_lock);
  71. int show_sun4d_interrupts(struct seq_file *p, void *v)
  72. {
  73. int i = *(loff_t *) v, j = 0, k = 0, sbusl;
  74. struct irqaction * action;
  75. unsigned long flags;
  76. #ifdef CONFIG_SMP
  77. int x;
  78. #endif
  79. spin_lock_irqsave(&irq_action_lock, flags);
  80. if (i < NR_IRQS) {
  81. sbusl = pil_to_sbus[i];
  82. if (!sbusl) {
  83. action = *(i + irq_action);
  84. if (!action)
  85. goto out_unlock;
  86. } else {
  87. for (j = 0; j < nsbi; j++) {
  88. for (k = 0; k < 4; k++)
  89. if ((action = sbus_actions [(j << 5) + (sbusl << 2) + k].action))
  90. goto found_it;
  91. }
  92. goto out_unlock;
  93. }
  94. found_it: seq_printf(p, "%3d: ", i);
  95. #ifndef CONFIG_SMP
  96. seq_printf(p, "%10u ", kstat_irqs(i));
  97. #else
  98. for_each_online_cpu(x)
  99. seq_printf(p, "%10u ",
  100. kstat_cpu(cpu_logical_map(x)).irqs[i]);
  101. #endif
  102. seq_printf(p, "%c %s",
  103. (action->flags & IRQF_DISABLED) ? '+' : ' ',
  104. action->name);
  105. action = action->next;
  106. for (;;) {
  107. for (; action; action = action->next) {
  108. seq_printf(p, ",%s %s",
  109. (action->flags & IRQF_DISABLED) ? " +" : "",
  110. action->name);
  111. }
  112. if (!sbusl) break;
  113. k++;
  114. if (k < 4)
  115. action = sbus_actions [(j << 5) + (sbusl << 2) + k].action;
  116. else {
  117. j++;
  118. if (j == nsbi) break;
  119. k = 0;
  120. action = sbus_actions [(j << 5) + (sbusl << 2)].action;
  121. }
  122. }
  123. seq_putc(p, '\n');
  124. }
  125. out_unlock:
  126. spin_unlock_irqrestore(&irq_action_lock, flags);
  127. return 0;
  128. }
  129. void sun4d_free_irq(unsigned int irq, void *dev_id)
  130. {
  131. struct irqaction *action, **actionp;
  132. struct irqaction *tmp = NULL;
  133. unsigned long flags;
  134. spin_lock_irqsave(&irq_action_lock, flags);
  135. if (irq < 15)
  136. actionp = irq + irq_action;
  137. else
  138. actionp = &(sbus_actions[irq - (1 << 5)].action);
  139. action = *actionp;
  140. if (!action) {
  141. printk("Trying to free free IRQ%d\n",irq);
  142. goto out_unlock;
  143. }
  144. if (dev_id) {
  145. for (; action; action = action->next) {
  146. if (action->dev_id == dev_id)
  147. break;
  148. tmp = action;
  149. }
  150. if (!action) {
  151. printk("Trying to free free shared IRQ%d\n",irq);
  152. goto out_unlock;
  153. }
  154. } else if (action->flags & IRQF_SHARED) {
  155. printk("Trying to free shared IRQ%d with NULL device ID\n", irq);
  156. goto out_unlock;
  157. }
  158. if (action->flags & SA_STATIC_ALLOC)
  159. {
  160. /* This interrupt is marked as specially allocated
  161. * so it is a bad idea to free it.
  162. */
  163. printk("Attempt to free statically allocated IRQ%d (%s)\n",
  164. irq, action->name);
  165. goto out_unlock;
  166. }
  167. if (action && tmp)
  168. tmp->next = action->next;
  169. else
  170. *actionp = action->next;
  171. spin_unlock_irqrestore(&irq_action_lock, flags);
  172. synchronize_irq(irq);
  173. spin_lock_irqsave(&irq_action_lock, flags);
  174. kfree(action);
  175. if (!(*actionp))
  176. __disable_irq(irq);
  177. out_unlock:
  178. spin_unlock_irqrestore(&irq_action_lock, flags);
  179. }
  180. extern void unexpected_irq(int, void *, struct pt_regs *);
  181. void sun4d_handler_irq(int irq, struct pt_regs * regs)
  182. {
  183. struct pt_regs *old_regs;
  184. struct irqaction * action;
  185. int cpu = smp_processor_id();
  186. /* SBUS IRQ level (1 - 7) */
  187. int sbusl = pil_to_sbus[irq];
  188. /* FIXME: Is this necessary?? */
  189. cc_get_ipen();
  190. cc_set_iclr(1 << irq);
  191. old_regs = set_irq_regs(regs);
  192. irq_enter();
  193. kstat_cpu(cpu).irqs[irq]++;
  194. if (!sbusl) {
  195. action = *(irq + irq_action);
  196. if (!action)
  197. unexpected_irq(irq, NULL, regs);
  198. do {
  199. action->handler(irq, action->dev_id);
  200. action = action->next;
  201. } while (action);
  202. } else {
  203. int bus_mask = bw_get_intr_mask(sbusl) & 0x3ffff;
  204. int sbino;
  205. struct sbus_action *actionp;
  206. unsigned mask, slot;
  207. int sbil = (sbusl << 2);
  208. bw_clear_intr_mask(sbusl, bus_mask);
  209. /* Loop for each pending SBI */
  210. for (sbino = 0; bus_mask; sbino++, bus_mask >>= 1)
  211. if (bus_mask & 1) {
  212. mask = acquire_sbi(SBI2DEVID(sbino), 0xf << sbil);
  213. mask &= (0xf << sbil);
  214. actionp = sbus_actions + (sbino << 5) + (sbil);
  215. /* Loop for each pending SBI slot */
  216. for (slot = (1 << sbil); mask; slot <<= 1, actionp++)
  217. if (mask & slot) {
  218. mask &= ~slot;
  219. action = actionp->action;
  220. if (!action)
  221. unexpected_irq(irq, NULL, regs);
  222. do {
  223. action->handler(irq, action->dev_id);
  224. action = action->next;
  225. } while (action);
  226. release_sbi(SBI2DEVID(sbino), slot);
  227. }
  228. }
  229. }
  230. irq_exit();
  231. set_irq_regs(old_regs);
  232. }
  233. int sun4d_request_irq(unsigned int irq,
  234. irq_handler_t handler,
  235. unsigned long irqflags, const char * devname, void *dev_id)
  236. {
  237. struct irqaction *action, *tmp = NULL, **actionp;
  238. unsigned long flags;
  239. int ret;
  240. if(irq > 14 && irq < (1 << 5)) {
  241. ret = -EINVAL;
  242. goto out;
  243. }
  244. if (!handler) {
  245. ret = -EINVAL;
  246. goto out;
  247. }
  248. spin_lock_irqsave(&irq_action_lock, flags);
  249. if (irq >= (1 << 5))
  250. actionp = &(sbus_actions[irq - (1 << 5)].action);
  251. else
  252. actionp = irq + irq_action;
  253. action = *actionp;
  254. if (action) {
  255. if ((action->flags & IRQF_SHARED) && (irqflags & IRQF_SHARED)) {
  256. for (tmp = action; tmp->next; tmp = tmp->next);
  257. } else {
  258. ret = -EBUSY;
  259. goto out_unlock;
  260. }
  261. if ((action->flags & IRQF_DISABLED) ^ (irqflags & IRQF_DISABLED)) {
  262. printk("Attempt to mix fast and slow interrupts on IRQ%d denied\n", irq);
  263. ret = -EBUSY;
  264. goto out_unlock;
  265. }
  266. action = NULL; /* Or else! */
  267. }
  268. /* If this is flagged as statically allocated then we use our
  269. * private struct which is never freed.
  270. */
  271. if (irqflags & SA_STATIC_ALLOC) {
  272. if (static_irq_count < MAX_STATIC_ALLOC)
  273. action = &static_irqaction[static_irq_count++];
  274. else
  275. printk("Request for IRQ%d (%s) SA_STATIC_ALLOC failed using kmalloc\n", irq, devname);
  276. }
  277. if (action == NULL)
  278. action = kmalloc(sizeof(struct irqaction),
  279. GFP_ATOMIC);
  280. if (!action) {
  281. ret = -ENOMEM;
  282. goto out_unlock;
  283. }
  284. action->handler = handler;
  285. action->flags = irqflags;
  286. action->name = devname;
  287. action->next = NULL;
  288. action->dev_id = dev_id;
  289. if (tmp)
  290. tmp->next = action;
  291. else
  292. *actionp = action;
  293. __enable_irq(irq);
  294. ret = 0;
  295. out_unlock:
  296. spin_unlock_irqrestore(&irq_action_lock, flags);
  297. out:
  298. return ret;
  299. }
  300. static void sun4d_disable_irq(unsigned int irq)
  301. {
  302. int tid = sbus_tid[(irq >> 5) - 1];
  303. unsigned long flags;
  304. if (irq < NR_IRQS)
  305. return;
  306. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  307. cc_set_imsk_other(tid, cc_get_imsk_other(tid) | (1 << sbus_to_pil[(irq >> 2) & 7]));
  308. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  309. }
  310. static void sun4d_enable_irq(unsigned int irq)
  311. {
  312. int tid = sbus_tid[(irq >> 5) - 1];
  313. unsigned long flags;
  314. if (irq < NR_IRQS)
  315. return;
  316. spin_lock_irqsave(&sun4d_imsk_lock, flags);
  317. cc_set_imsk_other(tid, cc_get_imsk_other(tid) & ~(1 << sbus_to_pil[(irq >> 2) & 7]));
  318. spin_unlock_irqrestore(&sun4d_imsk_lock, flags);
  319. }
  320. #ifdef CONFIG_SMP
  321. static void sun4d_set_cpu_int(int cpu, int level)
  322. {
  323. sun4d_send_ipi(cpu, level);
  324. }
  325. static void sun4d_clear_ipi(int cpu, int level)
  326. {
  327. }
  328. static void sun4d_set_udt(int cpu)
  329. {
  330. }
  331. /* Setup IRQ distribution scheme. */
  332. void __init sun4d_distribute_irqs(void)
  333. {
  334. struct device_node *dp;
  335. #ifdef DISTRIBUTE_IRQS
  336. cpumask_t sbus_serving_map;
  337. sbus_serving_map = cpu_present_map;
  338. for_each_node_by_name(dp, "sbi") {
  339. int board = of_getintprop_default(dp, "board#", 0);
  340. if ((board * 2) == boot_cpu_id && cpu_isset(board * 2 + 1, cpu_present_map))
  341. sbus_tid[board] = (board * 2 + 1);
  342. else if (cpu_isset(board * 2, cpu_present_map))
  343. sbus_tid[board] = (board * 2);
  344. else if (cpu_isset(board * 2 + 1, cpu_present_map))
  345. sbus_tid[board] = (board * 2 + 1);
  346. else
  347. sbus_tid[board] = 0xff;
  348. if (sbus_tid[board] != 0xff)
  349. cpu_clear(sbus_tid[board], sbus_serving_map);
  350. }
  351. for_each_node_by_name(dp, "sbi") {
  352. int board = of_getintprop_default(dp, "board#", 0);
  353. if (sbus_tid[board] == 0xff) {
  354. int i = 31;
  355. if (cpus_empty(sbus_serving_map))
  356. sbus_serving_map = cpu_present_map;
  357. while (cpu_isset(i, sbus_serving_map))
  358. i--;
  359. sbus_tid[board] = i;
  360. cpu_clear(i, sbus_serving_map);
  361. }
  362. }
  363. for_each_node_by_name(dp, "sbi") {
  364. int devid = of_getintprop_default(dp, "device-id", 0);
  365. int board = of_getintprop_default(dp, "board#", 0);
  366. printk("sbus%d IRQs directed to CPU%d\n", board, sbus_tid[board]);
  367. set_sbi_tid(devid, sbus_tid[board] << 3);
  368. }
  369. #else
  370. int cpuid = cpu_logical_map(1);
  371. if (cpuid == -1)
  372. cpuid = cpu_logical_map(0);
  373. for_each_node_by_name(dp, "sbi") {
  374. int devid = of_getintprop_default(dp, "device-id", 0);
  375. int board = of_getintprop_default(dp, "board#", 0);
  376. sbus_tid[board] = cpuid;
  377. set_sbi_tid(devid, cpuid << 3);
  378. }
  379. printk("All sbus IRQs directed to CPU%d\n", cpuid);
  380. #endif
  381. }
  382. #endif
  383. static void sun4d_clear_clock_irq(void)
  384. {
  385. sbus_readl(&sun4d_timers->l10_timer_limit);
  386. }
  387. static void sun4d_load_profile_irq(int cpu, unsigned int limit)
  388. {
  389. bw_set_prof_limit(cpu, limit);
  390. }
  391. static void __init sun4d_load_profile_irqs(void)
  392. {
  393. int cpu = 0, mid;
  394. while (!cpu_find_by_instance(cpu, NULL, &mid)) {
  395. sun4d_load_profile_irq(mid >> 3, 0);
  396. cpu++;
  397. }
  398. }
  399. static void __init sun4d_fixup_trap_table(void)
  400. {
  401. #ifdef CONFIG_SMP
  402. unsigned long flags;
  403. extern unsigned long lvl14_save[4];
  404. struct tt_entry *trap_table = &sparc_ttable[SP_TRAP_IRQ1 + (14 - 1)];
  405. extern unsigned int real_irq_entry[], smp4d_ticker[];
  406. extern unsigned int patchme_maybe_smp_msg[];
  407. /* Adjust so that we jump directly to smp4d_ticker */
  408. lvl14_save[2] += smp4d_ticker - real_irq_entry;
  409. /* For SMP we use the level 14 ticker, however the bootup code
  410. * has copied the firmware's level 14 vector into the boot cpu's
  411. * trap table, we must fix this now or we get squashed.
  412. */
  413. local_irq_save(flags);
  414. patchme_maybe_smp_msg[0] = 0x01000000; /* NOP out the branch */
  415. trap_table->inst_one = lvl14_save[0];
  416. trap_table->inst_two = lvl14_save[1];
  417. trap_table->inst_three = lvl14_save[2];
  418. trap_table->inst_four = lvl14_save[3];
  419. local_flush_cache_all();
  420. local_irq_restore(flags);
  421. #endif
  422. }
  423. static void __init sun4d_init_timers(irq_handler_t counter_fn)
  424. {
  425. struct device_node *dp;
  426. struct resource res;
  427. const u32 *reg;
  428. int err;
  429. dp = of_find_node_by_name(NULL, "cpu-unit");
  430. if (!dp) {
  431. prom_printf("sun4d_init_timers: Unable to find cpu-unit\n");
  432. prom_halt();
  433. }
  434. /* Which cpu-unit we use is arbitrary, we can view the bootbus timer
  435. * registers via any cpu's mapping. The first 'reg' property is the
  436. * bootbus.
  437. */
  438. reg = of_get_property(dp, "reg", NULL);
  439. of_node_put(dp);
  440. if (!reg) {
  441. prom_printf("sun4d_init_timers: No reg property\n");
  442. prom_halt();
  443. }
  444. res.start = reg[1];
  445. res.end = reg[2] - 1;
  446. res.flags = reg[0] & 0xff;
  447. sun4d_timers = of_ioremap(&res, BW_TIMER_LIMIT,
  448. sizeof(struct sun4d_timer_regs), "user timer");
  449. if (!sun4d_timers) {
  450. prom_printf("sun4d_init_timers: Can't map timer regs\n");
  451. prom_halt();
  452. }
  453. sbus_writel((((1000000/HZ) + 1) << 10), &sun4d_timers->l10_timer_limit);
  454. master_l10_counter = &sun4d_timers->l10_cur_count;
  455. err = request_irq(TIMER_IRQ, counter_fn,
  456. (IRQF_DISABLED | SA_STATIC_ALLOC),
  457. "timer", NULL);
  458. if (err) {
  459. prom_printf("sun4d_init_timers: request_irq() failed with %d\n", err);
  460. prom_halt();
  461. }
  462. sun4d_load_profile_irqs();
  463. sun4d_fixup_trap_table();
  464. }
  465. void __init sun4d_init_sbi_irq(void)
  466. {
  467. struct device_node *dp;
  468. int target_cpu = 0;
  469. #ifdef CONFIG_SMP
  470. target_cpu = boot_cpu_id;
  471. #endif
  472. nsbi = 0;
  473. for_each_node_by_name(dp, "sbi")
  474. nsbi++;
  475. sbus_actions = kzalloc (nsbi * 8 * 4 * sizeof(struct sbus_action), GFP_ATOMIC);
  476. if (!sbus_actions) {
  477. prom_printf("SUN4D: Cannot allocate sbus_actions, halting.\n");
  478. prom_halt();
  479. }
  480. for_each_node_by_name(dp, "sbi") {
  481. int devid = of_getintprop_default(dp, "device-id", 0);
  482. int board = of_getintprop_default(dp, "board#", 0);
  483. unsigned int mask;
  484. set_sbi_tid(devid, target_cpu << 3);
  485. sbus_tid[board] = target_cpu;
  486. /* Get rid of pending irqs from PROM */
  487. mask = acquire_sbi(devid, 0xffffffff);
  488. if (mask) {
  489. printk ("Clearing pending IRQs %08x on SBI %d\n", mask, board);
  490. release_sbi(devid, mask);
  491. }
  492. }
  493. }
  494. void __init sun4d_init_IRQ(void)
  495. {
  496. local_irq_disable();
  497. BTFIXUPSET_CALL(enable_irq, sun4d_enable_irq, BTFIXUPCALL_NORM);
  498. BTFIXUPSET_CALL(disable_irq, sun4d_disable_irq, BTFIXUPCALL_NORM);
  499. BTFIXUPSET_CALL(clear_clock_irq, sun4d_clear_clock_irq, BTFIXUPCALL_NORM);
  500. BTFIXUPSET_CALL(load_profile_irq, sun4d_load_profile_irq, BTFIXUPCALL_NORM);
  501. sparc_init_timers = sun4d_init_timers;
  502. #ifdef CONFIG_SMP
  503. BTFIXUPSET_CALL(set_cpu_int, sun4d_set_cpu_int, BTFIXUPCALL_NORM);
  504. BTFIXUPSET_CALL(clear_cpu_int, sun4d_clear_ipi, BTFIXUPCALL_NOP);
  505. BTFIXUPSET_CALL(set_irq_udt, sun4d_set_udt, BTFIXUPCALL_NOP);
  506. #endif
  507. /* Cannot enable interrupts until OBP ticker is disabled. */
  508. }