pcr.h 1.3 KB

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  1. #ifndef __PCR_H
  2. #define __PCR_H
  3. struct pcr_ops {
  4. u64 (*read)(void);
  5. void (*write)(u64);
  6. };
  7. extern const struct pcr_ops *pcr_ops;
  8. extern void deferred_pcr_work_irq(int irq, struct pt_regs *regs);
  9. extern void schedule_deferred_pcr_work(void);
  10. #define PCR_PIC_PRIV 0x00000001 /* PIC access is privileged */
  11. #define PCR_STRACE 0x00000002 /* Trace supervisor events */
  12. #define PCR_UTRACE 0x00000004 /* Trace user events */
  13. #define PCR_N2_HTRACE 0x00000008 /* Trace hypervisor events */
  14. #define PCR_N2_TOE_OV0 0x00000010 /* Trap if PIC 0 overflows */
  15. #define PCR_N2_TOE_OV1 0x00000020 /* Trap if PIC 1 overflows */
  16. #define PCR_N2_MASK0 0x00003fc0
  17. #define PCR_N2_MASK0_SHIFT 6
  18. #define PCR_N2_SL0 0x0003c000
  19. #define PCR_N2_SL0_SHIFT 14
  20. #define PCR_N2_OV0 0x00040000
  21. #define PCR_N2_MASK1 0x07f80000
  22. #define PCR_N2_MASK1_SHIFT 19
  23. #define PCR_N2_SL1 0x78000000
  24. #define PCR_N2_SL1_SHIFT 27
  25. #define PCR_N2_OV1 0x80000000
  26. extern unsigned int picl_shift;
  27. /* In order to commonize as much of the implementation as
  28. * possible, we use PICH as our counter. Mostly this is
  29. * to accomodate Niagara-1 which can only count insn cycles
  30. * in PICH.
  31. */
  32. static inline u64 picl_value(unsigned int nmi_hz)
  33. {
  34. u32 delta = local_cpu_data().clock_tick / (nmi_hz << picl_shift);
  35. return ((u64)((0 - delta) & 0xffffffff)) << 32;
  36. }
  37. extern u64 pcr_enable;
  38. #endif /* __PCR_H */