cypress.h 2.8 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879
  1. /*
  2. * cypress.h: Cypress module specific definitions and defines.
  3. *
  4. * Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
  5. */
  6. #ifndef _SPARC_CYPRESS_H
  7. #define _SPARC_CYPRESS_H
  8. /* Cypress chips have %psr 'impl' of '0001' and 'vers' of '0001'. */
  9. /* The MMU control register fields on the Sparc Cypress 604/605 MMU's.
  10. *
  11. * ---------------------------------------------------------------
  12. * |implvers| MCA | MCM |MV| MID |BM| C|RSV|MR|CM|CL|CE|RSV|NF|ME|
  13. * ---------------------------------------------------------------
  14. * 31 24 23-22 21-20 19 18-15 14 13 12 11 10 9 8 7-2 1 0
  15. *
  16. * MCA: MultiChip Access -- Used for configuration of multiple
  17. * CY7C604/605 cache units.
  18. * MCM: MultiChip Mask -- Again, for multiple cache unit config.
  19. * MV: MultiChip Valid -- Indicates MCM and MCA have valid settings.
  20. * MID: ModuleID -- Unique processor ID for MBus transactions. (605 only)
  21. * BM: Boot Mode -- 0 = not in boot mode, 1 = in boot mode
  22. * C: Cacheable -- Indicates whether accesses are cacheable while
  23. * the MMU is off. 0=no 1=yes
  24. * MR: MemoryReflection -- Indicates whether the bus attached to the
  25. * MBus supports memory reflection. 0=no 1=yes (605 only)
  26. * CM: CacheMode -- Indicates whether the cache is operating in write
  27. * through or copy-back mode. 0=write-through 1=copy-back
  28. * CL: CacheLock -- Indicates if the entire cache is locked or not.
  29. * 0=not-locked 1=locked (604 only)
  30. * CE: CacheEnable -- Is the virtual cache on? 0=no 1=yes
  31. * NF: NoFault -- Do faults generate traps? 0=yes 1=no
  32. * ME: MmuEnable -- Is the MMU doing translations? 0=no 1=yes
  33. */
  34. #define CYPRESS_MCA 0x00c00000
  35. #define CYPRESS_MCM 0x00300000
  36. #define CYPRESS_MVALID 0x00080000
  37. #define CYPRESS_MIDMASK 0x00078000 /* Only on 605 */
  38. #define CYPRESS_BMODE 0x00004000
  39. #define CYPRESS_ACENABLE 0x00002000
  40. #define CYPRESS_MRFLCT 0x00000800 /* Only on 605 */
  41. #define CYPRESS_CMODE 0x00000400
  42. #define CYPRESS_CLOCK 0x00000200 /* Only on 604 */
  43. #define CYPRESS_CENABLE 0x00000100
  44. #define CYPRESS_NFAULT 0x00000002
  45. #define CYPRESS_MENABLE 0x00000001
  46. static inline void cypress_flush_page(unsigned long page)
  47. {
  48. __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
  49. "r" (page), "i" (ASI_M_FLUSH_PAGE));
  50. }
  51. static inline void cypress_flush_segment(unsigned long addr)
  52. {
  53. __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
  54. "r" (addr), "i" (ASI_M_FLUSH_SEG));
  55. }
  56. static inline void cypress_flush_region(unsigned long addr)
  57. {
  58. __asm__ __volatile__("sta %%g0, [%0] %1\n\t" : :
  59. "r" (addr), "i" (ASI_M_FLUSH_REGION));
  60. }
  61. static inline void cypress_flush_context(void)
  62. {
  63. __asm__ __volatile__("sta %%g0, [%%g0] %0\n\t" : :
  64. "i" (ASI_M_FLUSH_CTX));
  65. }
  66. /* XXX Displacement flushes for buggy chips and initial testing
  67. * XXX go here.
  68. */
  69. #endif /* !(_SPARC_CYPRESS_H) */