ipr.c 2.5 KB

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  1. /*
  2. * Interrupt handling for IPR-based IRQ.
  3. *
  4. * Copyright (C) 1999 Niibe Yutaka & Takeshi Yaegashi
  5. * Copyright (C) 2000 Kazumoto Kojima
  6. * Copyright (C) 2003 Takashi Kusuda <kusuda-takashi@hitachi-ul.co.jp>
  7. * Copyright (C) 2006 Paul Mundt
  8. *
  9. * Supported system:
  10. * On-chip supporting modules (TMU, RTC, etc.).
  11. * On-chip supporting modules for SH7709/SH7709A/SH7729.
  12. * Hitachi SolutionEngine external I/O:
  13. * MS7709SE01, MS7709ASE01, and MS7750SE01
  14. *
  15. * This file is subject to the terms and conditions of the GNU General Public
  16. * License. See the file "COPYING" in the main directory of this archive
  17. * for more details.
  18. */
  19. #include <linux/init.h>
  20. #include <linux/irq.h>
  21. #include <linux/module.h>
  22. #include <linux/io.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/topology.h>
  25. static inline struct ipr_desc *get_ipr_desc(unsigned int irq)
  26. {
  27. struct irq_chip *chip = get_irq_chip(irq);
  28. return (void *)((char *)chip - offsetof(struct ipr_desc, chip));
  29. }
  30. static void disable_ipr_irq(unsigned int irq)
  31. {
  32. struct ipr_data *p = get_irq_chip_data(irq);
  33. unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
  34. /* Set the priority in IPR to 0 */
  35. __raw_writew(__raw_readw(addr) & (0xffff ^ (0xf << p->shift)), addr);
  36. }
  37. static void enable_ipr_irq(unsigned int irq)
  38. {
  39. struct ipr_data *p = get_irq_chip_data(irq);
  40. unsigned long addr = get_ipr_desc(irq)->ipr_offsets[p->ipr_idx];
  41. /* Set priority in IPR back to original value */
  42. __raw_writew(__raw_readw(addr) | (p->priority << p->shift), addr);
  43. }
  44. /*
  45. * The shift value is now the number of bits to shift, not the number of
  46. * bits/4. This is to make it easier to read the value directly from the
  47. * datasheets. The IPR address is calculated using the ipr_offset table.
  48. */
  49. void register_ipr_controller(struct ipr_desc *desc)
  50. {
  51. int i;
  52. desc->chip.mask = disable_ipr_irq;
  53. desc->chip.unmask = enable_ipr_irq;
  54. desc->chip.mask_ack = disable_ipr_irq;
  55. for (i = 0; i < desc->nr_irqs; i++) {
  56. struct ipr_data *p = desc->ipr_data + i;
  57. struct irq_desc *irq_desc;
  58. BUG_ON(p->ipr_idx >= desc->nr_offsets);
  59. BUG_ON(!desc->ipr_offsets[p->ipr_idx]);
  60. irq_desc = irq_to_desc_alloc_node(p->irq, numa_node_id());
  61. if (unlikely(!irq_desc)) {
  62. printk(KERN_INFO "can not get irq_desc for %d\n",
  63. p->irq);
  64. continue;
  65. }
  66. disable_irq_nosync(p->irq);
  67. set_irq_chip_and_handler_name(p->irq, &desc->chip,
  68. handle_level_irq, "level");
  69. set_irq_chip_data(p->irq, p);
  70. disable_ipr_irq(p->irq);
  71. }
  72. }
  73. EXPORT_SYMBOL(register_ipr_controller);