time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/delay.h>
  39. #include <asm/s390_ext.h>
  40. #include <asm/div64.h>
  41. #include <asm/vdso.h>
  42. #include <asm/irq.h>
  43. #include <asm/irq_regs.h>
  44. #include <asm/timer.h>
  45. #include <asm/etr.h>
  46. #include <asm/cio.h>
  47. /* change this if you have some constant time drift */
  48. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  49. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  50. /*
  51. * Create a small time difference between the timer interrupts
  52. * on the different cpus to avoid lock contention.
  53. */
  54. #define CPU_DEVIATION (smp_processor_id() << 12)
  55. #define TICK_SIZE tick
  56. u64 sched_clock_base_cc = -1; /* Force to data section. */
  57. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  58. /*
  59. * Scheduler clock - returns current time in nanosec units.
  60. */
  61. unsigned long long notrace sched_clock(void)
  62. {
  63. return ((get_clock_xt() - sched_clock_base_cc) * 125) >> 9;
  64. }
  65. /*
  66. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  67. */
  68. unsigned long long monotonic_clock(void)
  69. {
  70. return sched_clock();
  71. }
  72. EXPORT_SYMBOL(monotonic_clock);
  73. void tod_to_timeval(__u64 todval, struct timespec *xtime)
  74. {
  75. unsigned long long sec;
  76. sec = todval >> 12;
  77. do_div(sec, 1000000);
  78. xtime->tv_sec = sec;
  79. todval -= (sec * 1000000) << 12;
  80. xtime->tv_nsec = ((todval * 1000) >> 12);
  81. }
  82. void clock_comparator_work(void)
  83. {
  84. struct clock_event_device *cd;
  85. S390_lowcore.clock_comparator = -1ULL;
  86. set_clock_comparator(S390_lowcore.clock_comparator);
  87. cd = &__get_cpu_var(comparators);
  88. cd->event_handler(cd);
  89. }
  90. /*
  91. * Fixup the clock comparator.
  92. */
  93. static void fixup_clock_comparator(unsigned long long delta)
  94. {
  95. /* If nobody is waiting there's nothing to fix. */
  96. if (S390_lowcore.clock_comparator == -1ULL)
  97. return;
  98. S390_lowcore.clock_comparator += delta;
  99. set_clock_comparator(S390_lowcore.clock_comparator);
  100. }
  101. static int s390_next_event(unsigned long delta,
  102. struct clock_event_device *evt)
  103. {
  104. S390_lowcore.clock_comparator = get_clock() + delta;
  105. set_clock_comparator(S390_lowcore.clock_comparator);
  106. return 0;
  107. }
  108. static void s390_set_mode(enum clock_event_mode mode,
  109. struct clock_event_device *evt)
  110. {
  111. }
  112. /*
  113. * Set up lowcore and control register of the current cpu to
  114. * enable TOD clock and clock comparator interrupts.
  115. */
  116. void init_cpu_timer(void)
  117. {
  118. struct clock_event_device *cd;
  119. int cpu;
  120. S390_lowcore.clock_comparator = -1ULL;
  121. set_clock_comparator(S390_lowcore.clock_comparator);
  122. cpu = smp_processor_id();
  123. cd = &per_cpu(comparators, cpu);
  124. cd->name = "comparator";
  125. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  126. cd->mult = 16777;
  127. cd->shift = 12;
  128. cd->min_delta_ns = 1;
  129. cd->max_delta_ns = LONG_MAX;
  130. cd->rating = 400;
  131. cd->cpumask = cpumask_of(cpu);
  132. cd->set_next_event = s390_next_event;
  133. cd->set_mode = s390_set_mode;
  134. clockevents_register_device(cd);
  135. /* Enable clock comparator timer interrupt. */
  136. __ctl_set_bit(0,11);
  137. /* Always allow the timing alert external interrupt. */
  138. __ctl_set_bit(0, 4);
  139. }
  140. static void clock_comparator_interrupt(__u16 code)
  141. {
  142. if (S390_lowcore.clock_comparator == -1ULL)
  143. set_clock_comparator(S390_lowcore.clock_comparator);
  144. }
  145. static void etr_timing_alert(struct etr_irq_parm *);
  146. static void stp_timing_alert(struct stp_irq_parm *);
  147. static void timing_alert_interrupt(__u16 code)
  148. {
  149. if (S390_lowcore.ext_params & 0x00c40000)
  150. etr_timing_alert((struct etr_irq_parm *)
  151. &S390_lowcore.ext_params);
  152. if (S390_lowcore.ext_params & 0x00038000)
  153. stp_timing_alert((struct stp_irq_parm *)
  154. &S390_lowcore.ext_params);
  155. }
  156. static void etr_reset(void);
  157. static void stp_reset(void);
  158. unsigned long read_persistent_clock(void)
  159. {
  160. struct timespec ts;
  161. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, &ts);
  162. return ts.tv_sec;
  163. }
  164. static cycle_t read_tod_clock(struct clocksource *cs)
  165. {
  166. return get_clock();
  167. }
  168. static struct clocksource clocksource_tod = {
  169. .name = "tod",
  170. .rating = 400,
  171. .read = read_tod_clock,
  172. .mask = -1ULL,
  173. .mult = 1000,
  174. .shift = 12,
  175. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  176. };
  177. void update_vsyscall(struct timespec *wall_time, struct clocksource *clock)
  178. {
  179. if (clock != &clocksource_tod)
  180. return;
  181. /* Make userspace gettimeofday spin until we're done. */
  182. ++vdso_data->tb_update_count;
  183. smp_wmb();
  184. vdso_data->xtime_tod_stamp = clock->cycle_last;
  185. vdso_data->xtime_clock_sec = xtime.tv_sec;
  186. vdso_data->xtime_clock_nsec = xtime.tv_nsec;
  187. vdso_data->wtom_clock_sec = wall_to_monotonic.tv_sec;
  188. vdso_data->wtom_clock_nsec = wall_to_monotonic.tv_nsec;
  189. smp_wmb();
  190. ++vdso_data->tb_update_count;
  191. }
  192. extern struct timezone sys_tz;
  193. void update_vsyscall_tz(void)
  194. {
  195. /* Make userspace gettimeofday spin until we're done. */
  196. ++vdso_data->tb_update_count;
  197. smp_wmb();
  198. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  199. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  200. smp_wmb();
  201. ++vdso_data->tb_update_count;
  202. }
  203. /*
  204. * Initialize the TOD clock and the CPU timer of
  205. * the boot cpu.
  206. */
  207. void __init time_init(void)
  208. {
  209. struct timespec ts;
  210. unsigned long flags;
  211. cycle_t now;
  212. /* Reset time synchronization interfaces. */
  213. etr_reset();
  214. stp_reset();
  215. /* request the clock comparator external interrupt */
  216. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  217. panic("Couldn't request external interrupt 0x1004");
  218. /* request the timing alert external interrupt */
  219. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  220. panic("Couldn't request external interrupt 0x1406");
  221. if (clocksource_register(&clocksource_tod) != 0)
  222. panic("Could not register TOD clock source");
  223. /*
  224. * The TOD clock is an accurate clock. The xtime should be
  225. * initialized in a way that the difference between TOD and
  226. * xtime is reasonably small. Too bad that timekeeping_init
  227. * sets xtime.tv_nsec to zero. In addition the clock source
  228. * change from the jiffies clock source to the TOD clock
  229. * source add another error of up to 1/HZ second. The same
  230. * function sets wall_to_monotonic to a value that is too
  231. * small for /proc/uptime to be accurate.
  232. * Reset xtime and wall_to_monotonic to sane values.
  233. */
  234. write_seqlock_irqsave(&xtime_lock, flags);
  235. now = get_clock();
  236. tod_to_timeval(now - TOD_UNIX_EPOCH, &xtime);
  237. clocksource_tod.cycle_last = now;
  238. clocksource_tod.raw_time = xtime;
  239. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, &ts);
  240. set_normalized_timespec(&wall_to_monotonic, -ts.tv_sec, -ts.tv_nsec);
  241. write_sequnlock_irqrestore(&xtime_lock, flags);
  242. /* Enable TOD clock interrupts on the boot cpu. */
  243. init_cpu_timer();
  244. /* Enable cpu timer interrupts on the boot cpu. */
  245. vtime_init();
  246. }
  247. /*
  248. * The time is "clock". old is what we think the time is.
  249. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  250. * "delay" is an approximation how long the synchronization took. If
  251. * the time correction is positive, then "delay" is subtracted from
  252. * the time difference and only the remaining part is passed to ntp.
  253. */
  254. static unsigned long long adjust_time(unsigned long long old,
  255. unsigned long long clock,
  256. unsigned long long delay)
  257. {
  258. unsigned long long delta, ticks;
  259. struct timex adjust;
  260. if (clock > old) {
  261. /* It is later than we thought. */
  262. delta = ticks = clock - old;
  263. delta = ticks = (delta < delay) ? 0 : delta - delay;
  264. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  265. adjust.offset = ticks * (1000000 / HZ);
  266. } else {
  267. /* It is earlier than we thought. */
  268. delta = ticks = old - clock;
  269. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  270. delta = -delta;
  271. adjust.offset = -ticks * (1000000 / HZ);
  272. }
  273. sched_clock_base_cc += delta;
  274. if (adjust.offset != 0) {
  275. pr_notice("The ETR interface has adjusted the clock "
  276. "by %li microseconds\n", adjust.offset);
  277. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  278. do_adjtimex(&adjust);
  279. }
  280. return delta;
  281. }
  282. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  283. static DEFINE_MUTEX(clock_sync_mutex);
  284. static unsigned long clock_sync_flags;
  285. #define CLOCK_SYNC_HAS_ETR 0
  286. #define CLOCK_SYNC_HAS_STP 1
  287. #define CLOCK_SYNC_ETR 2
  288. #define CLOCK_SYNC_STP 3
  289. /*
  290. * The synchronous get_clock function. It will write the current clock
  291. * value to the clock pointer and return 0 if the clock is in sync with
  292. * the external time source. If the clock mode is local it will return
  293. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  294. * reference.
  295. */
  296. int get_sync_clock(unsigned long long *clock)
  297. {
  298. atomic_t *sw_ptr;
  299. unsigned int sw0, sw1;
  300. sw_ptr = &get_cpu_var(clock_sync_word);
  301. sw0 = atomic_read(sw_ptr);
  302. *clock = get_clock();
  303. sw1 = atomic_read(sw_ptr);
  304. put_cpu_var(clock_sync_sync);
  305. if (sw0 == sw1 && (sw0 & 0x80000000U))
  306. /* Success: time is in sync. */
  307. return 0;
  308. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  309. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  310. return -ENOSYS;
  311. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  312. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  313. return -EACCES;
  314. return -EAGAIN;
  315. }
  316. EXPORT_SYMBOL(get_sync_clock);
  317. /*
  318. * Make get_sync_clock return -EAGAIN.
  319. */
  320. static void disable_sync_clock(void *dummy)
  321. {
  322. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  323. /*
  324. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  325. * fail until the sync bit is turned back on. In addition
  326. * increase the "sequence" counter to avoid the race of an
  327. * etr event and the complete recovery against get_sync_clock.
  328. */
  329. atomic_clear_mask(0x80000000, sw_ptr);
  330. atomic_inc(sw_ptr);
  331. }
  332. /*
  333. * Make get_sync_clock return 0 again.
  334. * Needs to be called from a context disabled for preemption.
  335. */
  336. static void enable_sync_clock(void)
  337. {
  338. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  339. atomic_set_mask(0x80000000, sw_ptr);
  340. }
  341. /*
  342. * Function to check if the clock is in sync.
  343. */
  344. static inline int check_sync_clock(void)
  345. {
  346. atomic_t *sw_ptr;
  347. int rc;
  348. sw_ptr = &get_cpu_var(clock_sync_word);
  349. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  350. put_cpu_var(clock_sync_sync);
  351. return rc;
  352. }
  353. /* Single threaded workqueue used for etr and stp sync events */
  354. static struct workqueue_struct *time_sync_wq;
  355. static void __init time_init_wq(void)
  356. {
  357. if (time_sync_wq)
  358. return;
  359. time_sync_wq = create_singlethread_workqueue("timesync");
  360. stop_machine_create();
  361. }
  362. /*
  363. * External Time Reference (ETR) code.
  364. */
  365. static int etr_port0_online;
  366. static int etr_port1_online;
  367. static int etr_steai_available;
  368. static int __init early_parse_etr(char *p)
  369. {
  370. if (strncmp(p, "off", 3) == 0)
  371. etr_port0_online = etr_port1_online = 0;
  372. else if (strncmp(p, "port0", 5) == 0)
  373. etr_port0_online = 1;
  374. else if (strncmp(p, "port1", 5) == 0)
  375. etr_port1_online = 1;
  376. else if (strncmp(p, "on", 2) == 0)
  377. etr_port0_online = etr_port1_online = 1;
  378. return 0;
  379. }
  380. early_param("etr", early_parse_etr);
  381. enum etr_event {
  382. ETR_EVENT_PORT0_CHANGE,
  383. ETR_EVENT_PORT1_CHANGE,
  384. ETR_EVENT_PORT_ALERT,
  385. ETR_EVENT_SYNC_CHECK,
  386. ETR_EVENT_SWITCH_LOCAL,
  387. ETR_EVENT_UPDATE,
  388. };
  389. /*
  390. * Valid bit combinations of the eacr register are (x = don't care):
  391. * e0 e1 dp p0 p1 ea es sl
  392. * 0 0 x 0 0 0 0 0 initial, disabled state
  393. * 0 0 x 0 1 1 0 0 port 1 online
  394. * 0 0 x 1 0 1 0 0 port 0 online
  395. * 0 0 x 1 1 1 0 0 both ports online
  396. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  397. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  398. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  399. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  400. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  401. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  402. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  403. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  404. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  405. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  406. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  407. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  408. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  409. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  410. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  411. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  412. */
  413. static struct etr_eacr etr_eacr;
  414. static u64 etr_tolec; /* time of last eacr update */
  415. static struct etr_aib etr_port0;
  416. static int etr_port0_uptodate;
  417. static struct etr_aib etr_port1;
  418. static int etr_port1_uptodate;
  419. static unsigned long etr_events;
  420. static struct timer_list etr_timer;
  421. static void etr_timeout(unsigned long dummy);
  422. static void etr_work_fn(struct work_struct *work);
  423. static DEFINE_MUTEX(etr_work_mutex);
  424. static DECLARE_WORK(etr_work, etr_work_fn);
  425. /*
  426. * Reset ETR attachment.
  427. */
  428. static void etr_reset(void)
  429. {
  430. etr_eacr = (struct etr_eacr) {
  431. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  432. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  433. .es = 0, .sl = 0 };
  434. if (etr_setr(&etr_eacr) == 0) {
  435. etr_tolec = get_clock();
  436. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  437. if (etr_port0_online && etr_port1_online)
  438. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  439. } else if (etr_port0_online || etr_port1_online) {
  440. pr_warning("The real or virtual hardware system does "
  441. "not provide an ETR interface\n");
  442. etr_port0_online = etr_port1_online = 0;
  443. }
  444. }
  445. static int __init etr_init(void)
  446. {
  447. struct etr_aib aib;
  448. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  449. return 0;
  450. time_init_wq();
  451. /* Check if this machine has the steai instruction. */
  452. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  453. etr_steai_available = 1;
  454. setup_timer(&etr_timer, etr_timeout, 0UL);
  455. if (etr_port0_online) {
  456. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  457. queue_work(time_sync_wq, &etr_work);
  458. }
  459. if (etr_port1_online) {
  460. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  461. queue_work(time_sync_wq, &etr_work);
  462. }
  463. return 0;
  464. }
  465. arch_initcall(etr_init);
  466. /*
  467. * Two sorts of ETR machine checks. The architecture reads:
  468. * "When a machine-check niterruption occurs and if a switch-to-local or
  469. * ETR-sync-check interrupt request is pending but disabled, this pending
  470. * disabled interruption request is indicated and is cleared".
  471. * Which means that we can get etr_switch_to_local events from the machine
  472. * check handler although the interruption condition is disabled. Lovely..
  473. */
  474. /*
  475. * Switch to local machine check. This is called when the last usable
  476. * ETR port goes inactive. After switch to local the clock is not in sync.
  477. */
  478. void etr_switch_to_local(void)
  479. {
  480. if (!etr_eacr.sl)
  481. return;
  482. disable_sync_clock(NULL);
  483. set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events);
  484. queue_work(time_sync_wq, &etr_work);
  485. }
  486. /*
  487. * ETR sync check machine check. This is called when the ETR OTE and the
  488. * local clock OTE are farther apart than the ETR sync check tolerance.
  489. * After a ETR sync check the clock is not in sync. The machine check
  490. * is broadcasted to all cpus at the same time.
  491. */
  492. void etr_sync_check(void)
  493. {
  494. if (!etr_eacr.es)
  495. return;
  496. disable_sync_clock(NULL);
  497. set_bit(ETR_EVENT_SYNC_CHECK, &etr_events);
  498. queue_work(time_sync_wq, &etr_work);
  499. }
  500. /*
  501. * ETR timing alert. There are two causes:
  502. * 1) port state change, check the usability of the port
  503. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  504. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  505. * or ETR-data word 4 (edf4) has changed.
  506. */
  507. static void etr_timing_alert(struct etr_irq_parm *intparm)
  508. {
  509. if (intparm->pc0)
  510. /* ETR port 0 state change. */
  511. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  512. if (intparm->pc1)
  513. /* ETR port 1 state change. */
  514. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  515. if (intparm->eai)
  516. /*
  517. * ETR port alert on either port 0, 1 or both.
  518. * Both ports are not up-to-date now.
  519. */
  520. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  521. queue_work(time_sync_wq, &etr_work);
  522. }
  523. static void etr_timeout(unsigned long dummy)
  524. {
  525. set_bit(ETR_EVENT_UPDATE, &etr_events);
  526. queue_work(time_sync_wq, &etr_work);
  527. }
  528. /*
  529. * Check if the etr mode is pss.
  530. */
  531. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  532. {
  533. return eacr.es && !eacr.sl;
  534. }
  535. /*
  536. * Check if the etr mode is etr.
  537. */
  538. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  539. {
  540. return eacr.es && eacr.sl;
  541. }
  542. /*
  543. * Check if the port can be used for TOD synchronization.
  544. * For PPS mode the port has to receive OTEs. For ETR mode
  545. * the port has to receive OTEs, the ETR stepping bit has to
  546. * be zero and the validity bits for data frame 1, 2, and 3
  547. * have to be 1.
  548. */
  549. static int etr_port_valid(struct etr_aib *aib, int port)
  550. {
  551. unsigned int psc;
  552. /* Check that this port is receiving OTEs. */
  553. if (aib->tsp == 0)
  554. return 0;
  555. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  556. if (psc == etr_lpsc_pps_mode)
  557. return 1;
  558. if (psc == etr_lpsc_operational_step)
  559. return !aib->esw.y && aib->slsw.v1 &&
  560. aib->slsw.v2 && aib->slsw.v3;
  561. return 0;
  562. }
  563. /*
  564. * Check if two ports are on the same network.
  565. */
  566. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  567. {
  568. // FIXME: any other fields we have to compare?
  569. return aib1->edf1.net_id == aib2->edf1.net_id;
  570. }
  571. /*
  572. * Wrapper for etr_stei that converts physical port states
  573. * to logical port states to be consistent with the output
  574. * of stetr (see etr_psc vs. etr_lpsc).
  575. */
  576. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  577. {
  578. BUG_ON(etr_steai(aib, func) != 0);
  579. /* Convert port state to logical port state. */
  580. if (aib->esw.psc0 == 1)
  581. aib->esw.psc0 = 2;
  582. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  583. aib->esw.psc0 = 1;
  584. if (aib->esw.psc1 == 1)
  585. aib->esw.psc1 = 2;
  586. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  587. aib->esw.psc1 = 1;
  588. }
  589. /*
  590. * Check if the aib a2 is still connected to the same attachment as
  591. * aib a1, the etv values differ by one and a2 is valid.
  592. */
  593. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  594. {
  595. int state_a1, state_a2;
  596. /* Paranoia check: e0/e1 should better be the same. */
  597. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  598. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  599. return 0;
  600. /* Still connected to the same etr ? */
  601. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  602. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  603. if (state_a1 == etr_lpsc_operational_step) {
  604. if (state_a2 != etr_lpsc_operational_step ||
  605. a1->edf1.net_id != a2->edf1.net_id ||
  606. a1->edf1.etr_id != a2->edf1.etr_id ||
  607. a1->edf1.etr_pn != a2->edf1.etr_pn)
  608. return 0;
  609. } else if (state_a2 != etr_lpsc_pps_mode)
  610. return 0;
  611. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  612. if (a1->edf2.etv + 1 != a2->edf2.etv)
  613. return 0;
  614. if (!etr_port_valid(a2, p))
  615. return 0;
  616. return 1;
  617. }
  618. struct clock_sync_data {
  619. atomic_t cpus;
  620. int in_sync;
  621. unsigned long long fixup_cc;
  622. int etr_port;
  623. struct etr_aib *etr_aib;
  624. };
  625. static void clock_sync_cpu(struct clock_sync_data *sync)
  626. {
  627. atomic_dec(&sync->cpus);
  628. enable_sync_clock();
  629. /*
  630. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  631. * is called on all other cpus while the TOD clocks is stopped.
  632. * __udelay will stop the cpu on an enabled wait psw until the
  633. * TOD is running again.
  634. */
  635. while (sync->in_sync == 0) {
  636. __udelay(1);
  637. /*
  638. * A different cpu changes *in_sync. Therefore use
  639. * barrier() to force memory access.
  640. */
  641. barrier();
  642. }
  643. if (sync->in_sync != 1)
  644. /* Didn't work. Clear per-cpu in sync bit again. */
  645. disable_sync_clock(NULL);
  646. /*
  647. * This round of TOD syncing is done. Set the clock comparator
  648. * to the next tick and let the processor continue.
  649. */
  650. fixup_clock_comparator(sync->fixup_cc);
  651. }
  652. /*
  653. * Sync the TOD clock using the port refered to by aibp. This port
  654. * has to be enabled and the other port has to be disabled. The
  655. * last eacr update has to be more than 1.6 seconds in the past.
  656. */
  657. static int etr_sync_clock(void *data)
  658. {
  659. static int first;
  660. unsigned long long clock, old_clock, delay, delta;
  661. struct clock_sync_data *etr_sync;
  662. struct etr_aib *sync_port, *aib;
  663. int port;
  664. int rc;
  665. etr_sync = data;
  666. if (xchg(&first, 1) == 1) {
  667. /* Slave */
  668. clock_sync_cpu(etr_sync);
  669. return 0;
  670. }
  671. /* Wait until all other cpus entered the sync function. */
  672. while (atomic_read(&etr_sync->cpus) != 0)
  673. cpu_relax();
  674. port = etr_sync->etr_port;
  675. aib = etr_sync->etr_aib;
  676. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  677. enable_sync_clock();
  678. /* Set clock to next OTE. */
  679. __ctl_set_bit(14, 21);
  680. __ctl_set_bit(0, 29);
  681. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  682. old_clock = get_clock();
  683. if (set_clock(clock) == 0) {
  684. __udelay(1); /* Wait for the clock to start. */
  685. __ctl_clear_bit(0, 29);
  686. __ctl_clear_bit(14, 21);
  687. etr_stetr(aib);
  688. /* Adjust Linux timing variables. */
  689. delay = (unsigned long long)
  690. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  691. delta = adjust_time(old_clock, clock, delay);
  692. etr_sync->fixup_cc = delta;
  693. fixup_clock_comparator(delta);
  694. /* Verify that the clock is properly set. */
  695. if (!etr_aib_follows(sync_port, aib, port)) {
  696. /* Didn't work. */
  697. disable_sync_clock(NULL);
  698. etr_sync->in_sync = -EAGAIN;
  699. rc = -EAGAIN;
  700. } else {
  701. etr_sync->in_sync = 1;
  702. rc = 0;
  703. }
  704. } else {
  705. /* Could not set the clock ?!? */
  706. __ctl_clear_bit(0, 29);
  707. __ctl_clear_bit(14, 21);
  708. disable_sync_clock(NULL);
  709. etr_sync->in_sync = -EAGAIN;
  710. rc = -EAGAIN;
  711. }
  712. xchg(&first, 0);
  713. return rc;
  714. }
  715. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  716. {
  717. struct clock_sync_data etr_sync;
  718. struct etr_aib *sync_port;
  719. int follows;
  720. int rc;
  721. /* Check if the current aib is adjacent to the sync port aib. */
  722. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  723. follows = etr_aib_follows(sync_port, aib, port);
  724. memcpy(sync_port, aib, sizeof(*aib));
  725. if (!follows)
  726. return -EAGAIN;
  727. memset(&etr_sync, 0, sizeof(etr_sync));
  728. etr_sync.etr_aib = aib;
  729. etr_sync.etr_port = port;
  730. get_online_cpus();
  731. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  732. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  733. put_online_cpus();
  734. return rc;
  735. }
  736. /*
  737. * Handle the immediate effects of the different events.
  738. * The port change event is used for online/offline changes.
  739. */
  740. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  741. {
  742. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  743. eacr.es = 0;
  744. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  745. eacr.es = eacr.sl = 0;
  746. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  747. etr_port0_uptodate = etr_port1_uptodate = 0;
  748. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  749. if (eacr.e0)
  750. /*
  751. * Port change of an enabled port. We have to
  752. * assume that this can have caused an stepping
  753. * port switch.
  754. */
  755. etr_tolec = get_clock();
  756. eacr.p0 = etr_port0_online;
  757. if (!eacr.p0)
  758. eacr.e0 = 0;
  759. etr_port0_uptodate = 0;
  760. }
  761. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  762. if (eacr.e1)
  763. /*
  764. * Port change of an enabled port. We have to
  765. * assume that this can have caused an stepping
  766. * port switch.
  767. */
  768. etr_tolec = get_clock();
  769. eacr.p1 = etr_port1_online;
  770. if (!eacr.p1)
  771. eacr.e1 = 0;
  772. etr_port1_uptodate = 0;
  773. }
  774. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  775. return eacr;
  776. }
  777. /*
  778. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  779. * one of the ports needs an update.
  780. */
  781. static void etr_set_tolec_timeout(unsigned long long now)
  782. {
  783. unsigned long micros;
  784. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  785. (!etr_eacr.p1 || etr_port1_uptodate))
  786. return;
  787. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  788. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  789. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  790. }
  791. /*
  792. * Set up a time that expires after 1/2 second.
  793. */
  794. static void etr_set_sync_timeout(void)
  795. {
  796. mod_timer(&etr_timer, jiffies + HZ/2);
  797. }
  798. /*
  799. * Update the aib information for one or both ports.
  800. */
  801. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  802. struct etr_eacr eacr)
  803. {
  804. /* With both ports disabled the aib information is useless. */
  805. if (!eacr.e0 && !eacr.e1)
  806. return eacr;
  807. /* Update port0 or port1 with aib stored in etr_work_fn. */
  808. if (aib->esw.q == 0) {
  809. /* Information for port 0 stored. */
  810. if (eacr.p0 && !etr_port0_uptodate) {
  811. etr_port0 = *aib;
  812. if (etr_port0_online)
  813. etr_port0_uptodate = 1;
  814. }
  815. } else {
  816. /* Information for port 1 stored. */
  817. if (eacr.p1 && !etr_port1_uptodate) {
  818. etr_port1 = *aib;
  819. if (etr_port0_online)
  820. etr_port1_uptodate = 1;
  821. }
  822. }
  823. /*
  824. * Do not try to get the alternate port aib if the clock
  825. * is not in sync yet.
  826. */
  827. if (!check_sync_clock())
  828. return eacr;
  829. /*
  830. * If steai is available we can get the information about
  831. * the other port immediately. If only stetr is available the
  832. * data-port bit toggle has to be used.
  833. */
  834. if (etr_steai_available) {
  835. if (eacr.p0 && !etr_port0_uptodate) {
  836. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  837. etr_port0_uptodate = 1;
  838. }
  839. if (eacr.p1 && !etr_port1_uptodate) {
  840. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  841. etr_port1_uptodate = 1;
  842. }
  843. } else {
  844. /*
  845. * One port was updated above, if the other
  846. * port is not uptodate toggle dp bit.
  847. */
  848. if ((eacr.p0 && !etr_port0_uptodate) ||
  849. (eacr.p1 && !etr_port1_uptodate))
  850. eacr.dp ^= 1;
  851. else
  852. eacr.dp = 0;
  853. }
  854. return eacr;
  855. }
  856. /*
  857. * Write new etr control register if it differs from the current one.
  858. * Return 1 if etr_tolec has been updated as well.
  859. */
  860. static void etr_update_eacr(struct etr_eacr eacr)
  861. {
  862. int dp_changed;
  863. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  864. /* No change, return. */
  865. return;
  866. /*
  867. * The disable of an active port of the change of the data port
  868. * bit can/will cause a change in the data port.
  869. */
  870. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  871. (etr_eacr.dp ^ eacr.dp) != 0;
  872. etr_eacr = eacr;
  873. etr_setr(&etr_eacr);
  874. if (dp_changed)
  875. etr_tolec = get_clock();
  876. }
  877. /*
  878. * ETR work. In this function you'll find the main logic. In
  879. * particular this is the only function that calls etr_update_eacr(),
  880. * it "controls" the etr control register.
  881. */
  882. static void etr_work_fn(struct work_struct *work)
  883. {
  884. unsigned long long now;
  885. struct etr_eacr eacr;
  886. struct etr_aib aib;
  887. int sync_port;
  888. /* prevent multiple execution. */
  889. mutex_lock(&etr_work_mutex);
  890. /* Create working copy of etr_eacr. */
  891. eacr = etr_eacr;
  892. /* Check for the different events and their immediate effects. */
  893. eacr = etr_handle_events(eacr);
  894. /* Check if ETR is supposed to be active. */
  895. eacr.ea = eacr.p0 || eacr.p1;
  896. if (!eacr.ea) {
  897. /* Both ports offline. Reset everything. */
  898. eacr.dp = eacr.es = eacr.sl = 0;
  899. on_each_cpu(disable_sync_clock, NULL, 1);
  900. del_timer_sync(&etr_timer);
  901. etr_update_eacr(eacr);
  902. goto out_unlock;
  903. }
  904. /* Store aib to get the current ETR status word. */
  905. BUG_ON(etr_stetr(&aib) != 0);
  906. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  907. now = get_clock();
  908. /*
  909. * Update the port information if the last stepping port change
  910. * or data port change is older than 1.6 seconds.
  911. */
  912. if (now >= etr_tolec + (1600000 << 12))
  913. eacr = etr_handle_update(&aib, eacr);
  914. /*
  915. * Select ports to enable. The prefered synchronization mode is PPS.
  916. * If a port can be enabled depends on a number of things:
  917. * 1) The port needs to be online and uptodate. A port is not
  918. * disabled just because it is not uptodate, but it is only
  919. * enabled if it is uptodate.
  920. * 2) The port needs to have the same mode (pps / etr).
  921. * 3) The port needs to be usable -> etr_port_valid() == 1
  922. * 4) To enable the second port the clock needs to be in sync.
  923. * 5) If both ports are useable and are ETR ports, the network id
  924. * has to be the same.
  925. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  926. */
  927. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  928. eacr.sl = 0;
  929. eacr.e0 = 1;
  930. if (!etr_mode_is_pps(etr_eacr))
  931. eacr.es = 0;
  932. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  933. eacr.e1 = 0;
  934. // FIXME: uptodate checks ?
  935. else if (etr_port0_uptodate && etr_port1_uptodate)
  936. eacr.e1 = 1;
  937. sync_port = (etr_port0_uptodate &&
  938. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  939. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  940. eacr.sl = 0;
  941. eacr.e0 = 0;
  942. eacr.e1 = 1;
  943. if (!etr_mode_is_pps(etr_eacr))
  944. eacr.es = 0;
  945. sync_port = (etr_port1_uptodate &&
  946. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  947. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  948. eacr.sl = 1;
  949. eacr.e0 = 1;
  950. if (!etr_mode_is_etr(etr_eacr))
  951. eacr.es = 0;
  952. if (!eacr.es || !eacr.p1 ||
  953. aib.esw.psc1 != etr_lpsc_operational_alt)
  954. eacr.e1 = 0;
  955. else if (etr_port0_uptodate && etr_port1_uptodate &&
  956. etr_compare_network(&etr_port0, &etr_port1))
  957. eacr.e1 = 1;
  958. sync_port = (etr_port0_uptodate &&
  959. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  960. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  961. eacr.sl = 1;
  962. eacr.e0 = 0;
  963. eacr.e1 = 1;
  964. if (!etr_mode_is_etr(etr_eacr))
  965. eacr.es = 0;
  966. sync_port = (etr_port1_uptodate &&
  967. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  968. } else {
  969. /* Both ports not usable. */
  970. eacr.es = eacr.sl = 0;
  971. sync_port = -1;
  972. }
  973. /*
  974. * If the clock is in sync just update the eacr and return.
  975. * If there is no valid sync port wait for a port update.
  976. */
  977. if (check_sync_clock() || sync_port < 0) {
  978. etr_update_eacr(eacr);
  979. etr_set_tolec_timeout(now);
  980. goto out_unlock;
  981. }
  982. /*
  983. * Prepare control register for clock syncing
  984. * (reset data port bit, set sync check control.
  985. */
  986. eacr.dp = 0;
  987. eacr.es = 1;
  988. /*
  989. * Update eacr and try to synchronize the clock. If the update
  990. * of eacr caused a stepping port switch (or if we have to
  991. * assume that a stepping port switch has occured) or the
  992. * clock syncing failed, reset the sync check control bit
  993. * and set up a timer to try again after 0.5 seconds
  994. */
  995. etr_update_eacr(eacr);
  996. if (now < etr_tolec + (1600000 << 12) ||
  997. etr_sync_clock_stop(&aib, sync_port) != 0) {
  998. /* Sync failed. Try again in 1/2 second. */
  999. eacr.es = 0;
  1000. etr_update_eacr(eacr);
  1001. etr_set_sync_timeout();
  1002. } else
  1003. etr_set_tolec_timeout(now);
  1004. out_unlock:
  1005. mutex_unlock(&etr_work_mutex);
  1006. }
  1007. /*
  1008. * Sysfs interface functions
  1009. */
  1010. static struct sysdev_class etr_sysclass = {
  1011. .name = "etr",
  1012. };
  1013. static struct sys_device etr_port0_dev = {
  1014. .id = 0,
  1015. .cls = &etr_sysclass,
  1016. };
  1017. static struct sys_device etr_port1_dev = {
  1018. .id = 1,
  1019. .cls = &etr_sysclass,
  1020. };
  1021. /*
  1022. * ETR class attributes
  1023. */
  1024. static ssize_t etr_stepping_port_show(struct sysdev_class *class, char *buf)
  1025. {
  1026. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1027. }
  1028. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1029. static ssize_t etr_stepping_mode_show(struct sysdev_class *class, char *buf)
  1030. {
  1031. char *mode_str;
  1032. if (etr_mode_is_pps(etr_eacr))
  1033. mode_str = "pps";
  1034. else if (etr_mode_is_etr(etr_eacr))
  1035. mode_str = "etr";
  1036. else
  1037. mode_str = "local";
  1038. return sprintf(buf, "%s\n", mode_str);
  1039. }
  1040. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1041. /*
  1042. * ETR port attributes
  1043. */
  1044. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1045. {
  1046. if (dev == &etr_port0_dev)
  1047. return etr_port0_online ? &etr_port0 : NULL;
  1048. else
  1049. return etr_port1_online ? &etr_port1 : NULL;
  1050. }
  1051. static ssize_t etr_online_show(struct sys_device *dev,
  1052. struct sysdev_attribute *attr,
  1053. char *buf)
  1054. {
  1055. unsigned int online;
  1056. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1057. return sprintf(buf, "%i\n", online);
  1058. }
  1059. static ssize_t etr_online_store(struct sys_device *dev,
  1060. struct sysdev_attribute *attr,
  1061. const char *buf, size_t count)
  1062. {
  1063. unsigned int value;
  1064. value = simple_strtoul(buf, NULL, 0);
  1065. if (value != 0 && value != 1)
  1066. return -EINVAL;
  1067. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1068. return -EOPNOTSUPP;
  1069. mutex_lock(&clock_sync_mutex);
  1070. if (dev == &etr_port0_dev) {
  1071. if (etr_port0_online == value)
  1072. goto out; /* Nothing to do. */
  1073. etr_port0_online = value;
  1074. if (etr_port0_online && etr_port1_online)
  1075. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1076. else
  1077. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1078. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1079. queue_work(time_sync_wq, &etr_work);
  1080. } else {
  1081. if (etr_port1_online == value)
  1082. goto out; /* Nothing to do. */
  1083. etr_port1_online = value;
  1084. if (etr_port0_online && etr_port1_online)
  1085. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1086. else
  1087. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1088. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1089. queue_work(time_sync_wq, &etr_work);
  1090. }
  1091. out:
  1092. mutex_unlock(&clock_sync_mutex);
  1093. return count;
  1094. }
  1095. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1096. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1097. struct sysdev_attribute *attr,
  1098. char *buf)
  1099. {
  1100. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1101. etr_eacr.e0 : etr_eacr.e1);
  1102. }
  1103. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1104. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1105. struct sysdev_attribute *attr, char *buf)
  1106. {
  1107. if (!etr_port0_online && !etr_port1_online)
  1108. /* Status word is not uptodate if both ports are offline. */
  1109. return -ENODATA;
  1110. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1111. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1112. }
  1113. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1114. static ssize_t etr_untuned_show(struct sys_device *dev,
  1115. struct sysdev_attribute *attr, char *buf)
  1116. {
  1117. struct etr_aib *aib = etr_aib_from_dev(dev);
  1118. if (!aib || !aib->slsw.v1)
  1119. return -ENODATA;
  1120. return sprintf(buf, "%i\n", aib->edf1.u);
  1121. }
  1122. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1123. static ssize_t etr_network_id_show(struct sys_device *dev,
  1124. struct sysdev_attribute *attr, char *buf)
  1125. {
  1126. struct etr_aib *aib = etr_aib_from_dev(dev);
  1127. if (!aib || !aib->slsw.v1)
  1128. return -ENODATA;
  1129. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1130. }
  1131. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1132. static ssize_t etr_id_show(struct sys_device *dev,
  1133. struct sysdev_attribute *attr, char *buf)
  1134. {
  1135. struct etr_aib *aib = etr_aib_from_dev(dev);
  1136. if (!aib || !aib->slsw.v1)
  1137. return -ENODATA;
  1138. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1139. }
  1140. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1141. static ssize_t etr_port_number_show(struct sys_device *dev,
  1142. struct sysdev_attribute *attr, char *buf)
  1143. {
  1144. struct etr_aib *aib = etr_aib_from_dev(dev);
  1145. if (!aib || !aib->slsw.v1)
  1146. return -ENODATA;
  1147. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1148. }
  1149. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1150. static ssize_t etr_coupled_show(struct sys_device *dev,
  1151. struct sysdev_attribute *attr, char *buf)
  1152. {
  1153. struct etr_aib *aib = etr_aib_from_dev(dev);
  1154. if (!aib || !aib->slsw.v3)
  1155. return -ENODATA;
  1156. return sprintf(buf, "%i\n", aib->edf3.c);
  1157. }
  1158. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1159. static ssize_t etr_local_time_show(struct sys_device *dev,
  1160. struct sysdev_attribute *attr, char *buf)
  1161. {
  1162. struct etr_aib *aib = etr_aib_from_dev(dev);
  1163. if (!aib || !aib->slsw.v3)
  1164. return -ENODATA;
  1165. return sprintf(buf, "%i\n", aib->edf3.blto);
  1166. }
  1167. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1168. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1169. struct sysdev_attribute *attr, char *buf)
  1170. {
  1171. struct etr_aib *aib = etr_aib_from_dev(dev);
  1172. if (!aib || !aib->slsw.v3)
  1173. return -ENODATA;
  1174. return sprintf(buf, "%i\n", aib->edf3.buo);
  1175. }
  1176. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1177. static struct sysdev_attribute *etr_port_attributes[] = {
  1178. &attr_online,
  1179. &attr_stepping_control,
  1180. &attr_state_code,
  1181. &attr_untuned,
  1182. &attr_network,
  1183. &attr_id,
  1184. &attr_port,
  1185. &attr_coupled,
  1186. &attr_local_time,
  1187. &attr_utc_offset,
  1188. NULL
  1189. };
  1190. static int __init etr_register_port(struct sys_device *dev)
  1191. {
  1192. struct sysdev_attribute **attr;
  1193. int rc;
  1194. rc = sysdev_register(dev);
  1195. if (rc)
  1196. goto out;
  1197. for (attr = etr_port_attributes; *attr; attr++) {
  1198. rc = sysdev_create_file(dev, *attr);
  1199. if (rc)
  1200. goto out_unreg;
  1201. }
  1202. return 0;
  1203. out_unreg:
  1204. for (; attr >= etr_port_attributes; attr--)
  1205. sysdev_remove_file(dev, *attr);
  1206. sysdev_unregister(dev);
  1207. out:
  1208. return rc;
  1209. }
  1210. static void __init etr_unregister_port(struct sys_device *dev)
  1211. {
  1212. struct sysdev_attribute **attr;
  1213. for (attr = etr_port_attributes; *attr; attr++)
  1214. sysdev_remove_file(dev, *attr);
  1215. sysdev_unregister(dev);
  1216. }
  1217. static int __init etr_init_sysfs(void)
  1218. {
  1219. int rc;
  1220. rc = sysdev_class_register(&etr_sysclass);
  1221. if (rc)
  1222. goto out;
  1223. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1224. if (rc)
  1225. goto out_unreg_class;
  1226. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1227. if (rc)
  1228. goto out_remove_stepping_port;
  1229. rc = etr_register_port(&etr_port0_dev);
  1230. if (rc)
  1231. goto out_remove_stepping_mode;
  1232. rc = etr_register_port(&etr_port1_dev);
  1233. if (rc)
  1234. goto out_remove_port0;
  1235. return 0;
  1236. out_remove_port0:
  1237. etr_unregister_port(&etr_port0_dev);
  1238. out_remove_stepping_mode:
  1239. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1240. out_remove_stepping_port:
  1241. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1242. out_unreg_class:
  1243. sysdev_class_unregister(&etr_sysclass);
  1244. out:
  1245. return rc;
  1246. }
  1247. device_initcall(etr_init_sysfs);
  1248. /*
  1249. * Server Time Protocol (STP) code.
  1250. */
  1251. static int stp_online;
  1252. static struct stp_sstpi stp_info;
  1253. static void *stp_page;
  1254. static void stp_work_fn(struct work_struct *work);
  1255. static DEFINE_MUTEX(stp_work_mutex);
  1256. static DECLARE_WORK(stp_work, stp_work_fn);
  1257. static struct timer_list stp_timer;
  1258. static int __init early_parse_stp(char *p)
  1259. {
  1260. if (strncmp(p, "off", 3) == 0)
  1261. stp_online = 0;
  1262. else if (strncmp(p, "on", 2) == 0)
  1263. stp_online = 1;
  1264. return 0;
  1265. }
  1266. early_param("stp", early_parse_stp);
  1267. /*
  1268. * Reset STP attachment.
  1269. */
  1270. static void __init stp_reset(void)
  1271. {
  1272. int rc;
  1273. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1274. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1275. if (rc == 0)
  1276. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1277. else if (stp_online) {
  1278. pr_warning("The real or virtual hardware system does "
  1279. "not provide an STP interface\n");
  1280. free_page((unsigned long) stp_page);
  1281. stp_page = NULL;
  1282. stp_online = 0;
  1283. }
  1284. }
  1285. static void stp_timeout(unsigned long dummy)
  1286. {
  1287. queue_work(time_sync_wq, &stp_work);
  1288. }
  1289. static int __init stp_init(void)
  1290. {
  1291. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1292. return 0;
  1293. setup_timer(&stp_timer, stp_timeout, 0UL);
  1294. time_init_wq();
  1295. if (!stp_online)
  1296. return 0;
  1297. queue_work(time_sync_wq, &stp_work);
  1298. return 0;
  1299. }
  1300. arch_initcall(stp_init);
  1301. /*
  1302. * STP timing alert. There are three causes:
  1303. * 1) timing status change
  1304. * 2) link availability change
  1305. * 3) time control parameter change
  1306. * In all three cases we are only interested in the clock source state.
  1307. * If a STP clock source is now available use it.
  1308. */
  1309. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1310. {
  1311. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1312. queue_work(time_sync_wq, &stp_work);
  1313. }
  1314. /*
  1315. * STP sync check machine check. This is called when the timing state
  1316. * changes from the synchronized state to the unsynchronized state.
  1317. * After a STP sync check the clock is not in sync. The machine check
  1318. * is broadcasted to all cpus at the same time.
  1319. */
  1320. void stp_sync_check(void)
  1321. {
  1322. disable_sync_clock(NULL);
  1323. queue_work(time_sync_wq, &stp_work);
  1324. }
  1325. /*
  1326. * STP island condition machine check. This is called when an attached
  1327. * server attempts to communicate over an STP link and the servers
  1328. * have matching CTN ids and have a valid stratum-1 configuration
  1329. * but the configurations do not match.
  1330. */
  1331. void stp_island_check(void)
  1332. {
  1333. disable_sync_clock(NULL);
  1334. queue_work(time_sync_wq, &stp_work);
  1335. }
  1336. static int stp_sync_clock(void *data)
  1337. {
  1338. static int first;
  1339. unsigned long long old_clock, delta;
  1340. struct clock_sync_data *stp_sync;
  1341. int rc;
  1342. stp_sync = data;
  1343. if (xchg(&first, 1) == 1) {
  1344. /* Slave */
  1345. clock_sync_cpu(stp_sync);
  1346. return 0;
  1347. }
  1348. /* Wait until all other cpus entered the sync function. */
  1349. while (atomic_read(&stp_sync->cpus) != 0)
  1350. cpu_relax();
  1351. enable_sync_clock();
  1352. rc = 0;
  1353. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1354. stp_info.todoff[2] || stp_info.todoff[3] ||
  1355. stp_info.tmd != 2) {
  1356. old_clock = get_clock();
  1357. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1358. if (rc == 0) {
  1359. delta = adjust_time(old_clock, get_clock(), 0);
  1360. fixup_clock_comparator(delta);
  1361. rc = chsc_sstpi(stp_page, &stp_info,
  1362. sizeof(struct stp_sstpi));
  1363. if (rc == 0 && stp_info.tmd != 2)
  1364. rc = -EAGAIN;
  1365. }
  1366. }
  1367. if (rc) {
  1368. disable_sync_clock(NULL);
  1369. stp_sync->in_sync = -EAGAIN;
  1370. } else
  1371. stp_sync->in_sync = 1;
  1372. xchg(&first, 0);
  1373. return 0;
  1374. }
  1375. /*
  1376. * STP work. Check for the STP state and take over the clock
  1377. * synchronization if the STP clock source is usable.
  1378. */
  1379. static void stp_work_fn(struct work_struct *work)
  1380. {
  1381. struct clock_sync_data stp_sync;
  1382. int rc;
  1383. /* prevent multiple execution. */
  1384. mutex_lock(&stp_work_mutex);
  1385. if (!stp_online) {
  1386. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1387. del_timer_sync(&stp_timer);
  1388. goto out_unlock;
  1389. }
  1390. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1391. if (rc)
  1392. goto out_unlock;
  1393. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1394. if (rc || stp_info.c == 0)
  1395. goto out_unlock;
  1396. /* Skip synchronization if the clock is already in sync. */
  1397. if (check_sync_clock())
  1398. goto out_unlock;
  1399. memset(&stp_sync, 0, sizeof(stp_sync));
  1400. get_online_cpus();
  1401. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1402. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1403. put_online_cpus();
  1404. if (!check_sync_clock())
  1405. /*
  1406. * There is a usable clock but the synchonization failed.
  1407. * Retry after a second.
  1408. */
  1409. mod_timer(&stp_timer, jiffies + HZ);
  1410. out_unlock:
  1411. mutex_unlock(&stp_work_mutex);
  1412. }
  1413. /*
  1414. * STP class sysfs interface functions
  1415. */
  1416. static struct sysdev_class stp_sysclass = {
  1417. .name = "stp",
  1418. };
  1419. static ssize_t stp_ctn_id_show(struct sysdev_class *class, char *buf)
  1420. {
  1421. if (!stp_online)
  1422. return -ENODATA;
  1423. return sprintf(buf, "%016llx\n",
  1424. *(unsigned long long *) stp_info.ctnid);
  1425. }
  1426. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1427. static ssize_t stp_ctn_type_show(struct sysdev_class *class, char *buf)
  1428. {
  1429. if (!stp_online)
  1430. return -ENODATA;
  1431. return sprintf(buf, "%i\n", stp_info.ctn);
  1432. }
  1433. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1434. static ssize_t stp_dst_offset_show(struct sysdev_class *class, char *buf)
  1435. {
  1436. if (!stp_online || !(stp_info.vbits & 0x2000))
  1437. return -ENODATA;
  1438. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1439. }
  1440. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1441. static ssize_t stp_leap_seconds_show(struct sysdev_class *class, char *buf)
  1442. {
  1443. if (!stp_online || !(stp_info.vbits & 0x8000))
  1444. return -ENODATA;
  1445. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1446. }
  1447. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1448. static ssize_t stp_stratum_show(struct sysdev_class *class, char *buf)
  1449. {
  1450. if (!stp_online)
  1451. return -ENODATA;
  1452. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1453. }
  1454. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1455. static ssize_t stp_time_offset_show(struct sysdev_class *class, char *buf)
  1456. {
  1457. if (!stp_online || !(stp_info.vbits & 0x0800))
  1458. return -ENODATA;
  1459. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1460. }
  1461. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1462. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class, char *buf)
  1463. {
  1464. if (!stp_online || !(stp_info.vbits & 0x4000))
  1465. return -ENODATA;
  1466. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1467. }
  1468. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1469. stp_time_zone_offset_show, NULL);
  1470. static ssize_t stp_timing_mode_show(struct sysdev_class *class, char *buf)
  1471. {
  1472. if (!stp_online)
  1473. return -ENODATA;
  1474. return sprintf(buf, "%i\n", stp_info.tmd);
  1475. }
  1476. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1477. static ssize_t stp_timing_state_show(struct sysdev_class *class, char *buf)
  1478. {
  1479. if (!stp_online)
  1480. return -ENODATA;
  1481. return sprintf(buf, "%i\n", stp_info.tst);
  1482. }
  1483. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1484. static ssize_t stp_online_show(struct sysdev_class *class, char *buf)
  1485. {
  1486. return sprintf(buf, "%i\n", stp_online);
  1487. }
  1488. static ssize_t stp_online_store(struct sysdev_class *class,
  1489. const char *buf, size_t count)
  1490. {
  1491. unsigned int value;
  1492. value = simple_strtoul(buf, NULL, 0);
  1493. if (value != 0 && value != 1)
  1494. return -EINVAL;
  1495. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1496. return -EOPNOTSUPP;
  1497. mutex_lock(&clock_sync_mutex);
  1498. stp_online = value;
  1499. if (stp_online)
  1500. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1501. else
  1502. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1503. queue_work(time_sync_wq, &stp_work);
  1504. mutex_unlock(&clock_sync_mutex);
  1505. return count;
  1506. }
  1507. /*
  1508. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1509. * stp/online but attr_online already exists in this file ..
  1510. */
  1511. static struct sysdev_class_attribute attr_stp_online = {
  1512. .attr = { .name = "online", .mode = 0600 },
  1513. .show = stp_online_show,
  1514. .store = stp_online_store,
  1515. };
  1516. static struct sysdev_class_attribute *stp_attributes[] = {
  1517. &attr_ctn_id,
  1518. &attr_ctn_type,
  1519. &attr_dst_offset,
  1520. &attr_leap_seconds,
  1521. &attr_stp_online,
  1522. &attr_stratum,
  1523. &attr_time_offset,
  1524. &attr_time_zone_offset,
  1525. &attr_timing_mode,
  1526. &attr_timing_state,
  1527. NULL
  1528. };
  1529. static int __init stp_init_sysfs(void)
  1530. {
  1531. struct sysdev_class_attribute **attr;
  1532. int rc;
  1533. rc = sysdev_class_register(&stp_sysclass);
  1534. if (rc)
  1535. goto out;
  1536. for (attr = stp_attributes; *attr; attr++) {
  1537. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1538. if (rc)
  1539. goto out_unreg;
  1540. }
  1541. return 0;
  1542. out_unreg:
  1543. for (; attr >= stp_attributes; attr--)
  1544. sysdev_class_remove_file(&stp_sysclass, *attr);
  1545. sysdev_class_unregister(&stp_sysclass);
  1546. out:
  1547. return rc;
  1548. }
  1549. device_initcall(stp_init_sysfs);