smp.c 4.7 KB

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  1. /*
  2. * SMP support for BPA machines.
  3. *
  4. * Dave Engebretsen, Peter Bergner, and
  5. * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
  6. *
  7. * Plus various changes from other IBM teams...
  8. *
  9. * This program is free software; you can redistribute it and/or
  10. * modify it under the terms of the GNU General Public License
  11. * as published by the Free Software Foundation; either version
  12. * 2 of the License, or (at your option) any later version.
  13. */
  14. #undef DEBUG
  15. #include <linux/kernel.h>
  16. #include <linux/module.h>
  17. #include <linux/sched.h>
  18. #include <linux/smp.h>
  19. #include <linux/interrupt.h>
  20. #include <linux/delay.h>
  21. #include <linux/init.h>
  22. #include <linux/spinlock.h>
  23. #include <linux/cache.h>
  24. #include <linux/err.h>
  25. #include <linux/sysdev.h>
  26. #include <linux/cpu.h>
  27. #include <asm/ptrace.h>
  28. #include <asm/atomic.h>
  29. #include <asm/irq.h>
  30. #include <asm/page.h>
  31. #include <asm/pgtable.h>
  32. #include <asm/io.h>
  33. #include <asm/prom.h>
  34. #include <asm/smp.h>
  35. #include <asm/paca.h>
  36. #include <asm/machdep.h>
  37. #include <asm/cputable.h>
  38. #include <asm/firmware.h>
  39. #include <asm/system.h>
  40. #include <asm/rtas.h>
  41. #include <asm/cputhreads.h>
  42. #include "interrupt.h"
  43. #include <asm/udbg.h>
  44. #ifdef DEBUG
  45. #define DBG(fmt...) udbg_printf(fmt)
  46. #else
  47. #define DBG(fmt...)
  48. #endif
  49. /*
  50. * The Primary thread of each non-boot processor was started from the OF client
  51. * interface by prom_hold_cpus and is spinning on secondary_hold_spinloop.
  52. */
  53. static cpumask_t of_spin_map;
  54. extern void generic_secondary_smp_init(unsigned long);
  55. /**
  56. * smp_startup_cpu() - start the given cpu
  57. *
  58. * At boot time, there is nothing to do for primary threads which were
  59. * started from Open Firmware. For anything else, call RTAS with the
  60. * appropriate start location.
  61. *
  62. * Returns:
  63. * 0 - failure
  64. * 1 - success
  65. */
  66. static inline int __devinit smp_startup_cpu(unsigned int lcpu)
  67. {
  68. int status;
  69. unsigned long start_here = __pa((u32)*((unsigned long *)
  70. generic_secondary_smp_init));
  71. unsigned int pcpu;
  72. int start_cpu;
  73. if (cpu_isset(lcpu, of_spin_map))
  74. /* Already started by OF and sitting in spin loop */
  75. return 1;
  76. pcpu = get_hard_smp_processor_id(lcpu);
  77. /* Fixup atomic count: it exited inside IRQ handler. */
  78. task_thread_info(paca[lcpu].__current)->preempt_count = 0;
  79. /*
  80. * If the RTAS start-cpu token does not exist then presume the
  81. * cpu is already spinning.
  82. */
  83. start_cpu = rtas_token("start-cpu");
  84. if (start_cpu == RTAS_UNKNOWN_SERVICE)
  85. return 1;
  86. status = rtas_call(start_cpu, 3, 1, NULL, pcpu, start_here, lcpu);
  87. if (status != 0) {
  88. printk(KERN_ERR "start-cpu failed: %i\n", status);
  89. return 0;
  90. }
  91. return 1;
  92. }
  93. static void smp_iic_message_pass(int target, int msg)
  94. {
  95. unsigned int i;
  96. if (target < NR_CPUS) {
  97. iic_cause_IPI(target, msg);
  98. } else {
  99. for_each_online_cpu(i) {
  100. if (target == MSG_ALL_BUT_SELF
  101. && i == smp_processor_id())
  102. continue;
  103. iic_cause_IPI(i, msg);
  104. }
  105. }
  106. }
  107. static int __init smp_iic_probe(void)
  108. {
  109. iic_request_IPIs();
  110. return cpus_weight(cpu_possible_map);
  111. }
  112. static void __devinit smp_cell_setup_cpu(int cpu)
  113. {
  114. if (cpu != boot_cpuid)
  115. iic_setup_cpu();
  116. /*
  117. * change default DABRX to allow user watchpoints
  118. */
  119. mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
  120. }
  121. static void __devinit smp_cell_kick_cpu(int nr)
  122. {
  123. BUG_ON(nr < 0 || nr >= NR_CPUS);
  124. if (!smp_startup_cpu(nr))
  125. return;
  126. /*
  127. * The processor is currently spinning, waiting for the
  128. * cpu_start field to become non-zero After we set cpu_start,
  129. * the processor will continue on to secondary_start
  130. */
  131. paca[nr].cpu_start = 1;
  132. }
  133. static int smp_cell_cpu_bootable(unsigned int nr)
  134. {
  135. /* Special case - we inhibit secondary thread startup
  136. * during boot if the user requests it. Odd-numbered
  137. * cpus are assumed to be secondary threads.
  138. */
  139. if (system_state < SYSTEM_RUNNING &&
  140. cpu_has_feature(CPU_FTR_SMT) &&
  141. !smt_enabled_at_boot && cpu_thread_in_core(nr) != 0)
  142. return 0;
  143. return 1;
  144. }
  145. static struct smp_ops_t bpa_iic_smp_ops = {
  146. .message_pass = smp_iic_message_pass,
  147. .probe = smp_iic_probe,
  148. .kick_cpu = smp_cell_kick_cpu,
  149. .setup_cpu = smp_cell_setup_cpu,
  150. .cpu_bootable = smp_cell_cpu_bootable,
  151. };
  152. /* This is called very early */
  153. void __init smp_init_cell(void)
  154. {
  155. int i;
  156. DBG(" -> smp_init_cell()\n");
  157. smp_ops = &bpa_iic_smp_ops;
  158. /* Mark threads which are still spinning in hold loops. */
  159. if (cpu_has_feature(CPU_FTR_SMT)) {
  160. for_each_present_cpu(i) {
  161. if (cpu_thread_in_core(i) == 0)
  162. cpu_set(i, of_spin_map);
  163. }
  164. } else {
  165. of_spin_map = cpu_present_map;
  166. }
  167. cpu_clear(boot_cpuid, of_spin_map);
  168. /* Non-lpar has additional take/give timebase */
  169. if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
  170. smp_ops->give_timebase = rtas_give_timebase;
  171. smp_ops->take_timebase = rtas_take_timebase;
  172. }
  173. DBG(" <- smp_init_cell()\n");
  174. }