cputable.c 56 KB

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  1. /*
  2. * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
  3. *
  4. * Modifications for ppc64:
  5. * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License
  9. * as published by the Free Software Foundation; either version
  10. * 2 of the License, or (at your option) any later version.
  11. */
  12. #include <linux/string.h>
  13. #include <linux/sched.h>
  14. #include <linux/threads.h>
  15. #include <linux/init.h>
  16. #include <linux/module.h>
  17. #include <asm/oprofile_impl.h>
  18. #include <asm/cputable.h>
  19. #include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
  20. #include <asm/mmu.h>
  21. struct cpu_spec* cur_cpu_spec = NULL;
  22. EXPORT_SYMBOL(cur_cpu_spec);
  23. /* The platform string corresponding to the real PVR */
  24. const char *powerpc_base_platform;
  25. /* NOTE:
  26. * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  27. * the responsibility of the appropriate CPU save/restore functions to
  28. * eventually copy these settings over. Those save/restore aren't yet
  29. * part of the cputable though. That has to be fixed for both ppc32
  30. * and ppc64
  31. */
  32. #ifdef CONFIG_PPC32
  33. extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
  34. extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
  35. extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
  36. extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
  37. extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
  38. extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
  39. extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
  40. extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
  41. extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
  42. extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
  43. extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
  44. extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
  45. extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
  46. extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
  47. extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
  48. extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
  49. extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
  50. extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
  51. extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
  52. extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
  53. extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
  54. #endif /* CONFIG_PPC32 */
  55. #ifdef CONFIG_PPC64
  56. extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  57. extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
  58. extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
  59. extern void __restore_cpu_pa6t(void);
  60. extern void __restore_cpu_ppc970(void);
  61. extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
  62. extern void __restore_cpu_power7(void);
  63. #endif /* CONFIG_PPC64 */
  64. /* This table only contains "desktop" CPUs, it need to be filled with embedded
  65. * ones as well...
  66. */
  67. #define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
  68. PPC_FEATURE_HAS_MMU)
  69. #define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
  70. #define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
  71. #define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
  72. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  73. #define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
  74. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
  75. #define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
  76. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  77. PPC_FEATURE_TRUE_LE | \
  78. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  79. #define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
  80. PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
  81. PPC_FEATURE_TRUE_LE | \
  82. PPC_FEATURE_PSERIES_PERFMON_COMPAT)
  83. #define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
  84. PPC_FEATURE_TRUE_LE | \
  85. PPC_FEATURE_HAS_ALTIVEC_COMP)
  86. #define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
  87. PPC_FEATURE_BOOKE)
  88. static struct cpu_spec __initdata cpu_specs[] = {
  89. #ifdef CONFIG_PPC64
  90. { /* Power3 */
  91. .pvr_mask = 0xffff0000,
  92. .pvr_value = 0x00400000,
  93. .cpu_name = "POWER3 (630)",
  94. .cpu_features = CPU_FTRS_POWER3,
  95. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  96. .mmu_features = MMU_FTR_HPTE_TABLE,
  97. .icache_bsize = 128,
  98. .dcache_bsize = 128,
  99. .num_pmcs = 8,
  100. .pmc_type = PPC_PMC_IBM,
  101. .oprofile_cpu_type = "ppc64/power3",
  102. .oprofile_type = PPC_OPROFILE_RS64,
  103. .machine_check = machine_check_generic,
  104. .platform = "power3",
  105. },
  106. { /* Power3+ */
  107. .pvr_mask = 0xffff0000,
  108. .pvr_value = 0x00410000,
  109. .cpu_name = "POWER3 (630+)",
  110. .cpu_features = CPU_FTRS_POWER3,
  111. .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
  112. .mmu_features = MMU_FTR_HPTE_TABLE,
  113. .icache_bsize = 128,
  114. .dcache_bsize = 128,
  115. .num_pmcs = 8,
  116. .pmc_type = PPC_PMC_IBM,
  117. .oprofile_cpu_type = "ppc64/power3",
  118. .oprofile_type = PPC_OPROFILE_RS64,
  119. .machine_check = machine_check_generic,
  120. .platform = "power3",
  121. },
  122. { /* Northstar */
  123. .pvr_mask = 0xffff0000,
  124. .pvr_value = 0x00330000,
  125. .cpu_name = "RS64-II (northstar)",
  126. .cpu_features = CPU_FTRS_RS64,
  127. .cpu_user_features = COMMON_USER_PPC64,
  128. .mmu_features = MMU_FTR_HPTE_TABLE,
  129. .icache_bsize = 128,
  130. .dcache_bsize = 128,
  131. .num_pmcs = 8,
  132. .pmc_type = PPC_PMC_IBM,
  133. .oprofile_cpu_type = "ppc64/rs64",
  134. .oprofile_type = PPC_OPROFILE_RS64,
  135. .machine_check = machine_check_generic,
  136. .platform = "rs64",
  137. },
  138. { /* Pulsar */
  139. .pvr_mask = 0xffff0000,
  140. .pvr_value = 0x00340000,
  141. .cpu_name = "RS64-III (pulsar)",
  142. .cpu_features = CPU_FTRS_RS64,
  143. .cpu_user_features = COMMON_USER_PPC64,
  144. .mmu_features = MMU_FTR_HPTE_TABLE,
  145. .icache_bsize = 128,
  146. .dcache_bsize = 128,
  147. .num_pmcs = 8,
  148. .pmc_type = PPC_PMC_IBM,
  149. .oprofile_cpu_type = "ppc64/rs64",
  150. .oprofile_type = PPC_OPROFILE_RS64,
  151. .machine_check = machine_check_generic,
  152. .platform = "rs64",
  153. },
  154. { /* I-star */
  155. .pvr_mask = 0xffff0000,
  156. .pvr_value = 0x00360000,
  157. .cpu_name = "RS64-III (icestar)",
  158. .cpu_features = CPU_FTRS_RS64,
  159. .cpu_user_features = COMMON_USER_PPC64,
  160. .mmu_features = MMU_FTR_HPTE_TABLE,
  161. .icache_bsize = 128,
  162. .dcache_bsize = 128,
  163. .num_pmcs = 8,
  164. .pmc_type = PPC_PMC_IBM,
  165. .oprofile_cpu_type = "ppc64/rs64",
  166. .oprofile_type = PPC_OPROFILE_RS64,
  167. .machine_check = machine_check_generic,
  168. .platform = "rs64",
  169. },
  170. { /* S-star */
  171. .pvr_mask = 0xffff0000,
  172. .pvr_value = 0x00370000,
  173. .cpu_name = "RS64-IV (sstar)",
  174. .cpu_features = CPU_FTRS_RS64,
  175. .cpu_user_features = COMMON_USER_PPC64,
  176. .mmu_features = MMU_FTR_HPTE_TABLE,
  177. .icache_bsize = 128,
  178. .dcache_bsize = 128,
  179. .num_pmcs = 8,
  180. .pmc_type = PPC_PMC_IBM,
  181. .oprofile_cpu_type = "ppc64/rs64",
  182. .oprofile_type = PPC_OPROFILE_RS64,
  183. .machine_check = machine_check_generic,
  184. .platform = "rs64",
  185. },
  186. { /* Power4 */
  187. .pvr_mask = 0xffff0000,
  188. .pvr_value = 0x00350000,
  189. .cpu_name = "POWER4 (gp)",
  190. .cpu_features = CPU_FTRS_POWER4,
  191. .cpu_user_features = COMMON_USER_POWER4,
  192. .mmu_features = MMU_FTR_HPTE_TABLE,
  193. .icache_bsize = 128,
  194. .dcache_bsize = 128,
  195. .num_pmcs = 8,
  196. .pmc_type = PPC_PMC_IBM,
  197. .oprofile_cpu_type = "ppc64/power4",
  198. .oprofile_type = PPC_OPROFILE_POWER4,
  199. .machine_check = machine_check_generic,
  200. .platform = "power4",
  201. },
  202. { /* Power4+ */
  203. .pvr_mask = 0xffff0000,
  204. .pvr_value = 0x00380000,
  205. .cpu_name = "POWER4+ (gq)",
  206. .cpu_features = CPU_FTRS_POWER4,
  207. .cpu_user_features = COMMON_USER_POWER4,
  208. .mmu_features = MMU_FTR_HPTE_TABLE,
  209. .icache_bsize = 128,
  210. .dcache_bsize = 128,
  211. .num_pmcs = 8,
  212. .pmc_type = PPC_PMC_IBM,
  213. .oprofile_cpu_type = "ppc64/power4",
  214. .oprofile_type = PPC_OPROFILE_POWER4,
  215. .machine_check = machine_check_generic,
  216. .platform = "power4",
  217. },
  218. { /* PPC970 */
  219. .pvr_mask = 0xffff0000,
  220. .pvr_value = 0x00390000,
  221. .cpu_name = "PPC970",
  222. .cpu_features = CPU_FTRS_PPC970,
  223. .cpu_user_features = COMMON_USER_POWER4 |
  224. PPC_FEATURE_HAS_ALTIVEC_COMP,
  225. .mmu_features = MMU_FTR_HPTE_TABLE,
  226. .icache_bsize = 128,
  227. .dcache_bsize = 128,
  228. .num_pmcs = 8,
  229. .pmc_type = PPC_PMC_IBM,
  230. .cpu_setup = __setup_cpu_ppc970,
  231. .cpu_restore = __restore_cpu_ppc970,
  232. .oprofile_cpu_type = "ppc64/970",
  233. .oprofile_type = PPC_OPROFILE_POWER4,
  234. .machine_check = machine_check_generic,
  235. .platform = "ppc970",
  236. },
  237. { /* PPC970FX */
  238. .pvr_mask = 0xffff0000,
  239. .pvr_value = 0x003c0000,
  240. .cpu_name = "PPC970FX",
  241. .cpu_features = CPU_FTRS_PPC970,
  242. .cpu_user_features = COMMON_USER_POWER4 |
  243. PPC_FEATURE_HAS_ALTIVEC_COMP,
  244. .mmu_features = MMU_FTR_HPTE_TABLE,
  245. .icache_bsize = 128,
  246. .dcache_bsize = 128,
  247. .num_pmcs = 8,
  248. .pmc_type = PPC_PMC_IBM,
  249. .cpu_setup = __setup_cpu_ppc970,
  250. .cpu_restore = __restore_cpu_ppc970,
  251. .oprofile_cpu_type = "ppc64/970",
  252. .oprofile_type = PPC_OPROFILE_POWER4,
  253. .machine_check = machine_check_generic,
  254. .platform = "ppc970",
  255. },
  256. { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
  257. .pvr_mask = 0xffffffff,
  258. .pvr_value = 0x00440100,
  259. .cpu_name = "PPC970MP",
  260. .cpu_features = CPU_FTRS_PPC970,
  261. .cpu_user_features = COMMON_USER_POWER4 |
  262. PPC_FEATURE_HAS_ALTIVEC_COMP,
  263. .mmu_features = MMU_FTR_HPTE_TABLE,
  264. .icache_bsize = 128,
  265. .dcache_bsize = 128,
  266. .num_pmcs = 8,
  267. .pmc_type = PPC_PMC_IBM,
  268. .cpu_setup = __setup_cpu_ppc970,
  269. .cpu_restore = __restore_cpu_ppc970,
  270. .oprofile_cpu_type = "ppc64/970MP",
  271. .oprofile_type = PPC_OPROFILE_POWER4,
  272. .machine_check = machine_check_generic,
  273. .platform = "ppc970",
  274. },
  275. { /* PPC970MP */
  276. .pvr_mask = 0xffff0000,
  277. .pvr_value = 0x00440000,
  278. .cpu_name = "PPC970MP",
  279. .cpu_features = CPU_FTRS_PPC970,
  280. .cpu_user_features = COMMON_USER_POWER4 |
  281. PPC_FEATURE_HAS_ALTIVEC_COMP,
  282. .mmu_features = MMU_FTR_HPTE_TABLE,
  283. .icache_bsize = 128,
  284. .dcache_bsize = 128,
  285. .num_pmcs = 8,
  286. .pmc_type = PPC_PMC_IBM,
  287. .cpu_setup = __setup_cpu_ppc970MP,
  288. .cpu_restore = __restore_cpu_ppc970,
  289. .oprofile_cpu_type = "ppc64/970MP",
  290. .oprofile_type = PPC_OPROFILE_POWER4,
  291. .machine_check = machine_check_generic,
  292. .platform = "ppc970",
  293. },
  294. { /* PPC970GX */
  295. .pvr_mask = 0xffff0000,
  296. .pvr_value = 0x00450000,
  297. .cpu_name = "PPC970GX",
  298. .cpu_features = CPU_FTRS_PPC970,
  299. .cpu_user_features = COMMON_USER_POWER4 |
  300. PPC_FEATURE_HAS_ALTIVEC_COMP,
  301. .mmu_features = MMU_FTR_HPTE_TABLE,
  302. .icache_bsize = 128,
  303. .dcache_bsize = 128,
  304. .num_pmcs = 8,
  305. .pmc_type = PPC_PMC_IBM,
  306. .cpu_setup = __setup_cpu_ppc970,
  307. .oprofile_cpu_type = "ppc64/970",
  308. .oprofile_type = PPC_OPROFILE_POWER4,
  309. .machine_check = machine_check_generic,
  310. .platform = "ppc970",
  311. },
  312. { /* Power5 GR */
  313. .pvr_mask = 0xffff0000,
  314. .pvr_value = 0x003a0000,
  315. .cpu_name = "POWER5 (gr)",
  316. .cpu_features = CPU_FTRS_POWER5,
  317. .cpu_user_features = COMMON_USER_POWER5,
  318. .mmu_features = MMU_FTR_HPTE_TABLE,
  319. .icache_bsize = 128,
  320. .dcache_bsize = 128,
  321. .num_pmcs = 6,
  322. .pmc_type = PPC_PMC_IBM,
  323. .oprofile_cpu_type = "ppc64/power5",
  324. .oprofile_type = PPC_OPROFILE_POWER4,
  325. /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
  326. * and above but only works on POWER5 and above
  327. */
  328. .oprofile_mmcra_sihv = MMCRA_SIHV,
  329. .oprofile_mmcra_sipr = MMCRA_SIPR,
  330. .machine_check = machine_check_generic,
  331. .platform = "power5",
  332. },
  333. { /* Power5++ */
  334. .pvr_mask = 0xffffff00,
  335. .pvr_value = 0x003b0300,
  336. .cpu_name = "POWER5+ (gs)",
  337. .cpu_features = CPU_FTRS_POWER5,
  338. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  339. .mmu_features = MMU_FTR_HPTE_TABLE,
  340. .icache_bsize = 128,
  341. .dcache_bsize = 128,
  342. .num_pmcs = 6,
  343. .oprofile_cpu_type = "ppc64/power5++",
  344. .oprofile_type = PPC_OPROFILE_POWER4,
  345. .oprofile_mmcra_sihv = MMCRA_SIHV,
  346. .oprofile_mmcra_sipr = MMCRA_SIPR,
  347. .machine_check = machine_check_generic,
  348. .platform = "power5+",
  349. },
  350. { /* Power5 GS */
  351. .pvr_mask = 0xffff0000,
  352. .pvr_value = 0x003b0000,
  353. .cpu_name = "POWER5+ (gs)",
  354. .cpu_features = CPU_FTRS_POWER5,
  355. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  356. .mmu_features = MMU_FTR_HPTE_TABLE,
  357. .icache_bsize = 128,
  358. .dcache_bsize = 128,
  359. .num_pmcs = 6,
  360. .pmc_type = PPC_PMC_IBM,
  361. .oprofile_cpu_type = "ppc64/power5+",
  362. .oprofile_type = PPC_OPROFILE_POWER4,
  363. .oprofile_mmcra_sihv = MMCRA_SIHV,
  364. .oprofile_mmcra_sipr = MMCRA_SIPR,
  365. .machine_check = machine_check_generic,
  366. .platform = "power5+",
  367. },
  368. { /* POWER6 in P5+ mode; 2.04-compliant processor */
  369. .pvr_mask = 0xffffffff,
  370. .pvr_value = 0x0f000001,
  371. .cpu_name = "POWER5+",
  372. .cpu_features = CPU_FTRS_POWER5,
  373. .cpu_user_features = COMMON_USER_POWER5_PLUS,
  374. .mmu_features = MMU_FTR_HPTE_TABLE,
  375. .icache_bsize = 128,
  376. .dcache_bsize = 128,
  377. .machine_check = machine_check_generic,
  378. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  379. .oprofile_type = PPC_OPROFILE_POWER4,
  380. .platform = "power5+",
  381. },
  382. { /* Power6 */
  383. .pvr_mask = 0xffff0000,
  384. .pvr_value = 0x003e0000,
  385. .cpu_name = "POWER6 (raw)",
  386. .cpu_features = CPU_FTRS_POWER6,
  387. .cpu_user_features = COMMON_USER_POWER6 |
  388. PPC_FEATURE_POWER6_EXT,
  389. .mmu_features = MMU_FTR_HPTE_TABLE,
  390. .icache_bsize = 128,
  391. .dcache_bsize = 128,
  392. .num_pmcs = 6,
  393. .pmc_type = PPC_PMC_IBM,
  394. .oprofile_cpu_type = "ppc64/power6",
  395. .oprofile_type = PPC_OPROFILE_POWER4,
  396. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  397. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  398. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  399. POWER6_MMCRA_OTHER,
  400. .machine_check = machine_check_generic,
  401. .platform = "power6x",
  402. },
  403. { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
  404. .pvr_mask = 0xffffffff,
  405. .pvr_value = 0x0f000002,
  406. .cpu_name = "POWER6 (architected)",
  407. .cpu_features = CPU_FTRS_POWER6,
  408. .cpu_user_features = COMMON_USER_POWER6,
  409. .mmu_features = MMU_FTR_HPTE_TABLE,
  410. .icache_bsize = 128,
  411. .dcache_bsize = 128,
  412. .machine_check = machine_check_generic,
  413. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  414. .oprofile_type = PPC_OPROFILE_POWER4,
  415. .platform = "power6",
  416. },
  417. { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
  418. .pvr_mask = 0xffffffff,
  419. .pvr_value = 0x0f000003,
  420. .cpu_name = "POWER7 (architected)",
  421. .cpu_features = CPU_FTRS_POWER7,
  422. .cpu_user_features = COMMON_USER_POWER7,
  423. .mmu_features = MMU_FTR_HPTE_TABLE |
  424. MMU_FTR_TLBIE_206,
  425. .icache_bsize = 128,
  426. .dcache_bsize = 128,
  427. .machine_check = machine_check_generic,
  428. .oprofile_type = PPC_OPROFILE_POWER4,
  429. .oprofile_cpu_type = "ppc64/ibm-compat-v1",
  430. .platform = "power7",
  431. },
  432. { /* Power7 */
  433. .pvr_mask = 0xffff0000,
  434. .pvr_value = 0x003f0000,
  435. .cpu_name = "POWER7 (raw)",
  436. .cpu_features = CPU_FTRS_POWER7,
  437. .cpu_user_features = COMMON_USER_POWER7,
  438. .mmu_features = MMU_FTR_HPTE_TABLE |
  439. MMU_FTR_TLBIE_206,
  440. .icache_bsize = 128,
  441. .dcache_bsize = 128,
  442. .num_pmcs = 6,
  443. .pmc_type = PPC_PMC_IBM,
  444. .cpu_setup = __setup_cpu_power7,
  445. .cpu_restore = __restore_cpu_power7,
  446. .oprofile_cpu_type = "ppc64/power7",
  447. .oprofile_type = PPC_OPROFILE_POWER4,
  448. .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
  449. .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
  450. .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
  451. POWER6_MMCRA_OTHER,
  452. .platform = "power7",
  453. },
  454. { /* Cell Broadband Engine */
  455. .pvr_mask = 0xffff0000,
  456. .pvr_value = 0x00700000,
  457. .cpu_name = "Cell Broadband Engine",
  458. .cpu_features = CPU_FTRS_CELL,
  459. .cpu_user_features = COMMON_USER_PPC64 |
  460. PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
  461. PPC_FEATURE_SMT,
  462. .mmu_features = MMU_FTR_HPTE_TABLE,
  463. .icache_bsize = 128,
  464. .dcache_bsize = 128,
  465. .num_pmcs = 4,
  466. .pmc_type = PPC_PMC_IBM,
  467. .oprofile_cpu_type = "ppc64/cell-be",
  468. .oprofile_type = PPC_OPROFILE_CELL,
  469. .machine_check = machine_check_generic,
  470. .platform = "ppc-cell-be",
  471. },
  472. { /* PA Semi PA6T */
  473. .pvr_mask = 0x7fff0000,
  474. .pvr_value = 0x00900000,
  475. .cpu_name = "PA6T",
  476. .cpu_features = CPU_FTRS_PA6T,
  477. .cpu_user_features = COMMON_USER_PA6T,
  478. .mmu_features = MMU_FTR_HPTE_TABLE,
  479. .icache_bsize = 64,
  480. .dcache_bsize = 64,
  481. .num_pmcs = 6,
  482. .pmc_type = PPC_PMC_PA6T,
  483. .cpu_setup = __setup_cpu_pa6t,
  484. .cpu_restore = __restore_cpu_pa6t,
  485. .oprofile_cpu_type = "ppc64/pa6t",
  486. .oprofile_type = PPC_OPROFILE_PA6T,
  487. .machine_check = machine_check_generic,
  488. .platform = "pa6t",
  489. },
  490. { /* default match */
  491. .pvr_mask = 0x00000000,
  492. .pvr_value = 0x00000000,
  493. .cpu_name = "POWER4 (compatible)",
  494. .cpu_features = CPU_FTRS_COMPATIBLE,
  495. .cpu_user_features = COMMON_USER_PPC64,
  496. .mmu_features = MMU_FTR_HPTE_TABLE,
  497. .icache_bsize = 128,
  498. .dcache_bsize = 128,
  499. .num_pmcs = 6,
  500. .pmc_type = PPC_PMC_IBM,
  501. .machine_check = machine_check_generic,
  502. .platform = "power4",
  503. }
  504. #endif /* CONFIG_PPC64 */
  505. #ifdef CONFIG_PPC32
  506. #if CLASSIC_PPC
  507. { /* 601 */
  508. .pvr_mask = 0xffff0000,
  509. .pvr_value = 0x00010000,
  510. .cpu_name = "601",
  511. .cpu_features = CPU_FTRS_PPC601,
  512. .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
  513. PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
  514. .mmu_features = MMU_FTR_HPTE_TABLE,
  515. .icache_bsize = 32,
  516. .dcache_bsize = 32,
  517. .machine_check = machine_check_generic,
  518. .platform = "ppc601",
  519. },
  520. { /* 603 */
  521. .pvr_mask = 0xffff0000,
  522. .pvr_value = 0x00030000,
  523. .cpu_name = "603",
  524. .cpu_features = CPU_FTRS_603,
  525. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  526. .mmu_features = 0,
  527. .icache_bsize = 32,
  528. .dcache_bsize = 32,
  529. .cpu_setup = __setup_cpu_603,
  530. .machine_check = machine_check_generic,
  531. .platform = "ppc603",
  532. },
  533. { /* 603e */
  534. .pvr_mask = 0xffff0000,
  535. .pvr_value = 0x00060000,
  536. .cpu_name = "603e",
  537. .cpu_features = CPU_FTRS_603,
  538. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  539. .mmu_features = 0,
  540. .icache_bsize = 32,
  541. .dcache_bsize = 32,
  542. .cpu_setup = __setup_cpu_603,
  543. .machine_check = machine_check_generic,
  544. .platform = "ppc603",
  545. },
  546. { /* 603ev */
  547. .pvr_mask = 0xffff0000,
  548. .pvr_value = 0x00070000,
  549. .cpu_name = "603ev",
  550. .cpu_features = CPU_FTRS_603,
  551. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  552. .mmu_features = 0,
  553. .icache_bsize = 32,
  554. .dcache_bsize = 32,
  555. .cpu_setup = __setup_cpu_603,
  556. .machine_check = machine_check_generic,
  557. .platform = "ppc603",
  558. },
  559. { /* 604 */
  560. .pvr_mask = 0xffff0000,
  561. .pvr_value = 0x00040000,
  562. .cpu_name = "604",
  563. .cpu_features = CPU_FTRS_604,
  564. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  565. .mmu_features = MMU_FTR_HPTE_TABLE,
  566. .icache_bsize = 32,
  567. .dcache_bsize = 32,
  568. .num_pmcs = 2,
  569. .cpu_setup = __setup_cpu_604,
  570. .machine_check = machine_check_generic,
  571. .platform = "ppc604",
  572. },
  573. { /* 604e */
  574. .pvr_mask = 0xfffff000,
  575. .pvr_value = 0x00090000,
  576. .cpu_name = "604e",
  577. .cpu_features = CPU_FTRS_604,
  578. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  579. .mmu_features = MMU_FTR_HPTE_TABLE,
  580. .icache_bsize = 32,
  581. .dcache_bsize = 32,
  582. .num_pmcs = 4,
  583. .cpu_setup = __setup_cpu_604,
  584. .machine_check = machine_check_generic,
  585. .platform = "ppc604",
  586. },
  587. { /* 604r */
  588. .pvr_mask = 0xffff0000,
  589. .pvr_value = 0x00090000,
  590. .cpu_name = "604r",
  591. .cpu_features = CPU_FTRS_604,
  592. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  593. .mmu_features = MMU_FTR_HPTE_TABLE,
  594. .icache_bsize = 32,
  595. .dcache_bsize = 32,
  596. .num_pmcs = 4,
  597. .cpu_setup = __setup_cpu_604,
  598. .machine_check = machine_check_generic,
  599. .platform = "ppc604",
  600. },
  601. { /* 604ev */
  602. .pvr_mask = 0xffff0000,
  603. .pvr_value = 0x000a0000,
  604. .cpu_name = "604ev",
  605. .cpu_features = CPU_FTRS_604,
  606. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  607. .mmu_features = MMU_FTR_HPTE_TABLE,
  608. .icache_bsize = 32,
  609. .dcache_bsize = 32,
  610. .num_pmcs = 4,
  611. .cpu_setup = __setup_cpu_604,
  612. .machine_check = machine_check_generic,
  613. .platform = "ppc604",
  614. },
  615. { /* 740/750 (0x4202, don't support TAU ?) */
  616. .pvr_mask = 0xffffffff,
  617. .pvr_value = 0x00084202,
  618. .cpu_name = "740/750",
  619. .cpu_features = CPU_FTRS_740_NOTAU,
  620. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  621. .mmu_features = MMU_FTR_HPTE_TABLE,
  622. .icache_bsize = 32,
  623. .dcache_bsize = 32,
  624. .num_pmcs = 4,
  625. .cpu_setup = __setup_cpu_750,
  626. .machine_check = machine_check_generic,
  627. .platform = "ppc750",
  628. },
  629. { /* 750CX (80100 and 8010x?) */
  630. .pvr_mask = 0xfffffff0,
  631. .pvr_value = 0x00080100,
  632. .cpu_name = "750CX",
  633. .cpu_features = CPU_FTRS_750,
  634. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  635. .mmu_features = MMU_FTR_HPTE_TABLE,
  636. .icache_bsize = 32,
  637. .dcache_bsize = 32,
  638. .num_pmcs = 4,
  639. .cpu_setup = __setup_cpu_750cx,
  640. .machine_check = machine_check_generic,
  641. .platform = "ppc750",
  642. },
  643. { /* 750CX (82201 and 82202) */
  644. .pvr_mask = 0xfffffff0,
  645. .pvr_value = 0x00082200,
  646. .cpu_name = "750CX",
  647. .cpu_features = CPU_FTRS_750,
  648. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  649. .mmu_features = MMU_FTR_HPTE_TABLE,
  650. .icache_bsize = 32,
  651. .dcache_bsize = 32,
  652. .num_pmcs = 4,
  653. .pmc_type = PPC_PMC_IBM,
  654. .cpu_setup = __setup_cpu_750cx,
  655. .machine_check = machine_check_generic,
  656. .platform = "ppc750",
  657. },
  658. { /* 750CXe (82214) */
  659. .pvr_mask = 0xfffffff0,
  660. .pvr_value = 0x00082210,
  661. .cpu_name = "750CXe",
  662. .cpu_features = CPU_FTRS_750,
  663. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  664. .mmu_features = MMU_FTR_HPTE_TABLE,
  665. .icache_bsize = 32,
  666. .dcache_bsize = 32,
  667. .num_pmcs = 4,
  668. .pmc_type = PPC_PMC_IBM,
  669. .cpu_setup = __setup_cpu_750cx,
  670. .machine_check = machine_check_generic,
  671. .platform = "ppc750",
  672. },
  673. { /* 750CXe "Gekko" (83214) */
  674. .pvr_mask = 0xffffffff,
  675. .pvr_value = 0x00083214,
  676. .cpu_name = "750CXe",
  677. .cpu_features = CPU_FTRS_750,
  678. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  679. .mmu_features = MMU_FTR_HPTE_TABLE,
  680. .icache_bsize = 32,
  681. .dcache_bsize = 32,
  682. .num_pmcs = 4,
  683. .pmc_type = PPC_PMC_IBM,
  684. .cpu_setup = __setup_cpu_750cx,
  685. .machine_check = machine_check_generic,
  686. .platform = "ppc750",
  687. },
  688. { /* 750CL */
  689. .pvr_mask = 0xfffff0f0,
  690. .pvr_value = 0x00087010,
  691. .cpu_name = "750CL",
  692. .cpu_features = CPU_FTRS_750CL,
  693. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  694. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  695. .icache_bsize = 32,
  696. .dcache_bsize = 32,
  697. .num_pmcs = 4,
  698. .pmc_type = PPC_PMC_IBM,
  699. .cpu_setup = __setup_cpu_750,
  700. .machine_check = machine_check_generic,
  701. .platform = "ppc750",
  702. },
  703. { /* 745/755 */
  704. .pvr_mask = 0xfffff000,
  705. .pvr_value = 0x00083000,
  706. .cpu_name = "745/755",
  707. .cpu_features = CPU_FTRS_750,
  708. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  709. .mmu_features = MMU_FTR_HPTE_TABLE,
  710. .icache_bsize = 32,
  711. .dcache_bsize = 32,
  712. .num_pmcs = 4,
  713. .pmc_type = PPC_PMC_IBM,
  714. .cpu_setup = __setup_cpu_750,
  715. .machine_check = machine_check_generic,
  716. .platform = "ppc750",
  717. },
  718. { /* 750FX rev 1.x */
  719. .pvr_mask = 0xffffff00,
  720. .pvr_value = 0x70000100,
  721. .cpu_name = "750FX",
  722. .cpu_features = CPU_FTRS_750FX1,
  723. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  724. .mmu_features = MMU_FTR_HPTE_TABLE,
  725. .icache_bsize = 32,
  726. .dcache_bsize = 32,
  727. .num_pmcs = 4,
  728. .pmc_type = PPC_PMC_IBM,
  729. .cpu_setup = __setup_cpu_750,
  730. .machine_check = machine_check_generic,
  731. .platform = "ppc750",
  732. .oprofile_cpu_type = "ppc/750",
  733. .oprofile_type = PPC_OPROFILE_G4,
  734. },
  735. { /* 750FX rev 2.0 must disable HID0[DPM] */
  736. .pvr_mask = 0xffffffff,
  737. .pvr_value = 0x70000200,
  738. .cpu_name = "750FX",
  739. .cpu_features = CPU_FTRS_750FX2,
  740. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  741. .mmu_features = MMU_FTR_HPTE_TABLE,
  742. .icache_bsize = 32,
  743. .dcache_bsize = 32,
  744. .num_pmcs = 4,
  745. .pmc_type = PPC_PMC_IBM,
  746. .cpu_setup = __setup_cpu_750,
  747. .machine_check = machine_check_generic,
  748. .platform = "ppc750",
  749. .oprofile_cpu_type = "ppc/750",
  750. .oprofile_type = PPC_OPROFILE_G4,
  751. },
  752. { /* 750FX (All revs except 2.0) */
  753. .pvr_mask = 0xffff0000,
  754. .pvr_value = 0x70000000,
  755. .cpu_name = "750FX",
  756. .cpu_features = CPU_FTRS_750FX,
  757. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  758. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  759. .icache_bsize = 32,
  760. .dcache_bsize = 32,
  761. .num_pmcs = 4,
  762. .pmc_type = PPC_PMC_IBM,
  763. .cpu_setup = __setup_cpu_750fx,
  764. .machine_check = machine_check_generic,
  765. .platform = "ppc750",
  766. .oprofile_cpu_type = "ppc/750",
  767. .oprofile_type = PPC_OPROFILE_G4,
  768. },
  769. { /* 750GX */
  770. .pvr_mask = 0xffff0000,
  771. .pvr_value = 0x70020000,
  772. .cpu_name = "750GX",
  773. .cpu_features = CPU_FTRS_750GX,
  774. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  775. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  776. .icache_bsize = 32,
  777. .dcache_bsize = 32,
  778. .num_pmcs = 4,
  779. .pmc_type = PPC_PMC_IBM,
  780. .cpu_setup = __setup_cpu_750fx,
  781. .machine_check = machine_check_generic,
  782. .platform = "ppc750",
  783. .oprofile_cpu_type = "ppc/750",
  784. .oprofile_type = PPC_OPROFILE_G4,
  785. },
  786. { /* 740/750 (L2CR bit need fixup for 740) */
  787. .pvr_mask = 0xffff0000,
  788. .pvr_value = 0x00080000,
  789. .cpu_name = "740/750",
  790. .cpu_features = CPU_FTRS_740,
  791. .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
  792. .mmu_features = MMU_FTR_HPTE_TABLE,
  793. .icache_bsize = 32,
  794. .dcache_bsize = 32,
  795. .num_pmcs = 4,
  796. .pmc_type = PPC_PMC_IBM,
  797. .cpu_setup = __setup_cpu_750,
  798. .machine_check = machine_check_generic,
  799. .platform = "ppc750",
  800. },
  801. { /* 7400 rev 1.1 ? (no TAU) */
  802. .pvr_mask = 0xffffffff,
  803. .pvr_value = 0x000c1101,
  804. .cpu_name = "7400 (1.1)",
  805. .cpu_features = CPU_FTRS_7400_NOTAU,
  806. .cpu_user_features = COMMON_USER |
  807. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  808. .mmu_features = MMU_FTR_HPTE_TABLE,
  809. .icache_bsize = 32,
  810. .dcache_bsize = 32,
  811. .num_pmcs = 4,
  812. .pmc_type = PPC_PMC_G4,
  813. .cpu_setup = __setup_cpu_7400,
  814. .machine_check = machine_check_generic,
  815. .platform = "ppc7400",
  816. },
  817. { /* 7400 */
  818. .pvr_mask = 0xffff0000,
  819. .pvr_value = 0x000c0000,
  820. .cpu_name = "7400",
  821. .cpu_features = CPU_FTRS_7400,
  822. .cpu_user_features = COMMON_USER |
  823. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  824. .mmu_features = MMU_FTR_HPTE_TABLE,
  825. .icache_bsize = 32,
  826. .dcache_bsize = 32,
  827. .num_pmcs = 4,
  828. .pmc_type = PPC_PMC_G4,
  829. .cpu_setup = __setup_cpu_7400,
  830. .machine_check = machine_check_generic,
  831. .platform = "ppc7400",
  832. },
  833. { /* 7410 */
  834. .pvr_mask = 0xffff0000,
  835. .pvr_value = 0x800c0000,
  836. .cpu_name = "7410",
  837. .cpu_features = CPU_FTRS_7400,
  838. .cpu_user_features = COMMON_USER |
  839. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  840. .mmu_features = MMU_FTR_HPTE_TABLE,
  841. .icache_bsize = 32,
  842. .dcache_bsize = 32,
  843. .num_pmcs = 4,
  844. .pmc_type = PPC_PMC_G4,
  845. .cpu_setup = __setup_cpu_7410,
  846. .machine_check = machine_check_generic,
  847. .platform = "ppc7400",
  848. },
  849. { /* 7450 2.0 - no doze/nap */
  850. .pvr_mask = 0xffffffff,
  851. .pvr_value = 0x80000200,
  852. .cpu_name = "7450",
  853. .cpu_features = CPU_FTRS_7450_20,
  854. .cpu_user_features = COMMON_USER |
  855. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  856. .mmu_features = MMU_FTR_HPTE_TABLE,
  857. .icache_bsize = 32,
  858. .dcache_bsize = 32,
  859. .num_pmcs = 6,
  860. .pmc_type = PPC_PMC_G4,
  861. .cpu_setup = __setup_cpu_745x,
  862. .oprofile_cpu_type = "ppc/7450",
  863. .oprofile_type = PPC_OPROFILE_G4,
  864. .machine_check = machine_check_generic,
  865. .platform = "ppc7450",
  866. },
  867. { /* 7450 2.1 */
  868. .pvr_mask = 0xffffffff,
  869. .pvr_value = 0x80000201,
  870. .cpu_name = "7450",
  871. .cpu_features = CPU_FTRS_7450_21,
  872. .cpu_user_features = COMMON_USER |
  873. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  874. .mmu_features = MMU_FTR_HPTE_TABLE,
  875. .icache_bsize = 32,
  876. .dcache_bsize = 32,
  877. .num_pmcs = 6,
  878. .pmc_type = PPC_PMC_G4,
  879. .cpu_setup = __setup_cpu_745x,
  880. .oprofile_cpu_type = "ppc/7450",
  881. .oprofile_type = PPC_OPROFILE_G4,
  882. .machine_check = machine_check_generic,
  883. .platform = "ppc7450",
  884. },
  885. { /* 7450 2.3 and newer */
  886. .pvr_mask = 0xffff0000,
  887. .pvr_value = 0x80000000,
  888. .cpu_name = "7450",
  889. .cpu_features = CPU_FTRS_7450_23,
  890. .cpu_user_features = COMMON_USER |
  891. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  892. .mmu_features = MMU_FTR_HPTE_TABLE,
  893. .icache_bsize = 32,
  894. .dcache_bsize = 32,
  895. .num_pmcs = 6,
  896. .pmc_type = PPC_PMC_G4,
  897. .cpu_setup = __setup_cpu_745x,
  898. .oprofile_cpu_type = "ppc/7450",
  899. .oprofile_type = PPC_OPROFILE_G4,
  900. .machine_check = machine_check_generic,
  901. .platform = "ppc7450",
  902. },
  903. { /* 7455 rev 1.x */
  904. .pvr_mask = 0xffffff00,
  905. .pvr_value = 0x80010100,
  906. .cpu_name = "7455",
  907. .cpu_features = CPU_FTRS_7455_1,
  908. .cpu_user_features = COMMON_USER |
  909. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  910. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  911. .icache_bsize = 32,
  912. .dcache_bsize = 32,
  913. .num_pmcs = 6,
  914. .pmc_type = PPC_PMC_G4,
  915. .cpu_setup = __setup_cpu_745x,
  916. .oprofile_cpu_type = "ppc/7450",
  917. .oprofile_type = PPC_OPROFILE_G4,
  918. .machine_check = machine_check_generic,
  919. .platform = "ppc7450",
  920. },
  921. { /* 7455 rev 2.0 */
  922. .pvr_mask = 0xffffffff,
  923. .pvr_value = 0x80010200,
  924. .cpu_name = "7455",
  925. .cpu_features = CPU_FTRS_7455_20,
  926. .cpu_user_features = COMMON_USER |
  927. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  928. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  929. .icache_bsize = 32,
  930. .dcache_bsize = 32,
  931. .num_pmcs = 6,
  932. .pmc_type = PPC_PMC_G4,
  933. .cpu_setup = __setup_cpu_745x,
  934. .oprofile_cpu_type = "ppc/7450",
  935. .oprofile_type = PPC_OPROFILE_G4,
  936. .machine_check = machine_check_generic,
  937. .platform = "ppc7450",
  938. },
  939. { /* 7455 others */
  940. .pvr_mask = 0xffff0000,
  941. .pvr_value = 0x80010000,
  942. .cpu_name = "7455",
  943. .cpu_features = CPU_FTRS_7455,
  944. .cpu_user_features = COMMON_USER |
  945. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  946. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  947. .icache_bsize = 32,
  948. .dcache_bsize = 32,
  949. .num_pmcs = 6,
  950. .pmc_type = PPC_PMC_G4,
  951. .cpu_setup = __setup_cpu_745x,
  952. .oprofile_cpu_type = "ppc/7450",
  953. .oprofile_type = PPC_OPROFILE_G4,
  954. .machine_check = machine_check_generic,
  955. .platform = "ppc7450",
  956. },
  957. { /* 7447/7457 Rev 1.0 */
  958. .pvr_mask = 0xffffffff,
  959. .pvr_value = 0x80020100,
  960. .cpu_name = "7447/7457",
  961. .cpu_features = CPU_FTRS_7447_10,
  962. .cpu_user_features = COMMON_USER |
  963. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  964. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  965. .icache_bsize = 32,
  966. .dcache_bsize = 32,
  967. .num_pmcs = 6,
  968. .pmc_type = PPC_PMC_G4,
  969. .cpu_setup = __setup_cpu_745x,
  970. .oprofile_cpu_type = "ppc/7450",
  971. .oprofile_type = PPC_OPROFILE_G4,
  972. .machine_check = machine_check_generic,
  973. .platform = "ppc7450",
  974. },
  975. { /* 7447/7457 Rev 1.1 */
  976. .pvr_mask = 0xffffffff,
  977. .pvr_value = 0x80020101,
  978. .cpu_name = "7447/7457",
  979. .cpu_features = CPU_FTRS_7447_10,
  980. .cpu_user_features = COMMON_USER |
  981. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  982. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  983. .icache_bsize = 32,
  984. .dcache_bsize = 32,
  985. .num_pmcs = 6,
  986. .pmc_type = PPC_PMC_G4,
  987. .cpu_setup = __setup_cpu_745x,
  988. .oprofile_cpu_type = "ppc/7450",
  989. .oprofile_type = PPC_OPROFILE_G4,
  990. .machine_check = machine_check_generic,
  991. .platform = "ppc7450",
  992. },
  993. { /* 7447/7457 Rev 1.2 and later */
  994. .pvr_mask = 0xffff0000,
  995. .pvr_value = 0x80020000,
  996. .cpu_name = "7447/7457",
  997. .cpu_features = CPU_FTRS_7447,
  998. .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  999. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1000. .icache_bsize = 32,
  1001. .dcache_bsize = 32,
  1002. .num_pmcs = 6,
  1003. .pmc_type = PPC_PMC_G4,
  1004. .cpu_setup = __setup_cpu_745x,
  1005. .oprofile_cpu_type = "ppc/7450",
  1006. .oprofile_type = PPC_OPROFILE_G4,
  1007. .machine_check = machine_check_generic,
  1008. .platform = "ppc7450",
  1009. },
  1010. { /* 7447A */
  1011. .pvr_mask = 0xffff0000,
  1012. .pvr_value = 0x80030000,
  1013. .cpu_name = "7447A",
  1014. .cpu_features = CPU_FTRS_7447A,
  1015. .cpu_user_features = COMMON_USER |
  1016. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1017. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1018. .icache_bsize = 32,
  1019. .dcache_bsize = 32,
  1020. .num_pmcs = 6,
  1021. .pmc_type = PPC_PMC_G4,
  1022. .cpu_setup = __setup_cpu_745x,
  1023. .oprofile_cpu_type = "ppc/7450",
  1024. .oprofile_type = PPC_OPROFILE_G4,
  1025. .machine_check = machine_check_generic,
  1026. .platform = "ppc7450",
  1027. },
  1028. { /* 7448 */
  1029. .pvr_mask = 0xffff0000,
  1030. .pvr_value = 0x80040000,
  1031. .cpu_name = "7448",
  1032. .cpu_features = CPU_FTRS_7448,
  1033. .cpu_user_features = COMMON_USER |
  1034. PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
  1035. .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
  1036. .icache_bsize = 32,
  1037. .dcache_bsize = 32,
  1038. .num_pmcs = 6,
  1039. .pmc_type = PPC_PMC_G4,
  1040. .cpu_setup = __setup_cpu_745x,
  1041. .oprofile_cpu_type = "ppc/7450",
  1042. .oprofile_type = PPC_OPROFILE_G4,
  1043. .machine_check = machine_check_generic,
  1044. .platform = "ppc7450",
  1045. },
  1046. { /* 82xx (8240, 8245, 8260 are all 603e cores) */
  1047. .pvr_mask = 0x7fff0000,
  1048. .pvr_value = 0x00810000,
  1049. .cpu_name = "82xx",
  1050. .cpu_features = CPU_FTRS_82XX,
  1051. .cpu_user_features = COMMON_USER,
  1052. .mmu_features = 0,
  1053. .icache_bsize = 32,
  1054. .dcache_bsize = 32,
  1055. .cpu_setup = __setup_cpu_603,
  1056. .machine_check = machine_check_generic,
  1057. .platform = "ppc603",
  1058. },
  1059. { /* All G2_LE (603e core, plus some) have the same pvr */
  1060. .pvr_mask = 0x7fff0000,
  1061. .pvr_value = 0x00820000,
  1062. .cpu_name = "G2_LE",
  1063. .cpu_features = CPU_FTRS_G2_LE,
  1064. .cpu_user_features = COMMON_USER,
  1065. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1066. .icache_bsize = 32,
  1067. .dcache_bsize = 32,
  1068. .cpu_setup = __setup_cpu_603,
  1069. .machine_check = machine_check_generic,
  1070. .platform = "ppc603",
  1071. },
  1072. { /* e300c1 (a 603e core, plus some) on 83xx */
  1073. .pvr_mask = 0x7fff0000,
  1074. .pvr_value = 0x00830000,
  1075. .cpu_name = "e300c1",
  1076. .cpu_features = CPU_FTRS_E300,
  1077. .cpu_user_features = COMMON_USER,
  1078. .mmu_features = MMU_FTR_USE_HIGH_BATS,
  1079. .icache_bsize = 32,
  1080. .dcache_bsize = 32,
  1081. .cpu_setup = __setup_cpu_603,
  1082. .machine_check = machine_check_generic,
  1083. .platform = "ppc603",
  1084. },
  1085. { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
  1086. .pvr_mask = 0x7fff0000,
  1087. .pvr_value = 0x00840000,
  1088. .cpu_name = "e300c2",
  1089. .cpu_features = CPU_FTRS_E300C2,
  1090. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1091. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1092. MMU_FTR_NEED_DTLB_SW_LRU,
  1093. .icache_bsize = 32,
  1094. .dcache_bsize = 32,
  1095. .cpu_setup = __setup_cpu_603,
  1096. .machine_check = machine_check_generic,
  1097. .platform = "ppc603",
  1098. },
  1099. { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
  1100. .pvr_mask = 0x7fff0000,
  1101. .pvr_value = 0x00850000,
  1102. .cpu_name = "e300c3",
  1103. .cpu_features = CPU_FTRS_E300,
  1104. .cpu_user_features = COMMON_USER,
  1105. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1106. MMU_FTR_NEED_DTLB_SW_LRU,
  1107. .icache_bsize = 32,
  1108. .dcache_bsize = 32,
  1109. .cpu_setup = __setup_cpu_603,
  1110. .num_pmcs = 4,
  1111. .oprofile_cpu_type = "ppc/e300",
  1112. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1113. .platform = "ppc603",
  1114. },
  1115. { /* e300c4 (e300c1, plus one IU) */
  1116. .pvr_mask = 0x7fff0000,
  1117. .pvr_value = 0x00860000,
  1118. .cpu_name = "e300c4",
  1119. .cpu_features = CPU_FTRS_E300,
  1120. .cpu_user_features = COMMON_USER,
  1121. .mmu_features = MMU_FTR_USE_HIGH_BATS |
  1122. MMU_FTR_NEED_DTLB_SW_LRU,
  1123. .icache_bsize = 32,
  1124. .dcache_bsize = 32,
  1125. .cpu_setup = __setup_cpu_603,
  1126. .machine_check = machine_check_generic,
  1127. .num_pmcs = 4,
  1128. .oprofile_cpu_type = "ppc/e300",
  1129. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1130. .platform = "ppc603",
  1131. },
  1132. { /* default match, we assume split I/D cache & TB (non-601)... */
  1133. .pvr_mask = 0x00000000,
  1134. .pvr_value = 0x00000000,
  1135. .cpu_name = "(generic PPC)",
  1136. .cpu_features = CPU_FTRS_CLASSIC32,
  1137. .cpu_user_features = COMMON_USER,
  1138. .mmu_features = MMU_FTR_HPTE_TABLE,
  1139. .icache_bsize = 32,
  1140. .dcache_bsize = 32,
  1141. .machine_check = machine_check_generic,
  1142. .platform = "ppc603",
  1143. },
  1144. #endif /* CLASSIC_PPC */
  1145. #ifdef CONFIG_8xx
  1146. { /* 8xx */
  1147. .pvr_mask = 0xffff0000,
  1148. .pvr_value = 0x00500000,
  1149. .cpu_name = "8xx",
  1150. /* CPU_FTR_MAYBE_CAN_DOZE is possible,
  1151. * if the 8xx code is there.... */
  1152. .cpu_features = CPU_FTRS_8XX,
  1153. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1154. .mmu_features = MMU_FTR_TYPE_8xx,
  1155. .icache_bsize = 16,
  1156. .dcache_bsize = 16,
  1157. .platform = "ppc823",
  1158. },
  1159. #endif /* CONFIG_8xx */
  1160. #ifdef CONFIG_40x
  1161. { /* 403GC */
  1162. .pvr_mask = 0xffffff00,
  1163. .pvr_value = 0x00200200,
  1164. .cpu_name = "403GC",
  1165. .cpu_features = CPU_FTRS_40X,
  1166. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1167. .mmu_features = MMU_FTR_TYPE_40x,
  1168. .icache_bsize = 16,
  1169. .dcache_bsize = 16,
  1170. .machine_check = machine_check_4xx,
  1171. .platform = "ppc403",
  1172. },
  1173. { /* 403GCX */
  1174. .pvr_mask = 0xffffff00,
  1175. .pvr_value = 0x00201400,
  1176. .cpu_name = "403GCX",
  1177. .cpu_features = CPU_FTRS_40X,
  1178. .cpu_user_features = PPC_FEATURE_32 |
  1179. PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
  1180. .mmu_features = MMU_FTR_TYPE_40x,
  1181. .icache_bsize = 16,
  1182. .dcache_bsize = 16,
  1183. .machine_check = machine_check_4xx,
  1184. .platform = "ppc403",
  1185. },
  1186. { /* 403G ?? */
  1187. .pvr_mask = 0xffff0000,
  1188. .pvr_value = 0x00200000,
  1189. .cpu_name = "403G ??",
  1190. .cpu_features = CPU_FTRS_40X,
  1191. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1192. .mmu_features = MMU_FTR_TYPE_40x,
  1193. .icache_bsize = 16,
  1194. .dcache_bsize = 16,
  1195. .machine_check = machine_check_4xx,
  1196. .platform = "ppc403",
  1197. },
  1198. { /* 405GP */
  1199. .pvr_mask = 0xffff0000,
  1200. .pvr_value = 0x40110000,
  1201. .cpu_name = "405GP",
  1202. .cpu_features = CPU_FTRS_40X,
  1203. .cpu_user_features = PPC_FEATURE_32 |
  1204. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1205. .mmu_features = MMU_FTR_TYPE_40x,
  1206. .icache_bsize = 32,
  1207. .dcache_bsize = 32,
  1208. .machine_check = machine_check_4xx,
  1209. .platform = "ppc405",
  1210. },
  1211. { /* STB 03xxx */
  1212. .pvr_mask = 0xffff0000,
  1213. .pvr_value = 0x40130000,
  1214. .cpu_name = "STB03xxx",
  1215. .cpu_features = CPU_FTRS_40X,
  1216. .cpu_user_features = PPC_FEATURE_32 |
  1217. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1218. .mmu_features = MMU_FTR_TYPE_40x,
  1219. .icache_bsize = 32,
  1220. .dcache_bsize = 32,
  1221. .machine_check = machine_check_4xx,
  1222. .platform = "ppc405",
  1223. },
  1224. { /* STB 04xxx */
  1225. .pvr_mask = 0xffff0000,
  1226. .pvr_value = 0x41810000,
  1227. .cpu_name = "STB04xxx",
  1228. .cpu_features = CPU_FTRS_40X,
  1229. .cpu_user_features = PPC_FEATURE_32 |
  1230. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1231. .mmu_features = MMU_FTR_TYPE_40x,
  1232. .icache_bsize = 32,
  1233. .dcache_bsize = 32,
  1234. .machine_check = machine_check_4xx,
  1235. .platform = "ppc405",
  1236. },
  1237. { /* NP405L */
  1238. .pvr_mask = 0xffff0000,
  1239. .pvr_value = 0x41610000,
  1240. .cpu_name = "NP405L",
  1241. .cpu_features = CPU_FTRS_40X,
  1242. .cpu_user_features = PPC_FEATURE_32 |
  1243. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1244. .mmu_features = MMU_FTR_TYPE_40x,
  1245. .icache_bsize = 32,
  1246. .dcache_bsize = 32,
  1247. .machine_check = machine_check_4xx,
  1248. .platform = "ppc405",
  1249. },
  1250. { /* NP4GS3 */
  1251. .pvr_mask = 0xffff0000,
  1252. .pvr_value = 0x40B10000,
  1253. .cpu_name = "NP4GS3",
  1254. .cpu_features = CPU_FTRS_40X,
  1255. .cpu_user_features = PPC_FEATURE_32 |
  1256. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1257. .mmu_features = MMU_FTR_TYPE_40x,
  1258. .icache_bsize = 32,
  1259. .dcache_bsize = 32,
  1260. .machine_check = machine_check_4xx,
  1261. .platform = "ppc405",
  1262. },
  1263. { /* NP405H */
  1264. .pvr_mask = 0xffff0000,
  1265. .pvr_value = 0x41410000,
  1266. .cpu_name = "NP405H",
  1267. .cpu_features = CPU_FTRS_40X,
  1268. .cpu_user_features = PPC_FEATURE_32 |
  1269. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1270. .mmu_features = MMU_FTR_TYPE_40x,
  1271. .icache_bsize = 32,
  1272. .dcache_bsize = 32,
  1273. .machine_check = machine_check_4xx,
  1274. .platform = "ppc405",
  1275. },
  1276. { /* 405GPr */
  1277. .pvr_mask = 0xffff0000,
  1278. .pvr_value = 0x50910000,
  1279. .cpu_name = "405GPr",
  1280. .cpu_features = CPU_FTRS_40X,
  1281. .cpu_user_features = PPC_FEATURE_32 |
  1282. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1283. .mmu_features = MMU_FTR_TYPE_40x,
  1284. .icache_bsize = 32,
  1285. .dcache_bsize = 32,
  1286. .machine_check = machine_check_4xx,
  1287. .platform = "ppc405",
  1288. },
  1289. { /* STBx25xx */
  1290. .pvr_mask = 0xffff0000,
  1291. .pvr_value = 0x51510000,
  1292. .cpu_name = "STBx25xx",
  1293. .cpu_features = CPU_FTRS_40X,
  1294. .cpu_user_features = PPC_FEATURE_32 |
  1295. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1296. .mmu_features = MMU_FTR_TYPE_40x,
  1297. .icache_bsize = 32,
  1298. .dcache_bsize = 32,
  1299. .machine_check = machine_check_4xx,
  1300. .platform = "ppc405",
  1301. },
  1302. { /* 405LP */
  1303. .pvr_mask = 0xffff0000,
  1304. .pvr_value = 0x41F10000,
  1305. .cpu_name = "405LP",
  1306. .cpu_features = CPU_FTRS_40X,
  1307. .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
  1308. .mmu_features = MMU_FTR_TYPE_40x,
  1309. .icache_bsize = 32,
  1310. .dcache_bsize = 32,
  1311. .machine_check = machine_check_4xx,
  1312. .platform = "ppc405",
  1313. },
  1314. { /* Xilinx Virtex-II Pro */
  1315. .pvr_mask = 0xfffff000,
  1316. .pvr_value = 0x20010000,
  1317. .cpu_name = "Virtex-II Pro",
  1318. .cpu_features = CPU_FTRS_40X,
  1319. .cpu_user_features = PPC_FEATURE_32 |
  1320. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1321. .mmu_features = MMU_FTR_TYPE_40x,
  1322. .icache_bsize = 32,
  1323. .dcache_bsize = 32,
  1324. .machine_check = machine_check_4xx,
  1325. .platform = "ppc405",
  1326. },
  1327. { /* Xilinx Virtex-4 FX */
  1328. .pvr_mask = 0xfffff000,
  1329. .pvr_value = 0x20011000,
  1330. .cpu_name = "Virtex-4 FX",
  1331. .cpu_features = CPU_FTRS_40X,
  1332. .cpu_user_features = PPC_FEATURE_32 |
  1333. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1334. .mmu_features = MMU_FTR_TYPE_40x,
  1335. .icache_bsize = 32,
  1336. .dcache_bsize = 32,
  1337. .machine_check = machine_check_4xx,
  1338. .platform = "ppc405",
  1339. },
  1340. { /* 405EP */
  1341. .pvr_mask = 0xffff0000,
  1342. .pvr_value = 0x51210000,
  1343. .cpu_name = "405EP",
  1344. .cpu_features = CPU_FTRS_40X,
  1345. .cpu_user_features = PPC_FEATURE_32 |
  1346. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1347. .mmu_features = MMU_FTR_TYPE_40x,
  1348. .icache_bsize = 32,
  1349. .dcache_bsize = 32,
  1350. .machine_check = machine_check_4xx,
  1351. .platform = "ppc405",
  1352. },
  1353. { /* 405EX */
  1354. .pvr_mask = 0xffff0004,
  1355. .pvr_value = 0x12910004,
  1356. .cpu_name = "405EX",
  1357. .cpu_features = CPU_FTRS_40X,
  1358. .cpu_user_features = PPC_FEATURE_32 |
  1359. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1360. .mmu_features = MMU_FTR_TYPE_40x,
  1361. .icache_bsize = 32,
  1362. .dcache_bsize = 32,
  1363. .machine_check = machine_check_4xx,
  1364. .platform = "ppc405",
  1365. },
  1366. { /* 405EXr */
  1367. .pvr_mask = 0xffff0004,
  1368. .pvr_value = 0x12910000,
  1369. .cpu_name = "405EXr",
  1370. .cpu_features = CPU_FTRS_40X,
  1371. .cpu_user_features = PPC_FEATURE_32 |
  1372. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1373. .mmu_features = MMU_FTR_TYPE_40x,
  1374. .icache_bsize = 32,
  1375. .dcache_bsize = 32,
  1376. .machine_check = machine_check_4xx,
  1377. .platform = "ppc405",
  1378. },
  1379. {
  1380. /* 405EZ */
  1381. .pvr_mask = 0xffff0000,
  1382. .pvr_value = 0x41510000,
  1383. .cpu_name = "405EZ",
  1384. .cpu_features = CPU_FTRS_40X,
  1385. .cpu_user_features = PPC_FEATURE_32 |
  1386. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1387. .mmu_features = MMU_FTR_TYPE_40x,
  1388. .icache_bsize = 32,
  1389. .dcache_bsize = 32,
  1390. .machine_check = machine_check_4xx,
  1391. .platform = "ppc405",
  1392. },
  1393. { /* default match */
  1394. .pvr_mask = 0x00000000,
  1395. .pvr_value = 0x00000000,
  1396. .cpu_name = "(generic 40x PPC)",
  1397. .cpu_features = CPU_FTRS_40X,
  1398. .cpu_user_features = PPC_FEATURE_32 |
  1399. PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
  1400. .mmu_features = MMU_FTR_TYPE_40x,
  1401. .icache_bsize = 32,
  1402. .dcache_bsize = 32,
  1403. .machine_check = machine_check_4xx,
  1404. .platform = "ppc405",
  1405. }
  1406. #endif /* CONFIG_40x */
  1407. #ifdef CONFIG_44x
  1408. {
  1409. .pvr_mask = 0xf0000fff,
  1410. .pvr_value = 0x40000850,
  1411. .cpu_name = "440GR Rev. A",
  1412. .cpu_features = CPU_FTRS_44X,
  1413. .cpu_user_features = COMMON_USER_BOOKE,
  1414. .mmu_features = MMU_FTR_TYPE_44x,
  1415. .icache_bsize = 32,
  1416. .dcache_bsize = 32,
  1417. .machine_check = machine_check_4xx,
  1418. .platform = "ppc440",
  1419. },
  1420. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1421. .pvr_mask = 0xf0000fff,
  1422. .pvr_value = 0x40000858,
  1423. .cpu_name = "440EP Rev. A",
  1424. .cpu_features = CPU_FTRS_44X,
  1425. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1426. .mmu_features = MMU_FTR_TYPE_44x,
  1427. .icache_bsize = 32,
  1428. .dcache_bsize = 32,
  1429. .cpu_setup = __setup_cpu_440ep,
  1430. .machine_check = machine_check_4xx,
  1431. .platform = "ppc440",
  1432. },
  1433. {
  1434. .pvr_mask = 0xf0000fff,
  1435. .pvr_value = 0x400008d3,
  1436. .cpu_name = "440GR Rev. B",
  1437. .cpu_features = CPU_FTRS_44X,
  1438. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1439. .mmu_features = MMU_FTR_TYPE_44x,
  1440. .icache_bsize = 32,
  1441. .dcache_bsize = 32,
  1442. .machine_check = machine_check_4xx,
  1443. .platform = "ppc440",
  1444. },
  1445. { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1446. .pvr_mask = 0xf0000ff7,
  1447. .pvr_value = 0x400008d4,
  1448. .cpu_name = "440EP Rev. C",
  1449. .cpu_features = CPU_FTRS_44X,
  1450. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1451. .mmu_features = MMU_FTR_TYPE_44x,
  1452. .icache_bsize = 32,
  1453. .dcache_bsize = 32,
  1454. .cpu_setup = __setup_cpu_440ep,
  1455. .machine_check = machine_check_4xx,
  1456. .platform = "ppc440",
  1457. },
  1458. { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
  1459. .pvr_mask = 0xf0000fff,
  1460. .pvr_value = 0x400008db,
  1461. .cpu_name = "440EP Rev. B",
  1462. .cpu_features = CPU_FTRS_44X,
  1463. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1464. .mmu_features = MMU_FTR_TYPE_44x,
  1465. .icache_bsize = 32,
  1466. .dcache_bsize = 32,
  1467. .cpu_setup = __setup_cpu_440ep,
  1468. .machine_check = machine_check_4xx,
  1469. .platform = "ppc440",
  1470. },
  1471. { /* 440GRX */
  1472. .pvr_mask = 0xf0000ffb,
  1473. .pvr_value = 0x200008D0,
  1474. .cpu_name = "440GRX",
  1475. .cpu_features = CPU_FTRS_44X,
  1476. .cpu_user_features = COMMON_USER_BOOKE,
  1477. .mmu_features = MMU_FTR_TYPE_44x,
  1478. .icache_bsize = 32,
  1479. .dcache_bsize = 32,
  1480. .cpu_setup = __setup_cpu_440grx,
  1481. .machine_check = machine_check_440A,
  1482. .platform = "ppc440",
  1483. },
  1484. { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
  1485. .pvr_mask = 0xf0000ffb,
  1486. .pvr_value = 0x200008D8,
  1487. .cpu_name = "440EPX",
  1488. .cpu_features = CPU_FTRS_44X,
  1489. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1490. .mmu_features = MMU_FTR_TYPE_44x,
  1491. .icache_bsize = 32,
  1492. .dcache_bsize = 32,
  1493. .cpu_setup = __setup_cpu_440epx,
  1494. .machine_check = machine_check_440A,
  1495. .platform = "ppc440",
  1496. },
  1497. { /* 440GP Rev. B */
  1498. .pvr_mask = 0xf0000fff,
  1499. .pvr_value = 0x40000440,
  1500. .cpu_name = "440GP Rev. B",
  1501. .cpu_features = CPU_FTRS_44X,
  1502. .cpu_user_features = COMMON_USER_BOOKE,
  1503. .mmu_features = MMU_FTR_TYPE_44x,
  1504. .icache_bsize = 32,
  1505. .dcache_bsize = 32,
  1506. .machine_check = machine_check_4xx,
  1507. .platform = "ppc440gp",
  1508. },
  1509. { /* 440GP Rev. C */
  1510. .pvr_mask = 0xf0000fff,
  1511. .pvr_value = 0x40000481,
  1512. .cpu_name = "440GP Rev. C",
  1513. .cpu_features = CPU_FTRS_44X,
  1514. .cpu_user_features = COMMON_USER_BOOKE,
  1515. .mmu_features = MMU_FTR_TYPE_44x,
  1516. .icache_bsize = 32,
  1517. .dcache_bsize = 32,
  1518. .machine_check = machine_check_4xx,
  1519. .platform = "ppc440gp",
  1520. },
  1521. { /* 440GX Rev. A */
  1522. .pvr_mask = 0xf0000fff,
  1523. .pvr_value = 0x50000850,
  1524. .cpu_name = "440GX Rev. A",
  1525. .cpu_features = CPU_FTRS_44X,
  1526. .cpu_user_features = COMMON_USER_BOOKE,
  1527. .mmu_features = MMU_FTR_TYPE_44x,
  1528. .icache_bsize = 32,
  1529. .dcache_bsize = 32,
  1530. .cpu_setup = __setup_cpu_440gx,
  1531. .machine_check = machine_check_440A,
  1532. .platform = "ppc440",
  1533. },
  1534. { /* 440GX Rev. B */
  1535. .pvr_mask = 0xf0000fff,
  1536. .pvr_value = 0x50000851,
  1537. .cpu_name = "440GX Rev. B",
  1538. .cpu_features = CPU_FTRS_44X,
  1539. .cpu_user_features = COMMON_USER_BOOKE,
  1540. .mmu_features = MMU_FTR_TYPE_44x,
  1541. .icache_bsize = 32,
  1542. .dcache_bsize = 32,
  1543. .cpu_setup = __setup_cpu_440gx,
  1544. .machine_check = machine_check_440A,
  1545. .platform = "ppc440",
  1546. },
  1547. { /* 440GX Rev. C */
  1548. .pvr_mask = 0xf0000fff,
  1549. .pvr_value = 0x50000892,
  1550. .cpu_name = "440GX Rev. C",
  1551. .cpu_features = CPU_FTRS_44X,
  1552. .cpu_user_features = COMMON_USER_BOOKE,
  1553. .mmu_features = MMU_FTR_TYPE_44x,
  1554. .icache_bsize = 32,
  1555. .dcache_bsize = 32,
  1556. .cpu_setup = __setup_cpu_440gx,
  1557. .machine_check = machine_check_440A,
  1558. .platform = "ppc440",
  1559. },
  1560. { /* 440GX Rev. F */
  1561. .pvr_mask = 0xf0000fff,
  1562. .pvr_value = 0x50000894,
  1563. .cpu_name = "440GX Rev. F",
  1564. .cpu_features = CPU_FTRS_44X,
  1565. .cpu_user_features = COMMON_USER_BOOKE,
  1566. .mmu_features = MMU_FTR_TYPE_44x,
  1567. .icache_bsize = 32,
  1568. .dcache_bsize = 32,
  1569. .cpu_setup = __setup_cpu_440gx,
  1570. .machine_check = machine_check_440A,
  1571. .platform = "ppc440",
  1572. },
  1573. { /* 440SP Rev. A */
  1574. .pvr_mask = 0xfff00fff,
  1575. .pvr_value = 0x53200891,
  1576. .cpu_name = "440SP Rev. A",
  1577. .cpu_features = CPU_FTRS_44X,
  1578. .cpu_user_features = COMMON_USER_BOOKE,
  1579. .mmu_features = MMU_FTR_TYPE_44x,
  1580. .icache_bsize = 32,
  1581. .dcache_bsize = 32,
  1582. .machine_check = machine_check_4xx,
  1583. .platform = "ppc440",
  1584. },
  1585. { /* 440SPe Rev. A */
  1586. .pvr_mask = 0xfff00fff,
  1587. .pvr_value = 0x53400890,
  1588. .cpu_name = "440SPe Rev. A",
  1589. .cpu_features = CPU_FTRS_44X,
  1590. .cpu_user_features = COMMON_USER_BOOKE,
  1591. .mmu_features = MMU_FTR_TYPE_44x,
  1592. .icache_bsize = 32,
  1593. .dcache_bsize = 32,
  1594. .cpu_setup = __setup_cpu_440spe,
  1595. .machine_check = machine_check_440A,
  1596. .platform = "ppc440",
  1597. },
  1598. { /* 440SPe Rev. B */
  1599. .pvr_mask = 0xfff00fff,
  1600. .pvr_value = 0x53400891,
  1601. .cpu_name = "440SPe Rev. B",
  1602. .cpu_features = CPU_FTRS_44X,
  1603. .cpu_user_features = COMMON_USER_BOOKE,
  1604. .mmu_features = MMU_FTR_TYPE_44x,
  1605. .icache_bsize = 32,
  1606. .dcache_bsize = 32,
  1607. .cpu_setup = __setup_cpu_440spe,
  1608. .machine_check = machine_check_440A,
  1609. .platform = "ppc440",
  1610. },
  1611. { /* 440 in Xilinx Virtex-5 FXT */
  1612. .pvr_mask = 0xfffffff0,
  1613. .pvr_value = 0x7ff21910,
  1614. .cpu_name = "440 in Virtex-5 FXT",
  1615. .cpu_features = CPU_FTRS_44X,
  1616. .cpu_user_features = COMMON_USER_BOOKE,
  1617. .mmu_features = MMU_FTR_TYPE_44x,
  1618. .icache_bsize = 32,
  1619. .dcache_bsize = 32,
  1620. .cpu_setup = __setup_cpu_440x5,
  1621. .machine_check = machine_check_440A,
  1622. .platform = "ppc440",
  1623. },
  1624. { /* 460EX */
  1625. .pvr_mask = 0xffff0002,
  1626. .pvr_value = 0x13020002,
  1627. .cpu_name = "460EX",
  1628. .cpu_features = CPU_FTRS_440x6,
  1629. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1630. .mmu_features = MMU_FTR_TYPE_44x,
  1631. .icache_bsize = 32,
  1632. .dcache_bsize = 32,
  1633. .cpu_setup = __setup_cpu_460ex,
  1634. .machine_check = machine_check_440A,
  1635. .platform = "ppc440",
  1636. },
  1637. { /* 460GT */
  1638. .pvr_mask = 0xffff0002,
  1639. .pvr_value = 0x13020000,
  1640. .cpu_name = "460GT",
  1641. .cpu_features = CPU_FTRS_440x6,
  1642. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1643. .mmu_features = MMU_FTR_TYPE_44x,
  1644. .icache_bsize = 32,
  1645. .dcache_bsize = 32,
  1646. .cpu_setup = __setup_cpu_460gt,
  1647. .machine_check = machine_check_440A,
  1648. .platform = "ppc440",
  1649. },
  1650. { /* 460SX */
  1651. .pvr_mask = 0xffffff00,
  1652. .pvr_value = 0x13541800,
  1653. .cpu_name = "460SX",
  1654. .cpu_features = CPU_FTRS_44X,
  1655. .cpu_user_features = COMMON_USER_BOOKE,
  1656. .mmu_features = MMU_FTR_TYPE_44x,
  1657. .icache_bsize = 32,
  1658. .dcache_bsize = 32,
  1659. .cpu_setup = __setup_cpu_460sx,
  1660. .machine_check = machine_check_440A,
  1661. .platform = "ppc440",
  1662. },
  1663. { /* default match */
  1664. .pvr_mask = 0x00000000,
  1665. .pvr_value = 0x00000000,
  1666. .cpu_name = "(generic 44x PPC)",
  1667. .cpu_features = CPU_FTRS_44X,
  1668. .cpu_user_features = COMMON_USER_BOOKE,
  1669. .mmu_features = MMU_FTR_TYPE_44x,
  1670. .icache_bsize = 32,
  1671. .dcache_bsize = 32,
  1672. .machine_check = machine_check_4xx,
  1673. .platform = "ppc440",
  1674. }
  1675. #endif /* CONFIG_44x */
  1676. #ifdef CONFIG_E200
  1677. { /* e200z5 */
  1678. .pvr_mask = 0xfff00000,
  1679. .pvr_value = 0x81000000,
  1680. .cpu_name = "e200z5",
  1681. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1682. .cpu_features = CPU_FTRS_E200,
  1683. .cpu_user_features = COMMON_USER_BOOKE |
  1684. PPC_FEATURE_HAS_EFP_SINGLE |
  1685. PPC_FEATURE_UNIFIED_CACHE,
  1686. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1687. .dcache_bsize = 32,
  1688. .machine_check = machine_check_e200,
  1689. .platform = "ppc5554",
  1690. },
  1691. { /* e200z6 */
  1692. .pvr_mask = 0xfff00000,
  1693. .pvr_value = 0x81100000,
  1694. .cpu_name = "e200z6",
  1695. /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
  1696. .cpu_features = CPU_FTRS_E200,
  1697. .cpu_user_features = COMMON_USER_BOOKE |
  1698. PPC_FEATURE_HAS_SPE_COMP |
  1699. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1700. PPC_FEATURE_UNIFIED_CACHE,
  1701. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1702. .dcache_bsize = 32,
  1703. .machine_check = machine_check_e200,
  1704. .platform = "ppc5554",
  1705. },
  1706. { /* default match */
  1707. .pvr_mask = 0x00000000,
  1708. .pvr_value = 0x00000000,
  1709. .cpu_name = "(generic E200 PPC)",
  1710. .cpu_features = CPU_FTRS_E200,
  1711. .cpu_user_features = COMMON_USER_BOOKE |
  1712. PPC_FEATURE_HAS_EFP_SINGLE |
  1713. PPC_FEATURE_UNIFIED_CACHE,
  1714. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1715. .dcache_bsize = 32,
  1716. .cpu_setup = __setup_cpu_e200,
  1717. .machine_check = machine_check_e200,
  1718. .platform = "ppc5554",
  1719. }
  1720. #endif /* CONFIG_E200 */
  1721. #ifdef CONFIG_E500
  1722. { /* e500 */
  1723. .pvr_mask = 0xffff0000,
  1724. .pvr_value = 0x80200000,
  1725. .cpu_name = "e500",
  1726. .cpu_features = CPU_FTRS_E500,
  1727. .cpu_user_features = COMMON_USER_BOOKE |
  1728. PPC_FEATURE_HAS_SPE_COMP |
  1729. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1730. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1731. .icache_bsize = 32,
  1732. .dcache_bsize = 32,
  1733. .num_pmcs = 4,
  1734. .oprofile_cpu_type = "ppc/e500",
  1735. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1736. .cpu_setup = __setup_cpu_e500v1,
  1737. .machine_check = machine_check_e500,
  1738. .platform = "ppc8540",
  1739. },
  1740. { /* e500v2 */
  1741. .pvr_mask = 0xffff0000,
  1742. .pvr_value = 0x80210000,
  1743. .cpu_name = "e500v2",
  1744. .cpu_features = CPU_FTRS_E500_2,
  1745. .cpu_user_features = COMMON_USER_BOOKE |
  1746. PPC_FEATURE_HAS_SPE_COMP |
  1747. PPC_FEATURE_HAS_EFP_SINGLE_COMP |
  1748. PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
  1749. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
  1750. .icache_bsize = 32,
  1751. .dcache_bsize = 32,
  1752. .num_pmcs = 4,
  1753. .oprofile_cpu_type = "ppc/e500",
  1754. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1755. .cpu_setup = __setup_cpu_e500v2,
  1756. .machine_check = machine_check_e500,
  1757. .platform = "ppc8548",
  1758. },
  1759. { /* e500mc */
  1760. .pvr_mask = 0xffff0000,
  1761. .pvr_value = 0x80230000,
  1762. .cpu_name = "e500mc",
  1763. .cpu_features = CPU_FTRS_E500MC,
  1764. .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
  1765. .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
  1766. MMU_FTR_USE_TLBILX,
  1767. .icache_bsize = 64,
  1768. .dcache_bsize = 64,
  1769. .num_pmcs = 4,
  1770. .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
  1771. .oprofile_type = PPC_OPROFILE_FSL_EMB,
  1772. .cpu_setup = __setup_cpu_e500mc,
  1773. .machine_check = machine_check_e500,
  1774. .platform = "ppce500mc",
  1775. },
  1776. { /* default match */
  1777. .pvr_mask = 0x00000000,
  1778. .pvr_value = 0x00000000,
  1779. .cpu_name = "(generic E500 PPC)",
  1780. .cpu_features = CPU_FTRS_E500,
  1781. .cpu_user_features = COMMON_USER_BOOKE |
  1782. PPC_FEATURE_HAS_SPE_COMP |
  1783. PPC_FEATURE_HAS_EFP_SINGLE_COMP,
  1784. .mmu_features = MMU_FTR_TYPE_FSL_E,
  1785. .icache_bsize = 32,
  1786. .dcache_bsize = 32,
  1787. .machine_check = machine_check_e500,
  1788. .platform = "powerpc",
  1789. }
  1790. #endif /* CONFIG_E500 */
  1791. #endif /* CONFIG_PPC32 */
  1792. };
  1793. static struct cpu_spec the_cpu_spec;
  1794. static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
  1795. {
  1796. struct cpu_spec *t = &the_cpu_spec;
  1797. struct cpu_spec old;
  1798. t = PTRRELOC(t);
  1799. old = *t;
  1800. /* Copy everything, then do fixups */
  1801. *t = *s;
  1802. /*
  1803. * If we are overriding a previous value derived from the real
  1804. * PVR with a new value obtained using a logical PVR value,
  1805. * don't modify the performance monitor fields.
  1806. */
  1807. if (old.num_pmcs && !s->num_pmcs) {
  1808. t->num_pmcs = old.num_pmcs;
  1809. t->pmc_type = old.pmc_type;
  1810. t->oprofile_type = old.oprofile_type;
  1811. t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
  1812. t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
  1813. t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
  1814. /*
  1815. * If we have passed through this logic once before and
  1816. * have pulled the default case because the real PVR was
  1817. * not found inside cpu_specs[], then we are possibly
  1818. * running in compatibility mode. In that case, let the
  1819. * oprofiler know which set of compatibility counters to
  1820. * pull from by making sure the oprofile_cpu_type string
  1821. * is set to that of compatibility mode. If the
  1822. * oprofile_cpu_type already has a value, then we are
  1823. * possibly overriding a real PVR with a logical one,
  1824. * and, in that case, keep the current value for
  1825. * oprofile_cpu_type.
  1826. */
  1827. if (old.oprofile_cpu_type != NULL) {
  1828. t->oprofile_cpu_type = old.oprofile_cpu_type;
  1829. t->oprofile_type = old.oprofile_type;
  1830. }
  1831. }
  1832. *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
  1833. /*
  1834. * Set the base platform string once; assumes
  1835. * we're called with real pvr first.
  1836. */
  1837. if (*PTRRELOC(&powerpc_base_platform) == NULL)
  1838. *PTRRELOC(&powerpc_base_platform) = t->platform;
  1839. #if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
  1840. /* ppc64 and booke expect identify_cpu to also call setup_cpu for
  1841. * that processor. I will consolidate that at a later time, for now,
  1842. * just use #ifdef. We also don't need to PTRRELOC the function
  1843. * pointer on ppc64 and booke as we are running at 0 in real mode
  1844. * on ppc64 and reloc_offset is always 0 on booke.
  1845. */
  1846. if (s->cpu_setup) {
  1847. s->cpu_setup(offset, s);
  1848. }
  1849. #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
  1850. }
  1851. struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
  1852. {
  1853. struct cpu_spec *s = cpu_specs;
  1854. int i;
  1855. s = PTRRELOC(s);
  1856. for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
  1857. if ((pvr & s->pvr_mask) == s->pvr_value) {
  1858. setup_cpu_spec(offset, s);
  1859. return s;
  1860. }
  1861. }
  1862. BUG();
  1863. return NULL;
  1864. }