setup.c 23 KB

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  1. /*
  2. * linux/arch/mips/txx9/generic/setup.c
  3. *
  4. * Based on linux/arch/mips/txx9/rbtx4938/setup.c,
  5. * and RBTX49xx patch from CELF patch archive.
  6. *
  7. * 2003-2005 (c) MontaVista Software, Inc.
  8. * (C) Copyright TOSHIBA CORPORATION 2000-2001, 2004-2007
  9. *
  10. * This file is subject to the terms and conditions of the GNU General Public
  11. * License. See the file "COPYING" in the main directory of this archive
  12. * for more details.
  13. */
  14. #include <linux/init.h>
  15. #include <linux/kernel.h>
  16. #include <linux/types.h>
  17. #include <linux/interrupt.h>
  18. #include <linux/string.h>
  19. #include <linux/module.h>
  20. #include <linux/clk.h>
  21. #include <linux/err.h>
  22. #include <linux/gpio.h>
  23. #include <linux/platform_device.h>
  24. #include <linux/serial_core.h>
  25. #include <linux/mtd/physmap.h>
  26. #include <linux/leds.h>
  27. #include <linux/sysdev.h>
  28. #include <asm/bootinfo.h>
  29. #include <asm/time.h>
  30. #include <asm/reboot.h>
  31. #include <asm/r4kcache.h>
  32. #include <asm/sections.h>
  33. #include <asm/txx9/generic.h>
  34. #include <asm/txx9/pci.h>
  35. #include <asm/txx9tmr.h>
  36. #include <asm/txx9/ndfmc.h>
  37. #include <asm/txx9/dmac.h>
  38. #ifdef CONFIG_CPU_TX49XX
  39. #include <asm/txx9/tx4938.h>
  40. #endif
  41. /* EBUSC settings of TX4927, etc. */
  42. struct resource txx9_ce_res[8];
  43. static char txx9_ce_res_name[8][4]; /* "CEn" */
  44. /* pcode, internal register */
  45. unsigned int txx9_pcode;
  46. char txx9_pcode_str[8];
  47. static struct resource txx9_reg_res = {
  48. .name = txx9_pcode_str,
  49. .flags = IORESOURCE_MEM,
  50. };
  51. void __init
  52. txx9_reg_res_init(unsigned int pcode, unsigned long base, unsigned long size)
  53. {
  54. int i;
  55. for (i = 0; i < ARRAY_SIZE(txx9_ce_res); i++) {
  56. sprintf(txx9_ce_res_name[i], "CE%d", i);
  57. txx9_ce_res[i].flags = IORESOURCE_MEM;
  58. txx9_ce_res[i].name = txx9_ce_res_name[i];
  59. }
  60. txx9_pcode = pcode;
  61. sprintf(txx9_pcode_str, "TX%x", pcode);
  62. if (base) {
  63. txx9_reg_res.start = base & 0xfffffffffULL;
  64. txx9_reg_res.end = (base & 0xfffffffffULL) + (size - 1);
  65. request_resource(&iomem_resource, &txx9_reg_res);
  66. }
  67. }
  68. /* clocks */
  69. unsigned int txx9_master_clock;
  70. unsigned int txx9_cpu_clock;
  71. unsigned int txx9_gbus_clock;
  72. #ifdef CONFIG_CPU_TX39XX
  73. /* don't enable by default - see errata */
  74. int txx9_ccfg_toeon __initdata;
  75. #else
  76. int txx9_ccfg_toeon __initdata = 1;
  77. #endif
  78. /* Minimum CLK support */
  79. struct clk *clk_get(struct device *dev, const char *id)
  80. {
  81. if (!strcmp(id, "spi-baseclk"))
  82. return (struct clk *)((unsigned long)txx9_gbus_clock / 2 / 4);
  83. if (!strcmp(id, "imbus_clk"))
  84. return (struct clk *)((unsigned long)txx9_gbus_clock / 2);
  85. return ERR_PTR(-ENOENT);
  86. }
  87. EXPORT_SYMBOL(clk_get);
  88. int clk_enable(struct clk *clk)
  89. {
  90. return 0;
  91. }
  92. EXPORT_SYMBOL(clk_enable);
  93. void clk_disable(struct clk *clk)
  94. {
  95. }
  96. EXPORT_SYMBOL(clk_disable);
  97. unsigned long clk_get_rate(struct clk *clk)
  98. {
  99. return (unsigned long)clk;
  100. }
  101. EXPORT_SYMBOL(clk_get_rate);
  102. void clk_put(struct clk *clk)
  103. {
  104. }
  105. EXPORT_SYMBOL(clk_put);
  106. /* GPIO support */
  107. #ifdef CONFIG_GENERIC_GPIO
  108. int gpio_to_irq(unsigned gpio)
  109. {
  110. return -EINVAL;
  111. }
  112. EXPORT_SYMBOL(gpio_to_irq);
  113. int irq_to_gpio(unsigned irq)
  114. {
  115. return -EINVAL;
  116. }
  117. EXPORT_SYMBOL(irq_to_gpio);
  118. #endif
  119. #define BOARD_VEC(board) extern struct txx9_board_vec board;
  120. #include <asm/txx9/boards.h>
  121. #undef BOARD_VEC
  122. struct txx9_board_vec *txx9_board_vec __initdata;
  123. static char txx9_system_type[32];
  124. static struct txx9_board_vec *board_vecs[] __initdata = {
  125. #define BOARD_VEC(board) &board,
  126. #include <asm/txx9/boards.h>
  127. #undef BOARD_VEC
  128. };
  129. static struct txx9_board_vec *__init find_board_byname(const char *name)
  130. {
  131. int i;
  132. /* search board_vecs table */
  133. for (i = 0; i < ARRAY_SIZE(board_vecs); i++) {
  134. if (strstr(board_vecs[i]->system, name))
  135. return board_vecs[i];
  136. }
  137. return NULL;
  138. }
  139. static void __init prom_init_cmdline(void)
  140. {
  141. int argc;
  142. int *argv32;
  143. int i; /* Always ignore the "-c" at argv[0] */
  144. char builtin[CL_SIZE];
  145. if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) {
  146. /*
  147. * argc is not a valid number, or argv32 is not a valid
  148. * pointer
  149. */
  150. argc = 0;
  151. argv32 = NULL;
  152. } else {
  153. argc = (int)fw_arg0;
  154. argv32 = (int *)fw_arg1;
  155. }
  156. /* ignore all built-in args if any f/w args given */
  157. /*
  158. * But if built-in strings was started with '+', append them
  159. * to command line args. If built-in was started with '-',
  160. * ignore all f/w args.
  161. */
  162. builtin[0] = '\0';
  163. if (arcs_cmdline[0] == '+')
  164. strcpy(builtin, arcs_cmdline + 1);
  165. else if (arcs_cmdline[0] == '-') {
  166. strcpy(builtin, arcs_cmdline + 1);
  167. argc = 0;
  168. } else if (argc <= 1)
  169. strcpy(builtin, arcs_cmdline);
  170. arcs_cmdline[0] = '\0';
  171. for (i = 1; i < argc; i++) {
  172. char *str = (char *)(long)argv32[i];
  173. if (i != 1)
  174. strcat(arcs_cmdline, " ");
  175. if (strchr(str, ' ')) {
  176. strcat(arcs_cmdline, "\"");
  177. strcat(arcs_cmdline, str);
  178. strcat(arcs_cmdline, "\"");
  179. } else
  180. strcat(arcs_cmdline, str);
  181. }
  182. /* append saved builtin args */
  183. if (builtin[0]) {
  184. if (arcs_cmdline[0])
  185. strcat(arcs_cmdline, " ");
  186. strcat(arcs_cmdline, builtin);
  187. }
  188. }
  189. static int txx9_ic_disable __initdata;
  190. static int txx9_dc_disable __initdata;
  191. #if defined(CONFIG_CPU_TX49XX)
  192. /* flush all cache on very early stage (before 4k_cache_init) */
  193. static void __init early_flush_dcache(void)
  194. {
  195. unsigned int conf = read_c0_config();
  196. unsigned int dc_size = 1 << (12 + ((conf & CONF_DC) >> 6));
  197. unsigned int linesz = 32;
  198. unsigned long addr, end;
  199. end = INDEX_BASE + dc_size / 4;
  200. /* 4way, waybit=0 */
  201. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  202. cache_op(Index_Writeback_Inv_D, addr | 0);
  203. cache_op(Index_Writeback_Inv_D, addr | 1);
  204. cache_op(Index_Writeback_Inv_D, addr | 2);
  205. cache_op(Index_Writeback_Inv_D, addr | 3);
  206. }
  207. }
  208. static void __init txx9_cache_fixup(void)
  209. {
  210. unsigned int conf;
  211. conf = read_c0_config();
  212. /* flush and disable */
  213. if (txx9_ic_disable) {
  214. conf |= TX49_CONF_IC;
  215. write_c0_config(conf);
  216. }
  217. if (txx9_dc_disable) {
  218. early_flush_dcache();
  219. conf |= TX49_CONF_DC;
  220. write_c0_config(conf);
  221. }
  222. /* enable cache */
  223. conf = read_c0_config();
  224. if (!txx9_ic_disable)
  225. conf &= ~TX49_CONF_IC;
  226. if (!txx9_dc_disable)
  227. conf &= ~TX49_CONF_DC;
  228. write_c0_config(conf);
  229. if (conf & TX49_CONF_IC)
  230. pr_info("TX49XX I-Cache disabled.\n");
  231. if (conf & TX49_CONF_DC)
  232. pr_info("TX49XX D-Cache disabled.\n");
  233. }
  234. #elif defined(CONFIG_CPU_TX39XX)
  235. /* flush all cache on very early stage (before tx39_cache_init) */
  236. static void __init early_flush_dcache(void)
  237. {
  238. unsigned int conf = read_c0_config();
  239. unsigned int dc_size = 1 << (10 + ((conf & TX39_CONF_DCS_MASK) >>
  240. TX39_CONF_DCS_SHIFT));
  241. unsigned int linesz = 16;
  242. unsigned long addr, end;
  243. end = INDEX_BASE + dc_size / 2;
  244. /* 2way, waybit=0 */
  245. for (addr = INDEX_BASE; addr < end; addr += linesz) {
  246. cache_op(Index_Writeback_Inv_D, addr | 0);
  247. cache_op(Index_Writeback_Inv_D, addr | 1);
  248. }
  249. }
  250. static void __init txx9_cache_fixup(void)
  251. {
  252. unsigned int conf;
  253. conf = read_c0_config();
  254. /* flush and disable */
  255. if (txx9_ic_disable) {
  256. conf &= ~TX39_CONF_ICE;
  257. write_c0_config(conf);
  258. }
  259. if (txx9_dc_disable) {
  260. early_flush_dcache();
  261. conf &= ~TX39_CONF_DCE;
  262. write_c0_config(conf);
  263. }
  264. /* enable cache */
  265. conf = read_c0_config();
  266. if (!txx9_ic_disable)
  267. conf |= TX39_CONF_ICE;
  268. if (!txx9_dc_disable)
  269. conf |= TX39_CONF_DCE;
  270. write_c0_config(conf);
  271. if (!(conf & TX39_CONF_ICE))
  272. pr_info("TX39XX I-Cache disabled.\n");
  273. if (!(conf & TX39_CONF_DCE))
  274. pr_info("TX39XX D-Cache disabled.\n");
  275. }
  276. #else
  277. static inline void txx9_cache_fixup(void)
  278. {
  279. }
  280. #endif
  281. static void __init preprocess_cmdline(void)
  282. {
  283. char cmdline[CL_SIZE];
  284. char *s;
  285. strcpy(cmdline, arcs_cmdline);
  286. s = cmdline;
  287. arcs_cmdline[0] = '\0';
  288. while (s && *s) {
  289. char *str = strsep(&s, " ");
  290. if (strncmp(str, "board=", 6) == 0) {
  291. txx9_board_vec = find_board_byname(str + 6);
  292. continue;
  293. } else if (strncmp(str, "masterclk=", 10) == 0) {
  294. unsigned long val;
  295. if (strict_strtoul(str + 10, 10, &val) == 0)
  296. txx9_master_clock = val;
  297. continue;
  298. } else if (strcmp(str, "icdisable") == 0) {
  299. txx9_ic_disable = 1;
  300. continue;
  301. } else if (strcmp(str, "dcdisable") == 0) {
  302. txx9_dc_disable = 1;
  303. continue;
  304. } else if (strcmp(str, "toeoff") == 0) {
  305. txx9_ccfg_toeon = 0;
  306. continue;
  307. } else if (strcmp(str, "toeon") == 0) {
  308. txx9_ccfg_toeon = 1;
  309. continue;
  310. }
  311. if (arcs_cmdline[0])
  312. strcat(arcs_cmdline, " ");
  313. strcat(arcs_cmdline, str);
  314. }
  315. txx9_cache_fixup();
  316. }
  317. static void __init select_board(void)
  318. {
  319. const char *envstr;
  320. /* first, determine by "board=" argument in preprocess_cmdline() */
  321. if (txx9_board_vec)
  322. return;
  323. /* next, determine by "board" envvar */
  324. envstr = prom_getenv("board");
  325. if (envstr) {
  326. txx9_board_vec = find_board_byname(envstr);
  327. if (txx9_board_vec)
  328. return;
  329. }
  330. /* select "default" board */
  331. #ifdef CONFIG_CPU_TX39XX
  332. txx9_board_vec = &jmr3927_vec;
  333. #endif
  334. #ifdef CONFIG_CPU_TX49XX
  335. switch (TX4938_REV_PCODE()) {
  336. #ifdef CONFIG_TOSHIBA_RBTX4927
  337. case 0x4927:
  338. txx9_board_vec = &rbtx4927_vec;
  339. break;
  340. case 0x4937:
  341. txx9_board_vec = &rbtx4937_vec;
  342. break;
  343. #endif
  344. #ifdef CONFIG_TOSHIBA_RBTX4938
  345. case 0x4938:
  346. txx9_board_vec = &rbtx4938_vec;
  347. break;
  348. #endif
  349. #ifdef CONFIG_TOSHIBA_RBTX4939
  350. case 0x4939:
  351. txx9_board_vec = &rbtx4939_vec;
  352. break;
  353. #endif
  354. }
  355. #endif
  356. }
  357. void __init prom_init(void)
  358. {
  359. prom_init_cmdline();
  360. preprocess_cmdline();
  361. select_board();
  362. strcpy(txx9_system_type, txx9_board_vec->system);
  363. txx9_board_vec->prom_init();
  364. }
  365. void __init prom_free_prom_memory(void)
  366. {
  367. unsigned long saddr = PAGE_SIZE;
  368. unsigned long eaddr = __pa_symbol(&_text);
  369. if (saddr < eaddr)
  370. free_init_pages("prom memory", saddr, eaddr);
  371. }
  372. const char *get_system_type(void)
  373. {
  374. return txx9_system_type;
  375. }
  376. char * __init prom_getcmdline(void)
  377. {
  378. return &(arcs_cmdline[0]);
  379. }
  380. const char *__init prom_getenv(const char *name)
  381. {
  382. const s32 *str;
  383. if (fw_arg2 < CKSEG0)
  384. return NULL;
  385. str = (const s32 *)fw_arg2;
  386. /* YAMON style ("name", "value" pairs) */
  387. while (str[0] && str[1]) {
  388. if (!strcmp((const char *)(unsigned long)str[0], name))
  389. return (const char *)(unsigned long)str[1];
  390. str += 2;
  391. }
  392. return NULL;
  393. }
  394. static void __noreturn txx9_machine_halt(void)
  395. {
  396. local_irq_disable();
  397. clear_c0_status(ST0_IM);
  398. while (1) {
  399. if (cpu_wait) {
  400. (*cpu_wait)();
  401. if (cpu_has_counter) {
  402. /*
  403. * Clear counter interrupt while it
  404. * breaks WAIT instruction even if
  405. * masked.
  406. */
  407. write_c0_compare(0);
  408. }
  409. }
  410. }
  411. }
  412. /* Watchdog support */
  413. void __init txx9_wdt_init(unsigned long base)
  414. {
  415. struct resource res = {
  416. .start = base,
  417. .end = base + 0x100 - 1,
  418. .flags = IORESOURCE_MEM,
  419. };
  420. platform_device_register_simple("txx9wdt", -1, &res, 1);
  421. }
  422. void txx9_wdt_now(unsigned long base)
  423. {
  424. struct txx9_tmr_reg __iomem *tmrptr =
  425. ioremap(base, sizeof(struct txx9_tmr_reg));
  426. /* disable watch dog timer */
  427. __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
  428. __raw_writel(0, &tmrptr->tcr);
  429. /* kick watchdog */
  430. __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
  431. __raw_writel(1, &tmrptr->cpra); /* immediate */
  432. __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
  433. &tmrptr->tcr);
  434. }
  435. /* SPI support */
  436. void __init txx9_spi_init(int busid, unsigned long base, int irq)
  437. {
  438. struct resource res[] = {
  439. {
  440. .start = base,
  441. .end = base + 0x20 - 1,
  442. .flags = IORESOURCE_MEM,
  443. }, {
  444. .start = irq,
  445. .flags = IORESOURCE_IRQ,
  446. },
  447. };
  448. platform_device_register_simple("spi_txx9", busid,
  449. res, ARRAY_SIZE(res));
  450. }
  451. void __init txx9_ethaddr_init(unsigned int id, unsigned char *ethaddr)
  452. {
  453. struct platform_device *pdev =
  454. platform_device_alloc("tc35815-mac", id);
  455. if (!pdev ||
  456. platform_device_add_data(pdev, ethaddr, 6) ||
  457. platform_device_add(pdev))
  458. platform_device_put(pdev);
  459. }
  460. void __init txx9_sio_init(unsigned long baseaddr, int irq,
  461. unsigned int line, unsigned int sclk, int nocts)
  462. {
  463. #ifdef CONFIG_SERIAL_TXX9
  464. struct uart_port req;
  465. memset(&req, 0, sizeof(req));
  466. req.line = line;
  467. req.iotype = UPIO_MEM;
  468. req.membase = ioremap(baseaddr, 0x24);
  469. req.mapbase = baseaddr;
  470. req.irq = irq;
  471. if (!nocts)
  472. req.flags |= UPF_BUGGY_UART /*HAVE_CTS_LINE*/;
  473. if (sclk) {
  474. req.flags |= UPF_MAGIC_MULTIPLIER /*USE_SCLK*/;
  475. req.uartclk = sclk;
  476. } else
  477. req.uartclk = TXX9_IMCLK;
  478. early_serial_txx9_setup(&req);
  479. #endif /* CONFIG_SERIAL_TXX9 */
  480. }
  481. #ifdef CONFIG_EARLY_PRINTK
  482. static void __init null_prom_putchar(char c)
  483. {
  484. }
  485. void (*txx9_prom_putchar)(char c) __initdata = null_prom_putchar;
  486. void __init prom_putchar(char c)
  487. {
  488. txx9_prom_putchar(c);
  489. }
  490. static void __iomem *early_txx9_sio_port;
  491. static void __init early_txx9_sio_putchar(char c)
  492. {
  493. #define TXX9_SICISR 0x0c
  494. #define TXX9_SITFIFO 0x1c
  495. #define TXX9_SICISR_TXALS 0x00000002
  496. while (!(__raw_readl(early_txx9_sio_port + TXX9_SICISR) &
  497. TXX9_SICISR_TXALS))
  498. ;
  499. __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
  500. }
  501. void __init txx9_sio_putchar_init(unsigned long baseaddr)
  502. {
  503. early_txx9_sio_port = ioremap(baseaddr, 0x24);
  504. txx9_prom_putchar = early_txx9_sio_putchar;
  505. }
  506. #endif /* CONFIG_EARLY_PRINTK */
  507. /* wrappers */
  508. void __init plat_mem_setup(void)
  509. {
  510. ioport_resource.start = 0;
  511. ioport_resource.end = ~0UL; /* no limit */
  512. iomem_resource.start = 0;
  513. iomem_resource.end = ~0UL; /* no limit */
  514. /* fallback restart/halt routines */
  515. _machine_restart = (void (*)(char *))txx9_machine_halt;
  516. _machine_halt = txx9_machine_halt;
  517. pm_power_off = txx9_machine_halt;
  518. #ifdef CONFIG_PCI
  519. pcibios_plat_setup = txx9_pcibios_setup;
  520. #endif
  521. txx9_board_vec->mem_setup();
  522. }
  523. void __init arch_init_irq(void)
  524. {
  525. txx9_board_vec->irq_setup();
  526. }
  527. void __init plat_time_init(void)
  528. {
  529. #ifdef CONFIG_CPU_TX49XX
  530. mips_hpt_frequency = txx9_cpu_clock / 2;
  531. #endif
  532. txx9_board_vec->time_init();
  533. }
  534. static int __init _txx9_arch_init(void)
  535. {
  536. if (txx9_board_vec->arch_init)
  537. txx9_board_vec->arch_init();
  538. return 0;
  539. }
  540. arch_initcall(_txx9_arch_init);
  541. static int __init _txx9_device_init(void)
  542. {
  543. if (txx9_board_vec->device_init)
  544. txx9_board_vec->device_init();
  545. return 0;
  546. }
  547. device_initcall(_txx9_device_init);
  548. int (*txx9_irq_dispatch)(int pending);
  549. asmlinkage void plat_irq_dispatch(void)
  550. {
  551. int pending = read_c0_status() & read_c0_cause() & ST0_IM;
  552. int irq = txx9_irq_dispatch(pending);
  553. if (likely(irq >= 0))
  554. do_IRQ(irq);
  555. else
  556. spurious_interrupt();
  557. }
  558. /* see include/asm-mips/mach-tx39xx/mangle-port.h, for example. */
  559. #ifdef NEEDS_TXX9_SWIZZLE_ADDR_B
  560. static unsigned long __swizzle_addr_none(unsigned long port)
  561. {
  562. return port;
  563. }
  564. unsigned long (*__swizzle_addr_b)(unsigned long port) = __swizzle_addr_none;
  565. EXPORT_SYMBOL(__swizzle_addr_b);
  566. #endif
  567. #ifdef NEEDS_TXX9_IOSWABW
  568. static u16 ioswabw_default(volatile u16 *a, u16 x)
  569. {
  570. return le16_to_cpu(x);
  571. }
  572. static u16 __mem_ioswabw_default(volatile u16 *a, u16 x)
  573. {
  574. return x;
  575. }
  576. u16 (*ioswabw)(volatile u16 *a, u16 x) = ioswabw_default;
  577. EXPORT_SYMBOL(ioswabw);
  578. u16 (*__mem_ioswabw)(volatile u16 *a, u16 x) = __mem_ioswabw_default;
  579. EXPORT_SYMBOL(__mem_ioswabw);
  580. #endif
  581. void __init txx9_physmap_flash_init(int no, unsigned long addr,
  582. unsigned long size,
  583. const struct physmap_flash_data *pdata)
  584. {
  585. #if defined(CONFIG_MTD_PHYSMAP) || defined(CONFIG_MTD_PHYSMAP_MODULE)
  586. struct resource res = {
  587. .start = addr,
  588. .end = addr + size - 1,
  589. .flags = IORESOURCE_MEM,
  590. };
  591. struct platform_device *pdev;
  592. #ifdef CONFIG_MTD_PARTITIONS
  593. static struct mtd_partition parts[2];
  594. struct physmap_flash_data pdata_part;
  595. /* If this area contained boot area, make separate partition */
  596. if (pdata->nr_parts == 0 && !pdata->parts &&
  597. addr < 0x1fc00000 && addr + size > 0x1fc00000 &&
  598. !parts[0].name) {
  599. parts[0].name = "boot";
  600. parts[0].offset = 0x1fc00000 - addr;
  601. parts[0].size = addr + size - 0x1fc00000;
  602. parts[1].name = "user";
  603. parts[1].offset = 0;
  604. parts[1].size = 0x1fc00000 - addr;
  605. pdata_part = *pdata;
  606. pdata_part.nr_parts = ARRAY_SIZE(parts);
  607. pdata_part.parts = parts;
  608. pdata = &pdata_part;
  609. }
  610. #endif
  611. pdev = platform_device_alloc("physmap-flash", no);
  612. if (!pdev ||
  613. platform_device_add_resources(pdev, &res, 1) ||
  614. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  615. platform_device_add(pdev))
  616. platform_device_put(pdev);
  617. #endif
  618. }
  619. void __init txx9_ndfmc_init(unsigned long baseaddr,
  620. const struct txx9ndfmc_platform_data *pdata)
  621. {
  622. #if defined(CONFIG_MTD_NAND_TXX9NDFMC) || \
  623. defined(CONFIG_MTD_NAND_TXX9NDFMC_MODULE)
  624. struct resource res = {
  625. .start = baseaddr,
  626. .end = baseaddr + 0x1000 - 1,
  627. .flags = IORESOURCE_MEM,
  628. };
  629. struct platform_device *pdev = platform_device_alloc("txx9ndfmc", -1);
  630. if (!pdev ||
  631. platform_device_add_resources(pdev, &res, 1) ||
  632. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  633. platform_device_add(pdev))
  634. platform_device_put(pdev);
  635. #endif
  636. }
  637. #if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE)
  638. static DEFINE_SPINLOCK(txx9_iocled_lock);
  639. #define TXX9_IOCLED_MAXLEDS 8
  640. struct txx9_iocled_data {
  641. struct gpio_chip chip;
  642. u8 cur_val;
  643. void __iomem *mmioaddr;
  644. struct gpio_led_platform_data pdata;
  645. struct gpio_led leds[TXX9_IOCLED_MAXLEDS];
  646. char names[TXX9_IOCLED_MAXLEDS][32];
  647. };
  648. static int txx9_iocled_get(struct gpio_chip *chip, unsigned int offset)
  649. {
  650. struct txx9_iocled_data *data =
  651. container_of(chip, struct txx9_iocled_data, chip);
  652. return data->cur_val & (1 << offset);
  653. }
  654. static void txx9_iocled_set(struct gpio_chip *chip, unsigned int offset,
  655. int value)
  656. {
  657. struct txx9_iocled_data *data =
  658. container_of(chip, struct txx9_iocled_data, chip);
  659. unsigned long flags;
  660. spin_lock_irqsave(&txx9_iocled_lock, flags);
  661. if (value)
  662. data->cur_val |= 1 << offset;
  663. else
  664. data->cur_val &= ~(1 << offset);
  665. writeb(data->cur_val, data->mmioaddr);
  666. mmiowb();
  667. spin_unlock_irqrestore(&txx9_iocled_lock, flags);
  668. }
  669. static int txx9_iocled_dir_in(struct gpio_chip *chip, unsigned int offset)
  670. {
  671. return 0;
  672. }
  673. static int txx9_iocled_dir_out(struct gpio_chip *chip, unsigned int offset,
  674. int value)
  675. {
  676. txx9_iocled_set(chip, offset, value);
  677. return 0;
  678. }
  679. void __init txx9_iocled_init(unsigned long baseaddr,
  680. int basenum, unsigned int num, int lowactive,
  681. const char *color, char **deftriggers)
  682. {
  683. struct txx9_iocled_data *iocled;
  684. struct platform_device *pdev;
  685. int i;
  686. static char *default_triggers[] __initdata = {
  687. "heartbeat",
  688. "ide-disk",
  689. "nand-disk",
  690. NULL,
  691. };
  692. if (!deftriggers)
  693. deftriggers = default_triggers;
  694. iocled = kzalloc(sizeof(*iocled), GFP_KERNEL);
  695. if (!iocled)
  696. return;
  697. iocled->mmioaddr = ioremap(baseaddr, 1);
  698. if (!iocled->mmioaddr)
  699. return;
  700. iocled->chip.get = txx9_iocled_get;
  701. iocled->chip.set = txx9_iocled_set;
  702. iocled->chip.direction_input = txx9_iocled_dir_in;
  703. iocled->chip.direction_output = txx9_iocled_dir_out;
  704. iocled->chip.label = "iocled";
  705. iocled->chip.base = basenum;
  706. iocled->chip.ngpio = num;
  707. if (gpiochip_add(&iocled->chip))
  708. return;
  709. if (basenum < 0)
  710. basenum = iocled->chip.base;
  711. pdev = platform_device_alloc("leds-gpio", basenum);
  712. if (!pdev)
  713. return;
  714. iocled->pdata.num_leds = num;
  715. iocled->pdata.leds = iocled->leds;
  716. for (i = 0; i < num; i++) {
  717. struct gpio_led *led = &iocled->leds[i];
  718. snprintf(iocled->names[i], sizeof(iocled->names[i]),
  719. "iocled:%s:%u", color, i);
  720. led->name = iocled->names[i];
  721. led->gpio = basenum + i;
  722. led->active_low = lowactive;
  723. if (deftriggers && *deftriggers)
  724. led->default_trigger = *deftriggers++;
  725. }
  726. pdev->dev.platform_data = &iocled->pdata;
  727. if (platform_device_add(pdev))
  728. platform_device_put(pdev);
  729. }
  730. #else /* CONFIG_LEDS_GPIO */
  731. void __init txx9_iocled_init(unsigned long baseaddr,
  732. int basenum, unsigned int num, int lowactive,
  733. const char *color, char **deftriggers)
  734. {
  735. }
  736. #endif /* CONFIG_LEDS_GPIO */
  737. void __init txx9_dmac_init(int id, unsigned long baseaddr, int irq,
  738. const struct txx9dmac_platform_data *pdata)
  739. {
  740. #if defined(CONFIG_TXX9_DMAC) || defined(CONFIG_TXX9_DMAC_MODULE)
  741. struct resource res[] = {
  742. {
  743. .start = baseaddr,
  744. .end = baseaddr + 0x800 - 1,
  745. .flags = IORESOURCE_MEM,
  746. #ifndef CONFIG_MACH_TX49XX
  747. }, {
  748. .start = irq,
  749. .flags = IORESOURCE_IRQ,
  750. #endif
  751. }
  752. };
  753. #ifdef CONFIG_MACH_TX49XX
  754. struct resource chan_res[] = {
  755. {
  756. .flags = IORESOURCE_IRQ,
  757. }
  758. };
  759. #endif
  760. struct platform_device *pdev = platform_device_alloc("txx9dmac", id);
  761. struct txx9dmac_chan_platform_data cpdata;
  762. int i;
  763. if (!pdev ||
  764. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  765. platform_device_add_data(pdev, pdata, sizeof(*pdata)) ||
  766. platform_device_add(pdev)) {
  767. platform_device_put(pdev);
  768. return;
  769. }
  770. memset(&cpdata, 0, sizeof(cpdata));
  771. cpdata.dmac_dev = pdev;
  772. for (i = 0; i < TXX9_DMA_MAX_NR_CHANNELS; i++) {
  773. #ifdef CONFIG_MACH_TX49XX
  774. chan_res[0].start = irq + i;
  775. #endif
  776. pdev = platform_device_alloc("txx9dmac-chan",
  777. id * TXX9_DMA_MAX_NR_CHANNELS + i);
  778. if (!pdev ||
  779. #ifdef CONFIG_MACH_TX49XX
  780. platform_device_add_resources(pdev, chan_res,
  781. ARRAY_SIZE(chan_res)) ||
  782. #endif
  783. platform_device_add_data(pdev, &cpdata, sizeof(cpdata)) ||
  784. platform_device_add(pdev))
  785. platform_device_put(pdev);
  786. }
  787. #endif
  788. }
  789. void __init txx9_aclc_init(unsigned long baseaddr, int irq,
  790. unsigned int dmac_id,
  791. unsigned int dma_chan_out,
  792. unsigned int dma_chan_in)
  793. {
  794. #if defined(CONFIG_SND_SOC_TXX9ACLC) || \
  795. defined(CONFIG_SND_SOC_TXX9ACLC_MODULE)
  796. unsigned int dma_base = dmac_id * TXX9_DMA_MAX_NR_CHANNELS;
  797. struct resource res[] = {
  798. {
  799. .start = baseaddr,
  800. .end = baseaddr + 0x100 - 1,
  801. .flags = IORESOURCE_MEM,
  802. }, {
  803. .start = irq,
  804. .flags = IORESOURCE_IRQ,
  805. }, {
  806. .name = "txx9dmac-chan",
  807. .start = dma_base + dma_chan_out,
  808. .flags = IORESOURCE_DMA,
  809. }, {
  810. .name = "txx9dmac-chan",
  811. .start = dma_base + dma_chan_in,
  812. .flags = IORESOURCE_DMA,
  813. }
  814. };
  815. struct platform_device *pdev =
  816. platform_device_alloc("txx9aclc-ac97", -1);
  817. if (!pdev ||
  818. platform_device_add_resources(pdev, res, ARRAY_SIZE(res)) ||
  819. platform_device_add(pdev))
  820. platform_device_put(pdev);
  821. #endif
  822. }
  823. static struct sysdev_class txx9_sramc_sysdev_class;
  824. struct txx9_sramc_sysdev {
  825. struct sys_device dev;
  826. struct bin_attribute bindata_attr;
  827. void __iomem *base;
  828. };
  829. static ssize_t txx9_sram_read(struct kobject *kobj,
  830. struct bin_attribute *bin_attr,
  831. char *buf, loff_t pos, size_t size)
  832. {
  833. struct txx9_sramc_sysdev *dev = bin_attr->private;
  834. size_t ramsize = bin_attr->size;
  835. if (pos >= ramsize)
  836. return 0;
  837. if (pos + size > ramsize)
  838. size = ramsize - pos;
  839. memcpy_fromio(buf, dev->base + pos, size);
  840. return size;
  841. }
  842. static ssize_t txx9_sram_write(struct kobject *kobj,
  843. struct bin_attribute *bin_attr,
  844. char *buf, loff_t pos, size_t size)
  845. {
  846. struct txx9_sramc_sysdev *dev = bin_attr->private;
  847. size_t ramsize = bin_attr->size;
  848. if (pos >= ramsize)
  849. return 0;
  850. if (pos + size > ramsize)
  851. size = ramsize - pos;
  852. memcpy_toio(dev->base + pos, buf, size);
  853. return size;
  854. }
  855. void __init txx9_sramc_init(struct resource *r)
  856. {
  857. struct txx9_sramc_sysdev *dev;
  858. size_t size;
  859. int err;
  860. if (!txx9_sramc_sysdev_class.name) {
  861. txx9_sramc_sysdev_class.name = "txx9_sram";
  862. err = sysdev_class_register(&txx9_sramc_sysdev_class);
  863. if (err) {
  864. txx9_sramc_sysdev_class.name = NULL;
  865. return;
  866. }
  867. }
  868. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  869. if (!dev)
  870. return;
  871. size = resource_size(r);
  872. dev->base = ioremap(r->start, size);
  873. if (!dev->base)
  874. goto exit;
  875. dev->dev.cls = &txx9_sramc_sysdev_class;
  876. dev->bindata_attr.attr.name = "bindata";
  877. dev->bindata_attr.attr.mode = S_IRUSR | S_IWUSR;
  878. dev->bindata_attr.read = txx9_sram_read;
  879. dev->bindata_attr.write = txx9_sram_write;
  880. dev->bindata_attr.size = size;
  881. dev->bindata_attr.private = dev;
  882. err = sysdev_register(&dev->dev);
  883. if (err)
  884. goto exit;
  885. err = sysfs_create_bin_file(&dev->dev.kobj, &dev->bindata_attr);
  886. if (err) {
  887. sysdev_unregister(&dev->dev);
  888. goto exit;
  889. }
  890. return;
  891. exit:
  892. if (dev) {
  893. if (dev->base)
  894. iounmap(dev->base);
  895. kfree(dev);
  896. }
  897. }