fault.c 14 KB

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  1. /*
  2. * linux/arch/m32r/mm/fault.c
  3. *
  4. * Copyright (c) 2001, 2002 Hitoshi Yamamoto, and H. Kondo
  5. * Copyright (c) 2004 Naoto Sugai, NIIBE Yutaka
  6. *
  7. * Some code taken from i386 version.
  8. * Copyright (C) 1995 Linus Torvalds
  9. */
  10. #include <linux/signal.h>
  11. #include <linux/sched.h>
  12. #include <linux/kernel.h>
  13. #include <linux/errno.h>
  14. #include <linux/string.h>
  15. #include <linux/types.h>
  16. #include <linux/ptrace.h>
  17. #include <linux/mman.h>
  18. #include <linux/mm.h>
  19. #include <linux/smp.h>
  20. #include <linux/interrupt.h>
  21. #include <linux/init.h>
  22. #include <linux/tty.h>
  23. #include <linux/vt_kern.h> /* For unblank_screen() */
  24. #include <linux/highmem.h>
  25. #include <linux/module.h>
  26. #include <asm/m32r.h>
  27. #include <asm/system.h>
  28. #include <asm/uaccess.h>
  29. #include <asm/hardirq.h>
  30. #include <asm/mmu_context.h>
  31. #include <asm/tlbflush.h>
  32. extern void die(const char *, struct pt_regs *, long);
  33. #ifndef CONFIG_SMP
  34. asmlinkage unsigned int tlb_entry_i_dat;
  35. asmlinkage unsigned int tlb_entry_d_dat;
  36. #define tlb_entry_i tlb_entry_i_dat
  37. #define tlb_entry_d tlb_entry_d_dat
  38. #else
  39. unsigned int tlb_entry_i_dat[NR_CPUS];
  40. unsigned int tlb_entry_d_dat[NR_CPUS];
  41. #define tlb_entry_i tlb_entry_i_dat[smp_processor_id()]
  42. #define tlb_entry_d tlb_entry_d_dat[smp_processor_id()]
  43. #endif
  44. extern void init_tlb(void);
  45. /*======================================================================*
  46. * do_page_fault()
  47. *======================================================================*
  48. * This routine handles page faults. It determines the address,
  49. * and the problem, and then passes it off to one of the appropriate
  50. * routines.
  51. *
  52. * ARGUMENT:
  53. * regs : M32R SP reg.
  54. * error_code : See below
  55. * address : M32R MMU MDEVA reg. (Operand ACE)
  56. * : M32R BPC reg. (Instruction ACE)
  57. *
  58. * error_code :
  59. * bit 0 == 0 means no page found, 1 means protection fault
  60. * bit 1 == 0 means read, 1 means write
  61. * bit 2 == 0 means kernel, 1 means user-mode
  62. * bit 3 == 0 means data, 1 means instruction
  63. *======================================================================*/
  64. #define ACE_PROTECTION 1
  65. #define ACE_WRITE 2
  66. #define ACE_USERMODE 4
  67. #define ACE_INSTRUCTION 8
  68. asmlinkage void do_page_fault(struct pt_regs *regs, unsigned long error_code,
  69. unsigned long address)
  70. {
  71. struct task_struct *tsk;
  72. struct mm_struct *mm;
  73. struct vm_area_struct * vma;
  74. unsigned long page, addr;
  75. int write;
  76. int fault;
  77. siginfo_t info;
  78. /*
  79. * If BPSW IE bit enable --> set PSW IE bit
  80. */
  81. if (regs->psw & M32R_PSW_BIE)
  82. local_irq_enable();
  83. tsk = current;
  84. info.si_code = SEGV_MAPERR;
  85. /*
  86. * We fault-in kernel-space virtual memory on-demand. The
  87. * 'reference' page table is init_mm.pgd.
  88. *
  89. * NOTE! We MUST NOT take any locks for this case. We may
  90. * be in an interrupt or a critical region, and should
  91. * only copy the information from the master page table,
  92. * nothing more.
  93. *
  94. * This verifies that the fault happens in kernel space
  95. * (error_code & ACE_USERMODE) == 0, and that the fault was not a
  96. * protection error (error_code & ACE_PROTECTION) == 0.
  97. */
  98. if (address >= TASK_SIZE && !(error_code & ACE_USERMODE))
  99. goto vmalloc_fault;
  100. mm = tsk->mm;
  101. /*
  102. * If we're in an interrupt or have no user context or are running in an
  103. * atomic region then we must not take the fault..
  104. */
  105. if (in_atomic() || !mm)
  106. goto bad_area_nosemaphore;
  107. /* When running in the kernel we expect faults to occur only to
  108. * addresses in user space. All other faults represent errors in the
  109. * kernel and should generate an OOPS. Unfortunatly, in the case of an
  110. * erroneous fault occurring in a code path which already holds mmap_sem
  111. * we will deadlock attempting to validate the fault against the
  112. * address space. Luckily the kernel only validly references user
  113. * space from well defined areas of code, which are listed in the
  114. * exceptions table.
  115. *
  116. * As the vast majority of faults will be valid we will only perform
  117. * the source reference check when there is a possibilty of a deadlock.
  118. * Attempt to lock the address space, if we cannot we then validate the
  119. * source. If this is invalid we can skip the address space check,
  120. * thus avoiding the deadlock.
  121. */
  122. if (!down_read_trylock(&mm->mmap_sem)) {
  123. if ((error_code & ACE_USERMODE) == 0 &&
  124. !search_exception_tables(regs->psw))
  125. goto bad_area_nosemaphore;
  126. down_read(&mm->mmap_sem);
  127. }
  128. vma = find_vma(mm, address);
  129. if (!vma)
  130. goto bad_area;
  131. if (vma->vm_start <= address)
  132. goto good_area;
  133. if (!(vma->vm_flags & VM_GROWSDOWN))
  134. goto bad_area;
  135. if (error_code & ACE_USERMODE) {
  136. /*
  137. * accessing the stack below "spu" is always a bug.
  138. * The "+ 4" is there due to the push instruction
  139. * doing pre-decrement on the stack and that
  140. * doesn't show up until later..
  141. */
  142. if (address + 4 < regs->spu)
  143. goto bad_area;
  144. }
  145. if (expand_stack(vma, address))
  146. goto bad_area;
  147. /*
  148. * Ok, we have a good vm_area for this memory access, so
  149. * we can handle it..
  150. */
  151. good_area:
  152. info.si_code = SEGV_ACCERR;
  153. write = 0;
  154. switch (error_code & (ACE_WRITE|ACE_PROTECTION)) {
  155. default: /* 3: write, present */
  156. /* fall through */
  157. case ACE_WRITE: /* write, not present */
  158. if (!(vma->vm_flags & VM_WRITE))
  159. goto bad_area;
  160. write++;
  161. break;
  162. case ACE_PROTECTION: /* read, present */
  163. case 0: /* read, not present */
  164. if (!(vma->vm_flags & (VM_READ | VM_EXEC)))
  165. goto bad_area;
  166. }
  167. /*
  168. * For instruction access exception, check if the area is executable
  169. */
  170. if ((error_code & ACE_INSTRUCTION) && !(vma->vm_flags & VM_EXEC))
  171. goto bad_area;
  172. survive:
  173. /*
  174. * If for any reason at all we couldn't handle the fault,
  175. * make sure we exit gracefully rather than endlessly redo
  176. * the fault.
  177. */
  178. addr = (address & PAGE_MASK);
  179. set_thread_fault_code(error_code);
  180. fault = handle_mm_fault(mm, vma, addr, write ? FAULT_FLAG_WRITE : 0);
  181. if (unlikely(fault & VM_FAULT_ERROR)) {
  182. if (fault & VM_FAULT_OOM)
  183. goto out_of_memory;
  184. else if (fault & VM_FAULT_SIGBUS)
  185. goto do_sigbus;
  186. BUG();
  187. }
  188. if (fault & VM_FAULT_MAJOR)
  189. tsk->maj_flt++;
  190. else
  191. tsk->min_flt++;
  192. set_thread_fault_code(0);
  193. up_read(&mm->mmap_sem);
  194. return;
  195. /*
  196. * Something tried to access memory that isn't in our memory map..
  197. * Fix it, but check if it's kernel or user first..
  198. */
  199. bad_area:
  200. up_read(&mm->mmap_sem);
  201. bad_area_nosemaphore:
  202. /* User mode accesses just cause a SIGSEGV */
  203. if (error_code & ACE_USERMODE) {
  204. tsk->thread.address = address;
  205. tsk->thread.error_code = error_code | (address >= TASK_SIZE);
  206. tsk->thread.trap_no = 14;
  207. info.si_signo = SIGSEGV;
  208. info.si_errno = 0;
  209. /* info.si_code has been set above */
  210. info.si_addr = (void __user *)address;
  211. force_sig_info(SIGSEGV, &info, tsk);
  212. return;
  213. }
  214. no_context:
  215. /* Are we prepared to handle this kernel fault? */
  216. if (fixup_exception(regs))
  217. return;
  218. /*
  219. * Oops. The kernel tried to access some bad page. We'll have to
  220. * terminate things with extreme prejudice.
  221. */
  222. bust_spinlocks(1);
  223. if (address < PAGE_SIZE)
  224. printk(KERN_ALERT "Unable to handle kernel NULL pointer dereference");
  225. else
  226. printk(KERN_ALERT "Unable to handle kernel paging request");
  227. printk(" at virtual address %08lx\n",address);
  228. printk(KERN_ALERT " printing bpc:\n");
  229. printk("%08lx\n", regs->bpc);
  230. page = *(unsigned long *)MPTB;
  231. page = ((unsigned long *) page)[address >> PGDIR_SHIFT];
  232. printk(KERN_ALERT "*pde = %08lx\n", page);
  233. if (page & _PAGE_PRESENT) {
  234. page &= PAGE_MASK;
  235. address &= 0x003ff000;
  236. page = ((unsigned long *) __va(page))[address >> PAGE_SHIFT];
  237. printk(KERN_ALERT "*pte = %08lx\n", page);
  238. }
  239. die("Oops", regs, error_code);
  240. bust_spinlocks(0);
  241. do_exit(SIGKILL);
  242. /*
  243. * We ran out of memory, or some other thing happened to us that made
  244. * us unable to handle the page fault gracefully.
  245. */
  246. out_of_memory:
  247. up_read(&mm->mmap_sem);
  248. if (is_global_init(tsk)) {
  249. yield();
  250. down_read(&mm->mmap_sem);
  251. goto survive;
  252. }
  253. printk("VM: killing process %s\n", tsk->comm);
  254. if (error_code & ACE_USERMODE)
  255. do_group_exit(SIGKILL);
  256. goto no_context;
  257. do_sigbus:
  258. up_read(&mm->mmap_sem);
  259. /* Kernel mode? Handle exception or die */
  260. if (!(error_code & ACE_USERMODE))
  261. goto no_context;
  262. tsk->thread.address = address;
  263. tsk->thread.error_code = error_code;
  264. tsk->thread.trap_no = 14;
  265. info.si_signo = SIGBUS;
  266. info.si_errno = 0;
  267. info.si_code = BUS_ADRERR;
  268. info.si_addr = (void __user *)address;
  269. force_sig_info(SIGBUS, &info, tsk);
  270. return;
  271. vmalloc_fault:
  272. {
  273. /*
  274. * Synchronize this task's top level page-table
  275. * with the 'reference' page table.
  276. *
  277. * Do _not_ use "tsk" here. We might be inside
  278. * an interrupt in the middle of a task switch..
  279. */
  280. int offset = pgd_index(address);
  281. pgd_t *pgd, *pgd_k;
  282. pmd_t *pmd, *pmd_k;
  283. pte_t *pte_k;
  284. pgd = (pgd_t *)*(unsigned long *)MPTB;
  285. pgd = offset + (pgd_t *)pgd;
  286. pgd_k = init_mm.pgd + offset;
  287. if (!pgd_present(*pgd_k))
  288. goto no_context;
  289. /*
  290. * set_pgd(pgd, *pgd_k); here would be useless on PAE
  291. * and redundant with the set_pmd() on non-PAE.
  292. */
  293. pmd = pmd_offset(pgd, address);
  294. pmd_k = pmd_offset(pgd_k, address);
  295. if (!pmd_present(*pmd_k))
  296. goto no_context;
  297. set_pmd(pmd, *pmd_k);
  298. pte_k = pte_offset_kernel(pmd_k, address);
  299. if (!pte_present(*pte_k))
  300. goto no_context;
  301. addr = (address & PAGE_MASK);
  302. set_thread_fault_code(error_code);
  303. update_mmu_cache(NULL, addr, *pte_k);
  304. set_thread_fault_code(0);
  305. return;
  306. }
  307. }
  308. /*======================================================================*
  309. * update_mmu_cache()
  310. *======================================================================*/
  311. #define TLB_MASK (NR_TLB_ENTRIES - 1)
  312. #define ITLB_END (unsigned long *)(ITLB_BASE + (NR_TLB_ENTRIES * 8))
  313. #define DTLB_END (unsigned long *)(DTLB_BASE + (NR_TLB_ENTRIES * 8))
  314. void update_mmu_cache(struct vm_area_struct *vma, unsigned long vaddr,
  315. pte_t pte)
  316. {
  317. volatile unsigned long *entry1, *entry2;
  318. unsigned long pte_data, flags;
  319. unsigned int *entry_dat;
  320. int inst = get_thread_fault_code() & ACE_INSTRUCTION;
  321. int i;
  322. /* Ptrace may call this routine. */
  323. if (vma && current->active_mm != vma->vm_mm)
  324. return;
  325. local_irq_save(flags);
  326. vaddr = (vaddr & PAGE_MASK) | get_asid();
  327. pte_data = pte_val(pte);
  328. #ifdef CONFIG_CHIP_OPSP
  329. entry1 = (unsigned long *)ITLB_BASE;
  330. for (i = 0; i < NR_TLB_ENTRIES; i++) {
  331. if (*entry1++ == vaddr) {
  332. set_tlb_data(entry1, pte_data);
  333. break;
  334. }
  335. entry1++;
  336. }
  337. entry2 = (unsigned long *)DTLB_BASE;
  338. for (i = 0; i < NR_TLB_ENTRIES; i++) {
  339. if (*entry2++ == vaddr) {
  340. set_tlb_data(entry2, pte_data);
  341. break;
  342. }
  343. entry2++;
  344. }
  345. #else
  346. /*
  347. * Update TLB entries
  348. * entry1: ITLB entry address
  349. * entry2: DTLB entry address
  350. */
  351. __asm__ __volatile__ (
  352. "seth %0, #high(%4) \n\t"
  353. "st %2, @(%5, %0) \n\t"
  354. "ldi %1, #1 \n\t"
  355. "st %1, @(%6, %0) \n\t"
  356. "add3 r4, %0, %7 \n\t"
  357. ".fillinsn \n"
  358. "1: \n\t"
  359. "ld %1, @(%6, %0) \n\t"
  360. "bnez %1, 1b \n\t"
  361. "ld %0, @r4+ \n\t"
  362. "ld %1, @r4 \n\t"
  363. "st %3, @+%0 \n\t"
  364. "st %3, @+%1 \n\t"
  365. : "=&r" (entry1), "=&r" (entry2)
  366. : "r" (vaddr), "r" (pte_data), "i" (MMU_REG_BASE),
  367. "i" (MSVA_offset), "i" (MTOP_offset), "i" (MIDXI_offset)
  368. : "r4", "memory"
  369. );
  370. #endif
  371. if ((!inst && entry2 >= DTLB_END) || (inst && entry1 >= ITLB_END))
  372. goto notfound;
  373. found:
  374. local_irq_restore(flags);
  375. return;
  376. /* Valid entry not found */
  377. notfound:
  378. /*
  379. * Update ITLB or DTLB entry
  380. * entry1: TLB entry address
  381. * entry2: TLB base address
  382. */
  383. if (!inst) {
  384. entry2 = (unsigned long *)DTLB_BASE;
  385. entry_dat = &tlb_entry_d;
  386. } else {
  387. entry2 = (unsigned long *)ITLB_BASE;
  388. entry_dat = &tlb_entry_i;
  389. }
  390. entry1 = entry2 + (((*entry_dat - 1) & TLB_MASK) << 1);
  391. for (i = 0 ; i < NR_TLB_ENTRIES ; i++) {
  392. if (!(entry1[1] & 2)) /* Valid bit check */
  393. break;
  394. if (entry1 != entry2)
  395. entry1 -= 2;
  396. else
  397. entry1 += TLB_MASK << 1;
  398. }
  399. if (i >= NR_TLB_ENTRIES) { /* Empty entry not found */
  400. entry1 = entry2 + (*entry_dat << 1);
  401. *entry_dat = (*entry_dat + 1) & TLB_MASK;
  402. }
  403. *entry1++ = vaddr; /* Set TLB tag */
  404. set_tlb_data(entry1, pte_data);
  405. goto found;
  406. }
  407. /*======================================================================*
  408. * flush_tlb_page() : flushes one page
  409. *======================================================================*/
  410. void local_flush_tlb_page(struct vm_area_struct *vma, unsigned long page)
  411. {
  412. if (vma->vm_mm && mm_context(vma->vm_mm) != NO_CONTEXT) {
  413. unsigned long flags;
  414. local_irq_save(flags);
  415. page &= PAGE_MASK;
  416. page |= (mm_context(vma->vm_mm) & MMU_CONTEXT_ASID_MASK);
  417. __flush_tlb_page(page);
  418. local_irq_restore(flags);
  419. }
  420. }
  421. /*======================================================================*
  422. * flush_tlb_range() : flushes a range of pages
  423. *======================================================================*/
  424. void local_flush_tlb_range(struct vm_area_struct *vma, unsigned long start,
  425. unsigned long end)
  426. {
  427. struct mm_struct *mm;
  428. mm = vma->vm_mm;
  429. if (mm_context(mm) != NO_CONTEXT) {
  430. unsigned long flags;
  431. int size;
  432. local_irq_save(flags);
  433. size = (end - start + (PAGE_SIZE - 1)) >> PAGE_SHIFT;
  434. if (size > (NR_TLB_ENTRIES / 4)) { /* Too many TLB to flush */
  435. mm_context(mm) = NO_CONTEXT;
  436. if (mm == current->mm)
  437. activate_context(mm);
  438. } else {
  439. unsigned long asid;
  440. asid = mm_context(mm) & MMU_CONTEXT_ASID_MASK;
  441. start &= PAGE_MASK;
  442. end += (PAGE_SIZE - 1);
  443. end &= PAGE_MASK;
  444. start |= asid;
  445. end |= asid;
  446. while (start < end) {
  447. __flush_tlb_page(start);
  448. start += PAGE_SIZE;
  449. }
  450. }
  451. local_irq_restore(flags);
  452. }
  453. }
  454. /*======================================================================*
  455. * flush_tlb_mm() : flushes the specified mm context TLB's
  456. *======================================================================*/
  457. void local_flush_tlb_mm(struct mm_struct *mm)
  458. {
  459. /* Invalidate all TLB of this process. */
  460. /* Instead of invalidating each TLB, we get new MMU context. */
  461. if (mm_context(mm) != NO_CONTEXT) {
  462. unsigned long flags;
  463. local_irq_save(flags);
  464. mm_context(mm) = NO_CONTEXT;
  465. if (mm == current->mm)
  466. activate_context(mm);
  467. local_irq_restore(flags);
  468. }
  469. }
  470. /*======================================================================*
  471. * flush_tlb_all() : flushes all processes TLBs
  472. *======================================================================*/
  473. void local_flush_tlb_all(void)
  474. {
  475. unsigned long flags;
  476. local_irq_save(flags);
  477. __flush_tlb_all();
  478. local_irq_restore(flags);
  479. }
  480. /*======================================================================*
  481. * init_mmu()
  482. *======================================================================*/
  483. void __init init_mmu(void)
  484. {
  485. tlb_entry_i = 0;
  486. tlb_entry_d = 0;
  487. mmu_context_cache = MMU_CONTEXT_FIRST_VERSION;
  488. set_asid(mmu_context_cache & MMU_CONTEXT_ASID_MASK);
  489. *(volatile unsigned long *)MPTB = (unsigned long)swapper_pg_dir;
  490. }