ptrace.h 4.1 KB

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  1. /*
  2. * arch/arm/include/asm/ptrace.h
  3. *
  4. * Copyright (C) 1996-2003 Russell King
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License version 2 as
  8. * published by the Free Software Foundation.
  9. */
  10. #ifndef __ASM_ARM_PTRACE_H
  11. #define __ASM_ARM_PTRACE_H
  12. #include <asm/hwcap.h>
  13. #define PTRACE_GETREGS 12
  14. #define PTRACE_SETREGS 13
  15. #define PTRACE_GETFPREGS 14
  16. #define PTRACE_SETFPREGS 15
  17. /* PTRACE_ATTACH is 16 */
  18. /* PTRACE_DETACH is 17 */
  19. #define PTRACE_GETWMMXREGS 18
  20. #define PTRACE_SETWMMXREGS 19
  21. /* 20 is unused */
  22. #define PTRACE_OLDSETOPTIONS 21
  23. #define PTRACE_GET_THREAD_AREA 22
  24. #define PTRACE_SET_SYSCALL 23
  25. /* PTRACE_SYSCALL is 24 */
  26. #define PTRACE_GETCRUNCHREGS 25
  27. #define PTRACE_SETCRUNCHREGS 26
  28. #define PTRACE_GETVFPREGS 27
  29. #define PTRACE_SETVFPREGS 28
  30. /*
  31. * PSR bits
  32. */
  33. #define USR26_MODE 0x00000000
  34. #define FIQ26_MODE 0x00000001
  35. #define IRQ26_MODE 0x00000002
  36. #define SVC26_MODE 0x00000003
  37. #define USR_MODE 0x00000010
  38. #define FIQ_MODE 0x00000011
  39. #define IRQ_MODE 0x00000012
  40. #define SVC_MODE 0x00000013
  41. #define ABT_MODE 0x00000017
  42. #define UND_MODE 0x0000001b
  43. #define SYSTEM_MODE 0x0000001f
  44. #define MODE32_BIT 0x00000010
  45. #define MODE_MASK 0x0000001f
  46. #define PSR_T_BIT 0x00000020
  47. #define PSR_F_BIT 0x00000040
  48. #define PSR_I_BIT 0x00000080
  49. #define PSR_A_BIT 0x00000100
  50. #define PSR_E_BIT 0x00000200
  51. #define PSR_J_BIT 0x01000000
  52. #define PSR_Q_BIT 0x08000000
  53. #define PSR_V_BIT 0x10000000
  54. #define PSR_C_BIT 0x20000000
  55. #define PSR_Z_BIT 0x40000000
  56. #define PSR_N_BIT 0x80000000
  57. /*
  58. * Groups of PSR bits
  59. */
  60. #define PSR_f 0xff000000 /* Flags */
  61. #define PSR_s 0x00ff0000 /* Status */
  62. #define PSR_x 0x0000ff00 /* Extension */
  63. #define PSR_c 0x000000ff /* Control */
  64. /*
  65. * ARMv7 groups of APSR bits
  66. */
  67. #define PSR_ISET_MASK 0x01000010 /* ISA state (J, T) mask */
  68. #define PSR_IT_MASK 0x0600fc00 /* If-Then execution state mask */
  69. #define PSR_ENDIAN_MASK 0x00000200 /* Endianness state mask */
  70. /*
  71. * Default endianness state
  72. */
  73. #ifdef CONFIG_CPU_ENDIAN_BE8
  74. #define PSR_ENDSTATE PSR_E_BIT
  75. #else
  76. #define PSR_ENDSTATE 0
  77. #endif
  78. #ifndef __ASSEMBLY__
  79. /*
  80. * This struct defines the way the registers are stored on the
  81. * stack during a system call. Note that sizeof(struct pt_regs)
  82. * has to be a multiple of 8.
  83. */
  84. struct pt_regs {
  85. long uregs[18];
  86. };
  87. #define ARM_cpsr uregs[16]
  88. #define ARM_pc uregs[15]
  89. #define ARM_lr uregs[14]
  90. #define ARM_sp uregs[13]
  91. #define ARM_ip uregs[12]
  92. #define ARM_fp uregs[11]
  93. #define ARM_r10 uregs[10]
  94. #define ARM_r9 uregs[9]
  95. #define ARM_r8 uregs[8]
  96. #define ARM_r7 uregs[7]
  97. #define ARM_r6 uregs[6]
  98. #define ARM_r5 uregs[5]
  99. #define ARM_r4 uregs[4]
  100. #define ARM_r3 uregs[3]
  101. #define ARM_r2 uregs[2]
  102. #define ARM_r1 uregs[1]
  103. #define ARM_r0 uregs[0]
  104. #define ARM_ORIG_r0 uregs[17]
  105. #ifdef __KERNEL__
  106. #define user_mode(regs) \
  107. (((regs)->ARM_cpsr & 0xf) == 0)
  108. #ifdef CONFIG_ARM_THUMB
  109. #define thumb_mode(regs) \
  110. (((regs)->ARM_cpsr & PSR_T_BIT))
  111. #else
  112. #define thumb_mode(regs) (0)
  113. #endif
  114. #define isa_mode(regs) \
  115. ((((regs)->ARM_cpsr & PSR_J_BIT) >> 23) | \
  116. (((regs)->ARM_cpsr & PSR_T_BIT) >> 5))
  117. #define processor_mode(regs) \
  118. ((regs)->ARM_cpsr & MODE_MASK)
  119. #define interrupts_enabled(regs) \
  120. (!((regs)->ARM_cpsr & PSR_I_BIT))
  121. #define fast_interrupts_enabled(regs) \
  122. (!((regs)->ARM_cpsr & PSR_F_BIT))
  123. /* Are the current registers suitable for user mode?
  124. * (used to maintain security in signal handlers)
  125. */
  126. static inline int valid_user_regs(struct pt_regs *regs)
  127. {
  128. if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) {
  129. regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT);
  130. return 1;
  131. }
  132. /*
  133. * Force CPSR to something logical...
  134. */
  135. regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT;
  136. if (!(elf_hwcap & HWCAP_26BIT))
  137. regs->ARM_cpsr |= USR_MODE;
  138. return 0;
  139. }
  140. #define instruction_pointer(regs) (regs)->ARM_pc
  141. #ifdef CONFIG_SMP
  142. extern unsigned long profile_pc(struct pt_regs *regs);
  143. #else
  144. #define profile_pc(regs) instruction_pointer(regs)
  145. #endif
  146. #define predicate(x) ((x) & 0xf0000000)
  147. #define PREDICATE_ALWAYS 0xe0000000
  148. #endif /* __KERNEL__ */
  149. #endif /* __ASSEMBLY__ */
  150. #endif