nouveau_drv.c 13 KB

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  1. /*
  2. * Copyright 2005 Stephane Marchesin.
  3. * All Rights Reserved.
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  20. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  21. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  22. * OTHER DEALINGS IN THE SOFTWARE.
  23. */
  24. #include <linux/console.h>
  25. #include "drmP.h"
  26. #include "drm.h"
  27. #include "drm_crtc_helper.h"
  28. #include "nouveau_drv.h"
  29. #include "nouveau_hw.h"
  30. #include "nouveau_fb.h"
  31. #include "nouveau_fbcon.h"
  32. #include "nouveau_pm.h"
  33. #include "nv50_display.h"
  34. #include "drm_pciids.h"
  35. MODULE_PARM_DESC(agpmode, "AGP mode (0 to disable AGP)");
  36. int nouveau_agpmode = -1;
  37. module_param_named(agpmode, nouveau_agpmode, int, 0400);
  38. MODULE_PARM_DESC(modeset, "Enable kernel modesetting");
  39. static int nouveau_modeset = -1; /* kms */
  40. module_param_named(modeset, nouveau_modeset, int, 0400);
  41. MODULE_PARM_DESC(vbios, "Override default VBIOS location");
  42. char *nouveau_vbios;
  43. module_param_named(vbios, nouveau_vbios, charp, 0400);
  44. MODULE_PARM_DESC(vram_pushbuf, "Force DMA push buffers to be in VRAM");
  45. int nouveau_vram_pushbuf;
  46. module_param_named(vram_pushbuf, nouveau_vram_pushbuf, int, 0400);
  47. MODULE_PARM_DESC(vram_notify, "Force DMA notifiers to be in VRAM");
  48. int nouveau_vram_notify = 0;
  49. module_param_named(vram_notify, nouveau_vram_notify, int, 0400);
  50. MODULE_PARM_DESC(duallink, "Allow dual-link TMDS (>=GeForce 8)");
  51. int nouveau_duallink = 1;
  52. module_param_named(duallink, nouveau_duallink, int, 0400);
  53. MODULE_PARM_DESC(uscript_lvds, "LVDS output script table ID (>=GeForce 8)");
  54. int nouveau_uscript_lvds = -1;
  55. module_param_named(uscript_lvds, nouveau_uscript_lvds, int, 0400);
  56. MODULE_PARM_DESC(uscript_tmds, "TMDS output script table ID (>=GeForce 8)");
  57. int nouveau_uscript_tmds = -1;
  58. module_param_named(uscript_tmds, nouveau_uscript_tmds, int, 0400);
  59. MODULE_PARM_DESC(ignorelid, "Ignore ACPI lid status");
  60. int nouveau_ignorelid = 0;
  61. module_param_named(ignorelid, nouveau_ignorelid, int, 0400);
  62. MODULE_PARM_DESC(noaccel, "Disable all acceleration");
  63. int nouveau_noaccel = 0;
  64. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  65. MODULE_PARM_DESC(nofbaccel, "Disable fbcon acceleration");
  66. int nouveau_nofbaccel = 0;
  67. module_param_named(nofbaccel, nouveau_nofbaccel, int, 0400);
  68. MODULE_PARM_DESC(override_conntype, "Ignore DCB connector type");
  69. int nouveau_override_conntype = 0;
  70. module_param_named(override_conntype, nouveau_override_conntype, int, 0400);
  71. MODULE_PARM_DESC(tv_disable, "Disable TV-out detection\n");
  72. int nouveau_tv_disable = 0;
  73. module_param_named(tv_disable, nouveau_tv_disable, int, 0400);
  74. MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
  75. "\t\tSupported: PAL, PAL-M, PAL-N, PAL-Nc, NTSC-M, NTSC-J,\n"
  76. "\t\t\thd480i, hd480p, hd576i, hd576p, hd720p, hd1080i.\n"
  77. "\t\tDefault: PAL\n"
  78. "\t\t*NOTE* Ignored for cards with external TV encoders.");
  79. char *nouveau_tv_norm;
  80. module_param_named(tv_norm, nouveau_tv_norm, charp, 0400);
  81. MODULE_PARM_DESC(reg_debug, "Register access debug bitmask:\n"
  82. "\t\t0x1 mc, 0x2 video, 0x4 fb, 0x8 extdev,\n"
  83. "\t\t0x10 crtc, 0x20 ramdac, 0x40 vgacrtc, 0x80 rmvio,\n"
  84. "\t\t0x100 vgaattr, 0x200 EVO (G80+). ");
  85. int nouveau_reg_debug;
  86. module_param_named(reg_debug, nouveau_reg_debug, int, 0600);
  87. MODULE_PARM_DESC(perflvl, "Performance level (default: boot)\n");
  88. char *nouveau_perflvl;
  89. module_param_named(perflvl, nouveau_perflvl, charp, 0400);
  90. MODULE_PARM_DESC(perflvl_wr, "Allow perflvl changes (warning: dangerous!)\n");
  91. int nouveau_perflvl_wr;
  92. module_param_named(perflvl_wr, nouveau_perflvl_wr, int, 0400);
  93. int nouveau_fbpercrtc;
  94. #if 0
  95. module_param_named(fbpercrtc, nouveau_fbpercrtc, int, 0400);
  96. #endif
  97. static struct pci_device_id pciidlist[] = {
  98. {
  99. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  100. .class = PCI_BASE_CLASS_DISPLAY << 16,
  101. .class_mask = 0xff << 16,
  102. },
  103. {
  104. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  105. .class = PCI_BASE_CLASS_DISPLAY << 16,
  106. .class_mask = 0xff << 16,
  107. },
  108. {}
  109. };
  110. MODULE_DEVICE_TABLE(pci, pciidlist);
  111. static struct drm_driver driver;
  112. static int __devinit
  113. nouveau_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  114. {
  115. return drm_get_pci_dev(pdev, ent, &driver);
  116. }
  117. static void
  118. nouveau_pci_remove(struct pci_dev *pdev)
  119. {
  120. struct drm_device *dev = pci_get_drvdata(pdev);
  121. drm_put_dev(dev);
  122. }
  123. int
  124. nouveau_pci_suspend(struct pci_dev *pdev, pm_message_t pm_state)
  125. {
  126. struct drm_device *dev = pci_get_drvdata(pdev);
  127. struct drm_nouveau_private *dev_priv = dev->dev_private;
  128. struct nouveau_instmem_engine *pinstmem = &dev_priv->engine.instmem;
  129. struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;
  130. struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;
  131. struct nouveau_channel *chan;
  132. struct drm_crtc *crtc;
  133. int ret, i;
  134. if (pm_state.event == PM_EVENT_PRETHAW)
  135. return 0;
  136. NV_INFO(dev, "Disabling fbcon acceleration...\n");
  137. nouveau_fbcon_save_disable_accel(dev);
  138. NV_INFO(dev, "Unpinning framebuffer(s)...\n");
  139. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  140. struct nouveau_framebuffer *nouveau_fb;
  141. nouveau_fb = nouveau_framebuffer(crtc->fb);
  142. if (!nouveau_fb || !nouveau_fb->nvbo)
  143. continue;
  144. nouveau_bo_unpin(nouveau_fb->nvbo);
  145. }
  146. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  147. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  148. nouveau_bo_unmap(nv_crtc->cursor.nvbo);
  149. nouveau_bo_unpin(nv_crtc->cursor.nvbo);
  150. }
  151. NV_INFO(dev, "Evicting buffers...\n");
  152. ttm_bo_evict_mm(&dev_priv->ttm.bdev, TTM_PL_VRAM);
  153. NV_INFO(dev, "Idling channels...\n");
  154. for (i = 0; i < pfifo->channels; i++) {
  155. struct nouveau_fence *fence = NULL;
  156. chan = dev_priv->fifos[i];
  157. if (!chan || (dev_priv->card_type >= NV_50 &&
  158. chan == dev_priv->fifos[0]))
  159. continue;
  160. ret = nouveau_fence_new(chan, &fence, true);
  161. if (ret == 0) {
  162. ret = nouveau_fence_wait(fence, NULL, false, false);
  163. nouveau_fence_unref((void *)&fence);
  164. }
  165. if (ret) {
  166. NV_ERROR(dev, "Failed to idle channel %d for suspend\n",
  167. chan->id);
  168. }
  169. }
  170. pgraph->fifo_access(dev, false);
  171. nouveau_wait_for_idle(dev);
  172. pfifo->reassign(dev, false);
  173. pfifo->disable(dev);
  174. pfifo->unload_context(dev);
  175. pgraph->unload_context(dev);
  176. NV_INFO(dev, "Suspending GPU objects...\n");
  177. ret = nouveau_gpuobj_suspend(dev);
  178. if (ret) {
  179. NV_ERROR(dev, "... failed: %d\n", ret);
  180. goto out_abort;
  181. }
  182. ret = pinstmem->suspend(dev);
  183. if (ret) {
  184. NV_ERROR(dev, "... failed: %d\n", ret);
  185. nouveau_gpuobj_suspend_cleanup(dev);
  186. goto out_abort;
  187. }
  188. NV_INFO(dev, "And we're gone!\n");
  189. pci_save_state(pdev);
  190. if (pm_state.event == PM_EVENT_SUSPEND) {
  191. pci_disable_device(pdev);
  192. pci_set_power_state(pdev, PCI_D3hot);
  193. }
  194. acquire_console_sem();
  195. nouveau_fbcon_set_suspend(dev, 1);
  196. release_console_sem();
  197. nouveau_fbcon_restore_accel(dev);
  198. return 0;
  199. out_abort:
  200. NV_INFO(dev, "Re-enabling acceleration..\n");
  201. pfifo->enable(dev);
  202. pfifo->reassign(dev, true);
  203. pgraph->fifo_access(dev, true);
  204. return ret;
  205. }
  206. int
  207. nouveau_pci_resume(struct pci_dev *pdev)
  208. {
  209. struct drm_device *dev = pci_get_drvdata(pdev);
  210. struct drm_nouveau_private *dev_priv = dev->dev_private;
  211. struct nouveau_engine *engine = &dev_priv->engine;
  212. struct drm_crtc *crtc;
  213. int ret, i;
  214. nouveau_fbcon_save_disable_accel(dev);
  215. NV_INFO(dev, "We're back, enabling device...\n");
  216. pci_set_power_state(pdev, PCI_D0);
  217. pci_restore_state(pdev);
  218. if (pci_enable_device(pdev))
  219. return -1;
  220. pci_set_master(dev->pdev);
  221. /* Make sure the AGP controller is in a consistent state */
  222. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP)
  223. nouveau_mem_reset_agp(dev);
  224. /* Make the CRTCs accessible */
  225. engine->display.early_init(dev);
  226. NV_INFO(dev, "POSTing device...\n");
  227. ret = nouveau_run_vbios_init(dev);
  228. if (ret)
  229. return ret;
  230. nouveau_pm_resume(dev);
  231. if (dev_priv->gart_info.type == NOUVEAU_GART_AGP) {
  232. ret = nouveau_mem_init_agp(dev);
  233. if (ret) {
  234. NV_ERROR(dev, "error reinitialising AGP: %d\n", ret);
  235. return ret;
  236. }
  237. }
  238. NV_INFO(dev, "Reinitialising engines...\n");
  239. engine->instmem.resume(dev);
  240. engine->mc.init(dev);
  241. engine->timer.init(dev);
  242. engine->fb.init(dev);
  243. engine->graph.init(dev);
  244. engine->fifo.init(dev);
  245. NV_INFO(dev, "Restoring GPU objects...\n");
  246. nouveau_gpuobj_resume(dev);
  247. nouveau_irq_postinstall(dev);
  248. /* Re-write SKIPS, they'll have been lost over the suspend */
  249. if (nouveau_vram_pushbuf) {
  250. struct nouveau_channel *chan;
  251. int j;
  252. for (i = 0; i < dev_priv->engine.fifo.channels; i++) {
  253. chan = dev_priv->fifos[i];
  254. if (!chan || !chan->pushbuf_bo)
  255. continue;
  256. for (j = 0; j < NOUVEAU_DMA_SKIPS; j++)
  257. nouveau_bo_wr32(chan->pushbuf_bo, i, 0);
  258. }
  259. }
  260. NV_INFO(dev, "Restoring mode...\n");
  261. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  262. struct nouveau_framebuffer *nouveau_fb;
  263. nouveau_fb = nouveau_framebuffer(crtc->fb);
  264. if (!nouveau_fb || !nouveau_fb->nvbo)
  265. continue;
  266. nouveau_bo_pin(nouveau_fb->nvbo, TTM_PL_FLAG_VRAM);
  267. }
  268. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  269. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  270. ret = nouveau_bo_pin(nv_crtc->cursor.nvbo, TTM_PL_FLAG_VRAM);
  271. if (!ret)
  272. ret = nouveau_bo_map(nv_crtc->cursor.nvbo);
  273. if (ret)
  274. NV_ERROR(dev, "Could not pin/map cursor.\n");
  275. }
  276. engine->display.init(dev);
  277. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  278. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  279. nv_crtc->cursor.set_offset(nv_crtc,
  280. nv_crtc->cursor.nvbo->bo.offset -
  281. dev_priv->vm_vram_base);
  282. nv_crtc->cursor.set_pos(nv_crtc, nv_crtc->cursor_saved_x,
  283. nv_crtc->cursor_saved_y);
  284. }
  285. /* Force CLUT to get re-loaded during modeset */
  286. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  287. struct nouveau_crtc *nv_crtc = nouveau_crtc(crtc);
  288. nv_crtc->lut.depth = 0;
  289. }
  290. acquire_console_sem();
  291. nouveau_fbcon_set_suspend(dev, 0);
  292. release_console_sem();
  293. nouveau_fbcon_zfill_all(dev);
  294. drm_helper_resume_force_mode(dev);
  295. nouveau_fbcon_restore_accel(dev);
  296. return 0;
  297. }
  298. static struct drm_driver driver = {
  299. .driver_features =
  300. DRIVER_USE_AGP | DRIVER_PCI_DMA | DRIVER_SG |
  301. DRIVER_HAVE_IRQ | DRIVER_IRQ_SHARED | DRIVER_GEM |
  302. DRIVER_MODESET,
  303. .load = nouveau_load,
  304. .firstopen = nouveau_firstopen,
  305. .lastclose = nouveau_lastclose,
  306. .unload = nouveau_unload,
  307. .preclose = nouveau_preclose,
  308. #if defined(CONFIG_DRM_NOUVEAU_DEBUG)
  309. .debugfs_init = nouveau_debugfs_init,
  310. .debugfs_cleanup = nouveau_debugfs_takedown,
  311. #endif
  312. .irq_preinstall = nouveau_irq_preinstall,
  313. .irq_postinstall = nouveau_irq_postinstall,
  314. .irq_uninstall = nouveau_irq_uninstall,
  315. .irq_handler = nouveau_irq_handler,
  316. .reclaim_buffers = drm_core_reclaim_buffers,
  317. .ioctls = nouveau_ioctls,
  318. .fops = {
  319. .owner = THIS_MODULE,
  320. .open = drm_open,
  321. .release = drm_release,
  322. .unlocked_ioctl = drm_ioctl,
  323. .mmap = nouveau_ttm_mmap,
  324. .poll = drm_poll,
  325. .fasync = drm_fasync,
  326. #if defined(CONFIG_COMPAT)
  327. .compat_ioctl = nouveau_compat_ioctl,
  328. #endif
  329. },
  330. .pci_driver = {
  331. .name = DRIVER_NAME,
  332. .id_table = pciidlist,
  333. .probe = nouveau_pci_probe,
  334. .remove = nouveau_pci_remove,
  335. .suspend = nouveau_pci_suspend,
  336. .resume = nouveau_pci_resume
  337. },
  338. .gem_init_object = nouveau_gem_object_new,
  339. .gem_free_object = nouveau_gem_object_del,
  340. .name = DRIVER_NAME,
  341. .desc = DRIVER_DESC,
  342. #ifdef GIT_REVISION
  343. .date = GIT_REVISION,
  344. #else
  345. .date = DRIVER_DATE,
  346. #endif
  347. .major = DRIVER_MAJOR,
  348. .minor = DRIVER_MINOR,
  349. .patchlevel = DRIVER_PATCHLEVEL,
  350. };
  351. static int __init nouveau_init(void)
  352. {
  353. driver.num_ioctls = nouveau_max_ioctl;
  354. if (nouveau_modeset == -1) {
  355. #ifdef CONFIG_VGA_CONSOLE
  356. if (vgacon_text_force())
  357. nouveau_modeset = 0;
  358. else
  359. #endif
  360. nouveau_modeset = 1;
  361. }
  362. if (!nouveau_modeset)
  363. return 0;
  364. nouveau_register_dsm_handler();
  365. return drm_init(&driver);
  366. }
  367. static void __exit nouveau_exit(void)
  368. {
  369. if (!nouveau_modeset)
  370. return;
  371. drm_exit(&driver);
  372. nouveau_unregister_dsm_handler();
  373. }
  374. module_init(nouveau_init);
  375. module_exit(nouveau_exit);
  376. MODULE_AUTHOR(DRIVER_AUTHOR);
  377. MODULE_DESCRIPTION(DRIVER_DESC);
  378. MODULE_LICENSE("GPL and additional rights");