db1300.c 20 KB

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  1. /*
  2. * DBAu1300 init and platform device setup.
  3. *
  4. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  5. */
  6. #include <linux/dma-mapping.h>
  7. #include <linux/gpio.h>
  8. #include <linux/gpio_keys.h>
  9. #include <linux/init.h>
  10. #include <linux/input.h> /* KEY_* codes */
  11. #include <linux/i2c.h>
  12. #include <linux/io.h>
  13. #include <linux/leds.h>
  14. #include <linux/ata_platform.h>
  15. #include <linux/mmc/host.h>
  16. #include <linux/module.h>
  17. #include <linux/mtd/mtd.h>
  18. #include <linux/mtd/nand.h>
  19. #include <linux/mtd/partitions.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/smsc911x.h>
  22. #include <asm/mach-au1x00/au1000.h>
  23. #include <asm/mach-au1x00/au1100_mmc.h>
  24. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  25. #include <asm/mach-au1x00/au1xxx_psc.h>
  26. #include <asm/mach-db1x00/db1300.h>
  27. #include <asm/mach-db1x00/bcsr.h>
  28. #include <asm/mach-au1x00/prom.h>
  29. #include "platform.h"
  30. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  31. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  32. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  33. };
  34. /* multifunction pins to assign to GPIO controller */
  35. static int db1300_gpio_pins[] __initdata = {
  36. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  37. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  38. AU1300_PIN_EXTCLK1,
  39. -1, /* terminator */
  40. };
  41. /* multifunction pins to assign to device functions */
  42. static int db1300_dev_pins[] __initdata = {
  43. /* wake-from-str pins 0-3 */
  44. AU1300_PIN_WAKE0,
  45. /* external clock sources for PSC0 */
  46. AU1300_PIN_EXTCLK0,
  47. /* 8bit MMC interface on SD0: 6-9 */
  48. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  49. AU1300_PIN_SD0DAT7,
  50. /* UART1 pins: 11-18 */
  51. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  52. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  53. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  54. /* UART0 pins: 19-24 */
  55. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  56. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  57. /* UART2: 25-26 */
  58. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  59. /* UART3: 27-28 */
  60. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  61. /* LCD controller PWMs, ext pixclock: 30-31 */
  62. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  63. /* SD1 interface: 32-37 */
  64. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  65. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  66. /* SD2 interface: 38-43 */
  67. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  68. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  69. /* PSC0/1 clocks: 44-45 */
  70. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  71. /* PSCs: 46-49/50-53/54-57/58-61 */
  72. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  73. AU1300_PIN_PSC0D1,
  74. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  75. AU1300_PIN_PSC1D1,
  76. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  77. AU1300_PIN_PSC2D1,
  78. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  79. AU1300_PIN_PSC3D1,
  80. /* PCMCIA interface: 62-70 */
  81. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  82. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  83. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  84. /* camera interface H/V sync inputs: 71-72 */
  85. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  86. /* PSC2/3 clocks: 73-74 */
  87. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  88. -1, /* terminator */
  89. };
  90. static void __init db1300_gpio_config(void)
  91. {
  92. int *i;
  93. i = &db1300_dev_pins[0];
  94. while (*i != -1)
  95. au1300_pinfunc_to_dev(*i++);
  96. i = &db1300_gpio_pins[0];
  97. while (*i != -1)
  98. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  99. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  100. }
  101. char *get_system_type(void)
  102. {
  103. return "DB1300";
  104. }
  105. /**********************************************************************/
  106. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  107. unsigned int ctrl)
  108. {
  109. struct nand_chip *this = mtd->priv;
  110. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  111. ioaddr &= 0xffffff00;
  112. if (ctrl & NAND_CLE) {
  113. ioaddr += MEM_STNAND_CMD;
  114. } else if (ctrl & NAND_ALE) {
  115. ioaddr += MEM_STNAND_ADDR;
  116. } else {
  117. /* assume we want to r/w real data by default */
  118. ioaddr += MEM_STNAND_DATA;
  119. }
  120. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  121. if (cmd != NAND_CMD_NONE) {
  122. __raw_writeb(cmd, this->IO_ADDR_W);
  123. wmb();
  124. }
  125. }
  126. static int au1300_nand_device_ready(struct mtd_info *mtd)
  127. {
  128. return __raw_readl((void __iomem *)MEM_STSTAT) & 1;
  129. }
  130. static const char *db1300_part_probes[] = { "cmdlinepart", NULL };
  131. static struct mtd_partition db1300_nand_parts[] = {
  132. {
  133. .name = "NAND FS 0",
  134. .offset = 0,
  135. .size = 8 * 1024 * 1024,
  136. },
  137. {
  138. .name = "NAND FS 1",
  139. .offset = MTDPART_OFS_APPEND,
  140. .size = MTDPART_SIZ_FULL
  141. },
  142. };
  143. struct platform_nand_data db1300_nand_platdata = {
  144. .chip = {
  145. .nr_chips = 1,
  146. .chip_offset = 0,
  147. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  148. .partitions = db1300_nand_parts,
  149. .chip_delay = 20,
  150. .part_probe_types = db1300_part_probes,
  151. },
  152. .ctrl = {
  153. .dev_ready = au1300_nand_device_ready,
  154. .cmd_ctrl = au1300_nand_cmd_ctrl,
  155. },
  156. };
  157. static struct resource db1300_nand_res[] = {
  158. [0] = {
  159. .start = DB1300_NAND_PHYS_ADDR,
  160. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  161. .flags = IORESOURCE_MEM,
  162. },
  163. };
  164. static struct platform_device db1300_nand_dev = {
  165. .name = "gen_nand",
  166. .num_resources = ARRAY_SIZE(db1300_nand_res),
  167. .resource = db1300_nand_res,
  168. .id = -1,
  169. .dev = {
  170. .platform_data = &db1300_nand_platdata,
  171. }
  172. };
  173. /**********************************************************************/
  174. static struct resource db1300_eth_res[] = {
  175. [0] = {
  176. .start = DB1300_ETH_PHYS_ADDR,
  177. .end = DB1300_ETH_PHYS_END,
  178. .flags = IORESOURCE_MEM,
  179. },
  180. [1] = {
  181. .start = DB1300_ETH_INT,
  182. .end = DB1300_ETH_INT,
  183. .flags = IORESOURCE_IRQ,
  184. },
  185. };
  186. static struct smsc911x_platform_config db1300_eth_config = {
  187. .phy_interface = PHY_INTERFACE_MODE_MII,
  188. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  189. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  190. .flags = SMSC911X_USE_32BIT,
  191. };
  192. static struct platform_device db1300_eth_dev = {
  193. .name = "smsc911x",
  194. .id = -1,
  195. .num_resources = ARRAY_SIZE(db1300_eth_res),
  196. .resource = db1300_eth_res,
  197. .dev = {
  198. .platform_data = &db1300_eth_config,
  199. },
  200. };
  201. /**********************************************************************/
  202. static struct resource au1300_psc1_res[] = {
  203. [0] = {
  204. .start = AU1300_PSC1_PHYS_ADDR,
  205. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  206. .flags = IORESOURCE_MEM,
  207. },
  208. [1] = {
  209. .start = AU1300_PSC1_INT,
  210. .end = AU1300_PSC1_INT,
  211. .flags = IORESOURCE_IRQ,
  212. },
  213. [2] = {
  214. .start = AU1300_DSCR_CMD0_PSC1_TX,
  215. .end = AU1300_DSCR_CMD0_PSC1_TX,
  216. .flags = IORESOURCE_DMA,
  217. },
  218. [3] = {
  219. .start = AU1300_DSCR_CMD0_PSC1_RX,
  220. .end = AU1300_DSCR_CMD0_PSC1_RX,
  221. .flags = IORESOURCE_DMA,
  222. },
  223. };
  224. static struct platform_device db1300_ac97_dev = {
  225. .name = "au1xpsc_ac97",
  226. .id = 1, /* PSC ID. match with AC97 codec ID! */
  227. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  228. .resource = au1300_psc1_res,
  229. };
  230. /**********************************************************************/
  231. static struct resource au1300_psc2_res[] = {
  232. [0] = {
  233. .start = AU1300_PSC2_PHYS_ADDR,
  234. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  235. .flags = IORESOURCE_MEM,
  236. },
  237. [1] = {
  238. .start = AU1300_PSC2_INT,
  239. .end = AU1300_PSC2_INT,
  240. .flags = IORESOURCE_IRQ,
  241. },
  242. [2] = {
  243. .start = AU1300_DSCR_CMD0_PSC2_TX,
  244. .end = AU1300_DSCR_CMD0_PSC2_TX,
  245. .flags = IORESOURCE_DMA,
  246. },
  247. [3] = {
  248. .start = AU1300_DSCR_CMD0_PSC2_RX,
  249. .end = AU1300_DSCR_CMD0_PSC2_RX,
  250. .flags = IORESOURCE_DMA,
  251. },
  252. };
  253. static struct platform_device db1300_i2s_dev = {
  254. .name = "au1xpsc_i2s",
  255. .id = 2, /* PSC ID */
  256. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  257. .resource = au1300_psc2_res,
  258. };
  259. /**********************************************************************/
  260. static struct resource au1300_psc3_res[] = {
  261. [0] = {
  262. .start = AU1300_PSC3_PHYS_ADDR,
  263. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  264. .flags = IORESOURCE_MEM,
  265. },
  266. [1] = {
  267. .start = AU1300_PSC3_INT,
  268. .end = AU1300_PSC3_INT,
  269. .flags = IORESOURCE_IRQ,
  270. },
  271. [2] = {
  272. .start = AU1300_DSCR_CMD0_PSC3_TX,
  273. .end = AU1300_DSCR_CMD0_PSC3_TX,
  274. .flags = IORESOURCE_DMA,
  275. },
  276. [3] = {
  277. .start = AU1300_DSCR_CMD0_PSC3_RX,
  278. .end = AU1300_DSCR_CMD0_PSC3_RX,
  279. .flags = IORESOURCE_DMA,
  280. },
  281. };
  282. static struct platform_device db1300_i2c_dev = {
  283. .name = "au1xpsc_smbus",
  284. .id = 0, /* bus number */
  285. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  286. .resource = au1300_psc3_res,
  287. };
  288. /**********************************************************************/
  289. /* proper key assignments when facing the LCD panel. For key assignments
  290. * according to the schematics swap up with down and left with right.
  291. * I chose to use it to emulate the arrow keys of a keyboard.
  292. */
  293. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  294. {
  295. .code = KEY_DOWN,
  296. .gpio = AU1300_PIN_LCDPWM0,
  297. .type = EV_KEY,
  298. .debounce_interval = 1,
  299. .active_low = 1,
  300. .desc = "5waysw-down",
  301. },
  302. {
  303. .code = KEY_UP,
  304. .gpio = AU1300_PIN_PSC2SYNC1,
  305. .type = EV_KEY,
  306. .debounce_interval = 1,
  307. .active_low = 1,
  308. .desc = "5waysw-up",
  309. },
  310. {
  311. .code = KEY_RIGHT,
  312. .gpio = AU1300_PIN_WAKE3,
  313. .type = EV_KEY,
  314. .debounce_interval = 1,
  315. .active_low = 1,
  316. .desc = "5waysw-right",
  317. },
  318. {
  319. .code = KEY_LEFT,
  320. .gpio = AU1300_PIN_WAKE2,
  321. .type = EV_KEY,
  322. .debounce_interval = 1,
  323. .active_low = 1,
  324. .desc = "5waysw-left",
  325. },
  326. {
  327. .code = KEY_ENTER,
  328. .gpio = AU1300_PIN_WAKE1,
  329. .type = EV_KEY,
  330. .debounce_interval = 1,
  331. .active_low = 1,
  332. .desc = "5waysw-push",
  333. },
  334. };
  335. static struct gpio_keys_platform_data db1300_5waysw_data = {
  336. .buttons = db1300_5waysw_arrowkeys,
  337. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  338. .rep = 1,
  339. .name = "db1300-5wayswitch",
  340. };
  341. static struct platform_device db1300_5waysw_dev = {
  342. .name = "gpio-keys",
  343. .dev = {
  344. .platform_data = &db1300_5waysw_data,
  345. },
  346. };
  347. /**********************************************************************/
  348. static struct platform_device db1300_rtc_dev = {
  349. .name = "rtc-au1xxx",
  350. .id = -1,
  351. };
  352. /**********************************************************************/
  353. static struct pata_platform_info db1300_ide_info = {
  354. .ioport_shift = DB1300_IDE_REG_SHIFT,
  355. };
  356. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  357. static struct resource db1300_ide_res[] = {
  358. [0] = {
  359. .start = DB1300_IDE_PHYS_ADDR,
  360. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  361. .flags = IORESOURCE_MEM,
  362. },
  363. [1] = {
  364. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  365. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  366. .flags = IORESOURCE_MEM,
  367. },
  368. [2] = {
  369. .start = DB1300_IDE_INT,
  370. .end = DB1300_IDE_INT,
  371. .flags = IORESOURCE_IRQ,
  372. },
  373. };
  374. static struct platform_device db1300_ide_dev = {
  375. .dev = {
  376. .platform_data = &db1300_ide_info,
  377. },
  378. .name = "pata_platform",
  379. .resource = db1300_ide_res,
  380. .num_resources = ARRAY_SIZE(db1300_ide_res),
  381. };
  382. /**********************************************************************/
  383. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  384. {
  385. void(*mmc_cd)(struct mmc_host *, unsigned long);
  386. /* disable the one currently screaming. No other way to shut it up */
  387. if (irq == DB1300_SD1_INSERT_INT) {
  388. disable_irq_nosync(DB1300_SD1_INSERT_INT);
  389. enable_irq(DB1300_SD1_EJECT_INT);
  390. } else {
  391. disable_irq_nosync(DB1300_SD1_EJECT_INT);
  392. enable_irq(DB1300_SD1_INSERT_INT);
  393. }
  394. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  395. * initialized the controller, so symbol_get() should always succeed.
  396. */
  397. mmc_cd = symbol_get(mmc_detect_change);
  398. mmc_cd(ptr, msecs_to_jiffies(500));
  399. symbol_put(mmc_detect_change);
  400. return IRQ_HANDLED;
  401. }
  402. static int db1300_mmc_card_readonly(void *mmc_host)
  403. {
  404. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  405. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  406. }
  407. static int db1300_mmc_card_inserted(void *mmc_host)
  408. {
  409. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  410. }
  411. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  412. {
  413. int ret;
  414. if (en) {
  415. ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
  416. "sd_insert", mmc_host);
  417. if (ret)
  418. goto out;
  419. ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
  420. "sd_eject", mmc_host);
  421. if (ret) {
  422. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  423. goto out;
  424. }
  425. if (db1300_mmc_card_inserted(mmc_host))
  426. enable_irq(DB1300_SD1_EJECT_INT);
  427. else
  428. enable_irq(DB1300_SD1_INSERT_INT);
  429. } else {
  430. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  431. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  432. }
  433. ret = 0;
  434. out:
  435. return ret;
  436. }
  437. static void db1300_mmcled_set(struct led_classdev *led,
  438. enum led_brightness brightness)
  439. {
  440. if (brightness != LED_OFF)
  441. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  442. else
  443. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  444. }
  445. static struct led_classdev db1300_mmc_led = {
  446. .brightness_set = db1300_mmcled_set,
  447. };
  448. struct au1xmmc_platform_data db1300_sd1_platdata = {
  449. .cd_setup = db1300_mmc_cd_setup,
  450. .card_inserted = db1300_mmc_card_inserted,
  451. .card_readonly = db1300_mmc_card_readonly,
  452. .led = &db1300_mmc_led,
  453. };
  454. static struct resource au1300_sd1_res[] = {
  455. [0] = {
  456. .start = AU1300_SD1_PHYS_ADDR,
  457. .end = AU1300_SD1_PHYS_ADDR,
  458. .flags = IORESOURCE_MEM,
  459. },
  460. [1] = {
  461. .start = AU1300_SD1_INT,
  462. .end = AU1300_SD1_INT,
  463. .flags = IORESOURCE_IRQ,
  464. },
  465. [2] = {
  466. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  467. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  468. .flags = IORESOURCE_DMA,
  469. },
  470. [3] = {
  471. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  472. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  473. .flags = IORESOURCE_DMA,
  474. },
  475. };
  476. static struct platform_device db1300_sd1_dev = {
  477. .dev = {
  478. .platform_data = &db1300_sd1_platdata,
  479. },
  480. .name = "au1xxx-mmc",
  481. .id = 1,
  482. .resource = au1300_sd1_res,
  483. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  484. };
  485. /**********************************************************************/
  486. static int db1300_movinand_inserted(void *mmc_host)
  487. {
  488. return 0; /* disable for now, it doesn't work yet */
  489. }
  490. static int db1300_movinand_readonly(void *mmc_host)
  491. {
  492. return 0;
  493. }
  494. static void db1300_movinand_led_set(struct led_classdev *led,
  495. enum led_brightness brightness)
  496. {
  497. if (brightness != LED_OFF)
  498. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  499. else
  500. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  501. }
  502. static struct led_classdev db1300_movinand_led = {
  503. .brightness_set = db1300_movinand_led_set,
  504. };
  505. struct au1xmmc_platform_data db1300_sd0_platdata = {
  506. .card_inserted = db1300_movinand_inserted,
  507. .card_readonly = db1300_movinand_readonly,
  508. .led = &db1300_movinand_led,
  509. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  510. };
  511. static struct resource au1300_sd0_res[] = {
  512. [0] = {
  513. .start = AU1100_SD0_PHYS_ADDR,
  514. .end = AU1100_SD0_PHYS_ADDR,
  515. .flags = IORESOURCE_MEM,
  516. },
  517. [1] = {
  518. .start = AU1300_SD0_INT,
  519. .end = AU1300_SD0_INT,
  520. .flags = IORESOURCE_IRQ,
  521. },
  522. [2] = {
  523. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  524. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  525. .flags = IORESOURCE_DMA,
  526. },
  527. [3] = {
  528. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  529. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  530. .flags = IORESOURCE_DMA,
  531. },
  532. };
  533. static struct platform_device db1300_sd0_dev = {
  534. .dev = {
  535. .platform_data = &db1300_sd0_platdata,
  536. },
  537. .name = "au1xxx-mmc",
  538. .id = 0,
  539. .resource = au1300_sd0_res,
  540. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  541. };
  542. /**********************************************************************/
  543. static struct platform_device db1300_wm9715_dev = {
  544. .name = "wm9712-codec",
  545. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  546. };
  547. static struct platform_device db1300_ac97dma_dev = {
  548. .name = "au1xpsc-pcm",
  549. .id = 1, /* PSC ID */
  550. };
  551. static struct platform_device db1300_i2sdma_dev = {
  552. .name = "au1xpsc-pcm",
  553. .id = 2, /* PSC ID */
  554. };
  555. static struct platform_device db1300_sndac97_dev = {
  556. .name = "db1300-ac97",
  557. };
  558. static struct platform_device db1300_sndi2s_dev = {
  559. .name = "db1300-i2s",
  560. };
  561. /**********************************************************************/
  562. static struct resource au1300_lcd_res[] = {
  563. [0] = {
  564. .start = AU1200_LCD_PHYS_ADDR,
  565. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  566. .flags = IORESOURCE_MEM,
  567. },
  568. [1] = {
  569. .start = AU1300_LCD_INT,
  570. .end = AU1300_LCD_INT,
  571. .flags = IORESOURCE_IRQ,
  572. }
  573. };
  574. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  575. static struct platform_device db1300_lcd_dev = {
  576. .name = "au1200-lcd",
  577. .id = 0,
  578. .dev = {
  579. .dma_mask = &au1300_lcd_dmamask,
  580. .coherent_dma_mask = DMA_BIT_MASK(32),
  581. },
  582. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  583. .resource = au1300_lcd_res,
  584. };
  585. /**********************************************************************/
  586. static struct platform_device *db1300_dev[] __initdata = {
  587. &db1300_eth_dev,
  588. &db1300_i2c_dev,
  589. &db1300_5waysw_dev,
  590. &db1300_rtc_dev,
  591. &db1300_nand_dev,
  592. &db1300_ide_dev,
  593. &db1300_sd0_dev,
  594. &db1300_sd1_dev,
  595. &db1300_lcd_dev,
  596. &db1300_ac97_dev,
  597. &db1300_i2s_dev,
  598. &db1300_wm9715_dev,
  599. &db1300_ac97dma_dev,
  600. &db1300_i2sdma_dev,
  601. &db1300_sndac97_dev,
  602. &db1300_sndi2s_dev,
  603. };
  604. static int __init db1300_device_init(void)
  605. {
  606. int swapped, cpldirq;
  607. /* setup CPLD IRQ muxer */
  608. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  609. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  610. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  611. /* insert/eject IRQs: one always triggers so don't enable them
  612. * when doing request_irq() on them. DB1200 has this bug too.
  613. */
  614. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  615. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  616. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  617. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  618. /*
  619. * setup board
  620. */
  621. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  622. i2c_register_board_info(0, db1300_i2c_devs,
  623. ARRAY_SIZE(db1300_i2c_devs));
  624. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  625. __raw_writel(PSC_SEL_CLK_SERCLK,
  626. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  627. wmb();
  628. __raw_writel(PSC_SEL_CLK_SERCLK,
  629. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  630. wmb();
  631. /* I2C uses internal 48MHz EXTCLK1 */
  632. __raw_writel(PSC_SEL_CLK_INTCLK,
  633. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  634. wmb();
  635. /* enable power to USB ports */
  636. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  637. /* although it is socket #0, it uses the CPLD bits which previous boards
  638. * have used for socket #1.
  639. */
  640. db1x_register_pcmcia_socket(
  641. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  642. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  643. AU1000_PCMCIA_MEM_PHYS_ADDR,
  644. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  645. AU1000_PCMCIA_IO_PHYS_ADDR,
  646. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  647. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  648. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  649. db1x_register_norflash(64 << 20, 2, swapped);
  650. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  651. }
  652. device_initcall(db1300_device_init);
  653. void __init board_setup(void)
  654. {
  655. unsigned short whoami;
  656. db1300_gpio_config();
  657. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  658. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  659. whoami = bcsr_read(BCSR_WHOAMI);
  660. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  661. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  662. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  663. BCSR_WHOAMI_DCID(whoami));
  664. /* enable UARTs, YAMON only enables #2 */
  665. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  666. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  667. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  668. }
  669. /* au1200fb calls these: STERBT EINEN TRAGISCHEN TOD!!! */
  670. int board_au1200fb_panel(void)
  671. {
  672. return 9; /* DB1300_800x480 */
  673. }
  674. int board_au1200fb_panel_init(void)
  675. {
  676. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  677. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  678. BCSR_BOARD_LCDBL);
  679. return 0;
  680. }
  681. int board_au1200fb_panel_shutdown(void)
  682. {
  683. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  684. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  685. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  686. return 0;
  687. }