intel_sdvo.c 82 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. * Jesse Barnes <jesse.barnes@intel.com>
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the "Software"),
  8. * to deal in the Software without restriction, including without limitation
  9. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10. * and/or sell copies of the Software, and to permit persons to whom the
  11. * Software is furnished to do so, subject to the following conditions:
  12. *
  13. * The above copyright notice and this permission notice (including the next
  14. * paragraph) shall be included in all copies or substantial portions of the
  15. * Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  23. * DEALINGS IN THE SOFTWARE.
  24. *
  25. * Authors:
  26. * Eric Anholt <eric@anholt.net>
  27. */
  28. #include <linux/i2c.h>
  29. #include <linux/slab.h>
  30. #include <linux/delay.h>
  31. #include <linux/export.h>
  32. #include <drm/drmP.h>
  33. #include <drm/drm_crtc.h>
  34. #include <drm/drm_edid.h>
  35. #include "intel_drv.h"
  36. #include <drm/i915_drm.h>
  37. #include "i915_drv.h"
  38. #include "intel_sdvo_regs.h"
  39. #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
  40. #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
  41. #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
  42. #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_YPRPB0)
  43. #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
  44. SDVO_TV_MASK)
  45. #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
  46. #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
  47. #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
  48. #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
  49. #define IS_DIGITAL(c) (c->output_flag & (SDVO_TMDS_MASK | SDVO_LVDS_MASK))
  50. static const char *tv_format_names[] = {
  51. "NTSC_M" , "NTSC_J" , "NTSC_443",
  52. "PAL_B" , "PAL_D" , "PAL_G" ,
  53. "PAL_H" , "PAL_I" , "PAL_M" ,
  54. "PAL_N" , "PAL_NC" , "PAL_60" ,
  55. "SECAM_B" , "SECAM_D" , "SECAM_G" ,
  56. "SECAM_K" , "SECAM_K1", "SECAM_L" ,
  57. "SECAM_60"
  58. };
  59. #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
  60. struct intel_sdvo {
  61. struct intel_encoder base;
  62. struct i2c_adapter *i2c;
  63. u8 slave_addr;
  64. struct i2c_adapter ddc;
  65. /* Register for the SDVO device: SDVOB or SDVOC */
  66. uint32_t sdvo_reg;
  67. /* Active outputs controlled by this SDVO output */
  68. uint16_t controlled_output;
  69. /*
  70. * Capabilities of the SDVO device returned by
  71. * i830_sdvo_get_capabilities()
  72. */
  73. struct intel_sdvo_caps caps;
  74. /* Pixel clock limitations reported by the SDVO device, in kHz */
  75. int pixel_clock_min, pixel_clock_max;
  76. /*
  77. * For multiple function SDVO device,
  78. * this is for current attached outputs.
  79. */
  80. uint16_t attached_output;
  81. /*
  82. * Hotplug activation bits for this device
  83. */
  84. uint16_t hotplug_active;
  85. /**
  86. * This is used to select the color range of RBG outputs in HDMI mode.
  87. * It is only valid when using TMDS encoding and 8 bit per color mode.
  88. */
  89. uint32_t color_range;
  90. /**
  91. * This is set if we're going to treat the device as TV-out.
  92. *
  93. * While we have these nice friendly flags for output types that ought
  94. * to decide this for us, the S-Video output on our HDMI+S-Video card
  95. * shows up as RGB1 (VGA).
  96. */
  97. bool is_tv;
  98. /* On different gens SDVOB is at different places. */
  99. bool is_sdvob;
  100. /* This is for current tv format name */
  101. int tv_format_index;
  102. /**
  103. * This is set if we treat the device as HDMI, instead of DVI.
  104. */
  105. bool is_hdmi;
  106. bool has_hdmi_monitor;
  107. bool has_hdmi_audio;
  108. /**
  109. * This is set if we detect output of sdvo device as LVDS and
  110. * have a valid fixed mode to use with the panel.
  111. */
  112. bool is_lvds;
  113. /**
  114. * This is sdvo fixed pannel mode pointer
  115. */
  116. struct drm_display_mode *sdvo_lvds_fixed_mode;
  117. /* DDC bus used by this SDVO encoder */
  118. uint8_t ddc_bus;
  119. /*
  120. * the sdvo flag gets lost in round trip: dtd->adjusted_mode->dtd
  121. */
  122. uint8_t dtd_sdvo_flags;
  123. };
  124. struct intel_sdvo_connector {
  125. struct intel_connector base;
  126. /* Mark the type of connector */
  127. uint16_t output_flag;
  128. enum hdmi_force_audio force_audio;
  129. /* This contains all current supported TV format */
  130. u8 tv_format_supported[TV_FORMAT_NUM];
  131. int format_supported_num;
  132. struct drm_property *tv_format;
  133. /* add the property for the SDVO-TV */
  134. struct drm_property *left;
  135. struct drm_property *right;
  136. struct drm_property *top;
  137. struct drm_property *bottom;
  138. struct drm_property *hpos;
  139. struct drm_property *vpos;
  140. struct drm_property *contrast;
  141. struct drm_property *saturation;
  142. struct drm_property *hue;
  143. struct drm_property *sharpness;
  144. struct drm_property *flicker_filter;
  145. struct drm_property *flicker_filter_adaptive;
  146. struct drm_property *flicker_filter_2d;
  147. struct drm_property *tv_chroma_filter;
  148. struct drm_property *tv_luma_filter;
  149. struct drm_property *dot_crawl;
  150. /* add the property for the SDVO-TV/LVDS */
  151. struct drm_property *brightness;
  152. /* Add variable to record current setting for the above property */
  153. u32 left_margin, right_margin, top_margin, bottom_margin;
  154. /* this is to get the range of margin.*/
  155. u32 max_hscan, max_vscan;
  156. u32 max_hpos, cur_hpos;
  157. u32 max_vpos, cur_vpos;
  158. u32 cur_brightness, max_brightness;
  159. u32 cur_contrast, max_contrast;
  160. u32 cur_saturation, max_saturation;
  161. u32 cur_hue, max_hue;
  162. u32 cur_sharpness, max_sharpness;
  163. u32 cur_flicker_filter, max_flicker_filter;
  164. u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
  165. u32 cur_flicker_filter_2d, max_flicker_filter_2d;
  166. u32 cur_tv_chroma_filter, max_tv_chroma_filter;
  167. u32 cur_tv_luma_filter, max_tv_luma_filter;
  168. u32 cur_dot_crawl, max_dot_crawl;
  169. };
  170. static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
  171. {
  172. return container_of(encoder, struct intel_sdvo, base.base);
  173. }
  174. static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
  175. {
  176. return container_of(intel_attached_encoder(connector),
  177. struct intel_sdvo, base);
  178. }
  179. static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
  180. {
  181. return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
  182. }
  183. static bool
  184. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
  185. static bool
  186. intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  187. struct intel_sdvo_connector *intel_sdvo_connector,
  188. int type);
  189. static bool
  190. intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  191. struct intel_sdvo_connector *intel_sdvo_connector);
  192. /**
  193. * Writes the SDVOB or SDVOC with the given value, but always writes both
  194. * SDVOB and SDVOC to work around apparent hardware issues (according to
  195. * comments in the BIOS).
  196. */
  197. static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
  198. {
  199. struct drm_device *dev = intel_sdvo->base.base.dev;
  200. struct drm_i915_private *dev_priv = dev->dev_private;
  201. u32 bval = val, cval = val;
  202. int i;
  203. if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
  204. I915_WRITE(intel_sdvo->sdvo_reg, val);
  205. I915_READ(intel_sdvo->sdvo_reg);
  206. return;
  207. }
  208. if (intel_sdvo->sdvo_reg == SDVOB) {
  209. cval = I915_READ(SDVOC);
  210. } else {
  211. bval = I915_READ(SDVOB);
  212. }
  213. /*
  214. * Write the registers twice for luck. Sometimes,
  215. * writing them only once doesn't appear to 'stick'.
  216. * The BIOS does this too. Yay, magic
  217. */
  218. for (i = 0; i < 2; i++)
  219. {
  220. I915_WRITE(SDVOB, bval);
  221. I915_READ(SDVOB);
  222. I915_WRITE(SDVOC, cval);
  223. I915_READ(SDVOC);
  224. }
  225. }
  226. static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
  227. {
  228. struct i2c_msg msgs[] = {
  229. {
  230. .addr = intel_sdvo->slave_addr,
  231. .flags = 0,
  232. .len = 1,
  233. .buf = &addr,
  234. },
  235. {
  236. .addr = intel_sdvo->slave_addr,
  237. .flags = I2C_M_RD,
  238. .len = 1,
  239. .buf = ch,
  240. }
  241. };
  242. int ret;
  243. if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
  244. return true;
  245. DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
  246. return false;
  247. }
  248. #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
  249. /** Mapping of command numbers to names, for debug output */
  250. static const struct _sdvo_cmd_name {
  251. u8 cmd;
  252. const char *name;
  253. } sdvo_cmd_names[] = {
  254. SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
  255. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
  256. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
  257. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
  258. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
  259. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
  260. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
  261. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
  262. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
  263. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
  264. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
  265. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
  266. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
  267. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
  268. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
  269. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
  270. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
  271. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  272. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
  273. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
  274. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
  275. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
  276. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
  277. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
  278. SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
  279. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
  280. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
  281. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
  282. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
  283. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
  284. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
  285. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
  286. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
  287. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
  288. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
  289. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
  290. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
  291. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
  292. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
  293. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
  294. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
  295. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
  296. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
  297. /* Add the op code for SDVO enhancements */
  298. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
  299. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
  300. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
  301. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
  302. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
  303. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
  304. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
  305. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
  306. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
  307. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
  308. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
  309. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
  310. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
  311. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
  312. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
  313. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
  314. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
  315. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
  316. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
  317. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
  318. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
  319. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
  320. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
  321. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
  322. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
  323. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
  324. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
  325. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
  326. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
  327. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
  328. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
  329. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
  330. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
  331. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
  332. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
  333. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
  334. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
  335. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
  336. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
  337. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
  338. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
  339. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
  340. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
  341. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
  342. /* HDMI op code */
  343. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
  344. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
  345. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
  346. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
  347. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
  348. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
  349. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
  350. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
  351. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
  352. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
  353. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
  354. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
  355. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
  356. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
  357. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
  358. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
  359. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
  360. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
  361. SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
  362. SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
  363. };
  364. #define SDVO_NAME(svdo) ((svdo)->is_sdvob ? "SDVOB" : "SDVOC")
  365. static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
  366. const void *args, int args_len)
  367. {
  368. int i;
  369. DRM_DEBUG_KMS("%s: W: %02X ",
  370. SDVO_NAME(intel_sdvo), cmd);
  371. for (i = 0; i < args_len; i++)
  372. DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
  373. for (; i < 8; i++)
  374. DRM_LOG_KMS(" ");
  375. for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
  376. if (cmd == sdvo_cmd_names[i].cmd) {
  377. DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
  378. break;
  379. }
  380. }
  381. if (i == ARRAY_SIZE(sdvo_cmd_names))
  382. DRM_LOG_KMS("(%02X)", cmd);
  383. DRM_LOG_KMS("\n");
  384. }
  385. static const char *cmd_status_names[] = {
  386. "Power on",
  387. "Success",
  388. "Not supported",
  389. "Invalid arg",
  390. "Pending",
  391. "Target not specified",
  392. "Scaling not supported"
  393. };
  394. static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
  395. const void *args, int args_len)
  396. {
  397. u8 *buf, status;
  398. struct i2c_msg *msgs;
  399. int i, ret = true;
  400. /* Would be simpler to allocate both in one go ? */
  401. buf = (u8 *)kzalloc(args_len * 2 + 2, GFP_KERNEL);
  402. if (!buf)
  403. return false;
  404. msgs = kcalloc(args_len + 3, sizeof(*msgs), GFP_KERNEL);
  405. if (!msgs) {
  406. kfree(buf);
  407. return false;
  408. }
  409. intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
  410. for (i = 0; i < args_len; i++) {
  411. msgs[i].addr = intel_sdvo->slave_addr;
  412. msgs[i].flags = 0;
  413. msgs[i].len = 2;
  414. msgs[i].buf = buf + 2 *i;
  415. buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
  416. buf[2*i + 1] = ((u8*)args)[i];
  417. }
  418. msgs[i].addr = intel_sdvo->slave_addr;
  419. msgs[i].flags = 0;
  420. msgs[i].len = 2;
  421. msgs[i].buf = buf + 2*i;
  422. buf[2*i + 0] = SDVO_I2C_OPCODE;
  423. buf[2*i + 1] = cmd;
  424. /* the following two are to read the response */
  425. status = SDVO_I2C_CMD_STATUS;
  426. msgs[i+1].addr = intel_sdvo->slave_addr;
  427. msgs[i+1].flags = 0;
  428. msgs[i+1].len = 1;
  429. msgs[i+1].buf = &status;
  430. msgs[i+2].addr = intel_sdvo->slave_addr;
  431. msgs[i+2].flags = I2C_M_RD;
  432. msgs[i+2].len = 1;
  433. msgs[i+2].buf = &status;
  434. ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
  435. if (ret < 0) {
  436. DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
  437. ret = false;
  438. goto out;
  439. }
  440. if (ret != i+3) {
  441. /* failure in I2C transfer */
  442. DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
  443. ret = false;
  444. }
  445. out:
  446. kfree(msgs);
  447. kfree(buf);
  448. return ret;
  449. }
  450. static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
  451. void *response, int response_len)
  452. {
  453. u8 retry = 5;
  454. u8 status;
  455. int i;
  456. DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
  457. /*
  458. * The documentation states that all commands will be
  459. * processed within 15µs, and that we need only poll
  460. * the status byte a maximum of 3 times in order for the
  461. * command to be complete.
  462. *
  463. * Check 5 times in case the hardware failed to read the docs.
  464. */
  465. if (!intel_sdvo_read_byte(intel_sdvo,
  466. SDVO_I2C_CMD_STATUS,
  467. &status))
  468. goto log_fail;
  469. while (status == SDVO_CMD_STATUS_PENDING && retry--) {
  470. udelay(15);
  471. if (!intel_sdvo_read_byte(intel_sdvo,
  472. SDVO_I2C_CMD_STATUS,
  473. &status))
  474. goto log_fail;
  475. }
  476. if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
  477. DRM_LOG_KMS("(%s)", cmd_status_names[status]);
  478. else
  479. DRM_LOG_KMS("(??? %d)", status);
  480. if (status != SDVO_CMD_STATUS_SUCCESS)
  481. goto log_fail;
  482. /* Read the command response */
  483. for (i = 0; i < response_len; i++) {
  484. if (!intel_sdvo_read_byte(intel_sdvo,
  485. SDVO_I2C_RETURN_0 + i,
  486. &((u8 *)response)[i]))
  487. goto log_fail;
  488. DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
  489. }
  490. DRM_LOG_KMS("\n");
  491. return true;
  492. log_fail:
  493. DRM_LOG_KMS("... failed\n");
  494. return false;
  495. }
  496. static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
  497. {
  498. if (mode->clock >= 100000)
  499. return 1;
  500. else if (mode->clock >= 50000)
  501. return 2;
  502. else
  503. return 4;
  504. }
  505. static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
  506. u8 ddc_bus)
  507. {
  508. /* This must be the immediately preceding write before the i2c xfer */
  509. return intel_sdvo_write_cmd(intel_sdvo,
  510. SDVO_CMD_SET_CONTROL_BUS_SWITCH,
  511. &ddc_bus, 1);
  512. }
  513. static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
  514. {
  515. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
  516. return false;
  517. return intel_sdvo_read_response(intel_sdvo, NULL, 0);
  518. }
  519. static bool
  520. intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
  521. {
  522. if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
  523. return false;
  524. return intel_sdvo_read_response(intel_sdvo, value, len);
  525. }
  526. static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
  527. {
  528. struct intel_sdvo_set_target_input_args targets = {0};
  529. return intel_sdvo_set_value(intel_sdvo,
  530. SDVO_CMD_SET_TARGET_INPUT,
  531. &targets, sizeof(targets));
  532. }
  533. /**
  534. * Return whether each input is trained.
  535. *
  536. * This function is making an assumption about the layout of the response,
  537. * which should be checked against the docs.
  538. */
  539. static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
  540. {
  541. struct intel_sdvo_get_trained_inputs_response response;
  542. BUILD_BUG_ON(sizeof(response) != 1);
  543. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
  544. &response, sizeof(response)))
  545. return false;
  546. *input_1 = response.input0_trained;
  547. *input_2 = response.input1_trained;
  548. return true;
  549. }
  550. static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
  551. u16 outputs)
  552. {
  553. return intel_sdvo_set_value(intel_sdvo,
  554. SDVO_CMD_SET_ACTIVE_OUTPUTS,
  555. &outputs, sizeof(outputs));
  556. }
  557. static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo,
  558. u16 *outputs)
  559. {
  560. return intel_sdvo_get_value(intel_sdvo,
  561. SDVO_CMD_GET_ACTIVE_OUTPUTS,
  562. outputs, sizeof(*outputs));
  563. }
  564. static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
  565. int mode)
  566. {
  567. u8 state = SDVO_ENCODER_STATE_ON;
  568. switch (mode) {
  569. case DRM_MODE_DPMS_ON:
  570. state = SDVO_ENCODER_STATE_ON;
  571. break;
  572. case DRM_MODE_DPMS_STANDBY:
  573. state = SDVO_ENCODER_STATE_STANDBY;
  574. break;
  575. case DRM_MODE_DPMS_SUSPEND:
  576. state = SDVO_ENCODER_STATE_SUSPEND;
  577. break;
  578. case DRM_MODE_DPMS_OFF:
  579. state = SDVO_ENCODER_STATE_OFF;
  580. break;
  581. }
  582. return intel_sdvo_set_value(intel_sdvo,
  583. SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
  584. }
  585. static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
  586. int *clock_min,
  587. int *clock_max)
  588. {
  589. struct intel_sdvo_pixel_clock_range clocks;
  590. BUILD_BUG_ON(sizeof(clocks) != 4);
  591. if (!intel_sdvo_get_value(intel_sdvo,
  592. SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
  593. &clocks, sizeof(clocks)))
  594. return false;
  595. /* Convert the values from units of 10 kHz to kHz. */
  596. *clock_min = clocks.min * 10;
  597. *clock_max = clocks.max * 10;
  598. return true;
  599. }
  600. static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
  601. u16 outputs)
  602. {
  603. return intel_sdvo_set_value(intel_sdvo,
  604. SDVO_CMD_SET_TARGET_OUTPUT,
  605. &outputs, sizeof(outputs));
  606. }
  607. static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
  608. struct intel_sdvo_dtd *dtd)
  609. {
  610. return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
  611. intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
  612. }
  613. static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
  614. struct intel_sdvo_dtd *dtd)
  615. {
  616. return intel_sdvo_set_timing(intel_sdvo,
  617. SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
  618. }
  619. static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
  620. struct intel_sdvo_dtd *dtd)
  621. {
  622. return intel_sdvo_set_timing(intel_sdvo,
  623. SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
  624. }
  625. static bool
  626. intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  627. uint16_t clock,
  628. uint16_t width,
  629. uint16_t height)
  630. {
  631. struct intel_sdvo_preferred_input_timing_args args;
  632. memset(&args, 0, sizeof(args));
  633. args.clock = clock;
  634. args.width = width;
  635. args.height = height;
  636. args.interlace = 0;
  637. if (intel_sdvo->is_lvds &&
  638. (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
  639. intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
  640. args.scaled = 1;
  641. return intel_sdvo_set_value(intel_sdvo,
  642. SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
  643. &args, sizeof(args));
  644. }
  645. static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
  646. struct intel_sdvo_dtd *dtd)
  647. {
  648. BUILD_BUG_ON(sizeof(dtd->part1) != 8);
  649. BUILD_BUG_ON(sizeof(dtd->part2) != 8);
  650. return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
  651. &dtd->part1, sizeof(dtd->part1)) &&
  652. intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
  653. &dtd->part2, sizeof(dtd->part2));
  654. }
  655. static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
  656. {
  657. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
  658. }
  659. static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
  660. const struct drm_display_mode *mode)
  661. {
  662. uint16_t width, height;
  663. uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
  664. uint16_t h_sync_offset, v_sync_offset;
  665. int mode_clock;
  666. width = mode->hdisplay;
  667. height = mode->vdisplay;
  668. /* do some mode translations */
  669. h_blank_len = mode->htotal - mode->hdisplay;
  670. h_sync_len = mode->hsync_end - mode->hsync_start;
  671. v_blank_len = mode->vtotal - mode->vdisplay;
  672. v_sync_len = mode->vsync_end - mode->vsync_start;
  673. h_sync_offset = mode->hsync_start - mode->hdisplay;
  674. v_sync_offset = mode->vsync_start - mode->vdisplay;
  675. mode_clock = mode->clock;
  676. mode_clock /= intel_mode_get_pixel_multiplier(mode) ?: 1;
  677. mode_clock /= 10;
  678. dtd->part1.clock = mode_clock;
  679. dtd->part1.h_active = width & 0xff;
  680. dtd->part1.h_blank = h_blank_len & 0xff;
  681. dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
  682. ((h_blank_len >> 8) & 0xf);
  683. dtd->part1.v_active = height & 0xff;
  684. dtd->part1.v_blank = v_blank_len & 0xff;
  685. dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
  686. ((v_blank_len >> 8) & 0xf);
  687. dtd->part2.h_sync_off = h_sync_offset & 0xff;
  688. dtd->part2.h_sync_width = h_sync_len & 0xff;
  689. dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
  690. (v_sync_len & 0xf);
  691. dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
  692. ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
  693. ((v_sync_len & 0x30) >> 4);
  694. dtd->part2.dtd_flags = 0x18;
  695. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  696. dtd->part2.dtd_flags |= DTD_FLAG_INTERLACE;
  697. if (mode->flags & DRM_MODE_FLAG_PHSYNC)
  698. dtd->part2.dtd_flags |= DTD_FLAG_HSYNC_POSITIVE;
  699. if (mode->flags & DRM_MODE_FLAG_PVSYNC)
  700. dtd->part2.dtd_flags |= DTD_FLAG_VSYNC_POSITIVE;
  701. dtd->part2.sdvo_flags = 0;
  702. dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
  703. dtd->part2.reserved = 0;
  704. }
  705. static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
  706. const struct intel_sdvo_dtd *dtd)
  707. {
  708. mode->hdisplay = dtd->part1.h_active;
  709. mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
  710. mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
  711. mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
  712. mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
  713. mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
  714. mode->htotal = mode->hdisplay + dtd->part1.h_blank;
  715. mode->htotal += (dtd->part1.h_high & 0xf) << 8;
  716. mode->vdisplay = dtd->part1.v_active;
  717. mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
  718. mode->vsync_start = mode->vdisplay;
  719. mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
  720. mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
  721. mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
  722. mode->vsync_end = mode->vsync_start +
  723. (dtd->part2.v_sync_off_width & 0xf);
  724. mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
  725. mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
  726. mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
  727. mode->clock = dtd->part1.clock * 10;
  728. mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
  729. if (dtd->part2.dtd_flags & DTD_FLAG_INTERLACE)
  730. mode->flags |= DRM_MODE_FLAG_INTERLACE;
  731. if (dtd->part2.dtd_flags & DTD_FLAG_HSYNC_POSITIVE)
  732. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  733. if (dtd->part2.dtd_flags & DTD_FLAG_VSYNC_POSITIVE)
  734. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  735. }
  736. static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
  737. {
  738. struct intel_sdvo_encode encode;
  739. BUILD_BUG_ON(sizeof(encode) != 2);
  740. return intel_sdvo_get_value(intel_sdvo,
  741. SDVO_CMD_GET_SUPP_ENCODE,
  742. &encode, sizeof(encode));
  743. }
  744. static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
  745. uint8_t mode)
  746. {
  747. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
  748. }
  749. static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
  750. uint8_t mode)
  751. {
  752. return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
  753. }
  754. #if 0
  755. static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
  756. {
  757. int i, j;
  758. uint8_t set_buf_index[2];
  759. uint8_t av_split;
  760. uint8_t buf_size;
  761. uint8_t buf[48];
  762. uint8_t *pos;
  763. intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
  764. for (i = 0; i <= av_split; i++) {
  765. set_buf_index[0] = i; set_buf_index[1] = 0;
  766. intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
  767. set_buf_index, 2);
  768. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
  769. intel_sdvo_read_response(encoder, &buf_size, 1);
  770. pos = buf;
  771. for (j = 0; j <= buf_size; j += 8) {
  772. intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
  773. NULL, 0);
  774. intel_sdvo_read_response(encoder, pos, 8);
  775. pos += 8;
  776. }
  777. }
  778. }
  779. #endif
  780. static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
  781. {
  782. struct dip_infoframe avi_if = {
  783. .type = DIP_TYPE_AVI,
  784. .ver = DIP_VERSION_AVI,
  785. .len = DIP_LEN_AVI,
  786. };
  787. uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
  788. uint8_t set_buf_index[2] = { 1, 0 };
  789. uint8_t sdvo_data[4 + sizeof(avi_if.body.avi)];
  790. uint64_t *data = (uint64_t *)sdvo_data;
  791. unsigned i;
  792. intel_dip_infoframe_csum(&avi_if);
  793. /* sdvo spec says that the ecc is handled by the hw, and it looks like
  794. * we must not send the ecc field, either. */
  795. memcpy(sdvo_data, &avi_if, 3);
  796. sdvo_data[3] = avi_if.checksum;
  797. memcpy(&sdvo_data[4], &avi_if.body, sizeof(avi_if.body.avi));
  798. if (!intel_sdvo_set_value(intel_sdvo,
  799. SDVO_CMD_SET_HBUF_INDEX,
  800. set_buf_index, 2))
  801. return false;
  802. for (i = 0; i < sizeof(sdvo_data); i += 8) {
  803. if (!intel_sdvo_set_value(intel_sdvo,
  804. SDVO_CMD_SET_HBUF_DATA,
  805. data, 8))
  806. return false;
  807. data++;
  808. }
  809. return intel_sdvo_set_value(intel_sdvo,
  810. SDVO_CMD_SET_HBUF_TXRATE,
  811. &tx_rate, 1);
  812. }
  813. static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
  814. {
  815. struct intel_sdvo_tv_format format;
  816. uint32_t format_map;
  817. format_map = 1 << intel_sdvo->tv_format_index;
  818. memset(&format, 0, sizeof(format));
  819. memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
  820. BUILD_BUG_ON(sizeof(format) != 6);
  821. return intel_sdvo_set_value(intel_sdvo,
  822. SDVO_CMD_SET_TV_FORMAT,
  823. &format, sizeof(format));
  824. }
  825. static bool
  826. intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
  827. const struct drm_display_mode *mode)
  828. {
  829. struct intel_sdvo_dtd output_dtd;
  830. if (!intel_sdvo_set_target_output(intel_sdvo,
  831. intel_sdvo->attached_output))
  832. return false;
  833. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  834. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  835. return false;
  836. return true;
  837. }
  838. /* Asks the sdvo controller for the preferred input mode given the output mode.
  839. * Unfortunately we have to set up the full output mode to do that. */
  840. static bool
  841. intel_sdvo_get_preferred_input_mode(struct intel_sdvo *intel_sdvo,
  842. const struct drm_display_mode *mode,
  843. struct drm_display_mode *adjusted_mode)
  844. {
  845. struct intel_sdvo_dtd input_dtd;
  846. /* Reset the input timing to the screen. Assume always input 0. */
  847. if (!intel_sdvo_set_target_input(intel_sdvo))
  848. return false;
  849. if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
  850. mode->clock / 10,
  851. mode->hdisplay,
  852. mode->vdisplay))
  853. return false;
  854. if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
  855. &input_dtd))
  856. return false;
  857. intel_sdvo_get_mode_from_dtd(adjusted_mode, &input_dtd);
  858. intel_sdvo->dtd_sdvo_flags = input_dtd.part2.sdvo_flags;
  859. return true;
  860. }
  861. static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
  862. const struct drm_display_mode *mode,
  863. struct drm_display_mode *adjusted_mode)
  864. {
  865. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  866. int multiplier;
  867. /* We need to construct preferred input timings based on our
  868. * output timings. To do that, we have to set the output
  869. * timings, even though this isn't really the right place in
  870. * the sequence to do it. Oh well.
  871. */
  872. if (intel_sdvo->is_tv) {
  873. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
  874. return false;
  875. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  876. mode,
  877. adjusted_mode);
  878. } else if (intel_sdvo->is_lvds) {
  879. if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
  880. intel_sdvo->sdvo_lvds_fixed_mode))
  881. return false;
  882. (void) intel_sdvo_get_preferred_input_mode(intel_sdvo,
  883. mode,
  884. adjusted_mode);
  885. }
  886. /* Make the CRTC code factor in the SDVO pixel multiplier. The
  887. * SDVO device will factor out the multiplier during mode_set.
  888. */
  889. multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
  890. intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
  891. return true;
  892. }
  893. static void intel_sdvo_mode_set(struct drm_encoder *encoder,
  894. struct drm_display_mode *mode,
  895. struct drm_display_mode *adjusted_mode)
  896. {
  897. struct drm_device *dev = encoder->dev;
  898. struct drm_i915_private *dev_priv = dev->dev_private;
  899. struct drm_crtc *crtc = encoder->crtc;
  900. struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
  901. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  902. u32 sdvox;
  903. struct intel_sdvo_in_out_map in_out;
  904. struct intel_sdvo_dtd input_dtd, output_dtd;
  905. int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
  906. int rate;
  907. if (!mode)
  908. return;
  909. /* First, set the input mapping for the first input to our controlled
  910. * output. This is only correct if we're a single-input device, in
  911. * which case the first input is the output from the appropriate SDVO
  912. * channel on the motherboard. In a two-input device, the first input
  913. * will be SDVOB and the second SDVOC.
  914. */
  915. in_out.in0 = intel_sdvo->attached_output;
  916. in_out.in1 = 0;
  917. intel_sdvo_set_value(intel_sdvo,
  918. SDVO_CMD_SET_IN_OUT_MAP,
  919. &in_out, sizeof(in_out));
  920. /* Set the output timings to the screen */
  921. if (!intel_sdvo_set_target_output(intel_sdvo,
  922. intel_sdvo->attached_output))
  923. return;
  924. /* lvds has a special fixed output timing. */
  925. if (intel_sdvo->is_lvds)
  926. intel_sdvo_get_dtd_from_mode(&output_dtd,
  927. intel_sdvo->sdvo_lvds_fixed_mode);
  928. else
  929. intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
  930. if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
  931. DRM_INFO("Setting output timings on %s failed\n",
  932. SDVO_NAME(intel_sdvo));
  933. /* Set the input timing to the screen. Assume always input 0. */
  934. if (!intel_sdvo_set_target_input(intel_sdvo))
  935. return;
  936. if (intel_sdvo->has_hdmi_monitor) {
  937. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
  938. intel_sdvo_set_colorimetry(intel_sdvo,
  939. SDVO_COLORIMETRY_RGB256);
  940. intel_sdvo_set_avi_infoframe(intel_sdvo);
  941. } else
  942. intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
  943. if (intel_sdvo->is_tv &&
  944. !intel_sdvo_set_tv_format(intel_sdvo))
  945. return;
  946. /* We have tried to get input timing in mode_fixup, and filled into
  947. * adjusted_mode.
  948. */
  949. intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
  950. if (intel_sdvo->is_tv || intel_sdvo->is_lvds)
  951. input_dtd.part2.sdvo_flags = intel_sdvo->dtd_sdvo_flags;
  952. if (!intel_sdvo_set_input_timing(intel_sdvo, &input_dtd))
  953. DRM_INFO("Setting input timings on %s failed\n",
  954. SDVO_NAME(intel_sdvo));
  955. switch (pixel_multiplier) {
  956. default:
  957. case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
  958. case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
  959. case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
  960. }
  961. if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
  962. return;
  963. /* Set the SDVO control regs. */
  964. if (INTEL_INFO(dev)->gen >= 4) {
  965. /* The real mode polarity is set by the SDVO commands, using
  966. * struct intel_sdvo_dtd. */
  967. sdvox = SDVO_VSYNC_ACTIVE_HIGH | SDVO_HSYNC_ACTIVE_HIGH;
  968. if (intel_sdvo->is_hdmi)
  969. sdvox |= intel_sdvo->color_range;
  970. if (INTEL_INFO(dev)->gen < 5)
  971. sdvox |= SDVO_BORDER_ENABLE;
  972. } else {
  973. sdvox = I915_READ(intel_sdvo->sdvo_reg);
  974. switch (intel_sdvo->sdvo_reg) {
  975. case SDVOB:
  976. sdvox &= SDVOB_PRESERVE_MASK;
  977. break;
  978. case SDVOC:
  979. sdvox &= SDVOC_PRESERVE_MASK;
  980. break;
  981. }
  982. sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
  983. }
  984. if (INTEL_PCH_TYPE(dev) >= PCH_CPT)
  985. sdvox |= TRANSCODER_CPT(intel_crtc->pipe);
  986. else
  987. sdvox |= TRANSCODER(intel_crtc->pipe);
  988. if (intel_sdvo->has_hdmi_audio)
  989. sdvox |= SDVO_AUDIO_ENABLE;
  990. if (INTEL_INFO(dev)->gen >= 4) {
  991. /* done in crtc_mode_set as the dpll_md reg must be written early */
  992. } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
  993. /* done in crtc_mode_set as it lives inside the dpll register */
  994. } else {
  995. sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
  996. }
  997. if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
  998. INTEL_INFO(dev)->gen < 5)
  999. sdvox |= SDVO_STALL_SELECT;
  1000. intel_sdvo_write_sdvox(intel_sdvo, sdvox);
  1001. }
  1002. static bool intel_sdvo_connector_get_hw_state(struct intel_connector *connector)
  1003. {
  1004. struct intel_sdvo_connector *intel_sdvo_connector =
  1005. to_intel_sdvo_connector(&connector->base);
  1006. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(&connector->base);
  1007. u16 active_outputs;
  1008. intel_sdvo_get_active_outputs(intel_sdvo, &active_outputs);
  1009. if (active_outputs & intel_sdvo_connector->output_flag)
  1010. return true;
  1011. else
  1012. return false;
  1013. }
  1014. static bool intel_sdvo_get_hw_state(struct intel_encoder *encoder,
  1015. enum pipe *pipe)
  1016. {
  1017. struct drm_device *dev = encoder->base.dev;
  1018. struct drm_i915_private *dev_priv = dev->dev_private;
  1019. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1020. u32 tmp;
  1021. tmp = I915_READ(intel_sdvo->sdvo_reg);
  1022. if (!(tmp & SDVO_ENABLE))
  1023. return false;
  1024. if (HAS_PCH_CPT(dev))
  1025. *pipe = PORT_TO_PIPE_CPT(tmp);
  1026. else
  1027. *pipe = PORT_TO_PIPE(tmp);
  1028. return true;
  1029. }
  1030. static void intel_disable_sdvo(struct intel_encoder *encoder)
  1031. {
  1032. struct drm_i915_private *dev_priv = encoder->base.dev->dev_private;
  1033. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1034. u32 temp;
  1035. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1036. if (0)
  1037. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1038. DRM_MODE_DPMS_OFF);
  1039. temp = I915_READ(intel_sdvo->sdvo_reg);
  1040. if ((temp & SDVO_ENABLE) != 0) {
  1041. intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
  1042. }
  1043. }
  1044. static void intel_enable_sdvo(struct intel_encoder *encoder)
  1045. {
  1046. struct drm_device *dev = encoder->base.dev;
  1047. struct drm_i915_private *dev_priv = dev->dev_private;
  1048. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1049. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc);
  1050. u32 temp;
  1051. bool input1, input2;
  1052. int i;
  1053. u8 status;
  1054. temp = I915_READ(intel_sdvo->sdvo_reg);
  1055. if ((temp & SDVO_ENABLE) == 0)
  1056. intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
  1057. for (i = 0; i < 2; i++)
  1058. intel_wait_for_vblank(dev, intel_crtc->pipe);
  1059. status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
  1060. /* Warn if the device reported failure to sync.
  1061. * A lot of SDVO devices fail to notify of sync, but it's
  1062. * a given it the status is a success, we succeeded.
  1063. */
  1064. if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
  1065. DRM_DEBUG_KMS("First %s output reported failure to "
  1066. "sync\n", SDVO_NAME(intel_sdvo));
  1067. }
  1068. if (0)
  1069. intel_sdvo_set_encoder_power_state(intel_sdvo,
  1070. DRM_MODE_DPMS_ON);
  1071. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1072. }
  1073. static void intel_sdvo_dpms(struct drm_connector *connector, int mode)
  1074. {
  1075. struct drm_crtc *crtc;
  1076. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1077. /* dvo supports only 2 dpms states. */
  1078. if (mode != DRM_MODE_DPMS_ON)
  1079. mode = DRM_MODE_DPMS_OFF;
  1080. if (mode == connector->dpms)
  1081. return;
  1082. connector->dpms = mode;
  1083. /* Only need to change hw state when actually enabled */
  1084. crtc = intel_sdvo->base.base.crtc;
  1085. if (!crtc) {
  1086. intel_sdvo->base.connectors_active = false;
  1087. return;
  1088. }
  1089. if (mode != DRM_MODE_DPMS_ON) {
  1090. intel_sdvo_set_active_outputs(intel_sdvo, 0);
  1091. if (0)
  1092. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1093. intel_sdvo->base.connectors_active = false;
  1094. intel_crtc_update_dpms(crtc);
  1095. } else {
  1096. intel_sdvo->base.connectors_active = true;
  1097. intel_crtc_update_dpms(crtc);
  1098. if (0)
  1099. intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
  1100. intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
  1101. }
  1102. intel_modeset_check_state(connector->dev);
  1103. }
  1104. static int intel_sdvo_mode_valid(struct drm_connector *connector,
  1105. struct drm_display_mode *mode)
  1106. {
  1107. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1108. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  1109. return MODE_NO_DBLESCAN;
  1110. if (intel_sdvo->pixel_clock_min > mode->clock)
  1111. return MODE_CLOCK_LOW;
  1112. if (intel_sdvo->pixel_clock_max < mode->clock)
  1113. return MODE_CLOCK_HIGH;
  1114. if (intel_sdvo->is_lvds) {
  1115. if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
  1116. return MODE_PANEL;
  1117. if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
  1118. return MODE_PANEL;
  1119. }
  1120. return MODE_OK;
  1121. }
  1122. static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
  1123. {
  1124. BUILD_BUG_ON(sizeof(*caps) != 8);
  1125. if (!intel_sdvo_get_value(intel_sdvo,
  1126. SDVO_CMD_GET_DEVICE_CAPS,
  1127. caps, sizeof(*caps)))
  1128. return false;
  1129. DRM_DEBUG_KMS("SDVO capabilities:\n"
  1130. " vendor_id: %d\n"
  1131. " device_id: %d\n"
  1132. " device_rev_id: %d\n"
  1133. " sdvo_version_major: %d\n"
  1134. " sdvo_version_minor: %d\n"
  1135. " sdvo_inputs_mask: %d\n"
  1136. " smooth_scaling: %d\n"
  1137. " sharp_scaling: %d\n"
  1138. " up_scaling: %d\n"
  1139. " down_scaling: %d\n"
  1140. " stall_support: %d\n"
  1141. " output_flags: %d\n",
  1142. caps->vendor_id,
  1143. caps->device_id,
  1144. caps->device_rev_id,
  1145. caps->sdvo_version_major,
  1146. caps->sdvo_version_minor,
  1147. caps->sdvo_inputs_mask,
  1148. caps->smooth_scaling,
  1149. caps->sharp_scaling,
  1150. caps->up_scaling,
  1151. caps->down_scaling,
  1152. caps->stall_support,
  1153. caps->output_flags);
  1154. return true;
  1155. }
  1156. static uint16_t intel_sdvo_get_hotplug_support(struct intel_sdvo *intel_sdvo)
  1157. {
  1158. struct drm_device *dev = intel_sdvo->base.base.dev;
  1159. uint16_t hotplug;
  1160. /* HW Erratum: SDVO Hotplug is broken on all i945G chips, there's noise
  1161. * on the line. */
  1162. if (IS_I945G(dev) || IS_I945GM(dev))
  1163. return 0;
  1164. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
  1165. &hotplug, sizeof(hotplug)))
  1166. return 0;
  1167. return hotplug;
  1168. }
  1169. static void intel_sdvo_enable_hotplug(struct intel_encoder *encoder)
  1170. {
  1171. struct intel_sdvo *intel_sdvo = to_intel_sdvo(&encoder->base);
  1172. intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG,
  1173. &intel_sdvo->hotplug_active, 2);
  1174. }
  1175. static bool
  1176. intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
  1177. {
  1178. /* Is there more than one type of output? */
  1179. return hweight16(intel_sdvo->caps.output_flags) > 1;
  1180. }
  1181. static struct edid *
  1182. intel_sdvo_get_edid(struct drm_connector *connector)
  1183. {
  1184. struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
  1185. return drm_get_edid(connector, &sdvo->ddc);
  1186. }
  1187. /* Mac mini hack -- use the same DDC as the analog connector */
  1188. static struct edid *
  1189. intel_sdvo_get_analog_edid(struct drm_connector *connector)
  1190. {
  1191. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1192. return drm_get_edid(connector,
  1193. intel_gmbus_get_adapter(dev_priv,
  1194. dev_priv->crt_ddc_pin));
  1195. }
  1196. static enum drm_connector_status
  1197. intel_sdvo_tmds_sink_detect(struct drm_connector *connector)
  1198. {
  1199. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1200. enum drm_connector_status status;
  1201. struct edid *edid;
  1202. edid = intel_sdvo_get_edid(connector);
  1203. if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
  1204. u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
  1205. /*
  1206. * Don't use the 1 as the argument of DDC bus switch to get
  1207. * the EDID. It is used for SDVO SPD ROM.
  1208. */
  1209. for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
  1210. intel_sdvo->ddc_bus = ddc;
  1211. edid = intel_sdvo_get_edid(connector);
  1212. if (edid)
  1213. break;
  1214. }
  1215. /*
  1216. * If we found the EDID on the other bus,
  1217. * assume that is the correct DDC bus.
  1218. */
  1219. if (edid == NULL)
  1220. intel_sdvo->ddc_bus = saved_ddc;
  1221. }
  1222. /*
  1223. * When there is no edid and no monitor is connected with VGA
  1224. * port, try to use the CRT ddc to read the EDID for DVI-connector.
  1225. */
  1226. if (edid == NULL)
  1227. edid = intel_sdvo_get_analog_edid(connector);
  1228. status = connector_status_unknown;
  1229. if (edid != NULL) {
  1230. /* DDC bus is shared, match EDID to connector type */
  1231. if (edid->input & DRM_EDID_INPUT_DIGITAL) {
  1232. status = connector_status_connected;
  1233. if (intel_sdvo->is_hdmi) {
  1234. intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
  1235. intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
  1236. }
  1237. } else
  1238. status = connector_status_disconnected;
  1239. kfree(edid);
  1240. }
  1241. if (status == connector_status_connected) {
  1242. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1243. if (intel_sdvo_connector->force_audio != HDMI_AUDIO_AUTO)
  1244. intel_sdvo->has_hdmi_audio = (intel_sdvo_connector->force_audio == HDMI_AUDIO_ON);
  1245. }
  1246. return status;
  1247. }
  1248. static bool
  1249. intel_sdvo_connector_matches_edid(struct intel_sdvo_connector *sdvo,
  1250. struct edid *edid)
  1251. {
  1252. bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
  1253. bool connector_is_digital = !!IS_DIGITAL(sdvo);
  1254. DRM_DEBUG_KMS("connector_is_digital? %d, monitor_is_digital? %d\n",
  1255. connector_is_digital, monitor_is_digital);
  1256. return connector_is_digital == monitor_is_digital;
  1257. }
  1258. static enum drm_connector_status
  1259. intel_sdvo_detect(struct drm_connector *connector, bool force)
  1260. {
  1261. uint16_t response;
  1262. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1263. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1264. enum drm_connector_status ret;
  1265. if (!intel_sdvo_write_cmd(intel_sdvo,
  1266. SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
  1267. return connector_status_unknown;
  1268. /* add 30ms delay when the output type might be TV */
  1269. if (intel_sdvo->caps.output_flags & SDVO_TV_MASK)
  1270. msleep(30);
  1271. if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
  1272. return connector_status_unknown;
  1273. DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
  1274. response & 0xff, response >> 8,
  1275. intel_sdvo_connector->output_flag);
  1276. if (response == 0)
  1277. return connector_status_disconnected;
  1278. intel_sdvo->attached_output = response;
  1279. intel_sdvo->has_hdmi_monitor = false;
  1280. intel_sdvo->has_hdmi_audio = false;
  1281. if ((intel_sdvo_connector->output_flag & response) == 0)
  1282. ret = connector_status_disconnected;
  1283. else if (IS_TMDS(intel_sdvo_connector))
  1284. ret = intel_sdvo_tmds_sink_detect(connector);
  1285. else {
  1286. struct edid *edid;
  1287. /* if we have an edid check it matches the connection */
  1288. edid = intel_sdvo_get_edid(connector);
  1289. if (edid == NULL)
  1290. edid = intel_sdvo_get_analog_edid(connector);
  1291. if (edid != NULL) {
  1292. if (intel_sdvo_connector_matches_edid(intel_sdvo_connector,
  1293. edid))
  1294. ret = connector_status_connected;
  1295. else
  1296. ret = connector_status_disconnected;
  1297. kfree(edid);
  1298. } else
  1299. ret = connector_status_connected;
  1300. }
  1301. /* May update encoder flag for like clock for SDVO TV, etc.*/
  1302. if (ret == connector_status_connected) {
  1303. intel_sdvo->is_tv = false;
  1304. intel_sdvo->is_lvds = false;
  1305. intel_sdvo->base.needs_tv_clock = false;
  1306. if (response & SDVO_TV_MASK) {
  1307. intel_sdvo->is_tv = true;
  1308. intel_sdvo->base.needs_tv_clock = true;
  1309. }
  1310. if (response & SDVO_LVDS_MASK)
  1311. intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
  1312. }
  1313. return ret;
  1314. }
  1315. static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
  1316. {
  1317. struct edid *edid;
  1318. /* set the bus switch and get the modes */
  1319. edid = intel_sdvo_get_edid(connector);
  1320. /*
  1321. * Mac mini hack. On this device, the DVI-I connector shares one DDC
  1322. * link between analog and digital outputs. So, if the regular SDVO
  1323. * DDC fails, check to see if the analog output is disconnected, in
  1324. * which case we'll look there for the digital DDC data.
  1325. */
  1326. if (edid == NULL)
  1327. edid = intel_sdvo_get_analog_edid(connector);
  1328. if (edid != NULL) {
  1329. if (intel_sdvo_connector_matches_edid(to_intel_sdvo_connector(connector),
  1330. edid)) {
  1331. drm_mode_connector_update_edid_property(connector, edid);
  1332. drm_add_edid_modes(connector, edid);
  1333. }
  1334. kfree(edid);
  1335. }
  1336. }
  1337. /*
  1338. * Set of SDVO TV modes.
  1339. * Note! This is in reply order (see loop in get_tv_modes).
  1340. * XXX: all 60Hz refresh?
  1341. */
  1342. static const struct drm_display_mode sdvo_tv_modes[] = {
  1343. { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
  1344. 416, 0, 200, 201, 232, 233, 0,
  1345. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1346. { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
  1347. 416, 0, 240, 241, 272, 273, 0,
  1348. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1349. { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
  1350. 496, 0, 300, 301, 332, 333, 0,
  1351. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1352. { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
  1353. 736, 0, 350, 351, 382, 383, 0,
  1354. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1355. { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
  1356. 736, 0, 400, 401, 432, 433, 0,
  1357. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1358. { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
  1359. 736, 0, 480, 481, 512, 513, 0,
  1360. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1361. { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
  1362. 800, 0, 480, 481, 512, 513, 0,
  1363. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1364. { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
  1365. 800, 0, 576, 577, 608, 609, 0,
  1366. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1367. { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
  1368. 816, 0, 350, 351, 382, 383, 0,
  1369. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1370. { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
  1371. 816, 0, 400, 401, 432, 433, 0,
  1372. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1373. { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
  1374. 816, 0, 480, 481, 512, 513, 0,
  1375. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1376. { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
  1377. 816, 0, 540, 541, 572, 573, 0,
  1378. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1379. { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
  1380. 816, 0, 576, 577, 608, 609, 0,
  1381. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1382. { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
  1383. 864, 0, 576, 577, 608, 609, 0,
  1384. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1385. { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
  1386. 896, 0, 600, 601, 632, 633, 0,
  1387. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1388. { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
  1389. 928, 0, 624, 625, 656, 657, 0,
  1390. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1391. { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
  1392. 1016, 0, 766, 767, 798, 799, 0,
  1393. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1394. { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
  1395. 1120, 0, 768, 769, 800, 801, 0,
  1396. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1397. { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
  1398. 1376, 0, 1024, 1025, 1056, 1057, 0,
  1399. DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
  1400. };
  1401. static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
  1402. {
  1403. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1404. struct intel_sdvo_sdtv_resolution_request tv_res;
  1405. uint32_t reply = 0, format_map = 0;
  1406. int i;
  1407. /* Read the list of supported input resolutions for the selected TV
  1408. * format.
  1409. */
  1410. format_map = 1 << intel_sdvo->tv_format_index;
  1411. memcpy(&tv_res, &format_map,
  1412. min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
  1413. if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
  1414. return;
  1415. BUILD_BUG_ON(sizeof(tv_res) != 3);
  1416. if (!intel_sdvo_write_cmd(intel_sdvo,
  1417. SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
  1418. &tv_res, sizeof(tv_res)))
  1419. return;
  1420. if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
  1421. return;
  1422. for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
  1423. if (reply & (1 << i)) {
  1424. struct drm_display_mode *nmode;
  1425. nmode = drm_mode_duplicate(connector->dev,
  1426. &sdvo_tv_modes[i]);
  1427. if (nmode)
  1428. drm_mode_probed_add(connector, nmode);
  1429. }
  1430. }
  1431. static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
  1432. {
  1433. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1434. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1435. struct drm_display_mode *newmode;
  1436. /*
  1437. * Attempt to get the mode list from DDC.
  1438. * Assume that the preferred modes are
  1439. * arranged in priority order.
  1440. */
  1441. intel_ddc_get_modes(connector, intel_sdvo->i2c);
  1442. if (list_empty(&connector->probed_modes) == false)
  1443. goto end;
  1444. /* Fetch modes from VBT */
  1445. if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
  1446. newmode = drm_mode_duplicate(connector->dev,
  1447. dev_priv->sdvo_lvds_vbt_mode);
  1448. if (newmode != NULL) {
  1449. /* Guarantee the mode is preferred */
  1450. newmode->type = (DRM_MODE_TYPE_PREFERRED |
  1451. DRM_MODE_TYPE_DRIVER);
  1452. drm_mode_probed_add(connector, newmode);
  1453. }
  1454. }
  1455. end:
  1456. list_for_each_entry(newmode, &connector->probed_modes, head) {
  1457. if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
  1458. intel_sdvo->sdvo_lvds_fixed_mode =
  1459. drm_mode_duplicate(connector->dev, newmode);
  1460. intel_sdvo->is_lvds = true;
  1461. break;
  1462. }
  1463. }
  1464. }
  1465. static int intel_sdvo_get_modes(struct drm_connector *connector)
  1466. {
  1467. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1468. if (IS_TV(intel_sdvo_connector))
  1469. intel_sdvo_get_tv_modes(connector);
  1470. else if (IS_LVDS(intel_sdvo_connector))
  1471. intel_sdvo_get_lvds_modes(connector);
  1472. else
  1473. intel_sdvo_get_ddc_modes(connector);
  1474. return !list_empty(&connector->probed_modes);
  1475. }
  1476. static void
  1477. intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
  1478. {
  1479. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1480. struct drm_device *dev = connector->dev;
  1481. if (intel_sdvo_connector->left)
  1482. drm_property_destroy(dev, intel_sdvo_connector->left);
  1483. if (intel_sdvo_connector->right)
  1484. drm_property_destroy(dev, intel_sdvo_connector->right);
  1485. if (intel_sdvo_connector->top)
  1486. drm_property_destroy(dev, intel_sdvo_connector->top);
  1487. if (intel_sdvo_connector->bottom)
  1488. drm_property_destroy(dev, intel_sdvo_connector->bottom);
  1489. if (intel_sdvo_connector->hpos)
  1490. drm_property_destroy(dev, intel_sdvo_connector->hpos);
  1491. if (intel_sdvo_connector->vpos)
  1492. drm_property_destroy(dev, intel_sdvo_connector->vpos);
  1493. if (intel_sdvo_connector->saturation)
  1494. drm_property_destroy(dev, intel_sdvo_connector->saturation);
  1495. if (intel_sdvo_connector->contrast)
  1496. drm_property_destroy(dev, intel_sdvo_connector->contrast);
  1497. if (intel_sdvo_connector->hue)
  1498. drm_property_destroy(dev, intel_sdvo_connector->hue);
  1499. if (intel_sdvo_connector->sharpness)
  1500. drm_property_destroy(dev, intel_sdvo_connector->sharpness);
  1501. if (intel_sdvo_connector->flicker_filter)
  1502. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
  1503. if (intel_sdvo_connector->flicker_filter_2d)
  1504. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
  1505. if (intel_sdvo_connector->flicker_filter_adaptive)
  1506. drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
  1507. if (intel_sdvo_connector->tv_luma_filter)
  1508. drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
  1509. if (intel_sdvo_connector->tv_chroma_filter)
  1510. drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
  1511. if (intel_sdvo_connector->dot_crawl)
  1512. drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
  1513. if (intel_sdvo_connector->brightness)
  1514. drm_property_destroy(dev, intel_sdvo_connector->brightness);
  1515. }
  1516. static void intel_sdvo_destroy(struct drm_connector *connector)
  1517. {
  1518. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1519. if (intel_sdvo_connector->tv_format)
  1520. drm_property_destroy(connector->dev,
  1521. intel_sdvo_connector->tv_format);
  1522. intel_sdvo_destroy_enhance_property(connector);
  1523. drm_sysfs_connector_remove(connector);
  1524. drm_connector_cleanup(connector);
  1525. kfree(connector);
  1526. }
  1527. static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
  1528. {
  1529. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1530. struct edid *edid;
  1531. bool has_audio = false;
  1532. if (!intel_sdvo->is_hdmi)
  1533. return false;
  1534. edid = intel_sdvo_get_edid(connector);
  1535. if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
  1536. has_audio = drm_detect_monitor_audio(edid);
  1537. kfree(edid);
  1538. return has_audio;
  1539. }
  1540. static int
  1541. intel_sdvo_set_property(struct drm_connector *connector,
  1542. struct drm_property *property,
  1543. uint64_t val)
  1544. {
  1545. struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
  1546. struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
  1547. struct drm_i915_private *dev_priv = connector->dev->dev_private;
  1548. uint16_t temp_value;
  1549. uint8_t cmd;
  1550. int ret;
  1551. ret = drm_connector_property_set_value(connector, property, val);
  1552. if (ret)
  1553. return ret;
  1554. if (property == dev_priv->force_audio_property) {
  1555. int i = val;
  1556. bool has_audio;
  1557. if (i == intel_sdvo_connector->force_audio)
  1558. return 0;
  1559. intel_sdvo_connector->force_audio = i;
  1560. if (i == HDMI_AUDIO_AUTO)
  1561. has_audio = intel_sdvo_detect_hdmi_audio(connector);
  1562. else
  1563. has_audio = (i == HDMI_AUDIO_ON);
  1564. if (has_audio == intel_sdvo->has_hdmi_audio)
  1565. return 0;
  1566. intel_sdvo->has_hdmi_audio = has_audio;
  1567. goto done;
  1568. }
  1569. if (property == dev_priv->broadcast_rgb_property) {
  1570. if (val == !!intel_sdvo->color_range)
  1571. return 0;
  1572. intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
  1573. goto done;
  1574. }
  1575. #define CHECK_PROPERTY(name, NAME) \
  1576. if (intel_sdvo_connector->name == property) { \
  1577. if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
  1578. if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
  1579. cmd = SDVO_CMD_SET_##NAME; \
  1580. intel_sdvo_connector->cur_##name = temp_value; \
  1581. goto set_value; \
  1582. }
  1583. if (property == intel_sdvo_connector->tv_format) {
  1584. if (val >= TV_FORMAT_NUM)
  1585. return -EINVAL;
  1586. if (intel_sdvo->tv_format_index ==
  1587. intel_sdvo_connector->tv_format_supported[val])
  1588. return 0;
  1589. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
  1590. goto done;
  1591. } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
  1592. temp_value = val;
  1593. if (intel_sdvo_connector->left == property) {
  1594. drm_connector_property_set_value(connector,
  1595. intel_sdvo_connector->right, val);
  1596. if (intel_sdvo_connector->left_margin == temp_value)
  1597. return 0;
  1598. intel_sdvo_connector->left_margin = temp_value;
  1599. intel_sdvo_connector->right_margin = temp_value;
  1600. temp_value = intel_sdvo_connector->max_hscan -
  1601. intel_sdvo_connector->left_margin;
  1602. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1603. goto set_value;
  1604. } else if (intel_sdvo_connector->right == property) {
  1605. drm_connector_property_set_value(connector,
  1606. intel_sdvo_connector->left, val);
  1607. if (intel_sdvo_connector->right_margin == temp_value)
  1608. return 0;
  1609. intel_sdvo_connector->left_margin = temp_value;
  1610. intel_sdvo_connector->right_margin = temp_value;
  1611. temp_value = intel_sdvo_connector->max_hscan -
  1612. intel_sdvo_connector->left_margin;
  1613. cmd = SDVO_CMD_SET_OVERSCAN_H;
  1614. goto set_value;
  1615. } else if (intel_sdvo_connector->top == property) {
  1616. drm_connector_property_set_value(connector,
  1617. intel_sdvo_connector->bottom, val);
  1618. if (intel_sdvo_connector->top_margin == temp_value)
  1619. return 0;
  1620. intel_sdvo_connector->top_margin = temp_value;
  1621. intel_sdvo_connector->bottom_margin = temp_value;
  1622. temp_value = intel_sdvo_connector->max_vscan -
  1623. intel_sdvo_connector->top_margin;
  1624. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1625. goto set_value;
  1626. } else if (intel_sdvo_connector->bottom == property) {
  1627. drm_connector_property_set_value(connector,
  1628. intel_sdvo_connector->top, val);
  1629. if (intel_sdvo_connector->bottom_margin == temp_value)
  1630. return 0;
  1631. intel_sdvo_connector->top_margin = temp_value;
  1632. intel_sdvo_connector->bottom_margin = temp_value;
  1633. temp_value = intel_sdvo_connector->max_vscan -
  1634. intel_sdvo_connector->top_margin;
  1635. cmd = SDVO_CMD_SET_OVERSCAN_V;
  1636. goto set_value;
  1637. }
  1638. CHECK_PROPERTY(hpos, HPOS)
  1639. CHECK_PROPERTY(vpos, VPOS)
  1640. CHECK_PROPERTY(saturation, SATURATION)
  1641. CHECK_PROPERTY(contrast, CONTRAST)
  1642. CHECK_PROPERTY(hue, HUE)
  1643. CHECK_PROPERTY(brightness, BRIGHTNESS)
  1644. CHECK_PROPERTY(sharpness, SHARPNESS)
  1645. CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
  1646. CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
  1647. CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
  1648. CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
  1649. CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
  1650. CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
  1651. }
  1652. return -EINVAL; /* unknown property */
  1653. set_value:
  1654. if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
  1655. return -EIO;
  1656. done:
  1657. if (intel_sdvo->base.base.crtc) {
  1658. struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
  1659. intel_set_mode(crtc, &crtc->mode,
  1660. crtc->x, crtc->y, crtc->fb);
  1661. }
  1662. return 0;
  1663. #undef CHECK_PROPERTY
  1664. }
  1665. static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
  1666. .mode_fixup = intel_sdvo_mode_fixup,
  1667. .mode_set = intel_sdvo_mode_set,
  1668. .disable = intel_encoder_noop,
  1669. };
  1670. static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
  1671. .dpms = intel_sdvo_dpms,
  1672. .detect = intel_sdvo_detect,
  1673. .fill_modes = drm_helper_probe_single_connector_modes,
  1674. .set_property = intel_sdvo_set_property,
  1675. .destroy = intel_sdvo_destroy,
  1676. };
  1677. static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
  1678. .get_modes = intel_sdvo_get_modes,
  1679. .mode_valid = intel_sdvo_mode_valid,
  1680. .best_encoder = intel_best_encoder,
  1681. };
  1682. static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
  1683. {
  1684. struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
  1685. if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
  1686. drm_mode_destroy(encoder->dev,
  1687. intel_sdvo->sdvo_lvds_fixed_mode);
  1688. i2c_del_adapter(&intel_sdvo->ddc);
  1689. intel_encoder_destroy(encoder);
  1690. }
  1691. static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
  1692. .destroy = intel_sdvo_enc_destroy,
  1693. };
  1694. static void
  1695. intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
  1696. {
  1697. uint16_t mask = 0;
  1698. unsigned int num_bits;
  1699. /* Make a mask of outputs less than or equal to our own priority in the
  1700. * list.
  1701. */
  1702. switch (sdvo->controlled_output) {
  1703. case SDVO_OUTPUT_LVDS1:
  1704. mask |= SDVO_OUTPUT_LVDS1;
  1705. case SDVO_OUTPUT_LVDS0:
  1706. mask |= SDVO_OUTPUT_LVDS0;
  1707. case SDVO_OUTPUT_TMDS1:
  1708. mask |= SDVO_OUTPUT_TMDS1;
  1709. case SDVO_OUTPUT_TMDS0:
  1710. mask |= SDVO_OUTPUT_TMDS0;
  1711. case SDVO_OUTPUT_RGB1:
  1712. mask |= SDVO_OUTPUT_RGB1;
  1713. case SDVO_OUTPUT_RGB0:
  1714. mask |= SDVO_OUTPUT_RGB0;
  1715. break;
  1716. }
  1717. /* Count bits to find what number we are in the priority list. */
  1718. mask &= sdvo->caps.output_flags;
  1719. num_bits = hweight16(mask);
  1720. /* If more than 3 outputs, default to DDC bus 3 for now. */
  1721. if (num_bits > 3)
  1722. num_bits = 3;
  1723. /* Corresponds to SDVO_CONTROL_BUS_DDCx */
  1724. sdvo->ddc_bus = 1 << num_bits;
  1725. }
  1726. /**
  1727. * Choose the appropriate DDC bus for control bus switch command for this
  1728. * SDVO output based on the controlled output.
  1729. *
  1730. * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
  1731. * outputs, then LVDS outputs.
  1732. */
  1733. static void
  1734. intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
  1735. struct intel_sdvo *sdvo, u32 reg)
  1736. {
  1737. struct sdvo_device_mapping *mapping;
  1738. if (sdvo->is_sdvob)
  1739. mapping = &(dev_priv->sdvo_mappings[0]);
  1740. else
  1741. mapping = &(dev_priv->sdvo_mappings[1]);
  1742. if (mapping->initialized)
  1743. sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
  1744. else
  1745. intel_sdvo_guess_ddc_bus(sdvo);
  1746. }
  1747. static void
  1748. intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
  1749. struct intel_sdvo *sdvo, u32 reg)
  1750. {
  1751. struct sdvo_device_mapping *mapping;
  1752. u8 pin;
  1753. if (sdvo->is_sdvob)
  1754. mapping = &dev_priv->sdvo_mappings[0];
  1755. else
  1756. mapping = &dev_priv->sdvo_mappings[1];
  1757. pin = GMBUS_PORT_DPB;
  1758. if (mapping->initialized)
  1759. pin = mapping->i2c_pin;
  1760. if (intel_gmbus_is_port_valid(pin)) {
  1761. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, pin);
  1762. intel_gmbus_set_speed(sdvo->i2c, GMBUS_RATE_1MHZ);
  1763. intel_gmbus_force_bit(sdvo->i2c, true);
  1764. } else {
  1765. sdvo->i2c = intel_gmbus_get_adapter(dev_priv, GMBUS_PORT_DPB);
  1766. }
  1767. }
  1768. static bool
  1769. intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
  1770. {
  1771. return intel_sdvo_check_supp_encode(intel_sdvo);
  1772. }
  1773. static u8
  1774. intel_sdvo_get_slave_addr(struct drm_device *dev, struct intel_sdvo *sdvo)
  1775. {
  1776. struct drm_i915_private *dev_priv = dev->dev_private;
  1777. struct sdvo_device_mapping *my_mapping, *other_mapping;
  1778. if (sdvo->is_sdvob) {
  1779. my_mapping = &dev_priv->sdvo_mappings[0];
  1780. other_mapping = &dev_priv->sdvo_mappings[1];
  1781. } else {
  1782. my_mapping = &dev_priv->sdvo_mappings[1];
  1783. other_mapping = &dev_priv->sdvo_mappings[0];
  1784. }
  1785. /* If the BIOS described our SDVO device, take advantage of it. */
  1786. if (my_mapping->slave_addr)
  1787. return my_mapping->slave_addr;
  1788. /* If the BIOS only described a different SDVO device, use the
  1789. * address that it isn't using.
  1790. */
  1791. if (other_mapping->slave_addr) {
  1792. if (other_mapping->slave_addr == 0x70)
  1793. return 0x72;
  1794. else
  1795. return 0x70;
  1796. }
  1797. /* No SDVO device info is found for another DVO port,
  1798. * so use mapping assumption we had before BIOS parsing.
  1799. */
  1800. if (sdvo->is_sdvob)
  1801. return 0x70;
  1802. else
  1803. return 0x72;
  1804. }
  1805. static void
  1806. intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
  1807. struct intel_sdvo *encoder)
  1808. {
  1809. drm_connector_init(encoder->base.base.dev,
  1810. &connector->base.base,
  1811. &intel_sdvo_connector_funcs,
  1812. connector->base.base.connector_type);
  1813. drm_connector_helper_add(&connector->base.base,
  1814. &intel_sdvo_connector_helper_funcs);
  1815. connector->base.base.interlace_allowed = 1;
  1816. connector->base.base.doublescan_allowed = 0;
  1817. connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
  1818. connector->base.get_hw_state = intel_sdvo_connector_get_hw_state;
  1819. intel_connector_attach_encoder(&connector->base, &encoder->base);
  1820. drm_sysfs_connector_add(&connector->base.base);
  1821. }
  1822. static void
  1823. intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
  1824. {
  1825. struct drm_device *dev = connector->base.base.dev;
  1826. intel_attach_force_audio_property(&connector->base.base);
  1827. if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
  1828. intel_attach_broadcast_rgb_property(&connector->base.base);
  1829. }
  1830. static bool
  1831. intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
  1832. {
  1833. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1834. struct drm_connector *connector;
  1835. struct intel_encoder *intel_encoder = to_intel_encoder(encoder);
  1836. struct intel_connector *intel_connector;
  1837. struct intel_sdvo_connector *intel_sdvo_connector;
  1838. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1839. if (!intel_sdvo_connector)
  1840. return false;
  1841. if (device == 0) {
  1842. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
  1843. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
  1844. } else if (device == 1) {
  1845. intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
  1846. intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
  1847. }
  1848. intel_connector = &intel_sdvo_connector->base;
  1849. connector = &intel_connector->base;
  1850. if (intel_sdvo_get_hotplug_support(intel_sdvo) &
  1851. intel_sdvo_connector->output_flag) {
  1852. connector->polled = DRM_CONNECTOR_POLL_HPD;
  1853. intel_sdvo->hotplug_active |= intel_sdvo_connector->output_flag;
  1854. /* Some SDVO devices have one-shot hotplug interrupts.
  1855. * Ensure that they get re-enabled when an interrupt happens.
  1856. */
  1857. intel_encoder->hot_plug = intel_sdvo_enable_hotplug;
  1858. intel_sdvo_enable_hotplug(intel_encoder);
  1859. } else {
  1860. connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
  1861. }
  1862. encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
  1863. connector->connector_type = DRM_MODE_CONNECTOR_DVID;
  1864. if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
  1865. connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
  1866. intel_sdvo->is_hdmi = true;
  1867. }
  1868. intel_sdvo->base.cloneable = true;
  1869. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1870. if (intel_sdvo->is_hdmi)
  1871. intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
  1872. return true;
  1873. }
  1874. static bool
  1875. intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
  1876. {
  1877. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1878. struct drm_connector *connector;
  1879. struct intel_connector *intel_connector;
  1880. struct intel_sdvo_connector *intel_sdvo_connector;
  1881. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1882. if (!intel_sdvo_connector)
  1883. return false;
  1884. intel_connector = &intel_sdvo_connector->base;
  1885. connector = &intel_connector->base;
  1886. encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
  1887. connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
  1888. intel_sdvo->controlled_output |= type;
  1889. intel_sdvo_connector->output_flag = type;
  1890. intel_sdvo->is_tv = true;
  1891. intel_sdvo->base.needs_tv_clock = true;
  1892. intel_sdvo->base.cloneable = false;
  1893. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1894. if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
  1895. goto err;
  1896. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1897. goto err;
  1898. return true;
  1899. err:
  1900. intel_sdvo_destroy(connector);
  1901. return false;
  1902. }
  1903. static bool
  1904. intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
  1905. {
  1906. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1907. struct drm_connector *connector;
  1908. struct intel_connector *intel_connector;
  1909. struct intel_sdvo_connector *intel_sdvo_connector;
  1910. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1911. if (!intel_sdvo_connector)
  1912. return false;
  1913. intel_connector = &intel_sdvo_connector->base;
  1914. connector = &intel_connector->base;
  1915. connector->polled = DRM_CONNECTOR_POLL_CONNECT;
  1916. encoder->encoder_type = DRM_MODE_ENCODER_DAC;
  1917. connector->connector_type = DRM_MODE_CONNECTOR_VGA;
  1918. if (device == 0) {
  1919. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
  1920. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
  1921. } else if (device == 1) {
  1922. intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
  1923. intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
  1924. }
  1925. intel_sdvo->base.cloneable = true;
  1926. intel_sdvo_connector_init(intel_sdvo_connector,
  1927. intel_sdvo);
  1928. return true;
  1929. }
  1930. static bool
  1931. intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
  1932. {
  1933. struct drm_encoder *encoder = &intel_sdvo->base.base;
  1934. struct drm_connector *connector;
  1935. struct intel_connector *intel_connector;
  1936. struct intel_sdvo_connector *intel_sdvo_connector;
  1937. intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
  1938. if (!intel_sdvo_connector)
  1939. return false;
  1940. intel_connector = &intel_sdvo_connector->base;
  1941. connector = &intel_connector->base;
  1942. encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
  1943. connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
  1944. if (device == 0) {
  1945. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
  1946. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
  1947. } else if (device == 1) {
  1948. intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
  1949. intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
  1950. }
  1951. /* SDVO LVDS is not cloneable because the input mode gets adjusted by the encoder */
  1952. intel_sdvo->base.cloneable = false;
  1953. intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
  1954. if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
  1955. goto err;
  1956. return true;
  1957. err:
  1958. intel_sdvo_destroy(connector);
  1959. return false;
  1960. }
  1961. static bool
  1962. intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
  1963. {
  1964. intel_sdvo->is_tv = false;
  1965. intel_sdvo->base.needs_tv_clock = false;
  1966. intel_sdvo->is_lvds = false;
  1967. /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
  1968. if (flags & SDVO_OUTPUT_TMDS0)
  1969. if (!intel_sdvo_dvi_init(intel_sdvo, 0))
  1970. return false;
  1971. if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
  1972. if (!intel_sdvo_dvi_init(intel_sdvo, 1))
  1973. return false;
  1974. /* TV has no XXX1 function block */
  1975. if (flags & SDVO_OUTPUT_SVID0)
  1976. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
  1977. return false;
  1978. if (flags & SDVO_OUTPUT_CVBS0)
  1979. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
  1980. return false;
  1981. if (flags & SDVO_OUTPUT_YPRPB0)
  1982. if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_YPRPB0))
  1983. return false;
  1984. if (flags & SDVO_OUTPUT_RGB0)
  1985. if (!intel_sdvo_analog_init(intel_sdvo, 0))
  1986. return false;
  1987. if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
  1988. if (!intel_sdvo_analog_init(intel_sdvo, 1))
  1989. return false;
  1990. if (flags & SDVO_OUTPUT_LVDS0)
  1991. if (!intel_sdvo_lvds_init(intel_sdvo, 0))
  1992. return false;
  1993. if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
  1994. if (!intel_sdvo_lvds_init(intel_sdvo, 1))
  1995. return false;
  1996. if ((flags & SDVO_OUTPUT_MASK) == 0) {
  1997. unsigned char bytes[2];
  1998. intel_sdvo->controlled_output = 0;
  1999. memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
  2000. DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
  2001. SDVO_NAME(intel_sdvo),
  2002. bytes[0], bytes[1]);
  2003. return false;
  2004. }
  2005. intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1) | (1 << 2);
  2006. return true;
  2007. }
  2008. static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
  2009. struct intel_sdvo_connector *intel_sdvo_connector,
  2010. int type)
  2011. {
  2012. struct drm_device *dev = intel_sdvo->base.base.dev;
  2013. struct intel_sdvo_tv_format format;
  2014. uint32_t format_map, i;
  2015. if (!intel_sdvo_set_target_output(intel_sdvo, type))
  2016. return false;
  2017. BUILD_BUG_ON(sizeof(format) != 6);
  2018. if (!intel_sdvo_get_value(intel_sdvo,
  2019. SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
  2020. &format, sizeof(format)))
  2021. return false;
  2022. memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
  2023. if (format_map == 0)
  2024. return false;
  2025. intel_sdvo_connector->format_supported_num = 0;
  2026. for (i = 0 ; i < TV_FORMAT_NUM; i++)
  2027. if (format_map & (1 << i))
  2028. intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
  2029. intel_sdvo_connector->tv_format =
  2030. drm_property_create(dev, DRM_MODE_PROP_ENUM,
  2031. "mode", intel_sdvo_connector->format_supported_num);
  2032. if (!intel_sdvo_connector->tv_format)
  2033. return false;
  2034. for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
  2035. drm_property_add_enum(
  2036. intel_sdvo_connector->tv_format, i,
  2037. i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
  2038. intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
  2039. drm_connector_attach_property(&intel_sdvo_connector->base.base,
  2040. intel_sdvo_connector->tv_format, 0);
  2041. return true;
  2042. }
  2043. #define ENHANCEMENT(name, NAME) do { \
  2044. if (enhancements.name) { \
  2045. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
  2046. !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
  2047. return false; \
  2048. intel_sdvo_connector->max_##name = data_value[0]; \
  2049. intel_sdvo_connector->cur_##name = response; \
  2050. intel_sdvo_connector->name = \
  2051. drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
  2052. if (!intel_sdvo_connector->name) return false; \
  2053. drm_connector_attach_property(connector, \
  2054. intel_sdvo_connector->name, \
  2055. intel_sdvo_connector->cur_##name); \
  2056. DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
  2057. data_value[0], data_value[1], response); \
  2058. } \
  2059. } while (0)
  2060. static bool
  2061. intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
  2062. struct intel_sdvo_connector *intel_sdvo_connector,
  2063. struct intel_sdvo_enhancements_reply enhancements)
  2064. {
  2065. struct drm_device *dev = intel_sdvo->base.base.dev;
  2066. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2067. uint16_t response, data_value[2];
  2068. /* when horizontal overscan is supported, Add the left/right property */
  2069. if (enhancements.overscan_h) {
  2070. if (!intel_sdvo_get_value(intel_sdvo,
  2071. SDVO_CMD_GET_MAX_OVERSCAN_H,
  2072. &data_value, 4))
  2073. return false;
  2074. if (!intel_sdvo_get_value(intel_sdvo,
  2075. SDVO_CMD_GET_OVERSCAN_H,
  2076. &response, 2))
  2077. return false;
  2078. intel_sdvo_connector->max_hscan = data_value[0];
  2079. intel_sdvo_connector->left_margin = data_value[0] - response;
  2080. intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
  2081. intel_sdvo_connector->left =
  2082. drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
  2083. if (!intel_sdvo_connector->left)
  2084. return false;
  2085. drm_connector_attach_property(connector,
  2086. intel_sdvo_connector->left,
  2087. intel_sdvo_connector->left_margin);
  2088. intel_sdvo_connector->right =
  2089. drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
  2090. if (!intel_sdvo_connector->right)
  2091. return false;
  2092. drm_connector_attach_property(connector,
  2093. intel_sdvo_connector->right,
  2094. intel_sdvo_connector->right_margin);
  2095. DRM_DEBUG_KMS("h_overscan: max %d, "
  2096. "default %d, current %d\n",
  2097. data_value[0], data_value[1], response);
  2098. }
  2099. if (enhancements.overscan_v) {
  2100. if (!intel_sdvo_get_value(intel_sdvo,
  2101. SDVO_CMD_GET_MAX_OVERSCAN_V,
  2102. &data_value, 4))
  2103. return false;
  2104. if (!intel_sdvo_get_value(intel_sdvo,
  2105. SDVO_CMD_GET_OVERSCAN_V,
  2106. &response, 2))
  2107. return false;
  2108. intel_sdvo_connector->max_vscan = data_value[0];
  2109. intel_sdvo_connector->top_margin = data_value[0] - response;
  2110. intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
  2111. intel_sdvo_connector->top =
  2112. drm_property_create_range(dev, 0,
  2113. "top_margin", 0, data_value[0]);
  2114. if (!intel_sdvo_connector->top)
  2115. return false;
  2116. drm_connector_attach_property(connector,
  2117. intel_sdvo_connector->top,
  2118. intel_sdvo_connector->top_margin);
  2119. intel_sdvo_connector->bottom =
  2120. drm_property_create_range(dev, 0,
  2121. "bottom_margin", 0, data_value[0]);
  2122. if (!intel_sdvo_connector->bottom)
  2123. return false;
  2124. drm_connector_attach_property(connector,
  2125. intel_sdvo_connector->bottom,
  2126. intel_sdvo_connector->bottom_margin);
  2127. DRM_DEBUG_KMS("v_overscan: max %d, "
  2128. "default %d, current %d\n",
  2129. data_value[0], data_value[1], response);
  2130. }
  2131. ENHANCEMENT(hpos, HPOS);
  2132. ENHANCEMENT(vpos, VPOS);
  2133. ENHANCEMENT(saturation, SATURATION);
  2134. ENHANCEMENT(contrast, CONTRAST);
  2135. ENHANCEMENT(hue, HUE);
  2136. ENHANCEMENT(sharpness, SHARPNESS);
  2137. ENHANCEMENT(brightness, BRIGHTNESS);
  2138. ENHANCEMENT(flicker_filter, FLICKER_FILTER);
  2139. ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
  2140. ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
  2141. ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
  2142. ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
  2143. if (enhancements.dot_crawl) {
  2144. if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
  2145. return false;
  2146. intel_sdvo_connector->max_dot_crawl = 1;
  2147. intel_sdvo_connector->cur_dot_crawl = response & 0x1;
  2148. intel_sdvo_connector->dot_crawl =
  2149. drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
  2150. if (!intel_sdvo_connector->dot_crawl)
  2151. return false;
  2152. drm_connector_attach_property(connector,
  2153. intel_sdvo_connector->dot_crawl,
  2154. intel_sdvo_connector->cur_dot_crawl);
  2155. DRM_DEBUG_KMS("dot crawl: current %d\n", response);
  2156. }
  2157. return true;
  2158. }
  2159. static bool
  2160. intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
  2161. struct intel_sdvo_connector *intel_sdvo_connector,
  2162. struct intel_sdvo_enhancements_reply enhancements)
  2163. {
  2164. struct drm_device *dev = intel_sdvo->base.base.dev;
  2165. struct drm_connector *connector = &intel_sdvo_connector->base.base;
  2166. uint16_t response, data_value[2];
  2167. ENHANCEMENT(brightness, BRIGHTNESS);
  2168. return true;
  2169. }
  2170. #undef ENHANCEMENT
  2171. static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
  2172. struct intel_sdvo_connector *intel_sdvo_connector)
  2173. {
  2174. union {
  2175. struct intel_sdvo_enhancements_reply reply;
  2176. uint16_t response;
  2177. } enhancements;
  2178. BUILD_BUG_ON(sizeof(enhancements) != 2);
  2179. enhancements.response = 0;
  2180. intel_sdvo_get_value(intel_sdvo,
  2181. SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
  2182. &enhancements, sizeof(enhancements));
  2183. if (enhancements.response == 0) {
  2184. DRM_DEBUG_KMS("No enhancement is supported\n");
  2185. return true;
  2186. }
  2187. if (IS_TV(intel_sdvo_connector))
  2188. return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2189. else if (IS_LVDS(intel_sdvo_connector))
  2190. return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
  2191. else
  2192. return true;
  2193. }
  2194. static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
  2195. struct i2c_msg *msgs,
  2196. int num)
  2197. {
  2198. struct intel_sdvo *sdvo = adapter->algo_data;
  2199. if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
  2200. return -EIO;
  2201. return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
  2202. }
  2203. static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
  2204. {
  2205. struct intel_sdvo *sdvo = adapter->algo_data;
  2206. return sdvo->i2c->algo->functionality(sdvo->i2c);
  2207. }
  2208. static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
  2209. .master_xfer = intel_sdvo_ddc_proxy_xfer,
  2210. .functionality = intel_sdvo_ddc_proxy_func
  2211. };
  2212. static bool
  2213. intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
  2214. struct drm_device *dev)
  2215. {
  2216. sdvo->ddc.owner = THIS_MODULE;
  2217. sdvo->ddc.class = I2C_CLASS_DDC;
  2218. snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
  2219. sdvo->ddc.dev.parent = &dev->pdev->dev;
  2220. sdvo->ddc.algo_data = sdvo;
  2221. sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
  2222. return i2c_add_adapter(&sdvo->ddc) == 0;
  2223. }
  2224. bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob)
  2225. {
  2226. struct drm_i915_private *dev_priv = dev->dev_private;
  2227. struct intel_encoder *intel_encoder;
  2228. struct intel_sdvo *intel_sdvo;
  2229. u32 hotplug_mask;
  2230. int i;
  2231. intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
  2232. if (!intel_sdvo)
  2233. return false;
  2234. intel_sdvo->sdvo_reg = sdvo_reg;
  2235. intel_sdvo->is_sdvob = is_sdvob;
  2236. intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, intel_sdvo) >> 1;
  2237. intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
  2238. if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
  2239. kfree(intel_sdvo);
  2240. return false;
  2241. }
  2242. /* encoder type will be decided later */
  2243. intel_encoder = &intel_sdvo->base;
  2244. intel_encoder->type = INTEL_OUTPUT_SDVO;
  2245. drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
  2246. /* Read the regs to test if we can talk to the device */
  2247. for (i = 0; i < 0x40; i++) {
  2248. u8 byte;
  2249. if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
  2250. DRM_DEBUG_KMS("No SDVO device found on %s\n",
  2251. SDVO_NAME(intel_sdvo));
  2252. goto err;
  2253. }
  2254. }
  2255. hotplug_mask = 0;
  2256. if (IS_G4X(dev)) {
  2257. hotplug_mask = intel_sdvo->is_sdvob ?
  2258. SDVOB_HOTPLUG_INT_STATUS_G4X : SDVOC_HOTPLUG_INT_STATUS_G4X;
  2259. } else if (IS_GEN4(dev)) {
  2260. hotplug_mask = intel_sdvo->is_sdvob ?
  2261. SDVOB_HOTPLUG_INT_STATUS_I965 : SDVOC_HOTPLUG_INT_STATUS_I965;
  2262. } else {
  2263. hotplug_mask = intel_sdvo->is_sdvob ?
  2264. SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915;
  2265. }
  2266. drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
  2267. intel_encoder->disable = intel_disable_sdvo;
  2268. intel_encoder->enable = intel_enable_sdvo;
  2269. intel_encoder->get_hw_state = intel_sdvo_get_hw_state;
  2270. /* In default case sdvo lvds is false */
  2271. if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
  2272. goto err;
  2273. if (intel_sdvo_output_setup(intel_sdvo,
  2274. intel_sdvo->caps.output_flags) != true) {
  2275. DRM_DEBUG_KMS("SDVO output failed to setup on %s\n",
  2276. SDVO_NAME(intel_sdvo));
  2277. goto err;
  2278. }
  2279. /* Only enable the hotplug irq if we need it, to work around noisy
  2280. * hotplug lines.
  2281. */
  2282. if (intel_sdvo->hotplug_active)
  2283. dev_priv->hotplug_supported_mask |= hotplug_mask;
  2284. intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
  2285. /* Set the input timing to the screen. Assume always input 0. */
  2286. if (!intel_sdvo_set_target_input(intel_sdvo))
  2287. goto err;
  2288. if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
  2289. &intel_sdvo->pixel_clock_min,
  2290. &intel_sdvo->pixel_clock_max))
  2291. goto err;
  2292. DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
  2293. "clock range %dMHz - %dMHz, "
  2294. "input 1: %c, input 2: %c, "
  2295. "output 1: %c, output 2: %c\n",
  2296. SDVO_NAME(intel_sdvo),
  2297. intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
  2298. intel_sdvo->caps.device_rev_id,
  2299. intel_sdvo->pixel_clock_min / 1000,
  2300. intel_sdvo->pixel_clock_max / 1000,
  2301. (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
  2302. (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
  2303. /* check currently supported outputs */
  2304. intel_sdvo->caps.output_flags &
  2305. (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
  2306. intel_sdvo->caps.output_flags &
  2307. (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
  2308. return true;
  2309. err:
  2310. drm_encoder_cleanup(&intel_encoder->base);
  2311. i2c_del_adapter(&intel_sdvo->ddc);
  2312. kfree(intel_sdvo);
  2313. return false;
  2314. }