intel_dvo.c 13 KB

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  1. /*
  2. * Copyright 2006 Dave Airlie <airlied@linux.ie>
  3. * Copyright © 2006-2007 Intel Corporation
  4. *
  5. * Permission is hereby granted, free of charge, to any person obtaining a
  6. * copy of this software and associated documentation files (the "Software"),
  7. * to deal in the Software without restriction, including without limitation
  8. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  9. * and/or sell copies of the Software, and to permit persons to whom the
  10. * Software is furnished to do so, subject to the following conditions:
  11. *
  12. * The above copyright notice and this permission notice (including the next
  13. * paragraph) shall be included in all copies or substantial portions of the
  14. * Software.
  15. *
  16. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  19. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  20. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  21. * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  22. * DEALINGS IN THE SOFTWARE.
  23. *
  24. * Authors:
  25. * Eric Anholt <eric@anholt.net>
  26. */
  27. #include <linux/i2c.h>
  28. #include "drmP.h"
  29. #include "drm.h"
  30. #include "drm_crtc.h"
  31. #include "intel_drv.h"
  32. #include "i915_drm.h"
  33. #include "i915_drv.h"
  34. #include "dvo.h"
  35. #define SIL164_ADDR 0x38
  36. #define CH7xxx_ADDR 0x76
  37. #define TFP410_ADDR 0x38
  38. static struct intel_dvo_device intel_dvo_devices[] = {
  39. {
  40. .type = INTEL_DVO_CHIP_TMDS,
  41. .name = "sil164",
  42. .dvo_reg = DVOC,
  43. .slave_addr = SIL164_ADDR,
  44. .dev_ops = &sil164_ops,
  45. },
  46. {
  47. .type = INTEL_DVO_CHIP_TMDS,
  48. .name = "ch7xxx",
  49. .dvo_reg = DVOC,
  50. .slave_addr = CH7xxx_ADDR,
  51. .dev_ops = &ch7xxx_ops,
  52. },
  53. {
  54. .type = INTEL_DVO_CHIP_LVDS,
  55. .name = "ivch",
  56. .dvo_reg = DVOA,
  57. .slave_addr = 0x02, /* Might also be 0x44, 0x84, 0xc4 */
  58. .dev_ops = &ivch_ops,
  59. },
  60. {
  61. .type = INTEL_DVO_CHIP_TMDS,
  62. .name = "tfp410",
  63. .dvo_reg = DVOC,
  64. .slave_addr = TFP410_ADDR,
  65. .dev_ops = &tfp410_ops,
  66. },
  67. {
  68. .type = INTEL_DVO_CHIP_LVDS,
  69. .name = "ch7017",
  70. .dvo_reg = DVOC,
  71. .slave_addr = 0x75,
  72. .gpio = GPIOE,
  73. .dev_ops = &ch7017_ops,
  74. }
  75. };
  76. static void intel_dvo_dpms(struct drm_encoder *encoder, int mode)
  77. {
  78. struct drm_i915_private *dev_priv = encoder->dev->dev_private;
  79. struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
  80. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  81. u32 dvo_reg = dvo->dvo_reg;
  82. u32 temp = I915_READ(dvo_reg);
  83. if (mode == DRM_MODE_DPMS_ON) {
  84. I915_WRITE(dvo_reg, temp | DVO_ENABLE);
  85. I915_READ(dvo_reg);
  86. dvo->dev_ops->dpms(dvo, mode);
  87. } else {
  88. dvo->dev_ops->dpms(dvo, mode);
  89. I915_WRITE(dvo_reg, temp & ~DVO_ENABLE);
  90. I915_READ(dvo_reg);
  91. }
  92. }
  93. static int intel_dvo_mode_valid(struct drm_connector *connector,
  94. struct drm_display_mode *mode)
  95. {
  96. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  97. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  98. if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
  99. return MODE_NO_DBLESCAN;
  100. /* XXX: Validate clock range */
  101. if (dvo->panel_fixed_mode) {
  102. if (mode->hdisplay > dvo->panel_fixed_mode->hdisplay)
  103. return MODE_PANEL;
  104. if (mode->vdisplay > dvo->panel_fixed_mode->vdisplay)
  105. return MODE_PANEL;
  106. }
  107. return dvo->dev_ops->mode_valid(dvo, mode);
  108. }
  109. static bool intel_dvo_mode_fixup(struct drm_encoder *encoder,
  110. struct drm_display_mode *mode,
  111. struct drm_display_mode *adjusted_mode)
  112. {
  113. struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
  114. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  115. /* If we have timings from the BIOS for the panel, put them in
  116. * to the adjusted mode. The CRTC will be set up for this mode,
  117. * with the panel scaling set up to source from the H/VDisplay
  118. * of the original mode.
  119. */
  120. if (dvo->panel_fixed_mode != NULL) {
  121. #define C(x) adjusted_mode->x = dvo->panel_fixed_mode->x
  122. C(hdisplay);
  123. C(hsync_start);
  124. C(hsync_end);
  125. C(htotal);
  126. C(vdisplay);
  127. C(vsync_start);
  128. C(vsync_end);
  129. C(vtotal);
  130. C(clock);
  131. drm_mode_set_crtcinfo(adjusted_mode, CRTC_INTERLACE_HALVE_V);
  132. #undef C
  133. }
  134. if (dvo->dev_ops->mode_fixup)
  135. return dvo->dev_ops->mode_fixup(dvo, mode, adjusted_mode);
  136. return true;
  137. }
  138. static void intel_dvo_mode_set(struct drm_encoder *encoder,
  139. struct drm_display_mode *mode,
  140. struct drm_display_mode *adjusted_mode)
  141. {
  142. struct drm_device *dev = encoder->dev;
  143. struct drm_i915_private *dev_priv = dev->dev_private;
  144. struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
  145. struct intel_encoder *intel_encoder = enc_to_intel_encoder(encoder);
  146. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  147. int pipe = intel_crtc->pipe;
  148. u32 dvo_val;
  149. u32 dvo_reg = dvo->dvo_reg, dvo_srcdim_reg;
  150. int dpll_reg = (pipe == 0) ? DPLL_A : DPLL_B;
  151. switch (dvo_reg) {
  152. case DVOA:
  153. default:
  154. dvo_srcdim_reg = DVOA_SRCDIM;
  155. break;
  156. case DVOB:
  157. dvo_srcdim_reg = DVOB_SRCDIM;
  158. break;
  159. case DVOC:
  160. dvo_srcdim_reg = DVOC_SRCDIM;
  161. break;
  162. }
  163. dvo->dev_ops->mode_set(dvo, mode, adjusted_mode);
  164. /* Save the data order, since I don't know what it should be set to. */
  165. dvo_val = I915_READ(dvo_reg) &
  166. (DVO_PRESERVE_MASK | DVO_DATA_ORDER_GBRG);
  167. dvo_val |= DVO_DATA_ORDER_FP | DVO_BORDER_ENABLE |
  168. DVO_BLANK_ACTIVE_HIGH;
  169. if (pipe == 1)
  170. dvo_val |= DVO_PIPE_B_SELECT;
  171. dvo_val |= DVO_PIPE_STALL;
  172. if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
  173. dvo_val |= DVO_HSYNC_ACTIVE_HIGH;
  174. if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
  175. dvo_val |= DVO_VSYNC_ACTIVE_HIGH;
  176. I915_WRITE(dpll_reg, I915_READ(dpll_reg) | DPLL_DVO_HIGH_SPEED);
  177. /*I915_WRITE(DVOB_SRCDIM,
  178. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  179. (adjusted_mode->VDisplay << DVO_SRCDIM_VERTICAL_SHIFT));*/
  180. I915_WRITE(dvo_srcdim_reg,
  181. (adjusted_mode->hdisplay << DVO_SRCDIM_HORIZONTAL_SHIFT) |
  182. (adjusted_mode->vdisplay << DVO_SRCDIM_VERTICAL_SHIFT));
  183. /*I915_WRITE(DVOB, dvo_val);*/
  184. I915_WRITE(dvo_reg, dvo_val);
  185. }
  186. /**
  187. * Detect the output connection on our DVO device.
  188. *
  189. * Unimplemented.
  190. */
  191. static enum drm_connector_status intel_dvo_detect(struct drm_connector *connector)
  192. {
  193. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  194. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  195. return dvo->dev_ops->detect(dvo);
  196. }
  197. static int intel_dvo_get_modes(struct drm_connector *connector)
  198. {
  199. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  200. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  201. /* We should probably have an i2c driver get_modes function for those
  202. * devices which will have a fixed set of modes determined by the chip
  203. * (TV-out, for example), but for now with just TMDS and LVDS,
  204. * that's not the case.
  205. */
  206. intel_ddc_get_modes(connector, intel_encoder->ddc_bus);
  207. if (!list_empty(&connector->probed_modes))
  208. return 1;
  209. if (dvo->panel_fixed_mode != NULL) {
  210. struct drm_display_mode *mode;
  211. mode = drm_mode_duplicate(connector->dev, dvo->panel_fixed_mode);
  212. if (mode) {
  213. drm_mode_probed_add(connector, mode);
  214. return 1;
  215. }
  216. }
  217. return 0;
  218. }
  219. static void intel_dvo_destroy (struct drm_connector *connector)
  220. {
  221. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  222. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  223. if (dvo) {
  224. if (dvo->dev_ops->destroy)
  225. dvo->dev_ops->destroy(dvo);
  226. if (dvo->panel_fixed_mode)
  227. kfree(dvo->panel_fixed_mode);
  228. /* no need, in i830_dvoices[] now */
  229. //kfree(dvo);
  230. }
  231. if (intel_encoder->i2c_bus)
  232. intel_i2c_destroy(intel_encoder->i2c_bus);
  233. if (intel_encoder->ddc_bus)
  234. intel_i2c_destroy(intel_encoder->ddc_bus);
  235. drm_sysfs_connector_remove(connector);
  236. drm_connector_cleanup(connector);
  237. kfree(intel_encoder);
  238. }
  239. #ifdef RANDR_GET_CRTC_INTERFACE
  240. static struct drm_crtc *intel_dvo_get_crtc(struct drm_connector *connector)
  241. {
  242. struct drm_device *dev = connector->dev;
  243. struct drm_i915_private *dev_priv = dev->dev_private;
  244. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  245. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  246. int pipe = !!(I915_READ(dvo->dvo_reg) & SDVO_PIPE_B_SELECT);
  247. return intel_pipe_to_crtc(pScrn, pipe);
  248. }
  249. #endif
  250. static const struct drm_encoder_helper_funcs intel_dvo_helper_funcs = {
  251. .dpms = intel_dvo_dpms,
  252. .mode_fixup = intel_dvo_mode_fixup,
  253. .prepare = intel_encoder_prepare,
  254. .mode_set = intel_dvo_mode_set,
  255. .commit = intel_encoder_commit,
  256. };
  257. static const struct drm_connector_funcs intel_dvo_connector_funcs = {
  258. .dpms = drm_helper_connector_dpms,
  259. .detect = intel_dvo_detect,
  260. .destroy = intel_dvo_destroy,
  261. .fill_modes = drm_helper_probe_single_connector_modes,
  262. };
  263. static const struct drm_connector_helper_funcs intel_dvo_connector_helper_funcs = {
  264. .mode_valid = intel_dvo_mode_valid,
  265. .get_modes = intel_dvo_get_modes,
  266. .best_encoder = intel_best_encoder,
  267. };
  268. static void intel_dvo_enc_destroy(struct drm_encoder *encoder)
  269. {
  270. drm_encoder_cleanup(encoder);
  271. }
  272. static const struct drm_encoder_funcs intel_dvo_enc_funcs = {
  273. .destroy = intel_dvo_enc_destroy,
  274. };
  275. /**
  276. * Attempts to get a fixed panel timing for LVDS (currently only the i830).
  277. *
  278. * Other chips with DVO LVDS will need to extend this to deal with the LVDS
  279. * chip being on DVOB/C and having multiple pipes.
  280. */
  281. static struct drm_display_mode *
  282. intel_dvo_get_current_mode (struct drm_connector *connector)
  283. {
  284. struct drm_device *dev = connector->dev;
  285. struct drm_i915_private *dev_priv = dev->dev_private;
  286. struct intel_encoder *intel_encoder = to_intel_encoder(connector);
  287. struct intel_dvo_device *dvo = intel_encoder->dev_priv;
  288. uint32_t dvo_reg = dvo->dvo_reg;
  289. uint32_t dvo_val = I915_READ(dvo_reg);
  290. struct drm_display_mode *mode = NULL;
  291. /* If the DVO port is active, that'll be the LVDS, so we can pull out
  292. * its timings to get how the BIOS set up the panel.
  293. */
  294. if (dvo_val & DVO_ENABLE) {
  295. struct drm_crtc *crtc;
  296. int pipe = (dvo_val & DVO_PIPE_B_SELECT) ? 1 : 0;
  297. crtc = intel_get_crtc_from_pipe(dev, pipe);
  298. if (crtc) {
  299. mode = intel_crtc_mode_get(dev, crtc);
  300. if (mode) {
  301. mode->type |= DRM_MODE_TYPE_PREFERRED;
  302. if (dvo_val & DVO_HSYNC_ACTIVE_HIGH)
  303. mode->flags |= DRM_MODE_FLAG_PHSYNC;
  304. if (dvo_val & DVO_VSYNC_ACTIVE_HIGH)
  305. mode->flags |= DRM_MODE_FLAG_PVSYNC;
  306. }
  307. }
  308. }
  309. return mode;
  310. }
  311. void intel_dvo_init(struct drm_device *dev)
  312. {
  313. struct intel_encoder *intel_encoder;
  314. struct intel_dvo_device *dvo;
  315. struct i2c_adapter *i2cbus = NULL;
  316. int ret = 0;
  317. int i;
  318. int encoder_type = DRM_MODE_ENCODER_NONE;
  319. intel_encoder = kzalloc (sizeof(struct intel_encoder), GFP_KERNEL);
  320. if (!intel_encoder)
  321. return;
  322. /* Set up the DDC bus */
  323. intel_encoder->ddc_bus = intel_i2c_create(dev, GPIOD, "DVODDC_D");
  324. if (!intel_encoder->ddc_bus)
  325. goto free_intel;
  326. /* Now, try to find a controller */
  327. for (i = 0; i < ARRAY_SIZE(intel_dvo_devices); i++) {
  328. struct drm_connector *connector = &intel_encoder->base;
  329. int gpio;
  330. dvo = &intel_dvo_devices[i];
  331. /* Allow the I2C driver info to specify the GPIO to be used in
  332. * special cases, but otherwise default to what's defined
  333. * in the spec.
  334. */
  335. if (dvo->gpio != 0)
  336. gpio = dvo->gpio;
  337. else if (dvo->type == INTEL_DVO_CHIP_LVDS)
  338. gpio = GPIOB;
  339. else
  340. gpio = GPIOE;
  341. /* Set up the I2C bus necessary for the chip we're probing.
  342. * It appears that everything is on GPIOE except for panels
  343. * on i830 laptops, which are on GPIOB (DVOA).
  344. */
  345. if (i2cbus != NULL)
  346. intel_i2c_destroy(i2cbus);
  347. if (!(i2cbus = intel_i2c_create(dev, gpio,
  348. gpio == GPIOB ? "DVOI2C_B" : "DVOI2C_E"))) {
  349. continue;
  350. }
  351. if (dvo->dev_ops!= NULL)
  352. ret = dvo->dev_ops->init(dvo, i2cbus);
  353. else
  354. ret = false;
  355. if (!ret)
  356. continue;
  357. intel_encoder->type = INTEL_OUTPUT_DVO;
  358. intel_encoder->crtc_mask = (1 << 0) | (1 << 1);
  359. switch (dvo->type) {
  360. case INTEL_DVO_CHIP_TMDS:
  361. intel_encoder->clone_mask =
  362. (1 << INTEL_DVO_TMDS_CLONE_BIT) |
  363. (1 << INTEL_ANALOG_CLONE_BIT);
  364. drm_connector_init(dev, connector,
  365. &intel_dvo_connector_funcs,
  366. DRM_MODE_CONNECTOR_DVII);
  367. encoder_type = DRM_MODE_ENCODER_TMDS;
  368. break;
  369. case INTEL_DVO_CHIP_LVDS:
  370. intel_encoder->clone_mask =
  371. (1 << INTEL_DVO_LVDS_CLONE_BIT);
  372. drm_connector_init(dev, connector,
  373. &intel_dvo_connector_funcs,
  374. DRM_MODE_CONNECTOR_LVDS);
  375. encoder_type = DRM_MODE_ENCODER_LVDS;
  376. break;
  377. }
  378. drm_connector_helper_add(connector,
  379. &intel_dvo_connector_helper_funcs);
  380. connector->display_info.subpixel_order = SubPixelHorizontalRGB;
  381. connector->interlace_allowed = false;
  382. connector->doublescan_allowed = false;
  383. intel_encoder->dev_priv = dvo;
  384. intel_encoder->i2c_bus = i2cbus;
  385. drm_encoder_init(dev, &intel_encoder->enc,
  386. &intel_dvo_enc_funcs, encoder_type);
  387. drm_encoder_helper_add(&intel_encoder->enc,
  388. &intel_dvo_helper_funcs);
  389. drm_mode_connector_attach_encoder(&intel_encoder->base,
  390. &intel_encoder->enc);
  391. if (dvo->type == INTEL_DVO_CHIP_LVDS) {
  392. /* For our LVDS chipsets, we should hopefully be able
  393. * to dig the fixed panel mode out of the BIOS data.
  394. * However, it's in a different format from the BIOS
  395. * data on chipsets with integrated LVDS (stored in AIM
  396. * headers, likely), so for now, just get the current
  397. * mode being output through DVO.
  398. */
  399. dvo->panel_fixed_mode =
  400. intel_dvo_get_current_mode(connector);
  401. dvo->panel_wants_dither = true;
  402. }
  403. drm_sysfs_connector_add(connector);
  404. return;
  405. }
  406. intel_i2c_destroy(intel_encoder->ddc_bus);
  407. /* Didn't find a chip, so tear down. */
  408. if (i2cbus != NULL)
  409. intel_i2c_destroy(i2cbus);
  410. free_intel:
  411. kfree(intel_encoder);
  412. }