atmel_serial.c 38 KB

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  1. /*
  2. * linux/drivers/char/atmel_serial.c
  3. *
  4. * Driver for Atmel AT91 / AT32 Serial ports
  5. * Copyright (C) 2003 Rick Bronson
  6. *
  7. * Based on drivers/char/serial_sa1100.c, by Deep Blue Solutions Ltd.
  8. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  9. *
  10. * DMA support added by Chip Coldwell.
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License as published by
  14. * the Free Software Foundation; either version 2 of the License, or
  15. * (at your option) any later version.
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. * You should have received a copy of the GNU General Public License
  23. * along with this program; if not, write to the Free Software
  24. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  25. *
  26. */
  27. #include <linux/module.h>
  28. #include <linux/tty.h>
  29. #include <linux/ioport.h>
  30. #include <linux/slab.h>
  31. #include <linux/init.h>
  32. #include <linux/serial.h>
  33. #include <linux/clk.h>
  34. #include <linux/console.h>
  35. #include <linux/sysrq.h>
  36. #include <linux/tty_flip.h>
  37. #include <linux/platform_device.h>
  38. #include <linux/dma-mapping.h>
  39. #include <linux/atmel_pdc.h>
  40. #include <linux/atmel_serial.h>
  41. #include <asm/io.h>
  42. #include <asm/mach/serial_at91.h>
  43. #include <asm/arch/board.h>
  44. #ifdef CONFIG_ARM
  45. #include <asm/arch/cpu.h>
  46. #include <asm/arch/gpio.h>
  47. #endif
  48. #define PDC_BUFFER_SIZE 512
  49. /* Revisit: We should calculate this based on the actual port settings */
  50. #define PDC_RX_TIMEOUT (3 * 10) /* 3 bytes */
  51. #if defined(CONFIG_SERIAL_ATMEL_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  52. #define SUPPORT_SYSRQ
  53. #endif
  54. #include <linux/serial_core.h>
  55. #ifdef CONFIG_SERIAL_ATMEL_TTYAT
  56. /* Use device name ttyAT, major 204 and minor 154-169. This is necessary if we
  57. * should coexist with the 8250 driver, such as if we have an external 16C550
  58. * UART. */
  59. #define SERIAL_ATMEL_MAJOR 204
  60. #define MINOR_START 154
  61. #define ATMEL_DEVICENAME "ttyAT"
  62. #else
  63. /* Use device name ttyS, major 4, minor 64-68. This is the usual serial port
  64. * name, but it is legally reserved for the 8250 driver. */
  65. #define SERIAL_ATMEL_MAJOR TTY_MAJOR
  66. #define MINOR_START 64
  67. #define ATMEL_DEVICENAME "ttyS"
  68. #endif
  69. #define ATMEL_ISR_PASS_LIMIT 256
  70. /* UART registers. CR is write-only, hence no GET macro */
  71. #define UART_PUT_CR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_CR)
  72. #define UART_GET_MR(port) __raw_readl((port)->membase + ATMEL_US_MR)
  73. #define UART_PUT_MR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_MR)
  74. #define UART_PUT_IER(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IER)
  75. #define UART_PUT_IDR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_IDR)
  76. #define UART_GET_IMR(port) __raw_readl((port)->membase + ATMEL_US_IMR)
  77. #define UART_GET_CSR(port) __raw_readl((port)->membase + ATMEL_US_CSR)
  78. #define UART_GET_CHAR(port) __raw_readl((port)->membase + ATMEL_US_RHR)
  79. #define UART_PUT_CHAR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_THR)
  80. #define UART_GET_BRGR(port) __raw_readl((port)->membase + ATMEL_US_BRGR)
  81. #define UART_PUT_BRGR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_BRGR)
  82. #define UART_PUT_RTOR(port,v) __raw_writel(v, (port)->membase + ATMEL_US_RTOR)
  83. /* PDC registers */
  84. #define UART_PUT_PTCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_PTCR)
  85. #define UART_GET_PTSR(port) __raw_readl((port)->membase + ATMEL_PDC_PTSR)
  86. #define UART_PUT_RPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RPR)
  87. #define UART_GET_RPR(port) __raw_readl((port)->membase + ATMEL_PDC_RPR)
  88. #define UART_PUT_RCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RCR)
  89. #define UART_PUT_RNPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNPR)
  90. #define UART_PUT_RNCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_RNCR)
  91. #define UART_PUT_TPR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TPR)
  92. #define UART_PUT_TCR(port,v) __raw_writel(v, (port)->membase + ATMEL_PDC_TCR)
  93. static int (*atmel_open_hook)(struct uart_port *);
  94. static void (*atmel_close_hook)(struct uart_port *);
  95. struct atmel_dma_buffer {
  96. unsigned char *buf;
  97. dma_addr_t dma_addr;
  98. unsigned int dma_size;
  99. unsigned int ofs;
  100. };
  101. struct atmel_uart_char {
  102. u16 status;
  103. u16 ch;
  104. };
  105. #define ATMEL_SERIAL_RINGSIZE 1024
  106. /*
  107. * We wrap our port structure around the generic uart_port.
  108. */
  109. struct atmel_uart_port {
  110. struct uart_port uart; /* uart */
  111. struct clk *clk; /* uart clock */
  112. unsigned short suspended; /* is port suspended? */
  113. int break_active; /* break being received */
  114. short use_dma_rx; /* enable PDC receiver */
  115. short pdc_rx_idx; /* current PDC RX buffer */
  116. struct atmel_dma_buffer pdc_rx[2]; /* PDC receier */
  117. short use_dma_tx; /* enable PDC transmitter */
  118. struct atmel_dma_buffer pdc_tx; /* PDC transmitter */
  119. struct tasklet_struct tasklet;
  120. unsigned int irq_status;
  121. unsigned int irq_status_prev;
  122. struct circ_buf rx_ring;
  123. };
  124. static struct atmel_uart_port atmel_ports[ATMEL_MAX_UART];
  125. #ifdef SUPPORT_SYSRQ
  126. static struct console atmel_console;
  127. #endif
  128. #ifdef CONFIG_SERIAL_ATMEL_PDC
  129. static bool atmel_use_dma_rx(struct uart_port *port)
  130. {
  131. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  132. return atmel_port->use_dma_rx;
  133. }
  134. static bool atmel_use_dma_tx(struct uart_port *port)
  135. {
  136. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  137. return atmel_port->use_dma_tx;
  138. }
  139. #else
  140. static bool atmel_use_dma_rx(struct uart_port *port)
  141. {
  142. return false;
  143. }
  144. static bool atmel_use_dma_tx(struct uart_port *port)
  145. {
  146. return false;
  147. }
  148. #endif
  149. /*
  150. * Return TIOCSER_TEMT when transmitter FIFO and Shift register is empty.
  151. */
  152. static u_int atmel_tx_empty(struct uart_port *port)
  153. {
  154. return (UART_GET_CSR(port) & ATMEL_US_TXEMPTY) ? TIOCSER_TEMT : 0;
  155. }
  156. /*
  157. * Set state of the modem control output lines
  158. */
  159. static void atmel_set_mctrl(struct uart_port *port, u_int mctrl)
  160. {
  161. unsigned int control = 0;
  162. unsigned int mode;
  163. #ifdef CONFIG_ARCH_AT91RM9200
  164. if (cpu_is_at91rm9200()) {
  165. /*
  166. * AT91RM9200 Errata #39: RTS0 is not internally connected
  167. * to PA21. We need to drive the pin manually.
  168. */
  169. if (port->mapbase == AT91RM9200_BASE_US0) {
  170. if (mctrl & TIOCM_RTS)
  171. at91_set_gpio_value(AT91_PIN_PA21, 0);
  172. else
  173. at91_set_gpio_value(AT91_PIN_PA21, 1);
  174. }
  175. }
  176. #endif
  177. if (mctrl & TIOCM_RTS)
  178. control |= ATMEL_US_RTSEN;
  179. else
  180. control |= ATMEL_US_RTSDIS;
  181. if (mctrl & TIOCM_DTR)
  182. control |= ATMEL_US_DTREN;
  183. else
  184. control |= ATMEL_US_DTRDIS;
  185. UART_PUT_CR(port, control);
  186. /* Local loopback mode? */
  187. mode = UART_GET_MR(port) & ~ATMEL_US_CHMODE;
  188. if (mctrl & TIOCM_LOOP)
  189. mode |= ATMEL_US_CHMODE_LOC_LOOP;
  190. else
  191. mode |= ATMEL_US_CHMODE_NORMAL;
  192. UART_PUT_MR(port, mode);
  193. }
  194. /*
  195. * Get state of the modem control input lines
  196. */
  197. static u_int atmel_get_mctrl(struct uart_port *port)
  198. {
  199. unsigned int status, ret = 0;
  200. status = UART_GET_CSR(port);
  201. /*
  202. * The control signals are active low.
  203. */
  204. if (!(status & ATMEL_US_DCD))
  205. ret |= TIOCM_CD;
  206. if (!(status & ATMEL_US_CTS))
  207. ret |= TIOCM_CTS;
  208. if (!(status & ATMEL_US_DSR))
  209. ret |= TIOCM_DSR;
  210. if (!(status & ATMEL_US_RI))
  211. ret |= TIOCM_RI;
  212. return ret;
  213. }
  214. /*
  215. * Stop transmitting.
  216. */
  217. static void atmel_stop_tx(struct uart_port *port)
  218. {
  219. if (atmel_use_dma_tx(port)) {
  220. /* disable PDC transmit */
  221. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  222. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  223. } else
  224. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  225. }
  226. /*
  227. * Start transmitting.
  228. */
  229. static void atmel_start_tx(struct uart_port *port)
  230. {
  231. if (atmel_use_dma_tx(port)) {
  232. if (UART_GET_PTSR(port) & ATMEL_PDC_TXTEN)
  233. /* The transmitter is already running. Yes, we
  234. really need this.*/
  235. return;
  236. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  237. /* re-enable PDC transmit */
  238. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  239. } else
  240. UART_PUT_IER(port, ATMEL_US_TXRDY);
  241. }
  242. /*
  243. * Stop receiving - port is in process of being closed.
  244. */
  245. static void atmel_stop_rx(struct uart_port *port)
  246. {
  247. if (atmel_use_dma_rx(port)) {
  248. /* disable PDC receive */
  249. UART_PUT_PTCR(port, ATMEL_PDC_RXTDIS);
  250. UART_PUT_IDR(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  251. } else
  252. UART_PUT_IDR(port, ATMEL_US_RXRDY);
  253. }
  254. /*
  255. * Enable modem status interrupts
  256. */
  257. static void atmel_enable_ms(struct uart_port *port)
  258. {
  259. UART_PUT_IER(port, ATMEL_US_RIIC | ATMEL_US_DSRIC
  260. | ATMEL_US_DCDIC | ATMEL_US_CTSIC);
  261. }
  262. /*
  263. * Control the transmission of a break signal
  264. */
  265. static void atmel_break_ctl(struct uart_port *port, int break_state)
  266. {
  267. if (break_state != 0)
  268. UART_PUT_CR(port, ATMEL_US_STTBRK); /* start break */
  269. else
  270. UART_PUT_CR(port, ATMEL_US_STPBRK); /* stop break */
  271. }
  272. /*
  273. * Stores the incoming character in the ring buffer
  274. */
  275. static void
  276. atmel_buffer_rx_char(struct uart_port *port, unsigned int status,
  277. unsigned int ch)
  278. {
  279. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  280. struct circ_buf *ring = &atmel_port->rx_ring;
  281. struct atmel_uart_char *c;
  282. if (!CIRC_SPACE(ring->head, ring->tail, ATMEL_SERIAL_RINGSIZE))
  283. /* Buffer overflow, ignore char */
  284. return;
  285. c = &((struct atmel_uart_char *)ring->buf)[ring->head];
  286. c->status = status;
  287. c->ch = ch;
  288. /* Make sure the character is stored before we update head. */
  289. smp_wmb();
  290. ring->head = (ring->head + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  291. }
  292. /*
  293. * Deal with parity, framing and overrun errors.
  294. */
  295. static void atmel_pdc_rxerr(struct uart_port *port, unsigned int status)
  296. {
  297. /* clear error */
  298. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  299. if (status & ATMEL_US_RXBRK) {
  300. /* ignore side-effect */
  301. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  302. port->icount.brk++;
  303. }
  304. if (status & ATMEL_US_PARE)
  305. port->icount.parity++;
  306. if (status & ATMEL_US_FRAME)
  307. port->icount.frame++;
  308. if (status & ATMEL_US_OVRE)
  309. port->icount.overrun++;
  310. }
  311. /*
  312. * Characters received (called from interrupt handler)
  313. */
  314. static void atmel_rx_chars(struct uart_port *port)
  315. {
  316. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  317. unsigned int status, ch;
  318. status = UART_GET_CSR(port);
  319. while (status & ATMEL_US_RXRDY) {
  320. ch = UART_GET_CHAR(port);
  321. /*
  322. * note that the error handling code is
  323. * out of the main execution path
  324. */
  325. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  326. | ATMEL_US_OVRE | ATMEL_US_RXBRK)
  327. || atmel_port->break_active)) {
  328. /* clear error */
  329. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  330. if (status & ATMEL_US_RXBRK
  331. && !atmel_port->break_active) {
  332. atmel_port->break_active = 1;
  333. UART_PUT_IER(port, ATMEL_US_RXBRK);
  334. } else {
  335. /*
  336. * This is either the end-of-break
  337. * condition or we've received at
  338. * least one character without RXBRK
  339. * being set. In both cases, the next
  340. * RXBRK will indicate start-of-break.
  341. */
  342. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  343. status &= ~ATMEL_US_RXBRK;
  344. atmel_port->break_active = 0;
  345. }
  346. }
  347. atmel_buffer_rx_char(port, status, ch);
  348. status = UART_GET_CSR(port);
  349. }
  350. tasklet_schedule(&atmel_port->tasklet);
  351. }
  352. /*
  353. * Transmit characters (called from tasklet with TXRDY interrupt
  354. * disabled)
  355. */
  356. static void atmel_tx_chars(struct uart_port *port)
  357. {
  358. struct circ_buf *xmit = &port->info->xmit;
  359. if (port->x_char && UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  360. UART_PUT_CHAR(port, port->x_char);
  361. port->icount.tx++;
  362. port->x_char = 0;
  363. }
  364. if (uart_circ_empty(xmit) || uart_tx_stopped(port))
  365. return;
  366. while (UART_GET_CSR(port) & ATMEL_US_TXRDY) {
  367. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  368. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  369. port->icount.tx++;
  370. if (uart_circ_empty(xmit))
  371. break;
  372. }
  373. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  374. uart_write_wakeup(port);
  375. if (!uart_circ_empty(xmit))
  376. UART_PUT_IER(port, ATMEL_US_TXRDY);
  377. }
  378. /*
  379. * receive interrupt handler.
  380. */
  381. static void
  382. atmel_handle_receive(struct uart_port *port, unsigned int pending)
  383. {
  384. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  385. if (atmel_use_dma_rx(port)) {
  386. /*
  387. * PDC receive. Just schedule the tasklet and let it
  388. * figure out the details.
  389. *
  390. * TODO: We're not handling error flags correctly at
  391. * the moment.
  392. */
  393. if (pending & (ATMEL_US_ENDRX | ATMEL_US_TIMEOUT)) {
  394. UART_PUT_IDR(port, (ATMEL_US_ENDRX
  395. | ATMEL_US_TIMEOUT));
  396. tasklet_schedule(&atmel_port->tasklet);
  397. }
  398. if (pending & (ATMEL_US_RXBRK | ATMEL_US_OVRE |
  399. ATMEL_US_FRAME | ATMEL_US_PARE))
  400. atmel_pdc_rxerr(port, pending);
  401. }
  402. /* Interrupt receive */
  403. if (pending & ATMEL_US_RXRDY)
  404. atmel_rx_chars(port);
  405. else if (pending & ATMEL_US_RXBRK) {
  406. /*
  407. * End of break detected. If it came along with a
  408. * character, atmel_rx_chars will handle it.
  409. */
  410. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  411. UART_PUT_IDR(port, ATMEL_US_RXBRK);
  412. atmel_port->break_active = 0;
  413. }
  414. }
  415. /*
  416. * transmit interrupt handler. (Transmit is IRQF_NODELAY safe)
  417. */
  418. static void
  419. atmel_handle_transmit(struct uart_port *port, unsigned int pending)
  420. {
  421. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  422. if (atmel_use_dma_tx(port)) {
  423. /* PDC transmit */
  424. if (pending & (ATMEL_US_ENDTX | ATMEL_US_TXBUFE)) {
  425. UART_PUT_IDR(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  426. tasklet_schedule(&atmel_port->tasklet);
  427. }
  428. } else {
  429. /* Interrupt transmit */
  430. if (pending & ATMEL_US_TXRDY) {
  431. UART_PUT_IDR(port, ATMEL_US_TXRDY);
  432. tasklet_schedule(&atmel_port->tasklet);
  433. }
  434. }
  435. }
  436. /*
  437. * status flags interrupt handler.
  438. */
  439. static void
  440. atmel_handle_status(struct uart_port *port, unsigned int pending,
  441. unsigned int status)
  442. {
  443. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  444. if (pending & (ATMEL_US_RIIC | ATMEL_US_DSRIC | ATMEL_US_DCDIC
  445. | ATMEL_US_CTSIC)) {
  446. atmel_port->irq_status = status;
  447. tasklet_schedule(&atmel_port->tasklet);
  448. }
  449. }
  450. /*
  451. * Interrupt handler
  452. */
  453. static irqreturn_t atmel_interrupt(int irq, void *dev_id)
  454. {
  455. struct uart_port *port = dev_id;
  456. unsigned int status, pending, pass_counter = 0;
  457. do {
  458. status = UART_GET_CSR(port);
  459. pending = status & UART_GET_IMR(port);
  460. if (!pending)
  461. break;
  462. atmel_handle_receive(port, pending);
  463. atmel_handle_status(port, pending, status);
  464. atmel_handle_transmit(port, pending);
  465. } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
  466. return IRQ_HANDLED;
  467. }
  468. /*
  469. * Called from tasklet with ENDTX and TXBUFE interrupts disabled.
  470. */
  471. static void atmel_tx_dma(struct uart_port *port)
  472. {
  473. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  474. struct circ_buf *xmit = &port->info->xmit;
  475. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  476. int count;
  477. xmit->tail += pdc->ofs;
  478. xmit->tail &= UART_XMIT_SIZE - 1;
  479. port->icount.tx += pdc->ofs;
  480. pdc->ofs = 0;
  481. if (!uart_circ_empty(xmit)) {
  482. /* more to transmit - setup next transfer */
  483. /* disable PDC transmit */
  484. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  485. dma_sync_single_for_device(port->dev,
  486. pdc->dma_addr,
  487. pdc->dma_size,
  488. DMA_TO_DEVICE);
  489. count = CIRC_CNT_TO_END(xmit->head, xmit->tail, UART_XMIT_SIZE);
  490. pdc->ofs = count;
  491. UART_PUT_TPR(port, pdc->dma_addr + xmit->tail);
  492. UART_PUT_TCR(port, count);
  493. /* re-enable PDC transmit and interrupts */
  494. UART_PUT_PTCR(port, ATMEL_PDC_TXTEN);
  495. UART_PUT_IER(port, ATMEL_US_ENDTX | ATMEL_US_TXBUFE);
  496. } else {
  497. /* nothing left to transmit - disable the transmitter */
  498. /* disable PDC transmit */
  499. UART_PUT_PTCR(port, ATMEL_PDC_TXTDIS);
  500. }
  501. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  502. uart_write_wakeup(port);
  503. }
  504. static void atmel_rx_from_ring(struct uart_port *port)
  505. {
  506. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  507. struct circ_buf *ring = &atmel_port->rx_ring;
  508. unsigned int flg;
  509. unsigned int status;
  510. while (ring->head != ring->tail) {
  511. struct atmel_uart_char c;
  512. /* Make sure c is loaded after head. */
  513. smp_rmb();
  514. c = ((struct atmel_uart_char *)ring->buf)[ring->tail];
  515. ring->tail = (ring->tail + 1) & (ATMEL_SERIAL_RINGSIZE - 1);
  516. port->icount.rx++;
  517. status = c.status;
  518. flg = TTY_NORMAL;
  519. /*
  520. * note that the error handling code is
  521. * out of the main execution path
  522. */
  523. if (unlikely(status & (ATMEL_US_PARE | ATMEL_US_FRAME
  524. | ATMEL_US_OVRE | ATMEL_US_RXBRK))) {
  525. if (status & ATMEL_US_RXBRK) {
  526. /* ignore side-effect */
  527. status &= ~(ATMEL_US_PARE | ATMEL_US_FRAME);
  528. port->icount.brk++;
  529. if (uart_handle_break(port))
  530. continue;
  531. }
  532. if (status & ATMEL_US_PARE)
  533. port->icount.parity++;
  534. if (status & ATMEL_US_FRAME)
  535. port->icount.frame++;
  536. if (status & ATMEL_US_OVRE)
  537. port->icount.overrun++;
  538. status &= port->read_status_mask;
  539. if (status & ATMEL_US_RXBRK)
  540. flg = TTY_BREAK;
  541. else if (status & ATMEL_US_PARE)
  542. flg = TTY_PARITY;
  543. else if (status & ATMEL_US_FRAME)
  544. flg = TTY_FRAME;
  545. }
  546. if (uart_handle_sysrq_char(port, c.ch))
  547. continue;
  548. uart_insert_char(port, status, ATMEL_US_OVRE, c.ch, flg);
  549. }
  550. /*
  551. * Drop the lock here since it might end up calling
  552. * uart_start(), which takes the lock.
  553. */
  554. spin_unlock(&port->lock);
  555. tty_flip_buffer_push(port->info->tty);
  556. spin_lock(&port->lock);
  557. }
  558. static void atmel_rx_from_dma(struct uart_port *port)
  559. {
  560. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  561. struct tty_struct *tty = port->info->tty;
  562. struct atmel_dma_buffer *pdc;
  563. int rx_idx = atmel_port->pdc_rx_idx;
  564. unsigned int head;
  565. unsigned int tail;
  566. unsigned int count;
  567. do {
  568. /* Reset the UART timeout early so that we don't miss one */
  569. UART_PUT_CR(port, ATMEL_US_STTTO);
  570. pdc = &atmel_port->pdc_rx[rx_idx];
  571. head = UART_GET_RPR(port) - pdc->dma_addr;
  572. tail = pdc->ofs;
  573. /* If the PDC has switched buffers, RPR won't contain
  574. * any address within the current buffer. Since head
  575. * is unsigned, we just need a one-way comparison to
  576. * find out.
  577. *
  578. * In this case, we just need to consume the entire
  579. * buffer and resubmit it for DMA. This will clear the
  580. * ENDRX bit as well, so that we can safely re-enable
  581. * all interrupts below.
  582. */
  583. head = min(head, pdc->dma_size);
  584. if (likely(head != tail)) {
  585. dma_sync_single_for_cpu(port->dev, pdc->dma_addr,
  586. pdc->dma_size, DMA_FROM_DEVICE);
  587. /*
  588. * head will only wrap around when we recycle
  589. * the DMA buffer, and when that happens, we
  590. * explicitly set tail to 0. So head will
  591. * always be greater than tail.
  592. */
  593. count = head - tail;
  594. tty_insert_flip_string(tty, pdc->buf + pdc->ofs, count);
  595. dma_sync_single_for_device(port->dev, pdc->dma_addr,
  596. pdc->dma_size, DMA_FROM_DEVICE);
  597. port->icount.rx += count;
  598. pdc->ofs = head;
  599. }
  600. /*
  601. * If the current buffer is full, we need to check if
  602. * the next one contains any additional data.
  603. */
  604. if (head >= pdc->dma_size) {
  605. pdc->ofs = 0;
  606. UART_PUT_RNPR(port, pdc->dma_addr);
  607. UART_PUT_RNCR(port, pdc->dma_size);
  608. rx_idx = !rx_idx;
  609. atmel_port->pdc_rx_idx = rx_idx;
  610. }
  611. } while (head >= pdc->dma_size);
  612. /*
  613. * Drop the lock here since it might end up calling
  614. * uart_start(), which takes the lock.
  615. */
  616. spin_unlock(&port->lock);
  617. tty_flip_buffer_push(tty);
  618. spin_lock(&port->lock);
  619. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  620. }
  621. /*
  622. * tasklet handling tty stuff outside the interrupt handler.
  623. */
  624. static void atmel_tasklet_func(unsigned long data)
  625. {
  626. struct uart_port *port = (struct uart_port *)data;
  627. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  628. unsigned int status;
  629. unsigned int status_change;
  630. /* The interrupt handler does not take the lock */
  631. spin_lock(&port->lock);
  632. if (atmel_use_dma_tx(port))
  633. atmel_tx_dma(port);
  634. else
  635. atmel_tx_chars(port);
  636. status = atmel_port->irq_status;
  637. status_change = status ^ atmel_port->irq_status_prev;
  638. if (status_change & (ATMEL_US_RI | ATMEL_US_DSR
  639. | ATMEL_US_DCD | ATMEL_US_CTS)) {
  640. /* TODO: All reads to CSR will clear these interrupts! */
  641. if (status_change & ATMEL_US_RI)
  642. port->icount.rng++;
  643. if (status_change & ATMEL_US_DSR)
  644. port->icount.dsr++;
  645. if (status_change & ATMEL_US_DCD)
  646. uart_handle_dcd_change(port, !(status & ATMEL_US_DCD));
  647. if (status_change & ATMEL_US_CTS)
  648. uart_handle_cts_change(port, !(status & ATMEL_US_CTS));
  649. wake_up_interruptible(&port->info->delta_msr_wait);
  650. atmel_port->irq_status_prev = status;
  651. }
  652. if (atmel_use_dma_rx(port))
  653. atmel_rx_from_dma(port);
  654. else
  655. atmel_rx_from_ring(port);
  656. spin_unlock(&port->lock);
  657. }
  658. /*
  659. * Perform initialization and enable port for reception
  660. */
  661. static int atmel_startup(struct uart_port *port)
  662. {
  663. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  664. int retval;
  665. /*
  666. * Ensure that no interrupts are enabled otherwise when
  667. * request_irq() is called we could get stuck trying to
  668. * handle an unexpected interrupt
  669. */
  670. UART_PUT_IDR(port, -1);
  671. /*
  672. * Allocate the IRQ
  673. */
  674. retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED,
  675. "atmel_serial", port);
  676. if (retval) {
  677. printk("atmel_serial: atmel_startup - Can't get irq\n");
  678. return retval;
  679. }
  680. /*
  681. * Initialize DMA (if necessary)
  682. */
  683. if (atmel_use_dma_rx(port)) {
  684. int i;
  685. for (i = 0; i < 2; i++) {
  686. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  687. pdc->buf = kmalloc(PDC_BUFFER_SIZE, GFP_KERNEL);
  688. if (pdc->buf == NULL) {
  689. if (i != 0) {
  690. dma_unmap_single(port->dev,
  691. atmel_port->pdc_rx[0].dma_addr,
  692. PDC_BUFFER_SIZE,
  693. DMA_FROM_DEVICE);
  694. kfree(atmel_port->pdc_rx[0].buf);
  695. }
  696. free_irq(port->irq, port);
  697. return -ENOMEM;
  698. }
  699. pdc->dma_addr = dma_map_single(port->dev,
  700. pdc->buf,
  701. PDC_BUFFER_SIZE,
  702. DMA_FROM_DEVICE);
  703. pdc->dma_size = PDC_BUFFER_SIZE;
  704. pdc->ofs = 0;
  705. }
  706. atmel_port->pdc_rx_idx = 0;
  707. UART_PUT_RPR(port, atmel_port->pdc_rx[0].dma_addr);
  708. UART_PUT_RCR(port, PDC_BUFFER_SIZE);
  709. UART_PUT_RNPR(port, atmel_port->pdc_rx[1].dma_addr);
  710. UART_PUT_RNCR(port, PDC_BUFFER_SIZE);
  711. }
  712. if (atmel_use_dma_tx(port)) {
  713. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  714. struct circ_buf *xmit = &port->info->xmit;
  715. pdc->buf = xmit->buf;
  716. pdc->dma_addr = dma_map_single(port->dev,
  717. pdc->buf,
  718. UART_XMIT_SIZE,
  719. DMA_TO_DEVICE);
  720. pdc->dma_size = UART_XMIT_SIZE;
  721. pdc->ofs = 0;
  722. }
  723. /*
  724. * If there is a specific "open" function (to register
  725. * control line interrupts)
  726. */
  727. if (atmel_open_hook) {
  728. retval = atmel_open_hook(port);
  729. if (retval) {
  730. free_irq(port->irq, port);
  731. return retval;
  732. }
  733. }
  734. /*
  735. * Finally, enable the serial port
  736. */
  737. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  738. /* enable xmit & rcvr */
  739. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  740. if (atmel_use_dma_rx(port)) {
  741. /* set UART timeout */
  742. UART_PUT_RTOR(port, PDC_RX_TIMEOUT);
  743. UART_PUT_CR(port, ATMEL_US_STTTO);
  744. UART_PUT_IER(port, ATMEL_US_ENDRX | ATMEL_US_TIMEOUT);
  745. /* enable PDC controller */
  746. UART_PUT_PTCR(port, ATMEL_PDC_RXTEN);
  747. } else {
  748. /* enable receive only */
  749. UART_PUT_IER(port, ATMEL_US_RXRDY);
  750. }
  751. return 0;
  752. }
  753. /*
  754. * Disable the port
  755. */
  756. static void atmel_shutdown(struct uart_port *port)
  757. {
  758. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  759. /*
  760. * Ensure everything is stopped.
  761. */
  762. atmel_stop_rx(port);
  763. atmel_stop_tx(port);
  764. /*
  765. * Shut-down the DMA.
  766. */
  767. if (atmel_use_dma_rx(port)) {
  768. int i;
  769. for (i = 0; i < 2; i++) {
  770. struct atmel_dma_buffer *pdc = &atmel_port->pdc_rx[i];
  771. dma_unmap_single(port->dev,
  772. pdc->dma_addr,
  773. pdc->dma_size,
  774. DMA_FROM_DEVICE);
  775. kfree(pdc->buf);
  776. }
  777. }
  778. if (atmel_use_dma_tx(port)) {
  779. struct atmel_dma_buffer *pdc = &atmel_port->pdc_tx;
  780. dma_unmap_single(port->dev,
  781. pdc->dma_addr,
  782. pdc->dma_size,
  783. DMA_TO_DEVICE);
  784. }
  785. /*
  786. * Disable all interrupts, port and break condition.
  787. */
  788. UART_PUT_CR(port, ATMEL_US_RSTSTA);
  789. UART_PUT_IDR(port, -1);
  790. /*
  791. * Free the interrupt
  792. */
  793. free_irq(port->irq, port);
  794. /*
  795. * If there is a specific "close" function (to unregister
  796. * control line interrupts)
  797. */
  798. if (atmel_close_hook)
  799. atmel_close_hook(port);
  800. }
  801. /*
  802. * Power / Clock management.
  803. */
  804. static void atmel_serial_pm(struct uart_port *port, unsigned int state,
  805. unsigned int oldstate)
  806. {
  807. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  808. switch (state) {
  809. case 0:
  810. /*
  811. * Enable the peripheral clock for this serial port.
  812. * This is called on uart_open() or a resume event.
  813. */
  814. clk_enable(atmel_port->clk);
  815. break;
  816. case 3:
  817. /*
  818. * Disable the peripheral clock for this serial port.
  819. * This is called on uart_close() or a suspend event.
  820. */
  821. clk_disable(atmel_port->clk);
  822. break;
  823. default:
  824. printk(KERN_ERR "atmel_serial: unknown pm %d\n", state);
  825. }
  826. }
  827. /*
  828. * Change the port parameters
  829. */
  830. static void atmel_set_termios(struct uart_port *port, struct ktermios *termios,
  831. struct ktermios *old)
  832. {
  833. unsigned long flags;
  834. unsigned int mode, imr, quot, baud;
  835. /* Get current mode register */
  836. mode = UART_GET_MR(port) & ~(ATMEL_US_USCLKS | ATMEL_US_CHRL
  837. | ATMEL_US_NBSTOP | ATMEL_US_PAR);
  838. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16);
  839. quot = uart_get_divisor(port, baud);
  840. if (quot > 65535) { /* BRGR is 16-bit, so switch to slower clock */
  841. quot /= 8;
  842. mode |= ATMEL_US_USCLKS_MCK_DIV8;
  843. }
  844. /* byte size */
  845. switch (termios->c_cflag & CSIZE) {
  846. case CS5:
  847. mode |= ATMEL_US_CHRL_5;
  848. break;
  849. case CS6:
  850. mode |= ATMEL_US_CHRL_6;
  851. break;
  852. case CS7:
  853. mode |= ATMEL_US_CHRL_7;
  854. break;
  855. default:
  856. mode |= ATMEL_US_CHRL_8;
  857. break;
  858. }
  859. /* stop bits */
  860. if (termios->c_cflag & CSTOPB)
  861. mode |= ATMEL_US_NBSTOP_2;
  862. /* parity */
  863. if (termios->c_cflag & PARENB) {
  864. /* Mark or Space parity */
  865. if (termios->c_cflag & CMSPAR) {
  866. if (termios->c_cflag & PARODD)
  867. mode |= ATMEL_US_PAR_MARK;
  868. else
  869. mode |= ATMEL_US_PAR_SPACE;
  870. } else if (termios->c_cflag & PARODD)
  871. mode |= ATMEL_US_PAR_ODD;
  872. else
  873. mode |= ATMEL_US_PAR_EVEN;
  874. } else
  875. mode |= ATMEL_US_PAR_NONE;
  876. spin_lock_irqsave(&port->lock, flags);
  877. port->read_status_mask = ATMEL_US_OVRE;
  878. if (termios->c_iflag & INPCK)
  879. port->read_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  880. if (termios->c_iflag & (BRKINT | PARMRK))
  881. port->read_status_mask |= ATMEL_US_RXBRK;
  882. if (atmel_use_dma_rx(port))
  883. /* need to enable error interrupts */
  884. UART_PUT_IER(port, port->read_status_mask);
  885. /*
  886. * Characters to ignore
  887. */
  888. port->ignore_status_mask = 0;
  889. if (termios->c_iflag & IGNPAR)
  890. port->ignore_status_mask |= (ATMEL_US_FRAME | ATMEL_US_PARE);
  891. if (termios->c_iflag & IGNBRK) {
  892. port->ignore_status_mask |= ATMEL_US_RXBRK;
  893. /*
  894. * If we're ignoring parity and break indicators,
  895. * ignore overruns too (for real raw support).
  896. */
  897. if (termios->c_iflag & IGNPAR)
  898. port->ignore_status_mask |= ATMEL_US_OVRE;
  899. }
  900. /* TODO: Ignore all characters if CREAD is set.*/
  901. /* update the per-port timeout */
  902. uart_update_timeout(port, termios->c_cflag, baud);
  903. /* save/disable interrupts and drain transmitter */
  904. imr = UART_GET_IMR(port);
  905. UART_PUT_IDR(port, -1);
  906. while (!(UART_GET_CSR(port) & ATMEL_US_TXEMPTY))
  907. cpu_relax();
  908. /* disable receiver and transmitter */
  909. UART_PUT_CR(port, ATMEL_US_TXDIS | ATMEL_US_RXDIS);
  910. /* set the parity, stop bits and data size */
  911. UART_PUT_MR(port, mode);
  912. /* set the baud rate */
  913. UART_PUT_BRGR(port, quot);
  914. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  915. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  916. /* restore interrupts */
  917. UART_PUT_IER(port, imr);
  918. /* CTS flow-control and modem-status interrupts */
  919. if (UART_ENABLE_MS(port, termios->c_cflag))
  920. port->ops->enable_ms(port);
  921. spin_unlock_irqrestore(&port->lock, flags);
  922. }
  923. /*
  924. * Return string describing the specified port
  925. */
  926. static const char *atmel_type(struct uart_port *port)
  927. {
  928. return (port->type == PORT_ATMEL) ? "ATMEL_SERIAL" : NULL;
  929. }
  930. /*
  931. * Release the memory region(s) being used by 'port'.
  932. */
  933. static void atmel_release_port(struct uart_port *port)
  934. {
  935. struct platform_device *pdev = to_platform_device(port->dev);
  936. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  937. release_mem_region(port->mapbase, size);
  938. if (port->flags & UPF_IOREMAP) {
  939. iounmap(port->membase);
  940. port->membase = NULL;
  941. }
  942. }
  943. /*
  944. * Request the memory region(s) being used by 'port'.
  945. */
  946. static int atmel_request_port(struct uart_port *port)
  947. {
  948. struct platform_device *pdev = to_platform_device(port->dev);
  949. int size = pdev->resource[0].end - pdev->resource[0].start + 1;
  950. if (!request_mem_region(port->mapbase, size, "atmel_serial"))
  951. return -EBUSY;
  952. if (port->flags & UPF_IOREMAP) {
  953. port->membase = ioremap(port->mapbase, size);
  954. if (port->membase == NULL) {
  955. release_mem_region(port->mapbase, size);
  956. return -ENOMEM;
  957. }
  958. }
  959. return 0;
  960. }
  961. /*
  962. * Configure/autoconfigure the port.
  963. */
  964. static void atmel_config_port(struct uart_port *port, int flags)
  965. {
  966. if (flags & UART_CONFIG_TYPE) {
  967. port->type = PORT_ATMEL;
  968. atmel_request_port(port);
  969. }
  970. }
  971. /*
  972. * Verify the new serial_struct (for TIOCSSERIAL).
  973. */
  974. static int atmel_verify_port(struct uart_port *port, struct serial_struct *ser)
  975. {
  976. int ret = 0;
  977. if (ser->type != PORT_UNKNOWN && ser->type != PORT_ATMEL)
  978. ret = -EINVAL;
  979. if (port->irq != ser->irq)
  980. ret = -EINVAL;
  981. if (ser->io_type != SERIAL_IO_MEM)
  982. ret = -EINVAL;
  983. if (port->uartclk / 16 != ser->baud_base)
  984. ret = -EINVAL;
  985. if ((void *)port->mapbase != ser->iomem_base)
  986. ret = -EINVAL;
  987. if (port->iobase != ser->port)
  988. ret = -EINVAL;
  989. if (ser->hub6 != 0)
  990. ret = -EINVAL;
  991. return ret;
  992. }
  993. static struct uart_ops atmel_pops = {
  994. .tx_empty = atmel_tx_empty,
  995. .set_mctrl = atmel_set_mctrl,
  996. .get_mctrl = atmel_get_mctrl,
  997. .stop_tx = atmel_stop_tx,
  998. .start_tx = atmel_start_tx,
  999. .stop_rx = atmel_stop_rx,
  1000. .enable_ms = atmel_enable_ms,
  1001. .break_ctl = atmel_break_ctl,
  1002. .startup = atmel_startup,
  1003. .shutdown = atmel_shutdown,
  1004. .set_termios = atmel_set_termios,
  1005. .type = atmel_type,
  1006. .release_port = atmel_release_port,
  1007. .request_port = atmel_request_port,
  1008. .config_port = atmel_config_port,
  1009. .verify_port = atmel_verify_port,
  1010. .pm = atmel_serial_pm,
  1011. };
  1012. /*
  1013. * Configure the port from the platform device resource info.
  1014. */
  1015. static void __devinit atmel_init_port(struct atmel_uart_port *atmel_port,
  1016. struct platform_device *pdev)
  1017. {
  1018. struct uart_port *port = &atmel_port->uart;
  1019. struct atmel_uart_data *data = pdev->dev.platform_data;
  1020. port->iotype = UPIO_MEM;
  1021. port->flags = UPF_BOOT_AUTOCONF;
  1022. port->ops = &atmel_pops;
  1023. port->fifosize = 1;
  1024. port->line = pdev->id;
  1025. port->dev = &pdev->dev;
  1026. port->mapbase = pdev->resource[0].start;
  1027. port->irq = pdev->resource[1].start;
  1028. tasklet_init(&atmel_port->tasklet, atmel_tasklet_func,
  1029. (unsigned long)port);
  1030. memset(&atmel_port->rx_ring, 0, sizeof(atmel_port->rx_ring));
  1031. if (data->regs)
  1032. /* Already mapped by setup code */
  1033. port->membase = data->regs;
  1034. else {
  1035. port->flags |= UPF_IOREMAP;
  1036. port->membase = NULL;
  1037. }
  1038. /* for console, the clock could already be configured */
  1039. if (!atmel_port->clk) {
  1040. atmel_port->clk = clk_get(&pdev->dev, "usart");
  1041. clk_enable(atmel_port->clk);
  1042. port->uartclk = clk_get_rate(atmel_port->clk);
  1043. }
  1044. atmel_port->use_dma_rx = data->use_dma_rx;
  1045. atmel_port->use_dma_tx = data->use_dma_tx;
  1046. if (atmel_use_dma_tx(port))
  1047. port->fifosize = PDC_BUFFER_SIZE;
  1048. }
  1049. /*
  1050. * Register board-specific modem-control line handlers.
  1051. */
  1052. void __init atmel_register_uart_fns(struct atmel_port_fns *fns)
  1053. {
  1054. if (fns->enable_ms)
  1055. atmel_pops.enable_ms = fns->enable_ms;
  1056. if (fns->get_mctrl)
  1057. atmel_pops.get_mctrl = fns->get_mctrl;
  1058. if (fns->set_mctrl)
  1059. atmel_pops.set_mctrl = fns->set_mctrl;
  1060. atmel_open_hook = fns->open;
  1061. atmel_close_hook = fns->close;
  1062. atmel_pops.pm = fns->pm;
  1063. atmel_pops.set_wake = fns->set_wake;
  1064. }
  1065. #ifdef CONFIG_SERIAL_ATMEL_CONSOLE
  1066. static void atmel_console_putchar(struct uart_port *port, int ch)
  1067. {
  1068. while (!(UART_GET_CSR(port) & ATMEL_US_TXRDY))
  1069. cpu_relax();
  1070. UART_PUT_CHAR(port, ch);
  1071. }
  1072. /*
  1073. * Interrupts are disabled on entering
  1074. */
  1075. static void atmel_console_write(struct console *co, const char *s, u_int count)
  1076. {
  1077. struct uart_port *port = &atmel_ports[co->index].uart;
  1078. unsigned int status, imr;
  1079. /*
  1080. * First, save IMR and then disable interrupts
  1081. */
  1082. imr = UART_GET_IMR(port);
  1083. UART_PUT_IDR(port, ATMEL_US_RXRDY | ATMEL_US_TXRDY);
  1084. uart_console_write(port, s, count, atmel_console_putchar);
  1085. /*
  1086. * Finally, wait for transmitter to become empty
  1087. * and restore IMR
  1088. */
  1089. do {
  1090. status = UART_GET_CSR(port);
  1091. } while (!(status & ATMEL_US_TXRDY));
  1092. /* set interrupts back the way they were */
  1093. UART_PUT_IER(port, imr);
  1094. }
  1095. /*
  1096. * If the port was already initialised (eg, by a boot loader),
  1097. * try to determine the current setup.
  1098. */
  1099. static void __init atmel_console_get_options(struct uart_port *port, int *baud,
  1100. int *parity, int *bits)
  1101. {
  1102. unsigned int mr, quot;
  1103. /*
  1104. * If the baud rate generator isn't running, the port wasn't
  1105. * initialized by the boot loader.
  1106. */
  1107. quot = UART_GET_BRGR(port);
  1108. if (!quot)
  1109. return;
  1110. mr = UART_GET_MR(port) & ATMEL_US_CHRL;
  1111. if (mr == ATMEL_US_CHRL_8)
  1112. *bits = 8;
  1113. else
  1114. *bits = 7;
  1115. mr = UART_GET_MR(port) & ATMEL_US_PAR;
  1116. if (mr == ATMEL_US_PAR_EVEN)
  1117. *parity = 'e';
  1118. else if (mr == ATMEL_US_PAR_ODD)
  1119. *parity = 'o';
  1120. /*
  1121. * The serial core only rounds down when matching this to a
  1122. * supported baud rate. Make sure we don't end up slightly
  1123. * lower than one of those, as it would make us fall through
  1124. * to a much lower baud rate than we really want.
  1125. */
  1126. *baud = port->uartclk / (16 * (quot - 1));
  1127. }
  1128. static int __init atmel_console_setup(struct console *co, char *options)
  1129. {
  1130. struct uart_port *port = &atmel_ports[co->index].uart;
  1131. int baud = 115200;
  1132. int bits = 8;
  1133. int parity = 'n';
  1134. int flow = 'n';
  1135. if (port->membase == NULL) {
  1136. /* Port not initialized yet - delay setup */
  1137. return -ENODEV;
  1138. }
  1139. UART_PUT_IDR(port, -1);
  1140. UART_PUT_CR(port, ATMEL_US_RSTSTA | ATMEL_US_RSTRX);
  1141. UART_PUT_CR(port, ATMEL_US_TXEN | ATMEL_US_RXEN);
  1142. if (options)
  1143. uart_parse_options(options, &baud, &parity, &bits, &flow);
  1144. else
  1145. atmel_console_get_options(port, &baud, &parity, &bits);
  1146. return uart_set_options(port, co, baud, parity, bits, flow);
  1147. }
  1148. static struct uart_driver atmel_uart;
  1149. static struct console atmel_console = {
  1150. .name = ATMEL_DEVICENAME,
  1151. .write = atmel_console_write,
  1152. .device = uart_console_device,
  1153. .setup = atmel_console_setup,
  1154. .flags = CON_PRINTBUFFER,
  1155. .index = -1,
  1156. .data = &atmel_uart,
  1157. };
  1158. #define ATMEL_CONSOLE_DEVICE &atmel_console
  1159. /*
  1160. * Early console initialization (before VM subsystem initialized).
  1161. */
  1162. static int __init atmel_console_init(void)
  1163. {
  1164. if (atmel_default_console_device) {
  1165. add_preferred_console(ATMEL_DEVICENAME,
  1166. atmel_default_console_device->id, NULL);
  1167. atmel_init_port(&atmel_ports[atmel_default_console_device->id],
  1168. atmel_default_console_device);
  1169. register_console(&atmel_console);
  1170. }
  1171. return 0;
  1172. }
  1173. console_initcall(atmel_console_init);
  1174. /*
  1175. * Late console initialization.
  1176. */
  1177. static int __init atmel_late_console_init(void)
  1178. {
  1179. if (atmel_default_console_device
  1180. && !(atmel_console.flags & CON_ENABLED))
  1181. register_console(&atmel_console);
  1182. return 0;
  1183. }
  1184. core_initcall(atmel_late_console_init);
  1185. static inline bool atmel_is_console_port(struct uart_port *port)
  1186. {
  1187. return port->cons && port->cons->index == port->line;
  1188. }
  1189. #else
  1190. #define ATMEL_CONSOLE_DEVICE NULL
  1191. static inline bool atmel_is_console_port(struct uart_port *port)
  1192. {
  1193. return false;
  1194. }
  1195. #endif
  1196. static struct uart_driver atmel_uart = {
  1197. .owner = THIS_MODULE,
  1198. .driver_name = "atmel_serial",
  1199. .dev_name = ATMEL_DEVICENAME,
  1200. .major = SERIAL_ATMEL_MAJOR,
  1201. .minor = MINOR_START,
  1202. .nr = ATMEL_MAX_UART,
  1203. .cons = ATMEL_CONSOLE_DEVICE,
  1204. };
  1205. #ifdef CONFIG_PM
  1206. static int atmel_serial_suspend(struct platform_device *pdev,
  1207. pm_message_t state)
  1208. {
  1209. struct uart_port *port = platform_get_drvdata(pdev);
  1210. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  1211. if (device_may_wakeup(&pdev->dev)
  1212. && !at91_suspend_entering_slow_clock())
  1213. enable_irq_wake(port->irq);
  1214. else {
  1215. uart_suspend_port(&atmel_uart, port);
  1216. atmel_port->suspended = 1;
  1217. }
  1218. return 0;
  1219. }
  1220. static int atmel_serial_resume(struct platform_device *pdev)
  1221. {
  1222. struct uart_port *port = platform_get_drvdata(pdev);
  1223. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  1224. if (atmel_port->suspended) {
  1225. uart_resume_port(&atmel_uart, port);
  1226. atmel_port->suspended = 0;
  1227. } else
  1228. disable_irq_wake(port->irq);
  1229. return 0;
  1230. }
  1231. #else
  1232. #define atmel_serial_suspend NULL
  1233. #define atmel_serial_resume NULL
  1234. #endif
  1235. static int __devinit atmel_serial_probe(struct platform_device *pdev)
  1236. {
  1237. struct atmel_uart_port *port;
  1238. void *data;
  1239. int ret;
  1240. BUILD_BUG_ON(!is_power_of_2(ATMEL_SERIAL_RINGSIZE));
  1241. port = &atmel_ports[pdev->id];
  1242. atmel_init_port(port, pdev);
  1243. if (!atmel_use_dma_rx(&port->uart)) {
  1244. ret = -ENOMEM;
  1245. data = kmalloc(sizeof(struct atmel_uart_char)
  1246. * ATMEL_SERIAL_RINGSIZE, GFP_KERNEL);
  1247. if (!data)
  1248. goto err_alloc_ring;
  1249. port->rx_ring.buf = data;
  1250. }
  1251. ret = uart_add_one_port(&atmel_uart, &port->uart);
  1252. if (ret)
  1253. goto err_add_port;
  1254. device_init_wakeup(&pdev->dev, 1);
  1255. platform_set_drvdata(pdev, port);
  1256. return 0;
  1257. err_add_port:
  1258. kfree(port->rx_ring.buf);
  1259. port->rx_ring.buf = NULL;
  1260. err_alloc_ring:
  1261. if (!atmel_is_console_port(&port->uart)) {
  1262. clk_disable(port->clk);
  1263. clk_put(port->clk);
  1264. port->clk = NULL;
  1265. }
  1266. return ret;
  1267. }
  1268. static int __devexit atmel_serial_remove(struct platform_device *pdev)
  1269. {
  1270. struct uart_port *port = platform_get_drvdata(pdev);
  1271. struct atmel_uart_port *atmel_port = (struct atmel_uart_port *)port;
  1272. int ret = 0;
  1273. device_init_wakeup(&pdev->dev, 0);
  1274. platform_set_drvdata(pdev, NULL);
  1275. ret = uart_remove_one_port(&atmel_uart, port);
  1276. tasklet_kill(&atmel_port->tasklet);
  1277. kfree(atmel_port->rx_ring.buf);
  1278. /* "port" is allocated statically, so we shouldn't free it */
  1279. clk_disable(atmel_port->clk);
  1280. clk_put(atmel_port->clk);
  1281. return ret;
  1282. }
  1283. static struct platform_driver atmel_serial_driver = {
  1284. .probe = atmel_serial_probe,
  1285. .remove = __devexit_p(atmel_serial_remove),
  1286. .suspend = atmel_serial_suspend,
  1287. .resume = atmel_serial_resume,
  1288. .driver = {
  1289. .name = "atmel_usart",
  1290. .owner = THIS_MODULE,
  1291. },
  1292. };
  1293. static int __init atmel_serial_init(void)
  1294. {
  1295. int ret;
  1296. ret = uart_register_driver(&atmel_uart);
  1297. if (ret)
  1298. return ret;
  1299. ret = platform_driver_register(&atmel_serial_driver);
  1300. if (ret)
  1301. uart_unregister_driver(&atmel_uart);
  1302. return ret;
  1303. }
  1304. static void __exit atmel_serial_exit(void)
  1305. {
  1306. platform_driver_unregister(&atmel_serial_driver);
  1307. uart_unregister_driver(&atmel_uart);
  1308. }
  1309. module_init(atmel_serial_init);
  1310. module_exit(atmel_serial_exit);
  1311. MODULE_AUTHOR("Rick Bronson");
  1312. MODULE_DESCRIPTION("Atmel AT91 / AT32 serial port driver");
  1313. MODULE_LICENSE("GPL");