e1000_ethtool.c 55 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678167916801681168216831684168516861687168816891690169116921693169416951696169716981699170017011702170317041705170617071708170917101711171217131714171517161717171817191720172117221723172417251726172717281729173017311732173317341735173617371738173917401741174217431744174517461747174817491750175117521753175417551756175717581759176017611762176317641765176617671768176917701771177217731774177517761777177817791780178117821783178417851786178717881789179017911792179317941795179617971798179918001801180218031804180518061807180818091810181118121813181418151816181718181819182018211822182318241825182618271828182918301831183218331834183518361837183818391840184118421843184418451846184718481849185018511852185318541855185618571858185918601861186218631864186518661867186818691870187118721873187418751876187718781879188018811882188318841885188618871888188918901891189218931894189518961897189818991900190119021903
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  49. { "multicast", E1000_STAT(net_stats.multicast) },
  50. { "collisions", E1000_STAT(net_stats.collisions) },
  51. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  52. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  53. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  54. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  55. { "rx_fifo_errors", E1000_STAT(net_stats.rx_fifo_errors) },
  56. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  57. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  58. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  59. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  60. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  61. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  62. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  63. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  64. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  65. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  66. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  67. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  68. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  69. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  70. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  71. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  72. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  73. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  74. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  75. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  76. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  77. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  78. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  79. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  80. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  81. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  82. };
  83. #define E1000_QUEUE_STATS_LEN 0
  84. #define E1000_GLOBAL_STATS_LEN \
  85. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  86. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  87. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  88. "Register test (offline)", "Eeprom test (offline)",
  89. "Interrupt test (offline)", "Loopback test (offline)",
  90. "Link test (on/offline)"
  91. };
  92. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  93. static int
  94. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  95. {
  96. struct e1000_adapter *adapter = netdev_priv(netdev);
  97. struct e1000_hw *hw = &adapter->hw;
  98. if (hw->media_type == e1000_media_type_copper) {
  99. ecmd->supported = (SUPPORTED_10baseT_Half |
  100. SUPPORTED_10baseT_Full |
  101. SUPPORTED_100baseT_Half |
  102. SUPPORTED_100baseT_Full |
  103. SUPPORTED_1000baseT_Full|
  104. SUPPORTED_Autoneg |
  105. SUPPORTED_TP);
  106. ecmd->advertising = ADVERTISED_TP;
  107. if (hw->autoneg == 1) {
  108. ecmd->advertising |= ADVERTISED_Autoneg;
  109. /* the e1000 autoneg seems to match ethtool nicely */
  110. ecmd->advertising |= hw->autoneg_advertised;
  111. }
  112. ecmd->port = PORT_TP;
  113. ecmd->phy_address = hw->phy_addr;
  114. if (hw->mac_type == e1000_82543)
  115. ecmd->transceiver = XCVR_EXTERNAL;
  116. else
  117. ecmd->transceiver = XCVR_INTERNAL;
  118. } else {
  119. ecmd->supported = (SUPPORTED_1000baseT_Full |
  120. SUPPORTED_FIBRE |
  121. SUPPORTED_Autoneg);
  122. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  123. ADVERTISED_FIBRE |
  124. ADVERTISED_Autoneg);
  125. ecmd->port = PORT_FIBRE;
  126. if (hw->mac_type >= e1000_82545)
  127. ecmd->transceiver = XCVR_INTERNAL;
  128. else
  129. ecmd->transceiver = XCVR_EXTERNAL;
  130. }
  131. if (netif_carrier_ok(adapter->netdev)) {
  132. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  133. &adapter->link_duplex);
  134. ecmd->speed = adapter->link_speed;
  135. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  136. * and HALF_DUPLEX != DUPLEX_HALF */
  137. if (adapter->link_duplex == FULL_DUPLEX)
  138. ecmd->duplex = DUPLEX_FULL;
  139. else
  140. ecmd->duplex = DUPLEX_HALF;
  141. } else {
  142. ecmd->speed = -1;
  143. ecmd->duplex = -1;
  144. }
  145. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  146. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  147. return 0;
  148. }
  149. static int
  150. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  151. {
  152. struct e1000_adapter *adapter = netdev_priv(netdev);
  153. struct e1000_hw *hw = &adapter->hw;
  154. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  155. * cannot be changed */
  156. if (e1000_check_phy_reset_block(hw)) {
  157. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  158. "when SoL/IDER is active.\n");
  159. return -EINVAL;
  160. }
  161. if (ecmd->autoneg == AUTONEG_ENABLE) {
  162. hw->autoneg = 1;
  163. if (hw->media_type == e1000_media_type_fiber)
  164. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  165. ADVERTISED_FIBRE |
  166. ADVERTISED_Autoneg;
  167. else
  168. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  169. ADVERTISED_10baseT_Full |
  170. ADVERTISED_100baseT_Half |
  171. ADVERTISED_100baseT_Full |
  172. ADVERTISED_1000baseT_Full|
  173. ADVERTISED_Autoneg |
  174. ADVERTISED_TP;
  175. ecmd->advertising = hw->autoneg_advertised;
  176. } else
  177. if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  178. return -EINVAL;
  179. /* reset the link */
  180. if (netif_running(adapter->netdev)) {
  181. e1000_down(adapter);
  182. e1000_reset(adapter);
  183. e1000_up(adapter);
  184. } else
  185. e1000_reset(adapter);
  186. return 0;
  187. }
  188. static void
  189. e1000_get_pauseparam(struct net_device *netdev,
  190. struct ethtool_pauseparam *pause)
  191. {
  192. struct e1000_adapter *adapter = netdev_priv(netdev);
  193. struct e1000_hw *hw = &adapter->hw;
  194. pause->autoneg =
  195. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  196. if (hw->fc == e1000_fc_rx_pause)
  197. pause->rx_pause = 1;
  198. else if (hw->fc == e1000_fc_tx_pause)
  199. pause->tx_pause = 1;
  200. else if (hw->fc == e1000_fc_full) {
  201. pause->rx_pause = 1;
  202. pause->tx_pause = 1;
  203. }
  204. }
  205. static int
  206. e1000_set_pauseparam(struct net_device *netdev,
  207. struct ethtool_pauseparam *pause)
  208. {
  209. struct e1000_adapter *adapter = netdev_priv(netdev);
  210. struct e1000_hw *hw = &adapter->hw;
  211. adapter->fc_autoneg = pause->autoneg;
  212. if (pause->rx_pause && pause->tx_pause)
  213. hw->fc = e1000_fc_full;
  214. else if (pause->rx_pause && !pause->tx_pause)
  215. hw->fc = e1000_fc_rx_pause;
  216. else if (!pause->rx_pause && pause->tx_pause)
  217. hw->fc = e1000_fc_tx_pause;
  218. else if (!pause->rx_pause && !pause->tx_pause)
  219. hw->fc = e1000_fc_none;
  220. hw->original_fc = hw->fc;
  221. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  222. if (netif_running(adapter->netdev)) {
  223. e1000_down(adapter);
  224. e1000_up(adapter);
  225. } else
  226. e1000_reset(adapter);
  227. } else
  228. return ((hw->media_type == e1000_media_type_fiber) ?
  229. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  230. return 0;
  231. }
  232. static uint32_t
  233. e1000_get_rx_csum(struct net_device *netdev)
  234. {
  235. struct e1000_adapter *adapter = netdev_priv(netdev);
  236. return adapter->rx_csum;
  237. }
  238. static int
  239. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  240. {
  241. struct e1000_adapter *adapter = netdev_priv(netdev);
  242. adapter->rx_csum = data;
  243. if (netif_running(netdev)) {
  244. e1000_down(adapter);
  245. e1000_up(adapter);
  246. } else
  247. e1000_reset(adapter);
  248. return 0;
  249. }
  250. static uint32_t
  251. e1000_get_tx_csum(struct net_device *netdev)
  252. {
  253. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  254. }
  255. static int
  256. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  257. {
  258. struct e1000_adapter *adapter = netdev_priv(netdev);
  259. if (adapter->hw.mac_type < e1000_82543) {
  260. if (!data)
  261. return -EINVAL;
  262. return 0;
  263. }
  264. if (data)
  265. netdev->features |= NETIF_F_HW_CSUM;
  266. else
  267. netdev->features &= ~NETIF_F_HW_CSUM;
  268. return 0;
  269. }
  270. #ifdef NETIF_F_TSO
  271. static int
  272. e1000_set_tso(struct net_device *netdev, uint32_t data)
  273. {
  274. struct e1000_adapter *adapter = netdev_priv(netdev);
  275. if ((adapter->hw.mac_type < e1000_82544) ||
  276. (adapter->hw.mac_type == e1000_82547))
  277. return data ? -EINVAL : 0;
  278. if (data)
  279. netdev->features |= NETIF_F_TSO;
  280. else
  281. netdev->features &= ~NETIF_F_TSO;
  282. DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
  283. adapter->tso_force = TRUE;
  284. return 0;
  285. }
  286. #endif /* NETIF_F_TSO */
  287. static uint32_t
  288. e1000_get_msglevel(struct net_device *netdev)
  289. {
  290. struct e1000_adapter *adapter = netdev_priv(netdev);
  291. return adapter->msg_enable;
  292. }
  293. static void
  294. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  295. {
  296. struct e1000_adapter *adapter = netdev_priv(netdev);
  297. adapter->msg_enable = data;
  298. }
  299. static int
  300. e1000_get_regs_len(struct net_device *netdev)
  301. {
  302. #define E1000_REGS_LEN 32
  303. return E1000_REGS_LEN * sizeof(uint32_t);
  304. }
  305. static void
  306. e1000_get_regs(struct net_device *netdev,
  307. struct ethtool_regs *regs, void *p)
  308. {
  309. struct e1000_adapter *adapter = netdev_priv(netdev);
  310. struct e1000_hw *hw = &adapter->hw;
  311. uint32_t *regs_buff = p;
  312. uint16_t phy_data;
  313. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  314. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  315. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  316. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  317. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  318. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  319. regs_buff[4] = E1000_READ_REG(hw, RDH);
  320. regs_buff[5] = E1000_READ_REG(hw, RDT);
  321. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  322. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  323. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  324. regs_buff[9] = E1000_READ_REG(hw, TDH);
  325. regs_buff[10] = E1000_READ_REG(hw, TDT);
  326. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  327. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  328. if (hw->phy_type == e1000_phy_igp) {
  329. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  330. IGP01E1000_PHY_AGC_A);
  331. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  332. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  333. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  334. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  335. IGP01E1000_PHY_AGC_B);
  336. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  337. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  338. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  339. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  340. IGP01E1000_PHY_AGC_C);
  341. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  342. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  343. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  344. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  345. IGP01E1000_PHY_AGC_D);
  346. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  347. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  348. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  349. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  350. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  351. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  352. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  353. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  354. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  355. IGP01E1000_PHY_PCS_INIT_REG);
  356. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  357. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  358. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  359. regs_buff[20] = 0; /* polarity correction enabled (always) */
  360. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  361. regs_buff[23] = regs_buff[18]; /* mdix mode */
  362. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  363. } else {
  364. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  365. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  366. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  367. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  368. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  369. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  370. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  371. regs_buff[18] = regs_buff[13]; /* cable polarity */
  372. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  373. regs_buff[20] = regs_buff[17]; /* polarity correction */
  374. /* phy receive errors */
  375. regs_buff[22] = adapter->phy_stats.receive_errors;
  376. regs_buff[23] = regs_buff[13]; /* mdix mode */
  377. }
  378. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  379. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  380. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  381. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  382. if (hw->mac_type >= e1000_82540 &&
  383. hw->media_type == e1000_media_type_copper) {
  384. regs_buff[26] = E1000_READ_REG(hw, MANC);
  385. }
  386. }
  387. static int
  388. e1000_get_eeprom_len(struct net_device *netdev)
  389. {
  390. struct e1000_adapter *adapter = netdev_priv(netdev);
  391. return adapter->hw.eeprom.word_size * 2;
  392. }
  393. static int
  394. e1000_get_eeprom(struct net_device *netdev,
  395. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  396. {
  397. struct e1000_adapter *adapter = netdev_priv(netdev);
  398. struct e1000_hw *hw = &adapter->hw;
  399. uint16_t *eeprom_buff;
  400. int first_word, last_word;
  401. int ret_val = 0;
  402. uint16_t i;
  403. if (eeprom->len == 0)
  404. return -EINVAL;
  405. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  406. first_word = eeprom->offset >> 1;
  407. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  408. eeprom_buff = kmalloc(sizeof(uint16_t) *
  409. (last_word - first_word + 1), GFP_KERNEL);
  410. if (!eeprom_buff)
  411. return -ENOMEM;
  412. if (hw->eeprom.type == e1000_eeprom_spi)
  413. ret_val = e1000_read_eeprom(hw, first_word,
  414. last_word - first_word + 1,
  415. eeprom_buff);
  416. else {
  417. for (i = 0; i < last_word - first_word + 1; i++)
  418. if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  419. &eeprom_buff[i])))
  420. break;
  421. }
  422. /* Device's eeprom is always little-endian, word addressable */
  423. for (i = 0; i < last_word - first_word + 1; i++)
  424. le16_to_cpus(&eeprom_buff[i]);
  425. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  426. eeprom->len);
  427. kfree(eeprom_buff);
  428. return ret_val;
  429. }
  430. static int
  431. e1000_set_eeprom(struct net_device *netdev,
  432. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  433. {
  434. struct e1000_adapter *adapter = netdev_priv(netdev);
  435. struct e1000_hw *hw = &adapter->hw;
  436. uint16_t *eeprom_buff;
  437. void *ptr;
  438. int max_len, first_word, last_word, ret_val = 0;
  439. uint16_t i;
  440. if (eeprom->len == 0)
  441. return -EOPNOTSUPP;
  442. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  443. return -EFAULT;
  444. max_len = hw->eeprom.word_size * 2;
  445. first_word = eeprom->offset >> 1;
  446. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  447. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  448. if (!eeprom_buff)
  449. return -ENOMEM;
  450. ptr = (void *)eeprom_buff;
  451. if (eeprom->offset & 1) {
  452. /* need read/modify/write of first changed EEPROM word */
  453. /* only the second byte of the word is being modified */
  454. ret_val = e1000_read_eeprom(hw, first_word, 1,
  455. &eeprom_buff[0]);
  456. ptr++;
  457. }
  458. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  459. /* need read/modify/write of last changed EEPROM word */
  460. /* only the first byte of the word is being modified */
  461. ret_val = e1000_read_eeprom(hw, last_word, 1,
  462. &eeprom_buff[last_word - first_word]);
  463. }
  464. /* Device's eeprom is always little-endian, word addressable */
  465. for (i = 0; i < last_word - first_word + 1; i++)
  466. le16_to_cpus(&eeprom_buff[i]);
  467. memcpy(ptr, bytes, eeprom->len);
  468. for (i = 0; i < last_word - first_word + 1; i++)
  469. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  470. ret_val = e1000_write_eeprom(hw, first_word,
  471. last_word - first_word + 1, eeprom_buff);
  472. /* Update the checksum over the first part of the EEPROM if needed
  473. * and flush shadow RAM for 82573 conrollers */
  474. if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  475. (hw->mac_type == e1000_82573)))
  476. e1000_update_eeprom_checksum(hw);
  477. kfree(eeprom_buff);
  478. return ret_val;
  479. }
  480. static void
  481. e1000_get_drvinfo(struct net_device *netdev,
  482. struct ethtool_drvinfo *drvinfo)
  483. {
  484. struct e1000_adapter *adapter = netdev_priv(netdev);
  485. char firmware_version[32];
  486. uint16_t eeprom_data;
  487. strncpy(drvinfo->driver, e1000_driver_name, 32);
  488. strncpy(drvinfo->version, e1000_driver_version, 32);
  489. /* EEPROM image version # is reported as firmware version # for
  490. * 8257{1|2|3} controllers */
  491. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  492. switch (adapter->hw.mac_type) {
  493. case e1000_82571:
  494. case e1000_82572:
  495. case e1000_82573:
  496. case e1000_80003es2lan:
  497. sprintf(firmware_version, "%d.%d-%d",
  498. (eeprom_data & 0xF000) >> 12,
  499. (eeprom_data & 0x0FF0) >> 4,
  500. eeprom_data & 0x000F);
  501. break;
  502. default:
  503. sprintf(firmware_version, "N/A");
  504. }
  505. strncpy(drvinfo->fw_version, firmware_version, 32);
  506. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  507. drvinfo->n_stats = E1000_STATS_LEN;
  508. drvinfo->testinfo_len = E1000_TEST_LEN;
  509. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  510. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  511. }
  512. static void
  513. e1000_get_ringparam(struct net_device *netdev,
  514. struct ethtool_ringparam *ring)
  515. {
  516. struct e1000_adapter *adapter = netdev_priv(netdev);
  517. e1000_mac_type mac_type = adapter->hw.mac_type;
  518. struct e1000_tx_ring *txdr = adapter->tx_ring;
  519. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  520. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  521. E1000_MAX_82544_RXD;
  522. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  523. E1000_MAX_82544_TXD;
  524. ring->rx_mini_max_pending = 0;
  525. ring->rx_jumbo_max_pending = 0;
  526. ring->rx_pending = rxdr->count;
  527. ring->tx_pending = txdr->count;
  528. ring->rx_mini_pending = 0;
  529. ring->rx_jumbo_pending = 0;
  530. }
  531. static int
  532. e1000_set_ringparam(struct net_device *netdev,
  533. struct ethtool_ringparam *ring)
  534. {
  535. struct e1000_adapter *adapter = netdev_priv(netdev);
  536. e1000_mac_type mac_type = adapter->hw.mac_type;
  537. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  538. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  539. int i, err, tx_ring_size, rx_ring_size;
  540. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  541. return -EINVAL;
  542. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  543. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  544. if (netif_running(adapter->netdev))
  545. e1000_down(adapter);
  546. tx_old = adapter->tx_ring;
  547. rx_old = adapter->rx_ring;
  548. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  549. if (!adapter->tx_ring) {
  550. err = -ENOMEM;
  551. goto err_setup_rx;
  552. }
  553. memset(adapter->tx_ring, 0, tx_ring_size);
  554. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  555. if (!adapter->rx_ring) {
  556. kfree(adapter->tx_ring);
  557. err = -ENOMEM;
  558. goto err_setup_rx;
  559. }
  560. memset(adapter->rx_ring, 0, rx_ring_size);
  561. txdr = adapter->tx_ring;
  562. rxdr = adapter->rx_ring;
  563. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  564. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  565. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  566. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  567. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  568. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  569. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  570. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  571. for (i = 0; i < adapter->num_tx_queues; i++)
  572. txdr[i].count = txdr->count;
  573. for (i = 0; i < adapter->num_rx_queues; i++)
  574. rxdr[i].count = rxdr->count;
  575. if (netif_running(adapter->netdev)) {
  576. /* Try to get new resources before deleting old */
  577. if ((err = e1000_setup_all_rx_resources(adapter)))
  578. goto err_setup_rx;
  579. if ((err = e1000_setup_all_tx_resources(adapter)))
  580. goto err_setup_tx;
  581. /* save the new, restore the old in order to free it,
  582. * then restore the new back again */
  583. rx_new = adapter->rx_ring;
  584. tx_new = adapter->tx_ring;
  585. adapter->rx_ring = rx_old;
  586. adapter->tx_ring = tx_old;
  587. e1000_free_all_rx_resources(adapter);
  588. e1000_free_all_tx_resources(adapter);
  589. kfree(tx_old);
  590. kfree(rx_old);
  591. adapter->rx_ring = rx_new;
  592. adapter->tx_ring = tx_new;
  593. if ((err = e1000_up(adapter)))
  594. return err;
  595. }
  596. return 0;
  597. err_setup_tx:
  598. e1000_free_all_rx_resources(adapter);
  599. err_setup_rx:
  600. adapter->rx_ring = rx_old;
  601. adapter->tx_ring = tx_old;
  602. e1000_up(adapter);
  603. return err;
  604. }
  605. #define REG_PATTERN_TEST(R, M, W) \
  606. { \
  607. uint32_t pat, value; \
  608. uint32_t test[] = \
  609. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  610. for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  611. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  612. value = E1000_READ_REG(&adapter->hw, R); \
  613. if (value != (test[pat] & W & M)) { \
  614. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  615. "0x%08X expected 0x%08X\n", \
  616. E1000_##R, value, (test[pat] & W & M)); \
  617. *data = (adapter->hw.mac_type < e1000_82543) ? \
  618. E1000_82542_##R : E1000_##R; \
  619. return 1; \
  620. } \
  621. } \
  622. }
  623. #define REG_SET_AND_CHECK(R, M, W) \
  624. { \
  625. uint32_t value; \
  626. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  627. value = E1000_READ_REG(&adapter->hw, R); \
  628. if ((W & M) != (value & M)) { \
  629. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  630. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  631. *data = (adapter->hw.mac_type < e1000_82543) ? \
  632. E1000_82542_##R : E1000_##R; \
  633. return 1; \
  634. } \
  635. }
  636. static int
  637. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  638. {
  639. uint32_t value, before, after;
  640. uint32_t i, toggle;
  641. /* The status register is Read Only, so a write should fail.
  642. * Some bits that get toggled are ignored.
  643. */
  644. switch (adapter->hw.mac_type) {
  645. /* there are several bits on newer hardware that are r/w */
  646. case e1000_82571:
  647. case e1000_82572:
  648. case e1000_80003es2lan:
  649. toggle = 0x7FFFF3FF;
  650. break;
  651. case e1000_82573:
  652. toggle = 0x7FFFF033;
  653. break;
  654. default:
  655. toggle = 0xFFFFF833;
  656. break;
  657. }
  658. before = E1000_READ_REG(&adapter->hw, STATUS);
  659. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  660. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  661. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  662. if (value != after) {
  663. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  664. "0x%08X expected: 0x%08X\n", after, value);
  665. *data = 1;
  666. return 1;
  667. }
  668. /* restore previous status */
  669. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  670. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  671. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  672. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  673. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  674. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  675. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  676. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  677. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  678. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  679. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  680. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  681. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  682. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  683. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  684. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  685. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  686. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  687. if (adapter->hw.mac_type >= e1000_82543) {
  688. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  689. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  690. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  691. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  692. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  693. for (i = 0; i < E1000_RAR_ENTRIES; i++) {
  694. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  695. 0xFFFFFFFF);
  696. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  697. 0xFFFFFFFF);
  698. }
  699. } else {
  700. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  701. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  702. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  703. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  704. }
  705. for (i = 0; i < E1000_MC_TBL_SIZE; i++)
  706. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  707. *data = 0;
  708. return 0;
  709. }
  710. static int
  711. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  712. {
  713. uint16_t temp;
  714. uint16_t checksum = 0;
  715. uint16_t i;
  716. *data = 0;
  717. /* Read and add up the contents of the EEPROM */
  718. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  719. if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  720. *data = 1;
  721. break;
  722. }
  723. checksum += temp;
  724. }
  725. /* If Checksum is not Correct return error else test passed */
  726. if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  727. *data = 2;
  728. return *data;
  729. }
  730. static irqreturn_t
  731. e1000_test_intr(int irq,
  732. void *data,
  733. struct pt_regs *regs)
  734. {
  735. struct net_device *netdev = (struct net_device *) data;
  736. struct e1000_adapter *adapter = netdev_priv(netdev);
  737. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  738. return IRQ_HANDLED;
  739. }
  740. static int
  741. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  742. {
  743. struct net_device *netdev = adapter->netdev;
  744. uint32_t mask, i=0, shared_int = TRUE;
  745. uint32_t irq = adapter->pdev->irq;
  746. *data = 0;
  747. /* Hook up test interrupt handler just for this test */
  748. if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  749. shared_int = FALSE;
  750. } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  751. netdev->name, netdev)){
  752. *data = 1;
  753. return -1;
  754. }
  755. /* Disable all the interrupts */
  756. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  757. msec_delay(10);
  758. /* Test each interrupt */
  759. for (; i < 10; i++) {
  760. /* Interrupt to test */
  761. mask = 1 << i;
  762. if (!shared_int) {
  763. /* Disable the interrupt to be reported in
  764. * the cause register and then force the same
  765. * interrupt and see if one gets posted. If
  766. * an interrupt was posted to the bus, the
  767. * test failed.
  768. */
  769. adapter->test_icr = 0;
  770. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  771. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  772. msec_delay(10);
  773. if (adapter->test_icr & mask) {
  774. *data = 3;
  775. break;
  776. }
  777. }
  778. /* Enable the interrupt to be reported in
  779. * the cause register and then force the same
  780. * interrupt and see if one gets posted. If
  781. * an interrupt was not posted to the bus, the
  782. * test failed.
  783. */
  784. adapter->test_icr = 0;
  785. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  786. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  787. msec_delay(10);
  788. if (!(adapter->test_icr & mask)) {
  789. *data = 4;
  790. break;
  791. }
  792. if (!shared_int) {
  793. /* Disable the other interrupts to be reported in
  794. * the cause register and then force the other
  795. * interrupts and see if any get posted. If
  796. * an interrupt was posted to the bus, the
  797. * test failed.
  798. */
  799. adapter->test_icr = 0;
  800. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  801. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  802. msec_delay(10);
  803. if (adapter->test_icr) {
  804. *data = 5;
  805. break;
  806. }
  807. }
  808. }
  809. /* Disable all the interrupts */
  810. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  811. msec_delay(10);
  812. /* Unhook test interrupt handler */
  813. free_irq(irq, netdev);
  814. return *data;
  815. }
  816. static void
  817. e1000_free_desc_rings(struct e1000_adapter *adapter)
  818. {
  819. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  820. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  821. struct pci_dev *pdev = adapter->pdev;
  822. int i;
  823. if (txdr->desc && txdr->buffer_info) {
  824. for (i = 0; i < txdr->count; i++) {
  825. if (txdr->buffer_info[i].dma)
  826. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  827. txdr->buffer_info[i].length,
  828. PCI_DMA_TODEVICE);
  829. if (txdr->buffer_info[i].skb)
  830. dev_kfree_skb(txdr->buffer_info[i].skb);
  831. }
  832. }
  833. if (rxdr->desc && rxdr->buffer_info) {
  834. for (i = 0; i < rxdr->count; i++) {
  835. if (rxdr->buffer_info[i].dma)
  836. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  837. rxdr->buffer_info[i].length,
  838. PCI_DMA_FROMDEVICE);
  839. if (rxdr->buffer_info[i].skb)
  840. dev_kfree_skb(rxdr->buffer_info[i].skb);
  841. }
  842. }
  843. if (txdr->desc) {
  844. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  845. txdr->desc = NULL;
  846. }
  847. if (rxdr->desc) {
  848. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  849. rxdr->desc = NULL;
  850. }
  851. kfree(txdr->buffer_info);
  852. txdr->buffer_info = NULL;
  853. kfree(rxdr->buffer_info);
  854. rxdr->buffer_info = NULL;
  855. return;
  856. }
  857. static int
  858. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  859. {
  860. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  861. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  862. struct pci_dev *pdev = adapter->pdev;
  863. uint32_t rctl;
  864. int size, i, ret_val;
  865. /* Setup Tx descriptor ring and Tx buffers */
  866. if (!txdr->count)
  867. txdr->count = E1000_DEFAULT_TXD;
  868. size = txdr->count * sizeof(struct e1000_buffer);
  869. if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  870. ret_val = 1;
  871. goto err_nomem;
  872. }
  873. memset(txdr->buffer_info, 0, size);
  874. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  875. E1000_ROUNDUP(txdr->size, 4096);
  876. if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  877. ret_val = 2;
  878. goto err_nomem;
  879. }
  880. memset(txdr->desc, 0, txdr->size);
  881. txdr->next_to_use = txdr->next_to_clean = 0;
  882. E1000_WRITE_REG(&adapter->hw, TDBAL,
  883. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  884. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  885. E1000_WRITE_REG(&adapter->hw, TDLEN,
  886. txdr->count * sizeof(struct e1000_tx_desc));
  887. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  888. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  889. E1000_WRITE_REG(&adapter->hw, TCTL,
  890. E1000_TCTL_PSP | E1000_TCTL_EN |
  891. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  892. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  893. for (i = 0; i < txdr->count; i++) {
  894. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  895. struct sk_buff *skb;
  896. unsigned int size = 1024;
  897. if (!(skb = alloc_skb(size, GFP_KERNEL))) {
  898. ret_val = 3;
  899. goto err_nomem;
  900. }
  901. skb_put(skb, size);
  902. txdr->buffer_info[i].skb = skb;
  903. txdr->buffer_info[i].length = skb->len;
  904. txdr->buffer_info[i].dma =
  905. pci_map_single(pdev, skb->data, skb->len,
  906. PCI_DMA_TODEVICE);
  907. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  908. tx_desc->lower.data = cpu_to_le32(skb->len);
  909. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  910. E1000_TXD_CMD_IFCS |
  911. E1000_TXD_CMD_RPS);
  912. tx_desc->upper.data = 0;
  913. }
  914. /* Setup Rx descriptor ring and Rx buffers */
  915. if (!rxdr->count)
  916. rxdr->count = E1000_DEFAULT_RXD;
  917. size = rxdr->count * sizeof(struct e1000_buffer);
  918. if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  919. ret_val = 4;
  920. goto err_nomem;
  921. }
  922. memset(rxdr->buffer_info, 0, size);
  923. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  924. if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  925. ret_val = 5;
  926. goto err_nomem;
  927. }
  928. memset(rxdr->desc, 0, rxdr->size);
  929. rxdr->next_to_use = rxdr->next_to_clean = 0;
  930. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  931. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  932. E1000_WRITE_REG(&adapter->hw, RDBAL,
  933. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  934. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  935. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  936. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  937. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  938. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  939. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  940. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  941. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  942. for (i = 0; i < rxdr->count; i++) {
  943. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  944. struct sk_buff *skb;
  945. if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  946. GFP_KERNEL))) {
  947. ret_val = 6;
  948. goto err_nomem;
  949. }
  950. skb_reserve(skb, NET_IP_ALIGN);
  951. rxdr->buffer_info[i].skb = skb;
  952. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  953. rxdr->buffer_info[i].dma =
  954. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  955. PCI_DMA_FROMDEVICE);
  956. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  957. memset(skb->data, 0x00, skb->len);
  958. }
  959. return 0;
  960. err_nomem:
  961. e1000_free_desc_rings(adapter);
  962. return ret_val;
  963. }
  964. static void
  965. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  966. {
  967. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  968. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  969. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  970. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  971. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  972. }
  973. static void
  974. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  975. {
  976. uint16_t phy_reg;
  977. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  978. * Extended PHY Specific Control Register to 25MHz clock. This
  979. * value defaults back to a 2.5MHz clock when the PHY is reset.
  980. */
  981. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  982. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  983. e1000_write_phy_reg(&adapter->hw,
  984. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  985. /* In addition, because of the s/w reset above, we need to enable
  986. * CRS on TX. This must be set for both full and half duplex
  987. * operation.
  988. */
  989. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  990. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  991. e1000_write_phy_reg(&adapter->hw,
  992. M88E1000_PHY_SPEC_CTRL, phy_reg);
  993. }
  994. static int
  995. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  996. {
  997. uint32_t ctrl_reg;
  998. uint16_t phy_reg;
  999. /* Setup the Device Control Register for PHY loopback test. */
  1000. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1001. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  1002. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1003. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1004. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1005. E1000_CTRL_FD); /* Force Duplex to FULL */
  1006. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1007. /* Read the PHY Specific Control Register (0x10) */
  1008. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1009. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1010. * (bits 6:5).
  1011. */
  1012. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1013. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1014. /* Perform software reset on the PHY */
  1015. e1000_phy_reset(&adapter->hw);
  1016. /* Have to setup TX_CLK and TX_CRS after software reset */
  1017. e1000_phy_reset_clk_and_crs(adapter);
  1018. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1019. /* Wait for reset to complete. */
  1020. udelay(500);
  1021. /* Have to setup TX_CLK and TX_CRS after software reset */
  1022. e1000_phy_reset_clk_and_crs(adapter);
  1023. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1024. e1000_phy_disable_receiver(adapter);
  1025. /* Set the loopback bit in the PHY control register. */
  1026. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1027. phy_reg |= MII_CR_LOOPBACK;
  1028. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1029. /* Setup TX_CLK and TX_CRS one more time. */
  1030. e1000_phy_reset_clk_and_crs(adapter);
  1031. /* Check Phy Configuration */
  1032. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1033. if (phy_reg != 0x4100)
  1034. return 9;
  1035. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1036. if (phy_reg != 0x0070)
  1037. return 10;
  1038. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1039. if (phy_reg != 0x001A)
  1040. return 11;
  1041. return 0;
  1042. }
  1043. static int
  1044. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1045. {
  1046. uint32_t ctrl_reg = 0;
  1047. uint32_t stat_reg = 0;
  1048. adapter->hw.autoneg = FALSE;
  1049. if (adapter->hw.phy_type == e1000_phy_m88) {
  1050. /* Auto-MDI/MDIX Off */
  1051. e1000_write_phy_reg(&adapter->hw,
  1052. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1053. /* reset to update Auto-MDI/MDIX */
  1054. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1055. /* autoneg off */
  1056. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1057. }
  1058. /* force 1000, set loopback */
  1059. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1060. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1061. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1062. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1063. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1064. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1065. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1066. E1000_CTRL_FD); /* Force Duplex to FULL */
  1067. if (adapter->hw.media_type == e1000_media_type_copper &&
  1068. adapter->hw.phy_type == e1000_phy_m88) {
  1069. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1070. } else {
  1071. /* Set the ILOS bit on the fiber Nic is half
  1072. * duplex link is detected. */
  1073. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1074. if ((stat_reg & E1000_STATUS_FD) == 0)
  1075. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1076. }
  1077. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1078. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1079. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1080. */
  1081. if (adapter->hw.phy_type == e1000_phy_m88)
  1082. e1000_phy_disable_receiver(adapter);
  1083. udelay(500);
  1084. return 0;
  1085. }
  1086. static int
  1087. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1088. {
  1089. uint16_t phy_reg = 0;
  1090. uint16_t count = 0;
  1091. switch (adapter->hw.mac_type) {
  1092. case e1000_82543:
  1093. if (adapter->hw.media_type == e1000_media_type_copper) {
  1094. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1095. * Some PHY registers get corrupted at random, so
  1096. * attempt this 10 times.
  1097. */
  1098. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1099. count++ < 10);
  1100. if (count < 11)
  1101. return 0;
  1102. }
  1103. break;
  1104. case e1000_82544:
  1105. case e1000_82540:
  1106. case e1000_82545:
  1107. case e1000_82545_rev_3:
  1108. case e1000_82546:
  1109. case e1000_82546_rev_3:
  1110. case e1000_82541:
  1111. case e1000_82541_rev_2:
  1112. case e1000_82547:
  1113. case e1000_82547_rev_2:
  1114. case e1000_82571:
  1115. case e1000_82572:
  1116. case e1000_82573:
  1117. case e1000_80003es2lan:
  1118. return e1000_integrated_phy_loopback(adapter);
  1119. break;
  1120. default:
  1121. /* Default PHY loopback work is to read the MII
  1122. * control register and assert bit 14 (loopback mode).
  1123. */
  1124. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1125. phy_reg |= MII_CR_LOOPBACK;
  1126. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1127. return 0;
  1128. break;
  1129. }
  1130. return 8;
  1131. }
  1132. static int
  1133. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1134. {
  1135. struct e1000_hw *hw = &adapter->hw;
  1136. uint32_t rctl;
  1137. if (hw->media_type == e1000_media_type_fiber ||
  1138. hw->media_type == e1000_media_type_internal_serdes) {
  1139. switch (hw->mac_type) {
  1140. case e1000_82545:
  1141. case e1000_82546:
  1142. case e1000_82545_rev_3:
  1143. case e1000_82546_rev_3:
  1144. return e1000_set_phy_loopback(adapter);
  1145. break;
  1146. case e1000_82571:
  1147. case e1000_82572:
  1148. #define E1000_SERDES_LB_ON 0x410
  1149. e1000_set_phy_loopback(adapter);
  1150. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1151. msec_delay(10);
  1152. return 0;
  1153. break;
  1154. default:
  1155. rctl = E1000_READ_REG(hw, RCTL);
  1156. rctl |= E1000_RCTL_LBM_TCVR;
  1157. E1000_WRITE_REG(hw, RCTL, rctl);
  1158. return 0;
  1159. }
  1160. } else if (hw->media_type == e1000_media_type_copper)
  1161. return e1000_set_phy_loopback(adapter);
  1162. return 7;
  1163. }
  1164. static void
  1165. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1166. {
  1167. struct e1000_hw *hw = &adapter->hw;
  1168. uint32_t rctl;
  1169. uint16_t phy_reg;
  1170. rctl = E1000_READ_REG(hw, RCTL);
  1171. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1172. E1000_WRITE_REG(hw, RCTL, rctl);
  1173. switch (hw->mac_type) {
  1174. case e1000_82571:
  1175. case e1000_82572:
  1176. if (hw->media_type == e1000_media_type_fiber ||
  1177. hw->media_type == e1000_media_type_internal_serdes) {
  1178. #define E1000_SERDES_LB_OFF 0x400
  1179. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1180. msec_delay(10);
  1181. break;
  1182. }
  1183. /* Fall Through */
  1184. case e1000_82545:
  1185. case e1000_82546:
  1186. case e1000_82545_rev_3:
  1187. case e1000_82546_rev_3:
  1188. default:
  1189. hw->autoneg = TRUE;
  1190. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1191. if (phy_reg & MII_CR_LOOPBACK) {
  1192. phy_reg &= ~MII_CR_LOOPBACK;
  1193. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1194. e1000_phy_reset(hw);
  1195. }
  1196. break;
  1197. }
  1198. }
  1199. static void
  1200. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1201. {
  1202. memset(skb->data, 0xFF, frame_size);
  1203. frame_size &= ~1;
  1204. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1205. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1206. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1207. }
  1208. static int
  1209. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1210. {
  1211. frame_size &= ~1;
  1212. if (*(skb->data + 3) == 0xFF) {
  1213. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1214. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1215. return 0;
  1216. }
  1217. }
  1218. return 13;
  1219. }
  1220. static int
  1221. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1222. {
  1223. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1224. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1225. struct pci_dev *pdev = adapter->pdev;
  1226. int i, j, k, l, lc, good_cnt, ret_val=0;
  1227. unsigned long time;
  1228. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1229. /* Calculate the loop count based on the largest descriptor ring
  1230. * The idea is to wrap the largest ring a number of times using 64
  1231. * send/receive pairs during each loop
  1232. */
  1233. if (rxdr->count <= txdr->count)
  1234. lc = ((txdr->count / 64) * 2) + 1;
  1235. else
  1236. lc = ((rxdr->count / 64) * 2) + 1;
  1237. k = l = 0;
  1238. for (j = 0; j <= lc; j++) { /* loop count loop */
  1239. for (i = 0; i < 64; i++) { /* send the packets */
  1240. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1241. 1024);
  1242. pci_dma_sync_single_for_device(pdev,
  1243. txdr->buffer_info[k].dma,
  1244. txdr->buffer_info[k].length,
  1245. PCI_DMA_TODEVICE);
  1246. if (unlikely(++k == txdr->count)) k = 0;
  1247. }
  1248. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1249. msec_delay(200);
  1250. time = jiffies; /* set the start time for the receive */
  1251. good_cnt = 0;
  1252. do { /* receive the sent packets */
  1253. pci_dma_sync_single_for_cpu(pdev,
  1254. rxdr->buffer_info[l].dma,
  1255. rxdr->buffer_info[l].length,
  1256. PCI_DMA_FROMDEVICE);
  1257. ret_val = e1000_check_lbtest_frame(
  1258. rxdr->buffer_info[l].skb,
  1259. 1024);
  1260. if (!ret_val)
  1261. good_cnt++;
  1262. if (unlikely(++l == rxdr->count)) l = 0;
  1263. /* time + 20 msecs (200 msecs on 2.4) is more than
  1264. * enough time to complete the receives, if it's
  1265. * exceeded, break and error off
  1266. */
  1267. } while (good_cnt < 64 && jiffies < (time + 20));
  1268. if (good_cnt != 64) {
  1269. ret_val = 13; /* ret_val is the same as mis-compare */
  1270. break;
  1271. }
  1272. if (jiffies >= (time + 2)) {
  1273. ret_val = 14; /* error code for time out error */
  1274. break;
  1275. }
  1276. } /* end loop count loop */
  1277. return ret_val;
  1278. }
  1279. static int
  1280. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1281. {
  1282. /* PHY loopback cannot be performed if SoL/IDER
  1283. * sessions are active */
  1284. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1285. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1286. "when SoL/IDER is active.\n");
  1287. *data = 0;
  1288. goto out;
  1289. }
  1290. if ((*data = e1000_setup_desc_rings(adapter)))
  1291. goto out;
  1292. if ((*data = e1000_setup_loopback_test(adapter)))
  1293. goto err_loopback;
  1294. *data = e1000_run_loopback_test(adapter);
  1295. e1000_loopback_cleanup(adapter);
  1296. err_loopback:
  1297. e1000_free_desc_rings(adapter);
  1298. out:
  1299. return *data;
  1300. }
  1301. static int
  1302. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1303. {
  1304. *data = 0;
  1305. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1306. int i = 0;
  1307. adapter->hw.serdes_link_down = TRUE;
  1308. /* On some blade server designs, link establishment
  1309. * could take as long as 2-3 minutes */
  1310. do {
  1311. e1000_check_for_link(&adapter->hw);
  1312. if (adapter->hw.serdes_link_down == FALSE)
  1313. return *data;
  1314. msec_delay(20);
  1315. } while (i++ < 3750);
  1316. *data = 1;
  1317. } else {
  1318. e1000_check_for_link(&adapter->hw);
  1319. if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1320. msec_delay(4000);
  1321. if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1322. *data = 1;
  1323. }
  1324. }
  1325. return *data;
  1326. }
  1327. static int
  1328. e1000_diag_test_count(struct net_device *netdev)
  1329. {
  1330. return E1000_TEST_LEN;
  1331. }
  1332. static void
  1333. e1000_diag_test(struct net_device *netdev,
  1334. struct ethtool_test *eth_test, uint64_t *data)
  1335. {
  1336. struct e1000_adapter *adapter = netdev_priv(netdev);
  1337. boolean_t if_running = netif_running(netdev);
  1338. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1339. /* Offline tests */
  1340. /* save speed, duplex, autoneg settings */
  1341. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1342. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1343. uint8_t autoneg = adapter->hw.autoneg;
  1344. /* Link test performed before hardware reset so autoneg doesn't
  1345. * interfere with test result */
  1346. if (e1000_link_test(adapter, &data[4]))
  1347. eth_test->flags |= ETH_TEST_FL_FAILED;
  1348. if (if_running)
  1349. e1000_down(adapter);
  1350. else
  1351. e1000_reset(adapter);
  1352. if (e1000_reg_test(adapter, &data[0]))
  1353. eth_test->flags |= ETH_TEST_FL_FAILED;
  1354. e1000_reset(adapter);
  1355. if (e1000_eeprom_test(adapter, &data[1]))
  1356. eth_test->flags |= ETH_TEST_FL_FAILED;
  1357. e1000_reset(adapter);
  1358. if (e1000_intr_test(adapter, &data[2]))
  1359. eth_test->flags |= ETH_TEST_FL_FAILED;
  1360. e1000_reset(adapter);
  1361. if (e1000_loopback_test(adapter, &data[3]))
  1362. eth_test->flags |= ETH_TEST_FL_FAILED;
  1363. /* restore speed, duplex, autoneg settings */
  1364. adapter->hw.autoneg_advertised = autoneg_advertised;
  1365. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1366. adapter->hw.autoneg = autoneg;
  1367. e1000_reset(adapter);
  1368. if (if_running)
  1369. e1000_up(adapter);
  1370. } else {
  1371. /* Online tests */
  1372. if (e1000_link_test(adapter, &data[4]))
  1373. eth_test->flags |= ETH_TEST_FL_FAILED;
  1374. /* Offline tests aren't run; pass by default */
  1375. data[0] = 0;
  1376. data[1] = 0;
  1377. data[2] = 0;
  1378. data[3] = 0;
  1379. }
  1380. msleep_interruptible(4 * 1000);
  1381. }
  1382. static void
  1383. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1384. {
  1385. struct e1000_adapter *adapter = netdev_priv(netdev);
  1386. struct e1000_hw *hw = &adapter->hw;
  1387. switch (adapter->hw.device_id) {
  1388. case E1000_DEV_ID_82542:
  1389. case E1000_DEV_ID_82543GC_FIBER:
  1390. case E1000_DEV_ID_82543GC_COPPER:
  1391. case E1000_DEV_ID_82544EI_FIBER:
  1392. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1393. case E1000_DEV_ID_82545EM_FIBER:
  1394. case E1000_DEV_ID_82545EM_COPPER:
  1395. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1396. wol->supported = 0;
  1397. wol->wolopts = 0;
  1398. return;
  1399. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1400. /* device id 10B5 port-A supports wol */
  1401. if (!adapter->ksp3_port_a) {
  1402. wol->supported = 0;
  1403. return;
  1404. }
  1405. /* KSP3 does not suppport UCAST wake-ups for any interface */
  1406. wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
  1407. if (adapter->wol & E1000_WUFC_EX)
  1408. DPRINTK(DRV, ERR, "Interface does not support "
  1409. "directed (unicast) frame wake-up packets\n");
  1410. wol->wolopts = 0;
  1411. goto do_defaults;
  1412. case E1000_DEV_ID_82546EB_FIBER:
  1413. case E1000_DEV_ID_82546GB_FIBER:
  1414. case E1000_DEV_ID_82571EB_FIBER:
  1415. /* Wake events only supported on port A for dual fiber */
  1416. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1417. wol->supported = 0;
  1418. wol->wolopts = 0;
  1419. return;
  1420. }
  1421. /* Fall Through */
  1422. default:
  1423. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1424. WAKE_BCAST | WAKE_MAGIC;
  1425. wol->wolopts = 0;
  1426. do_defaults:
  1427. if (adapter->wol & E1000_WUFC_EX)
  1428. wol->wolopts |= WAKE_UCAST;
  1429. if (adapter->wol & E1000_WUFC_MC)
  1430. wol->wolopts |= WAKE_MCAST;
  1431. if (adapter->wol & E1000_WUFC_BC)
  1432. wol->wolopts |= WAKE_BCAST;
  1433. if (adapter->wol & E1000_WUFC_MAG)
  1434. wol->wolopts |= WAKE_MAGIC;
  1435. return;
  1436. }
  1437. }
  1438. static int
  1439. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1440. {
  1441. struct e1000_adapter *adapter = netdev_priv(netdev);
  1442. struct e1000_hw *hw = &adapter->hw;
  1443. switch (adapter->hw.device_id) {
  1444. case E1000_DEV_ID_82542:
  1445. case E1000_DEV_ID_82543GC_FIBER:
  1446. case E1000_DEV_ID_82543GC_COPPER:
  1447. case E1000_DEV_ID_82544EI_FIBER:
  1448. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1449. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1450. case E1000_DEV_ID_82545EM_FIBER:
  1451. case E1000_DEV_ID_82545EM_COPPER:
  1452. return wol->wolopts ? -EOPNOTSUPP : 0;
  1453. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1454. /* device id 10B5 port-A supports wol */
  1455. if (!adapter->ksp3_port_a)
  1456. return wol->wolopts ? -EOPNOTSUPP : 0;
  1457. if (wol->wolopts & WAKE_UCAST) {
  1458. DPRINTK(DRV, ERR, "Interface does not support "
  1459. "directed (unicast) frame wake-up packets\n");
  1460. return -EOPNOTSUPP;
  1461. }
  1462. case E1000_DEV_ID_82546EB_FIBER:
  1463. case E1000_DEV_ID_82546GB_FIBER:
  1464. case E1000_DEV_ID_82571EB_FIBER:
  1465. /* Wake events only supported on port A for dual fiber */
  1466. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1467. return wol->wolopts ? -EOPNOTSUPP : 0;
  1468. /* Fall Through */
  1469. default:
  1470. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1471. return -EOPNOTSUPP;
  1472. adapter->wol = 0;
  1473. if (wol->wolopts & WAKE_UCAST)
  1474. adapter->wol |= E1000_WUFC_EX;
  1475. if (wol->wolopts & WAKE_MCAST)
  1476. adapter->wol |= E1000_WUFC_MC;
  1477. if (wol->wolopts & WAKE_BCAST)
  1478. adapter->wol |= E1000_WUFC_BC;
  1479. if (wol->wolopts & WAKE_MAGIC)
  1480. adapter->wol |= E1000_WUFC_MAG;
  1481. }
  1482. return 0;
  1483. }
  1484. /* toggle LED 4 times per second = 2 "blinks" per second */
  1485. #define E1000_ID_INTERVAL (HZ/4)
  1486. /* bit defines for adapter->led_status */
  1487. #define E1000_LED_ON 0
  1488. static void
  1489. e1000_led_blink_callback(unsigned long data)
  1490. {
  1491. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1492. if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1493. e1000_led_off(&adapter->hw);
  1494. else
  1495. e1000_led_on(&adapter->hw);
  1496. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1497. }
  1498. static int
  1499. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1500. {
  1501. struct e1000_adapter *adapter = netdev_priv(netdev);
  1502. if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1503. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1504. if (adapter->hw.mac_type < e1000_82571) {
  1505. if (!adapter->blink_timer.function) {
  1506. init_timer(&adapter->blink_timer);
  1507. adapter->blink_timer.function = e1000_led_blink_callback;
  1508. adapter->blink_timer.data = (unsigned long) adapter;
  1509. }
  1510. e1000_setup_led(&adapter->hw);
  1511. mod_timer(&adapter->blink_timer, jiffies);
  1512. msleep_interruptible(data * 1000);
  1513. del_timer_sync(&adapter->blink_timer);
  1514. } else if (adapter->hw.mac_type < e1000_82573) {
  1515. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1516. (E1000_LEDCTL_LED2_BLINK_RATE |
  1517. E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
  1518. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1519. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
  1520. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
  1521. msleep_interruptible(data * 1000);
  1522. } else {
  1523. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1524. (E1000_LEDCTL_LED2_BLINK_RATE |
  1525. E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
  1526. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1527. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
  1528. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
  1529. msleep_interruptible(data * 1000);
  1530. }
  1531. e1000_led_off(&adapter->hw);
  1532. clear_bit(E1000_LED_ON, &adapter->led_status);
  1533. e1000_cleanup_led(&adapter->hw);
  1534. return 0;
  1535. }
  1536. static int
  1537. e1000_nway_reset(struct net_device *netdev)
  1538. {
  1539. struct e1000_adapter *adapter = netdev_priv(netdev);
  1540. if (netif_running(netdev)) {
  1541. e1000_down(adapter);
  1542. e1000_up(adapter);
  1543. }
  1544. return 0;
  1545. }
  1546. static int
  1547. e1000_get_stats_count(struct net_device *netdev)
  1548. {
  1549. return E1000_STATS_LEN;
  1550. }
  1551. static void
  1552. e1000_get_ethtool_stats(struct net_device *netdev,
  1553. struct ethtool_stats *stats, uint64_t *data)
  1554. {
  1555. struct e1000_adapter *adapter = netdev_priv(netdev);
  1556. int i;
  1557. e1000_update_stats(adapter);
  1558. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1559. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1560. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1561. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1562. }
  1563. /* BUG_ON(i != E1000_STATS_LEN); */
  1564. }
  1565. static void
  1566. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1567. {
  1568. uint8_t *p = data;
  1569. int i;
  1570. switch (stringset) {
  1571. case ETH_SS_TEST:
  1572. memcpy(data, *e1000_gstrings_test,
  1573. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1574. break;
  1575. case ETH_SS_STATS:
  1576. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1577. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1578. ETH_GSTRING_LEN);
  1579. p += ETH_GSTRING_LEN;
  1580. }
  1581. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1582. break;
  1583. }
  1584. }
  1585. static struct ethtool_ops e1000_ethtool_ops = {
  1586. .get_settings = e1000_get_settings,
  1587. .set_settings = e1000_set_settings,
  1588. .get_drvinfo = e1000_get_drvinfo,
  1589. .get_regs_len = e1000_get_regs_len,
  1590. .get_regs = e1000_get_regs,
  1591. .get_wol = e1000_get_wol,
  1592. .set_wol = e1000_set_wol,
  1593. .get_msglevel = e1000_get_msglevel,
  1594. .set_msglevel = e1000_set_msglevel,
  1595. .nway_reset = e1000_nway_reset,
  1596. .get_link = ethtool_op_get_link,
  1597. .get_eeprom_len = e1000_get_eeprom_len,
  1598. .get_eeprom = e1000_get_eeprom,
  1599. .set_eeprom = e1000_set_eeprom,
  1600. .get_ringparam = e1000_get_ringparam,
  1601. .set_ringparam = e1000_set_ringparam,
  1602. .get_pauseparam = e1000_get_pauseparam,
  1603. .set_pauseparam = e1000_set_pauseparam,
  1604. .get_rx_csum = e1000_get_rx_csum,
  1605. .set_rx_csum = e1000_set_rx_csum,
  1606. .get_tx_csum = e1000_get_tx_csum,
  1607. .set_tx_csum = e1000_set_tx_csum,
  1608. .get_sg = ethtool_op_get_sg,
  1609. .set_sg = ethtool_op_set_sg,
  1610. #ifdef NETIF_F_TSO
  1611. .get_tso = ethtool_op_get_tso,
  1612. .set_tso = e1000_set_tso,
  1613. #endif
  1614. .self_test_count = e1000_diag_test_count,
  1615. .self_test = e1000_diag_test,
  1616. .get_strings = e1000_get_strings,
  1617. .phys_id = e1000_phys_id,
  1618. .get_stats_count = e1000_get_stats_count,
  1619. .get_ethtool_stats = e1000_get_ethtool_stats,
  1620. .get_perm_addr = ethtool_op_get_perm_addr,
  1621. };
  1622. void e1000_set_ethtool_ops(struct net_device *netdev)
  1623. {
  1624. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1625. }