cm_bf537.c 13 KB

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  1. /*
  2. * File: arch/blackfin/mach-bf537/boards/cm_bf537.c
  3. * Based on: arch/blackfin/mach-bf533/boards/ezkit.c
  4. * Author: Aidan Williams <aidan@nicta.com.au>
  5. *
  6. * Created: 2005
  7. * Description: Board description file
  8. *
  9. * Modified:
  10. * Copyright 2005 National ICT Australia (NICTA)
  11. * Copyright 2004-2006 Analog Devices Inc.
  12. *
  13. * Bugs: Enter bugs at http://blackfin.uclinux.org/
  14. *
  15. * This program is free software; you can redistribute it and/or modify
  16. * it under the terms of the GNU General Public License as published by
  17. * the Free Software Foundation; either version 2 of the License, or
  18. * (at your option) any later version.
  19. *
  20. * This program is distributed in the hope that it will be useful,
  21. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * GNU General Public License for more details.
  24. *
  25. * You should have received a copy of the GNU General Public License
  26. * along with this program; if not, see the file COPYING, or write
  27. * to the Free Software Foundation, Inc.,
  28. * 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  29. */
  30. #include <linux/device.h>
  31. #include <linux/etherdevice.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/mtd/mtd.h>
  34. #include <linux/mtd/partitions.h>
  35. #include <linux/spi/spi.h>
  36. #include <linux/spi/flash.h>
  37. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  38. #include <linux/usb/isp1362.h>
  39. #endif
  40. #include <linux/ata_platform.h>
  41. #include <linux/irq.h>
  42. #include <asm/dma.h>
  43. #include <asm/bfin5xx_spi.h>
  44. #include <asm/portmux.h>
  45. #include <asm/dpmc.h>
  46. /*
  47. * Name the Board for the /proc/cpuinfo
  48. */
  49. const char bfin_board_name[] = "Bluetechnix CM BF537";
  50. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  51. /* all SPI peripherals info goes here */
  52. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  53. static struct mtd_partition bfin_spi_flash_partitions[] = {
  54. {
  55. .name = "bootloader",
  56. .size = 0x00020000,
  57. .offset = 0,
  58. .mask_flags = MTD_CAP_ROM
  59. }, {
  60. .name = "kernel",
  61. .size = 0xe0000,
  62. .offset = 0x20000
  63. }, {
  64. .name = "file system",
  65. .size = 0x700000,
  66. .offset = 0x00100000,
  67. }
  68. };
  69. static struct flash_platform_data bfin_spi_flash_data = {
  70. .name = "m25p80",
  71. .parts = bfin_spi_flash_partitions,
  72. .nr_parts = ARRAY_SIZE(bfin_spi_flash_partitions),
  73. .type = "m25p64",
  74. };
  75. /* SPI flash chip (m25p64) */
  76. static struct bfin5xx_spi_chip spi_flash_chip_info = {
  77. .enable_dma = 0, /* use dma transfer with this chip*/
  78. .bits_per_word = 8,
  79. };
  80. #endif
  81. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  82. /* SPI ADC chip */
  83. static struct bfin5xx_spi_chip spi_adc_chip_info = {
  84. .enable_dma = 1, /* use dma transfer with this chip*/
  85. .bits_per_word = 16,
  86. };
  87. #endif
  88. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  89. static struct bfin5xx_spi_chip ad1836_spi_chip_info = {
  90. .enable_dma = 0,
  91. .bits_per_word = 16,
  92. };
  93. #endif
  94. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  95. static struct bfin5xx_spi_chip ad9960_spi_chip_info = {
  96. .enable_dma = 0,
  97. .bits_per_word = 16,
  98. };
  99. #endif
  100. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  101. static struct bfin5xx_spi_chip spi_mmc_chip_info = {
  102. .enable_dma = 1,
  103. .bits_per_word = 8,
  104. };
  105. #endif
  106. static struct spi_board_info bfin_spi_board_info[] __initdata = {
  107. #if defined(CONFIG_MTD_M25P80) || defined(CONFIG_MTD_M25P80_MODULE)
  108. {
  109. /* the modalias must be the same as spi device driver name */
  110. .modalias = "m25p80", /* Name of spi_driver for this device */
  111. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  112. .bus_num = 0, /* Framework bus number */
  113. .chip_select = 1, /* Framework chip select. On STAMP537 it is SPISSEL1*/
  114. .platform_data = &bfin_spi_flash_data,
  115. .controller_data = &spi_flash_chip_info,
  116. .mode = SPI_MODE_3,
  117. },
  118. #endif
  119. #if defined(CONFIG_SPI_ADC_BF533) || defined(CONFIG_SPI_ADC_BF533_MODULE)
  120. {
  121. .modalias = "bfin_spi_adc", /* Name of spi_driver for this device */
  122. .max_speed_hz = 6250000, /* max spi clock (SCK) speed in HZ */
  123. .bus_num = 0, /* Framework bus number */
  124. .chip_select = 1, /* Framework chip select. */
  125. .platform_data = NULL, /* No spi_driver specific config */
  126. .controller_data = &spi_adc_chip_info,
  127. },
  128. #endif
  129. #if defined(CONFIG_SND_BLACKFIN_AD1836) || defined(CONFIG_SND_BLACKFIN_AD1836_MODULE)
  130. {
  131. .modalias = "ad1836-spi",
  132. .max_speed_hz = 3125000, /* max spi clock (SCK) speed in HZ */
  133. .bus_num = 0,
  134. .chip_select = CONFIG_SND_BLACKFIN_SPI_PFBIT,
  135. .controller_data = &ad1836_spi_chip_info,
  136. },
  137. #endif
  138. #if defined(CONFIG_AD9960) || defined(CONFIG_AD9960_MODULE)
  139. {
  140. .modalias = "ad9960-spi",
  141. .max_speed_hz = 10000000, /* max spi clock (SCK) speed in HZ */
  142. .bus_num = 0,
  143. .chip_select = 1,
  144. .controller_data = &ad9960_spi_chip_info,
  145. },
  146. #endif
  147. #if defined(CONFIG_SPI_MMC) || defined(CONFIG_SPI_MMC_MODULE)
  148. {
  149. .modalias = "spi_mmc_dummy",
  150. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  151. .bus_num = 0,
  152. .chip_select = 7,
  153. .platform_data = NULL,
  154. .controller_data = &spi_mmc_chip_info,
  155. .mode = SPI_MODE_3,
  156. },
  157. {
  158. .modalias = "spi_mmc",
  159. .max_speed_hz = 25000000, /* max spi clock (SCK) speed in HZ */
  160. .bus_num = 0,
  161. .chip_select = CONFIG_SPI_MMC_CS_CHAN,
  162. .platform_data = NULL,
  163. .controller_data = &spi_mmc_chip_info,
  164. .mode = SPI_MODE_3,
  165. },
  166. #endif
  167. };
  168. /* SPI (0) */
  169. static struct resource bfin_spi0_resource[] = {
  170. [0] = {
  171. .start = SPI0_REGBASE,
  172. .end = SPI0_REGBASE + 0xFF,
  173. .flags = IORESOURCE_MEM,
  174. },
  175. [1] = {
  176. .start = CH_SPI,
  177. .end = CH_SPI,
  178. .flags = IORESOURCE_IRQ,
  179. }
  180. };
  181. /* SPI controller data */
  182. static struct bfin5xx_spi_master bfin_spi0_info = {
  183. .num_chipselect = 8,
  184. .enable_dma = 1, /* master has the ability to do dma transfer */
  185. .pin_req = {P_SPI0_SCK, P_SPI0_MISO, P_SPI0_MOSI, 0},
  186. };
  187. static struct platform_device bfin_spi0_device = {
  188. .name = "bfin-spi",
  189. .id = 0, /* Bus number */
  190. .num_resources = ARRAY_SIZE(bfin_spi0_resource),
  191. .resource = bfin_spi0_resource,
  192. .dev = {
  193. .platform_data = &bfin_spi0_info, /* Passed to driver */
  194. },
  195. };
  196. #endif /* spi master and devices */
  197. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  198. static struct platform_device rtc_device = {
  199. .name = "rtc-bfin",
  200. .id = -1,
  201. };
  202. #endif
  203. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  204. static struct platform_device hitachi_fb_device = {
  205. .name = "hitachi-tx09",
  206. };
  207. #endif
  208. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  209. static struct resource smc91x_resources[] = {
  210. {
  211. .start = 0x20200300,
  212. .end = 0x20200300 + 16,
  213. .flags = IORESOURCE_MEM,
  214. }, {
  215. .start = IRQ_PF14,
  216. .end = IRQ_PF14,
  217. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  218. },
  219. };
  220. static struct platform_device smc91x_device = {
  221. .name = "smc91x",
  222. .id = 0,
  223. .num_resources = ARRAY_SIZE(smc91x_resources),
  224. .resource = smc91x_resources,
  225. };
  226. #endif
  227. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  228. static struct resource isp1362_hcd_resources[] = {
  229. {
  230. .start = 0x20308000,
  231. .end = 0x20308000,
  232. .flags = IORESOURCE_MEM,
  233. }, {
  234. .start = 0x20308004,
  235. .end = 0x20308004,
  236. .flags = IORESOURCE_MEM,
  237. }, {
  238. .start = IRQ_PG15,
  239. .end = IRQ_PG15,
  240. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  241. },
  242. };
  243. static struct isp1362_platform_data isp1362_priv = {
  244. .sel15Kres = 1,
  245. .clknotstop = 0,
  246. .oc_enable = 0,
  247. .int_act_high = 0,
  248. .int_edge_triggered = 0,
  249. .remote_wakeup_connected = 0,
  250. .no_power_switching = 1,
  251. .power_switching_mode = 0,
  252. };
  253. static struct platform_device isp1362_hcd_device = {
  254. .name = "isp1362-hcd",
  255. .id = 0,
  256. .dev = {
  257. .platform_data = &isp1362_priv,
  258. },
  259. .num_resources = ARRAY_SIZE(isp1362_hcd_resources),
  260. .resource = isp1362_hcd_resources,
  261. };
  262. #endif
  263. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  264. static struct resource net2272_bfin_resources[] = {
  265. {
  266. .start = 0x20200000,
  267. .end = 0x20200000 + 0x100,
  268. .flags = IORESOURCE_MEM,
  269. }, {
  270. .start = IRQ_PH14,
  271. .end = IRQ_PH14,
  272. .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
  273. },
  274. };
  275. static struct platform_device net2272_bfin_device = {
  276. .name = "net2272",
  277. .id = -1,
  278. .num_resources = ARRAY_SIZE(net2272_bfin_resources),
  279. .resource = net2272_bfin_resources,
  280. };
  281. #endif
  282. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  283. static struct resource bfin_uart_resources[] = {
  284. {
  285. .start = 0xFFC00400,
  286. .end = 0xFFC004FF,
  287. .flags = IORESOURCE_MEM,
  288. }, {
  289. .start = 0xFFC02000,
  290. .end = 0xFFC020FF,
  291. .flags = IORESOURCE_MEM,
  292. },
  293. };
  294. static struct platform_device bfin_uart_device = {
  295. .name = "bfin-uart",
  296. .id = 1,
  297. .num_resources = ARRAY_SIZE(bfin_uart_resources),
  298. .resource = bfin_uart_resources,
  299. };
  300. #endif
  301. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  302. static struct resource bfin_sir_resources[] = {
  303. #ifdef CONFIG_BFIN_SIR0
  304. {
  305. .start = 0xFFC00400,
  306. .end = 0xFFC004FF,
  307. .flags = IORESOURCE_MEM,
  308. },
  309. #endif
  310. #ifdef CONFIG_BFIN_SIR1
  311. {
  312. .start = 0xFFC02000,
  313. .end = 0xFFC020FF,
  314. .flags = IORESOURCE_MEM,
  315. },
  316. #endif
  317. };
  318. static struct platform_device bfin_sir_device = {
  319. .name = "bfin_sir",
  320. .id = 0,
  321. .num_resources = ARRAY_SIZE(bfin_sir_resources),
  322. .resource = bfin_sir_resources,
  323. };
  324. #endif
  325. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  326. static struct resource bfin_twi0_resource[] = {
  327. [0] = {
  328. .start = TWI0_REGBASE,
  329. .end = TWI0_REGBASE,
  330. .flags = IORESOURCE_MEM,
  331. },
  332. [1] = {
  333. .start = IRQ_TWI,
  334. .end = IRQ_TWI,
  335. .flags = IORESOURCE_IRQ,
  336. },
  337. };
  338. static struct platform_device i2c_bfin_twi_device = {
  339. .name = "i2c-bfin-twi",
  340. .id = 0,
  341. .num_resources = ARRAY_SIZE(bfin_twi0_resource),
  342. .resource = bfin_twi0_resource,
  343. };
  344. #endif
  345. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  346. static struct platform_device bfin_sport0_uart_device = {
  347. .name = "bfin-sport-uart",
  348. .id = 0,
  349. };
  350. static struct platform_device bfin_sport1_uart_device = {
  351. .name = "bfin-sport-uart",
  352. .id = 1,
  353. };
  354. #endif
  355. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  356. static struct platform_device bfin_mac_device = {
  357. .name = "bfin_mac",
  358. };
  359. #endif
  360. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  361. #define PATA_INT 64
  362. static struct pata_platform_info bfin_pata_platform_data = {
  363. .ioport_shift = 2,
  364. .irq_type = IRQF_TRIGGER_HIGH | IRQF_DISABLED,
  365. };
  366. static struct resource bfin_pata_resources[] = {
  367. {
  368. .start = 0x2030C000,
  369. .end = 0x2030C01F,
  370. .flags = IORESOURCE_MEM,
  371. },
  372. {
  373. .start = 0x2030D018,
  374. .end = 0x2030D01B,
  375. .flags = IORESOURCE_MEM,
  376. },
  377. {
  378. .start = PATA_INT,
  379. .end = PATA_INT,
  380. .flags = IORESOURCE_IRQ,
  381. },
  382. };
  383. static struct platform_device bfin_pata_device = {
  384. .name = "pata_platform",
  385. .id = -1,
  386. .num_resources = ARRAY_SIZE(bfin_pata_resources),
  387. .resource = bfin_pata_resources,
  388. .dev = {
  389. .platform_data = &bfin_pata_platform_data,
  390. }
  391. };
  392. #endif
  393. static const unsigned int cclk_vlev_datasheet[] =
  394. {
  395. VRPAIR(VLEV_085, 250000000),
  396. VRPAIR(VLEV_090, 376000000),
  397. VRPAIR(VLEV_095, 426000000),
  398. VRPAIR(VLEV_100, 426000000),
  399. VRPAIR(VLEV_105, 476000000),
  400. VRPAIR(VLEV_110, 476000000),
  401. VRPAIR(VLEV_115, 476000000),
  402. VRPAIR(VLEV_120, 500000000),
  403. VRPAIR(VLEV_125, 533000000),
  404. VRPAIR(VLEV_130, 600000000),
  405. };
  406. static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
  407. .tuple_tab = cclk_vlev_datasheet,
  408. .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
  409. .vr_settling_time = 25 /* us */,
  410. };
  411. static struct platform_device bfin_dpmc = {
  412. .name = "bfin dpmc",
  413. .dev = {
  414. .platform_data = &bfin_dmpc_vreg_data,
  415. },
  416. };
  417. static struct platform_device *cm_bf537_devices[] __initdata = {
  418. &bfin_dpmc,
  419. #if defined(CONFIG_FB_HITACHI_TX09) || defined(CONFIG_FB_HITACHI_TX09_MODULE)
  420. &hitachi_fb_device,
  421. #endif
  422. #if defined(CONFIG_RTC_DRV_BFIN) || defined(CONFIG_RTC_DRV_BFIN_MODULE)
  423. &rtc_device,
  424. #endif
  425. #if defined(CONFIG_SERIAL_BFIN) || defined(CONFIG_SERIAL_BFIN_MODULE)
  426. &bfin_uart_device,
  427. #endif
  428. #if defined(CONFIG_BFIN_SIR) || defined(CONFIG_BFIN_SIR_MODULE)
  429. &bfin_sir_device,
  430. #endif
  431. #if defined(CONFIG_I2C_BLACKFIN_TWI) || defined(CONFIG_I2C_BLACKFIN_TWI_MODULE)
  432. &i2c_bfin_twi_device,
  433. #endif
  434. #if defined(CONFIG_SERIAL_BFIN_SPORT) || defined(CONFIG_SERIAL_BFIN_SPORT_MODULE)
  435. &bfin_sport0_uart_device,
  436. &bfin_sport1_uart_device,
  437. #endif
  438. #if defined(CONFIG_USB_ISP1362_HCD) || defined(CONFIG_USB_ISP1362_HCD_MODULE)
  439. &isp1362_hcd_device,
  440. #endif
  441. #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
  442. &smc91x_device,
  443. #endif
  444. #if defined(CONFIG_BFIN_MAC) || defined(CONFIG_BFIN_MAC_MODULE)
  445. &bfin_mac_device,
  446. #endif
  447. #if defined(CONFIG_USB_NET2272) || defined(CONFIG_USB_NET2272_MODULE)
  448. &net2272_bfin_device,
  449. #endif
  450. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  451. &bfin_spi0_device,
  452. #endif
  453. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  454. &bfin_pata_device,
  455. #endif
  456. };
  457. static int __init cm_bf537_init(void)
  458. {
  459. printk(KERN_INFO "%s(): registering device resources\n", __func__);
  460. platform_add_devices(cm_bf537_devices, ARRAY_SIZE(cm_bf537_devices));
  461. #if defined(CONFIG_SPI_BFIN) || defined(CONFIG_SPI_BFIN_MODULE)
  462. spi_register_board_info(bfin_spi_board_info, ARRAY_SIZE(bfin_spi_board_info));
  463. #endif
  464. #if defined(CONFIG_PATA_PLATFORM) || defined(CONFIG_PATA_PLATFORM_MODULE)
  465. irq_desc[PATA_INT].status |= IRQ_NOAUTOEN;
  466. #endif
  467. return 0;
  468. }
  469. arch_initcall(cm_bf537_init);
  470. void bfin_get_ether_addr(char *addr)
  471. {
  472. random_ether_addr(addr);
  473. printk(KERN_WARNING "%s:%s: Setting Ethernet MAC to a random one\n", __FILE__, __func__);
  474. }
  475. EXPORT_SYMBOL(bfin_get_ether_addr);