pinctrl.c 9.7 KB

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  1. /*
  2. * SuperH Pin Function Controller pinmux support.
  3. *
  4. * Copyright (C) 2012 Paul Mundt
  5. *
  6. * This file is subject to the terms and conditions of the GNU General Public
  7. * License. See the file "COPYING" in the main directory of this archive
  8. * for more details.
  9. */
  10. #define DRV_NAME "sh-pfc"
  11. #define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
  12. #include <linux/device.h>
  13. #include <linux/err.h>
  14. #include <linux/init.h>
  15. #include <linux/module.h>
  16. #include <linux/pinctrl/consumer.h>
  17. #include <linux/pinctrl/pinconf.h>
  18. #include <linux/pinctrl/pinconf-generic.h>
  19. #include <linux/pinctrl/pinctrl.h>
  20. #include <linux/pinctrl/pinmux.h>
  21. #include <linux/slab.h>
  22. #include <linux/spinlock.h>
  23. #include "core.h"
  24. struct sh_pfc_pinctrl {
  25. struct pinctrl_dev *pctl;
  26. struct pinctrl_desc pctl_desc;
  27. struct sh_pfc *pfc;
  28. struct pinmux_func **functions;
  29. unsigned int nr_functions;
  30. struct pinctrl_pin_desc *pads;
  31. unsigned int nr_pads;
  32. };
  33. static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
  34. {
  35. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  36. return pmx->nr_pads;
  37. }
  38. static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
  39. unsigned selector)
  40. {
  41. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  42. return pmx->pads[selector].name;
  43. }
  44. static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
  45. const unsigned **pins, unsigned *num_pins)
  46. {
  47. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  48. *pins = &pmx->pads[group].number;
  49. *num_pins = 1;
  50. return 0;
  51. }
  52. static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
  53. unsigned offset)
  54. {
  55. seq_printf(s, "%s", DRV_NAME);
  56. }
  57. static const struct pinctrl_ops sh_pfc_pinctrl_ops = {
  58. .get_groups_count = sh_pfc_get_groups_count,
  59. .get_group_name = sh_pfc_get_group_name,
  60. .get_group_pins = sh_pfc_get_group_pins,
  61. .pin_dbg_show = sh_pfc_pin_dbg_show,
  62. };
  63. static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
  64. {
  65. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  66. return pmx->nr_functions;
  67. }
  68. static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
  69. unsigned selector)
  70. {
  71. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  72. return pmx->functions[selector]->name;
  73. }
  74. static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
  75. const char * const **groups,
  76. unsigned * const num_groups)
  77. {
  78. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  79. *groups = &pmx->functions[func]->name;
  80. *num_groups = 1;
  81. return 0;
  82. }
  83. static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
  84. unsigned group)
  85. {
  86. return 0;
  87. }
  88. static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
  89. unsigned group)
  90. {
  91. }
  92. static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
  93. int new_type)
  94. {
  95. struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
  96. unsigned int mark = pin->enum_id;
  97. unsigned long flags;
  98. int pinmux_type;
  99. int ret = -EINVAL;
  100. spin_lock_irqsave(&pfc->lock, flags);
  101. pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
  102. /*
  103. * See if the present config needs to first be de-configured.
  104. */
  105. switch (pinmux_type) {
  106. case PINMUX_TYPE_GPIO:
  107. break;
  108. case PINMUX_TYPE_OUTPUT:
  109. case PINMUX_TYPE_INPUT:
  110. case PINMUX_TYPE_INPUT_PULLUP:
  111. case PINMUX_TYPE_INPUT_PULLDOWN:
  112. sh_pfc_config_mux(pfc, mark, pinmux_type, GPIO_CFG_FREE);
  113. break;
  114. default:
  115. goto err;
  116. }
  117. /*
  118. * Dry run
  119. */
  120. if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_DRYRUN) != 0)
  121. goto err;
  122. /*
  123. * Request
  124. */
  125. if (sh_pfc_config_mux(pfc, mark, new_type, GPIO_CFG_REQ) != 0)
  126. goto err;
  127. pin->flags &= ~PINMUX_FLAG_TYPE;
  128. pin->flags |= new_type;
  129. ret = 0;
  130. err:
  131. spin_unlock_irqrestore(&pfc->lock, flags);
  132. return ret;
  133. }
  134. static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
  135. struct pinctrl_gpio_range *range,
  136. unsigned offset)
  137. {
  138. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  139. struct sh_pfc *pfc = pmx->pfc;
  140. struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
  141. unsigned long flags;
  142. int ret, pinmux_type;
  143. spin_lock_irqsave(&pfc->lock, flags);
  144. pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
  145. switch (pinmux_type) {
  146. case PINMUX_TYPE_GPIO:
  147. case PINMUX_TYPE_INPUT:
  148. case PINMUX_TYPE_OUTPUT:
  149. break;
  150. case PINMUX_TYPE_FUNCTION:
  151. default:
  152. pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
  153. ret = -ENOTSUPP;
  154. goto err;
  155. }
  156. ret = 0;
  157. err:
  158. spin_unlock_irqrestore(&pfc->lock, flags);
  159. return ret;
  160. }
  161. static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
  162. struct pinctrl_gpio_range *range,
  163. unsigned offset)
  164. {
  165. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  166. struct sh_pfc *pfc = pmx->pfc;
  167. struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, offset);
  168. unsigned long flags;
  169. int pinmux_type;
  170. spin_lock_irqsave(&pfc->lock, flags);
  171. pinmux_type = pin->flags & PINMUX_FLAG_TYPE;
  172. sh_pfc_config_mux(pfc, pin->enum_id, pinmux_type, GPIO_CFG_FREE);
  173. spin_unlock_irqrestore(&pfc->lock, flags);
  174. }
  175. static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
  176. struct pinctrl_gpio_range *range,
  177. unsigned offset, bool input)
  178. {
  179. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  180. int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
  181. return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
  182. }
  183. static const struct pinmux_ops sh_pfc_pinmux_ops = {
  184. .get_functions_count = sh_pfc_get_functions_count,
  185. .get_function_name = sh_pfc_get_function_name,
  186. .get_function_groups = sh_pfc_get_function_groups,
  187. .enable = sh_pfc_noop_enable,
  188. .disable = sh_pfc_noop_disable,
  189. .gpio_request_enable = sh_pfc_gpio_request_enable,
  190. .gpio_disable_free = sh_pfc_gpio_disable_free,
  191. .gpio_set_direction = sh_pfc_gpio_set_direction,
  192. };
  193. static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned _pin,
  194. unsigned long *config)
  195. {
  196. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  197. struct sh_pfc *pfc = pmx->pfc;
  198. struct sh_pfc_pin *pin = sh_pfc_get_pin(pfc, _pin);
  199. *config = pin->flags & PINMUX_FLAG_TYPE;
  200. return 0;
  201. }
  202. static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
  203. unsigned long config)
  204. {
  205. struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
  206. /* Validate the new type */
  207. if (config >= PINMUX_FLAG_TYPE)
  208. return -EINVAL;
  209. return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
  210. }
  211. static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
  212. struct seq_file *s, unsigned pin)
  213. {
  214. const char *pinmux_type_str[] = {
  215. [PINMUX_TYPE_NONE] = "none",
  216. [PINMUX_TYPE_FUNCTION] = "function",
  217. [PINMUX_TYPE_GPIO] = "gpio",
  218. [PINMUX_TYPE_OUTPUT] = "output",
  219. [PINMUX_TYPE_INPUT] = "input",
  220. [PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
  221. [PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
  222. };
  223. unsigned long config;
  224. int rc;
  225. rc = sh_pfc_pinconf_get(pctldev, pin, &config);
  226. if (unlikely(rc != 0))
  227. return;
  228. seq_printf(s, " %s", pinmux_type_str[config]);
  229. }
  230. static const struct pinconf_ops sh_pfc_pinconf_ops = {
  231. .pin_config_get = sh_pfc_pinconf_get,
  232. .pin_config_set = sh_pfc_pinconf_set,
  233. .pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
  234. };
  235. /* PFC ranges -> pinctrl pin descs */
  236. static int sh_pfc_map_pins(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
  237. {
  238. const struct pinmux_range *ranges;
  239. struct pinmux_range def_range;
  240. unsigned int nr_ranges;
  241. unsigned int nr_pins;
  242. unsigned int i;
  243. if (pfc->info->ranges == NULL) {
  244. def_range.begin = 0;
  245. def_range.end = pfc->info->nr_pins - 1;
  246. ranges = &def_range;
  247. nr_ranges = 1;
  248. } else {
  249. ranges = pfc->info->ranges;
  250. nr_ranges = pfc->info->nr_ranges;
  251. }
  252. pmx->pads = devm_kzalloc(pfc->dev,
  253. sizeof(*pmx->pads) * pfc->info->nr_pins,
  254. GFP_KERNEL);
  255. if (unlikely(!pmx->pads))
  256. return -ENOMEM;
  257. for (i = 0, nr_pins = 0; i < nr_ranges; ++i) {
  258. const struct pinmux_range *range = &ranges[i];
  259. unsigned int number;
  260. for (number = range->begin; number <= range->end;
  261. number++, nr_pins++) {
  262. struct pinctrl_pin_desc *pin = &pmx->pads[nr_pins];
  263. struct sh_pfc_pin *info = &pfc->info->pins[nr_pins];
  264. pin->number = number;
  265. pin->name = info->name;
  266. }
  267. }
  268. pfc->nr_pins = ranges[nr_ranges-1].end + 1;
  269. return nr_ranges;
  270. }
  271. static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
  272. {
  273. int i, fn;
  274. for (i = 0; i < pfc->info->nr_func_gpios; i++) {
  275. struct pinmux_func *func = pfc->info->func_gpios + i;
  276. if (func->enum_id)
  277. pmx->nr_functions++;
  278. }
  279. pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
  280. sizeof(*pmx->functions), GFP_KERNEL);
  281. if (unlikely(!pmx->functions))
  282. return -ENOMEM;
  283. for (i = fn = 0; i < pfc->info->nr_func_gpios; i++) {
  284. struct pinmux_func *func = pfc->info->func_gpios + i;
  285. if (func->enum_id)
  286. pmx->functions[fn++] = func;
  287. }
  288. return 0;
  289. }
  290. int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
  291. {
  292. struct sh_pfc_pinctrl *pmx;
  293. int nr_ranges;
  294. int ret;
  295. pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
  296. if (unlikely(!pmx))
  297. return -ENOMEM;
  298. pmx->pfc = pfc;
  299. pfc->pinctrl = pmx;
  300. nr_ranges = sh_pfc_map_pins(pfc, pmx);
  301. if (unlikely(nr_ranges < 0))
  302. return nr_ranges;
  303. ret = sh_pfc_map_functions(pfc, pmx);
  304. if (unlikely(ret != 0))
  305. return ret;
  306. pmx->pctl_desc.name = DRV_NAME;
  307. pmx->pctl_desc.owner = THIS_MODULE;
  308. pmx->pctl_desc.pctlops = &sh_pfc_pinctrl_ops;
  309. pmx->pctl_desc.pmxops = &sh_pfc_pinmux_ops;
  310. pmx->pctl_desc.confops = &sh_pfc_pinconf_ops;
  311. pmx->pctl_desc.pins = pmx->pads;
  312. pmx->pctl_desc.npins = pfc->info->nr_pins;
  313. pmx->pctl = pinctrl_register(&pmx->pctl_desc, pfc->dev, pmx);
  314. if (IS_ERR(pmx->pctl))
  315. return PTR_ERR(pmx->pctl);
  316. return 0;
  317. }
  318. int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
  319. {
  320. struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
  321. pinctrl_unregister(pmx->pctl);
  322. pfc->pinctrl = NULL;
  323. return 0;
  324. }