bnx2x_dcb.c 72 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2011 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #include <linux/netdevice.h>
  20. #include <linux/types.h>
  21. #include <linux/errno.h>
  22. #include "bnx2x.h"
  23. #include "bnx2x_cmn.h"
  24. #include "bnx2x_dcb.h"
  25. #ifdef BCM_DCBNL
  26. #include <linux/rtnetlink.h>
  27. #endif
  28. /* forward declarations of dcbx related functions */
  29. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp);
  30. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  31. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  32. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp);
  33. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  34. u32 *set_configuration_ets_pg,
  35. u32 *pri_pg_tbl);
  36. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  37. u32 *pg_pri_orginal_spread,
  38. struct pg_help_data *help_data);
  39. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  40. struct pg_help_data *help_data,
  41. struct dcbx_ets_feature *ets,
  42. u32 *pg_pri_orginal_spread);
  43. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  44. struct cos_help_data *cos_data,
  45. u32 *pg_pri_orginal_spread,
  46. struct dcbx_ets_feature *ets);
  47. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp);
  48. static void bnx2x_pfc_set(struct bnx2x *bp)
  49. {
  50. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  51. u32 pri_bit, val = 0;
  52. int i;
  53. pfc_params.num_of_rx_cos_priority_mask =
  54. bp->dcbx_port_params.ets.num_of_cos;
  55. /* Tx COS configuration */
  56. for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
  57. /*
  58. * We configure only the pauseable bits (non pauseable aren't
  59. * configured at all) it's done to avoid false pauses from
  60. * network
  61. */
  62. pfc_params.rx_cos_priority_mask[i] =
  63. bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
  64. & DCBX_PFC_PRI_PAUSE_MASK(bp);
  65. /*
  66. * Rx COS configuration
  67. * Changing PFC RX configuration .
  68. * In RX COS0 will always be configured to lossy and COS1 to lossless
  69. */
  70. for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
  71. pri_bit = 1 << i;
  72. if (pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp))
  73. val |= 1 << (i * 4);
  74. }
  75. pfc_params.pkt_priority_to_cos = val;
  76. /* RX COS0 */
  77. pfc_params.llfc_low_priority_classes = 0;
  78. /* RX COS1 */
  79. pfc_params.llfc_high_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  80. /* BRB configuration */
  81. pfc_params.cos0_pauseable = false;
  82. pfc_params.cos1_pauseable = true;
  83. bnx2x_acquire_phy_lock(bp);
  84. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  85. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  86. bnx2x_release_phy_lock(bp);
  87. }
  88. static void bnx2x_pfc_clear(struct bnx2x *bp)
  89. {
  90. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  91. nig_params.pause_enable = 1;
  92. #ifdef BNX2X_SAFC
  93. if (bp->flags & SAFC_TX_FLAG) {
  94. u32 high = 0, low = 0;
  95. int i;
  96. for (i = 0; i < BNX2X_MAX_PRIORITY; i++) {
  97. if (bp->pri_map[i] == 1)
  98. high |= (1 << i);
  99. if (bp->pri_map[i] == 0)
  100. low |= (1 << i);
  101. }
  102. nig_params.llfc_low_priority_classes = high;
  103. nig_params.llfc_low_priority_classes = low;
  104. nig_params.pause_enable = 0;
  105. nig_params.llfc_enable = 1;
  106. nig_params.llfc_out_en = 1;
  107. }
  108. #endif /* BNX2X_SAFC */
  109. bnx2x_acquire_phy_lock(bp);
  110. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  111. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  112. bnx2x_release_phy_lock(bp);
  113. }
  114. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  115. struct dcbx_features *features,
  116. u32 error)
  117. {
  118. u8 i = 0;
  119. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  120. /* PG */
  121. DP(NETIF_MSG_LINK,
  122. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  123. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  124. DP(NETIF_MSG_LINK,
  125. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  126. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  127. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  128. DP(NETIF_MSG_LINK,
  129. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  130. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  131. /* pfc */
  132. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pri_en_bitmap %x\n",
  133. features->pfc.pri_en_bitmap);
  134. DP(NETIF_MSG_LINK, "dcbx_features.pfc.pfc_caps %x\n",
  135. features->pfc.pfc_caps);
  136. DP(NETIF_MSG_LINK, "dcbx_features.pfc.enabled %x\n",
  137. features->pfc.enabled);
  138. DP(NETIF_MSG_LINK, "dcbx_features.app.default_pri %x\n",
  139. features->app.default_pri);
  140. DP(NETIF_MSG_LINK, "dcbx_features.app.tc_supported %x\n",
  141. features->app.tc_supported);
  142. DP(NETIF_MSG_LINK, "dcbx_features.app.enabled %x\n",
  143. features->app.enabled);
  144. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  145. DP(NETIF_MSG_LINK,
  146. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  147. i, features->app.app_pri_tbl[i].app_id);
  148. DP(NETIF_MSG_LINK,
  149. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  150. i, features->app.app_pri_tbl[i].pri_bitmap);
  151. DP(NETIF_MSG_LINK,
  152. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  153. i, features->app.app_pri_tbl[i].appBitfield);
  154. }
  155. }
  156. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  157. u8 pri_bitmap,
  158. u8 llfc_traf_type)
  159. {
  160. u32 pri = MAX_PFC_PRIORITIES;
  161. u32 index = MAX_PFC_PRIORITIES - 1;
  162. u32 pri_mask;
  163. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  164. /* Choose the highest priority */
  165. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  166. pri_mask = 1 << index;
  167. if (GET_FLAGS(pri_bitmap, pri_mask))
  168. pri = index ;
  169. index--;
  170. }
  171. if (pri < MAX_PFC_PRIORITIES)
  172. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  173. }
  174. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  175. struct dcbx_app_priority_feature *app,
  176. u32 error) {
  177. u8 index;
  178. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  179. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  180. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_ERROR\n");
  181. if (app->enabled && !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR)) {
  182. bp->dcbx_port_params.app.enabled = true;
  183. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  184. ttp[index] = 0;
  185. if (app->default_pri < MAX_PFC_PRIORITIES)
  186. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  187. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  188. struct dcbx_app_priority_entry *entry =
  189. app->app_pri_tbl;
  190. if (GET_FLAGS(entry[index].appBitfield,
  191. DCBX_APP_SF_ETH_TYPE) &&
  192. ETH_TYPE_FCOE == entry[index].app_id)
  193. bnx2x_dcbx_get_ap_priority(bp,
  194. entry[index].pri_bitmap,
  195. LLFC_TRAFFIC_TYPE_FCOE);
  196. if (GET_FLAGS(entry[index].appBitfield,
  197. DCBX_APP_SF_PORT) &&
  198. TCP_PORT_ISCSI == entry[index].app_id)
  199. bnx2x_dcbx_get_ap_priority(bp,
  200. entry[index].pri_bitmap,
  201. LLFC_TRAFFIC_TYPE_ISCSI);
  202. }
  203. } else {
  204. DP(NETIF_MSG_LINK, "DCBX_LOCAL_APP_DISABLED\n");
  205. bp->dcbx_port_params.app.enabled = false;
  206. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  207. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  208. }
  209. }
  210. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  211. struct dcbx_ets_feature *ets,
  212. u32 error) {
  213. int i = 0;
  214. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  215. struct pg_help_data pg_help_data;
  216. struct bnx2x_dcbx_cos_params *cos_params =
  217. bp->dcbx_port_params.ets.cos_params;
  218. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  219. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  220. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ERROR\n");
  221. /* Clean up old settings of ets on COS */
  222. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
  223. cos_params[i].pauseable = false;
  224. cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
  225. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  226. cos_params[i].pri_bitmask = 0;
  227. }
  228. if (bp->dcbx_port_params.app.enabled &&
  229. !GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR) &&
  230. ets->enabled) {
  231. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_ENABLE\n");
  232. bp->dcbx_port_params.ets.enabled = true;
  233. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  234. pg_pri_orginal_spread,
  235. ets->pri_pg_tbl);
  236. bnx2x_dcbx_get_num_pg_traf_type(bp,
  237. pg_pri_orginal_spread,
  238. &pg_help_data);
  239. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  240. ets, pg_pri_orginal_spread);
  241. } else {
  242. DP(NETIF_MSG_LINK, "DCBX_LOCAL_ETS_DISABLED\n");
  243. bp->dcbx_port_params.ets.enabled = false;
  244. ets->pri_pg_tbl[0] = 0;
  245. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  246. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  247. }
  248. }
  249. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  250. struct dcbx_pfc_feature *pfc, u32 error)
  251. {
  252. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  253. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_ERROR\n");
  254. if (bp->dcbx_port_params.app.enabled &&
  255. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR) &&
  256. pfc->enabled) {
  257. bp->dcbx_port_params.pfc.enabled = true;
  258. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  259. ~(pfc->pri_en_bitmap);
  260. } else {
  261. DP(NETIF_MSG_LINK, "DCBX_LOCAL_PFC_DISABLED\n");
  262. bp->dcbx_port_params.pfc.enabled = false;
  263. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  264. }
  265. }
  266. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  267. struct dcbx_features *features,
  268. u32 error)
  269. {
  270. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  271. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  272. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  273. }
  274. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  275. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  276. u32 *base_mib_addr,
  277. u32 offset,
  278. int read_mib_type)
  279. {
  280. int max_try_read = 0, i;
  281. u32 *buff, mib_size, prefix_seq_num, suffix_seq_num;
  282. struct lldp_remote_mib *remote_mib ;
  283. struct lldp_local_mib *local_mib;
  284. switch (read_mib_type) {
  285. case DCBX_READ_LOCAL_MIB:
  286. mib_size = sizeof(struct lldp_local_mib);
  287. break;
  288. case DCBX_READ_REMOTE_MIB:
  289. mib_size = sizeof(struct lldp_remote_mib);
  290. break;
  291. default:
  292. return 1; /*error*/
  293. }
  294. offset += BP_PORT(bp) * mib_size;
  295. do {
  296. buff = base_mib_addr;
  297. for (i = 0; i < mib_size; i += 4, buff++)
  298. *buff = REG_RD(bp, offset + i);
  299. max_try_read++;
  300. switch (read_mib_type) {
  301. case DCBX_READ_LOCAL_MIB:
  302. local_mib = (struct lldp_local_mib *) base_mib_addr;
  303. prefix_seq_num = local_mib->prefix_seq_num;
  304. suffix_seq_num = local_mib->suffix_seq_num;
  305. break;
  306. case DCBX_READ_REMOTE_MIB:
  307. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  308. prefix_seq_num = remote_mib->prefix_seq_num;
  309. suffix_seq_num = remote_mib->suffix_seq_num;
  310. break;
  311. default:
  312. return 1; /*error*/
  313. }
  314. } while ((prefix_seq_num != suffix_seq_num) &&
  315. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  316. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  317. BNX2X_ERR("MIB could not be read\n");
  318. return 1;
  319. }
  320. return 0;
  321. }
  322. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  323. {
  324. if (BP_PORT(bp)) {
  325. BNX2X_ERR("4 port mode is not supported");
  326. return;
  327. }
  328. if (bp->dcbx_port_params.pfc.enabled)
  329. /*
  330. * 1. Fills up common PFC structures if required
  331. * 2. Configure NIG, MAC and BRB via the elink
  332. */
  333. bnx2x_pfc_set(bp);
  334. else
  335. bnx2x_pfc_clear(bp);
  336. }
  337. static void bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  338. {
  339. DP(NETIF_MSG_LINK, "sending STOP TRAFFIC\n");
  340. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_STOP_TRAFFIC,
  341. 0 /* connectionless */,
  342. 0 /* dataHi is zero */,
  343. 0 /* dataLo is zero */,
  344. NONE_CONNECTION_TYPE);
  345. }
  346. static void bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  347. {
  348. bnx2x_dcbx_fw_struct(bp);
  349. DP(NETIF_MSG_LINK, "sending START TRAFFIC\n");
  350. bnx2x_sp_post(bp, RAMROD_CMD_ID_COMMON_START_TRAFFIC,
  351. 0, /* connectionless */
  352. U64_HI(bnx2x_sp_mapping(bp, pfc_config)),
  353. U64_LO(bnx2x_sp_mapping(bp, pfc_config)),
  354. NONE_CONNECTION_TYPE);
  355. }
  356. static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
  357. {
  358. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  359. int rc = 0;
  360. if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
  361. BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
  362. return;
  363. }
  364. /* valid COS entries */
  365. if (ets->num_of_cos == 1) /* no ETS */
  366. return;
  367. /* sanity */
  368. if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
  369. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  370. ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
  371. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  372. BNX2X_ERR("all COS should have at least bw_limit or strict"
  373. "ets->cos_params[0].strict= %x"
  374. "ets->cos_params[0].bw_tbl= %x"
  375. "ets->cos_params[1].strict= %x"
  376. "ets->cos_params[1].bw_tbl= %x",
  377. ets->cos_params[0].strict,
  378. ets->cos_params[0].bw_tbl,
  379. ets->cos_params[1].strict,
  380. ets->cos_params[1].bw_tbl);
  381. return;
  382. }
  383. /* If we join a group and there is bw_tbl and strict then bw rules */
  384. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  385. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  386. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  387. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  388. /* Do not allow 0-100 configuration
  389. * since PBF does not support it
  390. * force 1-99 instead
  391. */
  392. if (bw_tbl_0 == 0) {
  393. bw_tbl_0 = 1;
  394. bw_tbl_1 = 99;
  395. } else if (bw_tbl_1 == 0) {
  396. bw_tbl_1 = 1;
  397. bw_tbl_0 = 99;
  398. }
  399. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  400. } else {
  401. if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
  402. rc = bnx2x_ets_strict(&bp->link_params, 0);
  403. else if (ets->cos_params[1].strict
  404. == BNX2X_DCBX_STRICT_COS_HIGHEST)
  405. rc = bnx2x_ets_strict(&bp->link_params, 1);
  406. if (rc)
  407. BNX2X_ERR("update_ets_params failed\n");
  408. }
  409. }
  410. /*
  411. * In E3B0 the configuration may have more than 2 COS.
  412. */
  413. void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
  414. {
  415. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  416. struct bnx2x_ets_params ets_params = { 0 };
  417. u8 i;
  418. ets_params.num_of_cos = ets->num_of_cos;
  419. for (i = 0; i < ets->num_of_cos; i++) {
  420. /* COS is SP */
  421. if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
  422. if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
  423. BNX2X_ERR("COS can't be not BW and not SP\n");
  424. return;
  425. }
  426. ets_params.cos[i].state = bnx2x_cos_state_strict;
  427. ets_params.cos[i].params.sp_params.pri =
  428. ets->cos_params[i].strict;
  429. } else { /* COS is BW */
  430. if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
  431. BNX2X_ERR("COS can't be not BW and not SP\n");
  432. return;
  433. }
  434. ets_params.cos[i].state = bnx2x_cos_state_bw;
  435. ets_params.cos[i].params.bw_params.bw =
  436. (u8)ets->cos_params[i].bw_tbl;
  437. }
  438. }
  439. /* Configure the ETS in HW */
  440. if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
  441. &ets_params)) {
  442. BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
  443. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  444. }
  445. }
  446. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  447. {
  448. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  449. if (!bp->dcbx_port_params.ets.enabled)
  450. return;
  451. if (CHIP_IS_E3B0(bp))
  452. bnx2x_dcbx_update_ets_config(bp);
  453. else
  454. bnx2x_dcbx_2cos_limit_update_ets_config(bp);
  455. }
  456. #ifdef BCM_DCBNL
  457. static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
  458. {
  459. struct lldp_remote_mib remote_mib = {0};
  460. u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
  461. int rc;
  462. DP(NETIF_MSG_LINK, "dcbx_remote_mib_offset 0x%x\n",
  463. dcbx_remote_mib_offset);
  464. if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
  465. BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
  466. return -EINVAL;
  467. }
  468. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
  469. DCBX_READ_REMOTE_MIB);
  470. if (rc) {
  471. BNX2X_ERR("Faild to read remote mib from FW\n");
  472. return rc;
  473. }
  474. /* save features and flags */
  475. bp->dcbx_remote_feat = remote_mib.features;
  476. bp->dcbx_remote_flags = remote_mib.flags;
  477. return 0;
  478. }
  479. #endif
  480. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  481. {
  482. struct lldp_local_mib local_mib = {0};
  483. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  484. int rc;
  485. DP(NETIF_MSG_LINK, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  486. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  487. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  488. return -EINVAL;
  489. }
  490. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  491. DCBX_READ_LOCAL_MIB);
  492. if (rc) {
  493. BNX2X_ERR("Faild to read local mib from FW\n");
  494. return rc;
  495. }
  496. /* save features and error */
  497. bp->dcbx_local_feat = local_mib.features;
  498. bp->dcbx_error = local_mib.error;
  499. return 0;
  500. }
  501. #ifdef BCM_DCBNL
  502. static inline
  503. u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
  504. {
  505. u8 pri;
  506. /* Choose the highest priority */
  507. for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
  508. if (ent->pri_bitmap & (1 << pri))
  509. break;
  510. return pri;
  511. }
  512. static inline
  513. u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
  514. {
  515. return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
  516. DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
  517. DCB_APP_IDTYPE_ETHTYPE;
  518. }
  519. int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
  520. {
  521. int i, err = 0;
  522. for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
  523. struct dcbx_app_priority_entry *ent =
  524. &bp->dcbx_local_feat.app.app_pri_tbl[i];
  525. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  526. u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
  527. /* avoid invalid user-priority */
  528. if (up) {
  529. struct dcb_app app;
  530. app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  531. app.protocol = ent->app_id;
  532. app.priority = delall ? 0 : up;
  533. err = dcb_setapp(bp->dev, &app);
  534. }
  535. }
  536. }
  537. return err;
  538. }
  539. #endif
  540. static inline void bnx2x_update_drv_flags(struct bnx2x *bp, u32 flags, u32 set)
  541. {
  542. if (SHMEM2_HAS(bp, drv_flags)) {
  543. u32 drv_flags;
  544. bnx2x_acquire_hw_lock(bp, HW_LOCK_DRV_FLAGS);
  545. drv_flags = SHMEM2_RD(bp, drv_flags);
  546. if (set)
  547. SET_FLAGS(drv_flags, flags);
  548. else
  549. RESET_FLAGS(drv_flags, flags);
  550. SHMEM2_WR(bp, drv_flags, drv_flags);
  551. DP(NETIF_MSG_HW, "drv_flags 0x%08x\n", drv_flags);
  552. bnx2x_release_hw_lock(bp, HW_LOCK_DRV_FLAGS);
  553. }
  554. }
  555. static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
  556. {
  557. u8 prio, cos;
  558. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
  559. for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
  560. if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
  561. & (1 << prio)) {
  562. bp->prio_to_cos[prio] = cos;
  563. }
  564. }
  565. }
  566. /* setup tc must be called under rtnl lock, but we can't take it here
  567. * as we are handling an attetntion on a work queue which must be
  568. * flushed at some rtnl-locked contexts (e.g. if down)
  569. */
  570. if (!test_and_set_bit(BNX2X_SP_RTNL_SETUP_TC, &bp->sp_rtnl_state))
  571. schedule_delayed_work(&bp->sp_rtnl_task, 0);
  572. }
  573. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  574. {
  575. switch (state) {
  576. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  577. {
  578. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  579. #ifdef BCM_DCBNL
  580. /**
  581. * Delete app tlvs from dcbnl before reading new
  582. * negotiation results
  583. */
  584. bnx2x_dcbnl_update_applist(bp, true);
  585. /* Read rmeote mib if dcbx is in the FW */
  586. if (bnx2x_dcbx_read_shmem_remote_mib(bp))
  587. return;
  588. #endif
  589. /* Read neg results if dcbx is in the FW */
  590. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  591. return;
  592. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  593. bp->dcbx_error);
  594. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  595. bp->dcbx_error);
  596. /* mark DCBX result for PMF migration */
  597. bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 1);
  598. #ifdef BCM_DCBNL
  599. /**
  600. * Add new app tlvs to dcbnl
  601. */
  602. bnx2x_dcbnl_update_applist(bp, false);
  603. #endif
  604. bnx2x_dcbx_stop_hw_tx(bp);
  605. /* reconfigure the netdevice with the results of the new
  606. * dcbx negotiation.
  607. */
  608. bnx2x_dcbx_update_tc_mapping(bp);
  609. return;
  610. }
  611. case BNX2X_DCBX_STATE_TX_PAUSED:
  612. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  613. bnx2x_pfc_set_pfc(bp);
  614. bnx2x_dcbx_update_ets_params(bp);
  615. bnx2x_dcbx_resume_hw_tx(bp);
  616. return;
  617. case BNX2X_DCBX_STATE_TX_RELEASED:
  618. DP(NETIF_MSG_LINK, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  619. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  620. #ifdef BCM_DCBNL
  621. /**
  622. * Send a notification for the new negotiated parameters
  623. */
  624. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  625. #endif
  626. return;
  627. default:
  628. BNX2X_ERR("Unknown DCBX_STATE\n");
  629. }
  630. }
  631. #define LLDP_STATS_OFFSET(bp) (BP_PORT(bp)*\
  632. sizeof(struct lldp_dcbx_stat))
  633. /* calculate struct offset in array according to chip information */
  634. #define LLDP_PARAMS_OFFSET(bp) (BP_PORT(bp)*sizeof(struct lldp_params))
  635. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  636. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  637. static void bnx2x_dcbx_lldp_updated_params(struct bnx2x *bp,
  638. u32 dcbx_lldp_params_offset)
  639. {
  640. struct lldp_params lldp_params = {0};
  641. u32 i = 0, *buff = NULL;
  642. u32 offset = dcbx_lldp_params_offset + LLDP_PARAMS_OFFSET(bp);
  643. DP(NETIF_MSG_LINK, "lldp_offset 0x%x\n", offset);
  644. if ((bp->lldp_config_params.overwrite_settings ==
  645. BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE)) {
  646. /* Read the data first */
  647. buff = (u32 *)&lldp_params;
  648. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  649. *buff = REG_RD(bp, (offset + i));
  650. lldp_params.msg_tx_hold =
  651. (u8)bp->lldp_config_params.msg_tx_hold;
  652. lldp_params.msg_fast_tx_interval =
  653. (u8)bp->lldp_config_params.msg_fast_tx;
  654. lldp_params.tx_crd_max =
  655. (u8)bp->lldp_config_params.tx_credit_max;
  656. lldp_params.msg_tx_interval =
  657. (u8)bp->lldp_config_params.msg_tx_interval;
  658. lldp_params.tx_fast =
  659. (u8)bp->lldp_config_params.tx_fast;
  660. /* Write the data.*/
  661. buff = (u32 *)&lldp_params;
  662. for (i = 0; i < sizeof(struct lldp_params); i += 4, buff++)
  663. REG_WR(bp, (offset + i) , *buff);
  664. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  665. bp->lldp_config_params.overwrite_settings)
  666. bp->lldp_config_params.overwrite_settings =
  667. BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  668. }
  669. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  670. u32 dcbx_lldp_params_offset)
  671. {
  672. struct lldp_admin_mib admin_mib;
  673. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  674. u32 *buff;
  675. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  676. /*shortcuts*/
  677. struct dcbx_features *af = &admin_mib.features;
  678. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  679. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  680. buff = (u32 *)&admin_mib;
  681. /* Read the data first */
  682. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  683. *buff = REG_RD(bp, (offset + i));
  684. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  685. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  686. else
  687. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  688. if ((BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  689. dp->overwrite_settings)) {
  690. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  691. admin_mib.ver_cfg_flags |=
  692. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  693. DCBX_CEE_VERSION_MASK;
  694. af->ets.enabled = (u8)dp->admin_ets_enable;
  695. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  696. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  697. if (dp->admin_ets_configuration_tx_enable)
  698. SET_FLAGS(admin_mib.ver_cfg_flags,
  699. DCBX_ETS_CONFIG_TX_ENABLED);
  700. else
  701. RESET_FLAGS(admin_mib.ver_cfg_flags,
  702. DCBX_ETS_CONFIG_TX_ENABLED);
  703. /* For IEEE admin_ets_recommendation_tx_enable */
  704. if (dp->admin_pfc_tx_enable)
  705. SET_FLAGS(admin_mib.ver_cfg_flags,
  706. DCBX_PFC_CONFIG_TX_ENABLED);
  707. else
  708. RESET_FLAGS(admin_mib.ver_cfg_flags,
  709. DCBX_PFC_CONFIG_TX_ENABLED);
  710. if (dp->admin_application_priority_tx_enable)
  711. SET_FLAGS(admin_mib.ver_cfg_flags,
  712. DCBX_APP_CONFIG_TX_ENABLED);
  713. else
  714. RESET_FLAGS(admin_mib.ver_cfg_flags,
  715. DCBX_APP_CONFIG_TX_ENABLED);
  716. if (dp->admin_ets_willing)
  717. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  718. else
  719. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  720. /* For IEEE admin_ets_reco_valid */
  721. if (dp->admin_pfc_willing)
  722. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  723. else
  724. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  725. if (dp->admin_app_priority_willing)
  726. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  727. else
  728. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  729. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  730. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  731. (u8)dp->admin_configuration_bw_precentage[i]);
  732. DP(NETIF_MSG_LINK, "pg_bw_tbl[%d] = %02x\n",
  733. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  734. }
  735. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  736. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  737. (u8)dp->admin_configuration_ets_pg[i]);
  738. DP(NETIF_MSG_LINK, "pri_pg_tbl[%d] = %02x\n",
  739. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  740. }
  741. /*For IEEE admin_recommendation_bw_precentage
  742. *For IEEE admin_recommendation_ets_pg */
  743. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  744. for (i = 0; i < 4; i++) {
  745. if (dp->admin_priority_app_table[i].valid) {
  746. struct bnx2x_admin_priority_app_table *table =
  747. dp->admin_priority_app_table;
  748. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  749. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  750. traf_type = FCOE_APP_IDX;
  751. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  752. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  753. traf_type = ISCSI_APP_IDX;
  754. else
  755. traf_type = other_traf_type++;
  756. af->app.app_pri_tbl[traf_type].app_id =
  757. table[i].app_id;
  758. af->app.app_pri_tbl[traf_type].pri_bitmap =
  759. (u8)(1 << table[i].priority);
  760. af->app.app_pri_tbl[traf_type].appBitfield =
  761. (DCBX_APP_ENTRY_VALID);
  762. af->app.app_pri_tbl[traf_type].appBitfield |=
  763. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  764. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  765. }
  766. }
  767. af->app.default_pri = (u8)dp->admin_default_priority;
  768. } else if (BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE ==
  769. dp->overwrite_settings)
  770. dp->overwrite_settings = BNX2X_DCBX_OVERWRITE_SETTINGS_INVALID;
  771. /* Write the data. */
  772. buff = (u32 *)&admin_mib;
  773. for (i = 0; i < sizeof(struct lldp_admin_mib); i += 4, buff++)
  774. REG_WR(bp, (offset + i), *buff);
  775. }
  776. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  777. {
  778. if (!CHIP_IS_E1x(bp) && !CHIP_MODE_IS_4_PORT(bp)) {
  779. bp->dcb_state = dcb_on;
  780. bp->dcbx_enabled = dcbx_enabled;
  781. } else {
  782. bp->dcb_state = false;
  783. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  784. }
  785. DP(NETIF_MSG_LINK, "DCB state [%s:%s]\n",
  786. dcb_on ? "ON" : "OFF",
  787. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  788. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  789. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  790. "on-chip with negotiation" : "invalid");
  791. }
  792. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  793. {
  794. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  795. bp->dcbx_config_params.admin_ets_willing = 1;
  796. bp->dcbx_config_params.admin_pfc_willing = 1;
  797. bp->dcbx_config_params.overwrite_settings = 1;
  798. bp->dcbx_config_params.admin_ets_enable = 1;
  799. bp->dcbx_config_params.admin_pfc_enable = 1;
  800. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  801. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  802. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  803. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  804. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  805. bp->dcbx_config_params.admin_app_priority_willing = 1;
  806. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 00;
  807. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 50;
  808. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 50;
  809. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  810. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  811. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  812. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  813. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  814. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 1;
  815. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  816. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  817. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 2;
  818. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  819. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  820. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  821. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  822. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 0;
  823. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 1;
  824. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 2;
  825. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  826. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 7;
  827. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 5;
  828. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 6;
  829. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 7;
  830. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  831. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  832. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  833. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  834. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  835. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  836. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  837. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  838. bp->dcbx_config_params.admin_pfc_bitmap = 0x8; /* FCoE(3) enable */
  839. bp->dcbx_config_params.admin_priority_app_table[0].valid = 1;
  840. bp->dcbx_config_params.admin_priority_app_table[1].valid = 1;
  841. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  842. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  843. bp->dcbx_config_params.admin_priority_app_table[0].priority = 3;
  844. bp->dcbx_config_params.admin_priority_app_table[1].priority = 0;
  845. bp->dcbx_config_params.admin_priority_app_table[2].priority = 0;
  846. bp->dcbx_config_params.admin_priority_app_table[3].priority = 0;
  847. bp->dcbx_config_params.admin_priority_app_table[0].traffic_type = 0;
  848. bp->dcbx_config_params.admin_priority_app_table[1].traffic_type = 1;
  849. bp->dcbx_config_params.admin_priority_app_table[2].traffic_type = 0;
  850. bp->dcbx_config_params.admin_priority_app_table[3].traffic_type = 0;
  851. bp->dcbx_config_params.admin_priority_app_table[0].app_id = 0x8906;
  852. bp->dcbx_config_params.admin_priority_app_table[1].app_id = 3260;
  853. bp->dcbx_config_params.admin_priority_app_table[2].app_id = 0;
  854. bp->dcbx_config_params.admin_priority_app_table[3].app_id = 0;
  855. bp->dcbx_config_params.admin_default_priority =
  856. bp->dcbx_config_params.admin_priority_app_table[1].priority;
  857. }
  858. void bnx2x_dcbx_init(struct bnx2x *bp)
  859. {
  860. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  861. if (bp->dcbx_enabled <= 0)
  862. return;
  863. /* validate:
  864. * chip of good for dcbx version,
  865. * dcb is wanted
  866. * the function is pmf
  867. * shmem2 contains DCBX support fields
  868. */
  869. DP(NETIF_MSG_LINK, "dcb_state %d bp->port.pmf %d\n",
  870. bp->dcb_state, bp->port.pmf);
  871. if (bp->dcb_state == BNX2X_DCB_STATE_ON && bp->port.pmf &&
  872. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  873. dcbx_lldp_params_offset =
  874. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  875. DP(NETIF_MSG_LINK, "dcbx_lldp_params_offset 0x%x\n",
  876. dcbx_lldp_params_offset);
  877. bnx2x_update_drv_flags(bp, DRV_FLAGS_DCB_CONFIGURED, 0);
  878. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  879. bnx2x_dcbx_lldp_updated_params(bp,
  880. dcbx_lldp_params_offset);
  881. bnx2x_dcbx_admin_mib_updated_params(bp,
  882. dcbx_lldp_params_offset);
  883. /* Let HW start negotiation */
  884. bnx2x_fw_command(bp,
  885. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  886. }
  887. }
  888. }
  889. static void
  890. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  891. struct flow_control_configuration *pfc_fw_cfg)
  892. {
  893. u8 pri = 0;
  894. u8 cos = 0;
  895. DP(NETIF_MSG_LINK,
  896. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  897. DP(NETIF_MSG_LINK,
  898. "pdev->params.dcbx_port_params.pfc."
  899. "priority_non_pauseable_mask %x\n",
  900. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  901. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  902. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  903. "cos_params[%d].pri_bitmask %x\n", cos,
  904. bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  905. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  906. "cos_params[%d].bw_tbl %x\n", cos,
  907. bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  908. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  909. "cos_params[%d].strict %x\n", cos,
  910. bp->dcbx_port_params.ets.cos_params[cos].strict);
  911. DP(NETIF_MSG_LINK, "pdev->params.dcbx_port_params.ets."
  912. "cos_params[%d].pauseable %x\n", cos,
  913. bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  914. }
  915. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  916. DP(NETIF_MSG_LINK,
  917. "pfc_fw_cfg->traffic_type_to_priority_cos[%d]."
  918. "priority %x\n", pri,
  919. pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  920. DP(NETIF_MSG_LINK,
  921. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  922. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  923. }
  924. }
  925. /* fills help_data according to pg_info */
  926. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  927. u32 *pg_pri_orginal_spread,
  928. struct pg_help_data *help_data)
  929. {
  930. bool pg_found = false;
  931. u32 i, traf_type, add_traf_type, add_pg;
  932. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  933. struct pg_entry_help_data *data = help_data->data; /*shotcut*/
  934. /* Set to invalid */
  935. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  936. data[i].pg = DCBX_ILLEGAL_PG;
  937. for (add_traf_type = 0;
  938. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  939. pg_found = false;
  940. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  941. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  942. for (traf_type = 0;
  943. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  944. traf_type++) {
  945. if (data[traf_type].pg == add_pg) {
  946. if (!(data[traf_type].pg_priority &
  947. (1 << ttp[add_traf_type])))
  948. data[traf_type].
  949. num_of_dif_pri++;
  950. data[traf_type].pg_priority |=
  951. (1 << ttp[add_traf_type]);
  952. pg_found = true;
  953. break;
  954. }
  955. }
  956. if (false == pg_found) {
  957. data[help_data->num_of_pg].pg = add_pg;
  958. data[help_data->num_of_pg].pg_priority =
  959. (1 << ttp[add_traf_type]);
  960. data[help_data->num_of_pg].num_of_dif_pri = 1;
  961. help_data->num_of_pg++;
  962. }
  963. }
  964. DP(NETIF_MSG_LINK,
  965. "add_traf_type %d pg_found %s num_of_pg %d\n",
  966. add_traf_type, (false == pg_found) ? "NO" : "YES",
  967. help_data->num_of_pg);
  968. }
  969. }
  970. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  971. struct cos_help_data *cos_data,
  972. u32 pri_join_mask)
  973. {
  974. /* Only one priority than only one COS */
  975. cos_data->data[0].pausable =
  976. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  977. cos_data->data[0].pri_join_mask = pri_join_mask;
  978. cos_data->data[0].cos_bw = 100;
  979. cos_data->num_of_cos = 1;
  980. }
  981. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  982. struct cos_entry_help_data *data,
  983. u8 pg_bw)
  984. {
  985. if (data->cos_bw == DCBX_INVALID_COS_BW)
  986. data->cos_bw = pg_bw;
  987. else
  988. data->cos_bw += pg_bw;
  989. }
  990. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  991. struct cos_help_data *cos_data,
  992. u32 *pg_pri_orginal_spread,
  993. struct dcbx_ets_feature *ets)
  994. {
  995. u32 pri_tested = 0;
  996. u8 i = 0;
  997. u8 entry = 0;
  998. u8 pg_entry = 0;
  999. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1000. cos_data->data[0].pausable = true;
  1001. cos_data->data[1].pausable = false;
  1002. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1003. for (i = 0 ; i < num_of_pri ; i++) {
  1004. pri_tested = 1 << bp->dcbx_port_params.
  1005. app.traffic_type_priority[i];
  1006. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  1007. cos_data->data[1].pri_join_mask |= pri_tested;
  1008. entry = 1;
  1009. } else {
  1010. cos_data->data[0].pri_join_mask |= pri_tested;
  1011. entry = 0;
  1012. }
  1013. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  1014. app.traffic_type_priority[i]];
  1015. /* There can be only one strict pg */
  1016. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1017. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  1018. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  1019. else
  1020. /* If we join a group and one is strict
  1021. * than the bw rulls */
  1022. cos_data->data[entry].strict =
  1023. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1024. }
  1025. if ((0 == cos_data->data[0].pri_join_mask) &&
  1026. (0 == cos_data->data[1].pri_join_mask))
  1027. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  1028. }
  1029. #ifndef POWER_OF_2
  1030. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  1031. #endif
  1032. static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
  1033. struct pg_help_data *pg_help_data,
  1034. struct cos_help_data *cos_data,
  1035. u32 pri_join_mask,
  1036. u8 num_of_dif_pri)
  1037. {
  1038. u8 i = 0;
  1039. u32 pri_tested = 0;
  1040. u32 pri_mask_without_pri = 0;
  1041. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1042. /*debug*/
  1043. if (num_of_dif_pri == 1) {
  1044. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  1045. return;
  1046. }
  1047. /* single priority group */
  1048. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1049. /* If there are both pauseable and non-pauseable priorities,
  1050. * the pauseable priorities go to the first queue and
  1051. * the non-pauseable priorities go to the second queue.
  1052. */
  1053. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1054. /* Pauseable */
  1055. cos_data->data[0].pausable = true;
  1056. /* Non pauseable.*/
  1057. cos_data->data[1].pausable = false;
  1058. if (2 == num_of_dif_pri) {
  1059. cos_data->data[0].cos_bw = 50;
  1060. cos_data->data[1].cos_bw = 50;
  1061. }
  1062. if (3 == num_of_dif_pri) {
  1063. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  1064. pri_join_mask))) {
  1065. cos_data->data[0].cos_bw = 33;
  1066. cos_data->data[1].cos_bw = 67;
  1067. } else {
  1068. cos_data->data[0].cos_bw = 67;
  1069. cos_data->data[1].cos_bw = 33;
  1070. }
  1071. }
  1072. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  1073. /* If there are only pauseable priorities,
  1074. * then one/two priorities go to the first queue
  1075. * and one priority goes to the second queue.
  1076. */
  1077. if (2 == num_of_dif_pri) {
  1078. cos_data->data[0].cos_bw = 50;
  1079. cos_data->data[1].cos_bw = 50;
  1080. } else {
  1081. cos_data->data[0].cos_bw = 67;
  1082. cos_data->data[1].cos_bw = 33;
  1083. }
  1084. cos_data->data[1].pausable = true;
  1085. cos_data->data[0].pausable = true;
  1086. /* All priorities except FCOE */
  1087. cos_data->data[0].pri_join_mask = (pri_join_mask &
  1088. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  1089. /* Only FCOE priority.*/
  1090. cos_data->data[1].pri_join_mask =
  1091. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  1092. } else
  1093. /* If there are only non-pauseable priorities,
  1094. * they will all go to the same queue.
  1095. */
  1096. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1097. cos_data, pri_join_mask);
  1098. } else {
  1099. /* priority group which is not BW limited (PG#15):*/
  1100. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1101. /* If there are both pauseable and non-pauseable
  1102. * priorities, the pauseable priorities go to the first
  1103. * queue and the non-pauseable priorities
  1104. * go to the second queue.
  1105. */
  1106. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  1107. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  1108. cos_data->data[0].strict =
  1109. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1110. cos_data->data[1].strict =
  1111. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1112. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1113. } else {
  1114. cos_data->data[0].strict =
  1115. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1116. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1117. cos_data->data[1].strict =
  1118. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1119. }
  1120. /* Pauseable */
  1121. cos_data->data[0].pausable = true;
  1122. /* Non pause-able.*/
  1123. cos_data->data[1].pausable = false;
  1124. } else {
  1125. /* If there are only pauseable priorities or
  1126. * only non-pauseable,* the lower priorities go
  1127. * to the first queue and the higherpriorities go
  1128. * to the second queue.
  1129. */
  1130. cos_data->data[0].pausable =
  1131. cos_data->data[1].pausable =
  1132. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1133. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1134. pri_tested = 1 << bp->dcbx_port_params.
  1135. app.traffic_type_priority[i];
  1136. /* Remove priority tested */
  1137. pri_mask_without_pri =
  1138. (pri_join_mask & ((u8)(~pri_tested)));
  1139. if (pri_mask_without_pri < pri_tested)
  1140. break;
  1141. }
  1142. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1143. BNX2X_ERR("Invalid value for pri_join_mask -"
  1144. " could not find a priority\n");
  1145. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1146. cos_data->data[1].pri_join_mask = pri_tested;
  1147. /* Both queues are strict priority,
  1148. * and that with the highest priority
  1149. * gets the highest strict priority in the arbiter.
  1150. */
  1151. cos_data->data[0].strict =
  1152. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1153. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1154. cos_data->data[1].strict =
  1155. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1156. }
  1157. }
  1158. }
  1159. static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1160. struct bnx2x *bp,
  1161. struct pg_help_data *pg_help_data,
  1162. struct dcbx_ets_feature *ets,
  1163. struct cos_help_data *cos_data,
  1164. u32 *pg_pri_orginal_spread,
  1165. u32 pri_join_mask,
  1166. u8 num_of_dif_pri)
  1167. {
  1168. u8 i = 0;
  1169. u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
  1170. /* If there are both pauseable and non-pauseable priorities,
  1171. * the pauseable priorities go to the first queue and
  1172. * the non-pauseable priorities go to the second queue.
  1173. */
  1174. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1175. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1176. pg_help_data->data[0].pg_priority) ||
  1177. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1178. pg_help_data->data[1].pg_priority)) {
  1179. /* If one PG contains both pauseable and
  1180. * non-pauseable priorities then ETS is disabled.
  1181. */
  1182. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1183. pg_pri_orginal_spread, ets);
  1184. bp->dcbx_port_params.ets.enabled = false;
  1185. return;
  1186. }
  1187. /* Pauseable */
  1188. cos_data->data[0].pausable = true;
  1189. /* Non pauseable. */
  1190. cos_data->data[1].pausable = false;
  1191. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1192. pg_help_data->data[0].pg_priority)) {
  1193. /* 0 is pauseable */
  1194. cos_data->data[0].pri_join_mask =
  1195. pg_help_data->data[0].pg_priority;
  1196. pg[0] = pg_help_data->data[0].pg;
  1197. cos_data->data[1].pri_join_mask =
  1198. pg_help_data->data[1].pg_priority;
  1199. pg[1] = pg_help_data->data[1].pg;
  1200. } else {/* 1 is pauseable */
  1201. cos_data->data[0].pri_join_mask =
  1202. pg_help_data->data[1].pg_priority;
  1203. pg[0] = pg_help_data->data[1].pg;
  1204. cos_data->data[1].pri_join_mask =
  1205. pg_help_data->data[0].pg_priority;
  1206. pg[1] = pg_help_data->data[0].pg;
  1207. }
  1208. } else {
  1209. /* If there are only pauseable priorities or
  1210. * only non-pauseable, each PG goes to a queue.
  1211. */
  1212. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1213. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1214. cos_data->data[0].pri_join_mask =
  1215. pg_help_data->data[0].pg_priority;
  1216. pg[0] = pg_help_data->data[0].pg;
  1217. cos_data->data[1].pri_join_mask =
  1218. pg_help_data->data[1].pg_priority;
  1219. pg[1] = pg_help_data->data[1].pg;
  1220. }
  1221. /* There can be only one strict pg */
  1222. for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
  1223. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1224. cos_data->data[i].cos_bw =
  1225. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1226. else
  1227. cos_data->data[i].strict =
  1228. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1229. }
  1230. }
  1231. static int bnx2x_dcbx_join_pgs(
  1232. struct bnx2x *bp,
  1233. struct dcbx_ets_feature *ets,
  1234. struct pg_help_data *pg_help_data,
  1235. u8 required_num_of_pg)
  1236. {
  1237. u8 entry_joined = pg_help_data->num_of_pg - 1;
  1238. u8 entry_removed = entry_joined + 1;
  1239. u8 pg_joined = 0;
  1240. if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
  1241. <= pg_help_data->num_of_pg) {
  1242. BNX2X_ERR("required_num_of_pg can't be zero\n");
  1243. return -EINVAL;
  1244. }
  1245. while (required_num_of_pg < pg_help_data->num_of_pg) {
  1246. entry_joined = pg_help_data->num_of_pg - 2;
  1247. entry_removed = entry_joined + 1;
  1248. /* protect index */
  1249. entry_removed %= ARRAY_SIZE(pg_help_data->data);
  1250. pg_help_data->data[entry_joined].pg_priority |=
  1251. pg_help_data->data[entry_removed].pg_priority;
  1252. pg_help_data->data[entry_joined].num_of_dif_pri +=
  1253. pg_help_data->data[entry_removed].num_of_dif_pri;
  1254. if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
  1255. pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
  1256. /* Entries joined strict priority rules */
  1257. pg_help_data->data[entry_joined].pg =
  1258. DCBX_STRICT_PRI_PG;
  1259. else {
  1260. /* Entries can be joined join BW */
  1261. pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1262. pg_help_data->data[entry_joined].pg) +
  1263. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1264. pg_help_data->data[entry_removed].pg);
  1265. DCBX_PG_BW_SET(ets->pg_bw_tbl,
  1266. pg_help_data->data[entry_joined].pg, pg_joined);
  1267. }
  1268. /* Joined the entries */
  1269. pg_help_data->num_of_pg--;
  1270. }
  1271. return 0;
  1272. }
  1273. static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1274. struct bnx2x *bp,
  1275. struct pg_help_data *pg_help_data,
  1276. struct dcbx_ets_feature *ets,
  1277. struct cos_help_data *cos_data,
  1278. u32 *pg_pri_orginal_spread,
  1279. u32 pri_join_mask,
  1280. u8 num_of_dif_pri)
  1281. {
  1282. u8 i = 0;
  1283. u32 pri_tested = 0;
  1284. u8 entry = 0;
  1285. u8 pg_entry = 0;
  1286. bool b_found_strict = false;
  1287. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1288. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1289. /* If there are both pauseable and non-pauseable priorities,
  1290. * the pauseable priorities go to the first queue and the
  1291. * non-pauseable priorities go to the second queue.
  1292. */
  1293. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1294. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1295. cos_data, pg_pri_orginal_spread, ets);
  1296. else {
  1297. /* If two BW-limited PG-s were combined to one queue,
  1298. * the BW is their sum.
  1299. *
  1300. * If there are only pauseable priorities or only non-pauseable,
  1301. * and there are both BW-limited and non-BW-limited PG-s,
  1302. * the BW-limited PG/s go to one queue and the non-BW-limited
  1303. * PG/s go to the second queue.
  1304. *
  1305. * If there are only pauseable priorities or only non-pauseable
  1306. * and all are BW limited, then two priorities go to the first
  1307. * queue and one priority goes to the second queue.
  1308. *
  1309. * We will join this two cases:
  1310. * if one is BW limited it will go to the secoend queue
  1311. * otherwise the last priority will get it
  1312. */
  1313. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1314. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1315. for (i = 0 ; i < num_of_pri; i++) {
  1316. pri_tested = 1 << bp->dcbx_port_params.
  1317. app.traffic_type_priority[i];
  1318. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1319. dcbx_port_params.app.traffic_type_priority[i]];
  1320. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1321. entry = 0;
  1322. if (i == (num_of_pri-1) &&
  1323. false == b_found_strict)
  1324. /* last entry will be handled separately
  1325. * If no priority is strict than last
  1326. * enty goes to last queue.*/
  1327. entry = 1;
  1328. cos_data->data[entry].pri_join_mask |=
  1329. pri_tested;
  1330. bnx2x_dcbx_add_to_cos_bw(bp,
  1331. &cos_data->data[entry],
  1332. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1333. pg_entry));
  1334. } else {
  1335. b_found_strict = true;
  1336. cos_data->data[1].pri_join_mask |= pri_tested;
  1337. /* If we join a group and one is strict
  1338. * than the bw rulls */
  1339. cos_data->data[1].strict =
  1340. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1341. }
  1342. }
  1343. }
  1344. }
  1345. static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
  1346. struct pg_help_data *help_data,
  1347. struct dcbx_ets_feature *ets,
  1348. struct cos_help_data *cos_data,
  1349. u32 *pg_pri_orginal_spread,
  1350. u32 pri_join_mask,
  1351. u8 num_of_dif_pri)
  1352. {
  1353. /* default E2 settings */
  1354. cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
  1355. switch (help_data->num_of_pg) {
  1356. case 1:
  1357. bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
  1358. bp,
  1359. help_data,
  1360. cos_data,
  1361. pri_join_mask,
  1362. num_of_dif_pri);
  1363. break;
  1364. case 2:
  1365. bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1366. bp,
  1367. help_data,
  1368. ets,
  1369. cos_data,
  1370. pg_pri_orginal_spread,
  1371. pri_join_mask,
  1372. num_of_dif_pri);
  1373. break;
  1374. case 3:
  1375. bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1376. bp,
  1377. help_data,
  1378. ets,
  1379. cos_data,
  1380. pg_pri_orginal_spread,
  1381. pri_join_mask,
  1382. num_of_dif_pri);
  1383. break;
  1384. default:
  1385. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1386. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1387. cos_data, pri_join_mask);
  1388. }
  1389. }
  1390. static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
  1391. struct cos_help_data *cos_data,
  1392. u8 entry,
  1393. u8 num_spread_of_entries,
  1394. u8 strict_app_pris)
  1395. {
  1396. u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1397. u8 num_of_app_pri = MAX_PFC_PRIORITIES;
  1398. u8 app_pri_bit = 0;
  1399. while (num_spread_of_entries && num_of_app_pri > 0) {
  1400. app_pri_bit = 1 << (num_of_app_pri - 1);
  1401. if (app_pri_bit & strict_app_pris) {
  1402. struct cos_entry_help_data *data = &cos_data->
  1403. data[entry];
  1404. num_spread_of_entries--;
  1405. if (num_spread_of_entries == 0) {
  1406. /* last entry needed put all the entries left */
  1407. data->cos_bw = DCBX_INVALID_COS_BW;
  1408. data->strict = strict_pri;
  1409. data->pri_join_mask = strict_app_pris;
  1410. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1411. data->pri_join_mask);
  1412. } else {
  1413. strict_app_pris &= ~app_pri_bit;
  1414. data->cos_bw = DCBX_INVALID_COS_BW;
  1415. data->strict = strict_pri;
  1416. data->pri_join_mask = app_pri_bit;
  1417. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1418. data->pri_join_mask);
  1419. }
  1420. strict_pri =
  1421. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
  1422. entry++;
  1423. }
  1424. num_of_app_pri--;
  1425. }
  1426. if (num_spread_of_entries)
  1427. return -EINVAL;
  1428. return 0;
  1429. }
  1430. static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
  1431. struct cos_help_data *cos_data,
  1432. u8 entry,
  1433. u8 num_spread_of_entries,
  1434. u8 strict_app_pris)
  1435. {
  1436. if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
  1437. num_spread_of_entries,
  1438. strict_app_pris)) {
  1439. struct cos_entry_help_data *data = &cos_data->
  1440. data[entry];
  1441. /* Fill BW entry */
  1442. data->cos_bw = DCBX_INVALID_COS_BW;
  1443. data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1444. data->pri_join_mask = strict_app_pris;
  1445. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1446. data->pri_join_mask);
  1447. return 1;
  1448. }
  1449. return num_spread_of_entries;
  1450. }
  1451. static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
  1452. struct pg_help_data *help_data,
  1453. struct dcbx_ets_feature *ets,
  1454. struct cos_help_data *cos_data,
  1455. u32 pri_join_mask)
  1456. {
  1457. u8 need_num_of_entries = 0;
  1458. u8 i = 0;
  1459. u8 entry = 0;
  1460. /*
  1461. * if the number of requested PG-s in CEE is greater than 3
  1462. * then the results are not determined since this is a violation
  1463. * of the standard.
  1464. */
  1465. if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
  1466. if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
  1467. DCBX_COS_MAX_NUM_E3B0)) {
  1468. BNX2X_ERR("Unable to reduce the number of PGs -"
  1469. "we will disables ETS\n");
  1470. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
  1471. pri_join_mask);
  1472. return;
  1473. }
  1474. }
  1475. for (i = 0 ; i < help_data->num_of_pg; i++) {
  1476. struct pg_entry_help_data *pg = &help_data->data[i];
  1477. if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1478. struct cos_entry_help_data *data = &cos_data->
  1479. data[entry];
  1480. /* Fill BW entry */
  1481. data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
  1482. data->strict = BNX2X_DCBX_STRICT_INVALID;
  1483. data->pri_join_mask = pg->pg_priority;
  1484. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1485. data->pri_join_mask);
  1486. entry++;
  1487. } else {
  1488. need_num_of_entries = min_t(u8,
  1489. (u8)pg->num_of_dif_pri,
  1490. (u8)DCBX_COS_MAX_NUM_E3B0 -
  1491. help_data->num_of_pg + 1);
  1492. /*
  1493. * If there are still VOQ-s which have no associated PG,
  1494. * then associate these VOQ-s to PG15. These PG-s will
  1495. * be used for SP between priorities on PG15.
  1496. */
  1497. entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
  1498. entry, need_num_of_entries, pg->pg_priority);
  1499. }
  1500. }
  1501. /* the entry will represent the number of COSes used */
  1502. cos_data->num_of_cos = entry;
  1503. }
  1504. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1505. struct pg_help_data *help_data,
  1506. struct dcbx_ets_feature *ets,
  1507. u32 *pg_pri_orginal_spread)
  1508. {
  1509. struct cos_help_data cos_data;
  1510. u8 i = 0;
  1511. u32 pri_join_mask = 0;
  1512. u8 num_of_dif_pri = 0;
  1513. memset(&cos_data, 0, sizeof(cos_data));
  1514. /* Validate the pg value */
  1515. for (i = 0; i < help_data->num_of_pg ; i++) {
  1516. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1517. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1518. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1519. help_data->data[i].pg);
  1520. pri_join_mask |= help_data->data[i].pg_priority;
  1521. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1522. }
  1523. /* defaults */
  1524. cos_data.num_of_cos = 1;
  1525. for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
  1526. cos_data.data[i].pri_join_mask = 0;
  1527. cos_data.data[i].pausable = false;
  1528. cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
  1529. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1530. }
  1531. if (CHIP_IS_E3B0(bp))
  1532. bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
  1533. &cos_data, pri_join_mask);
  1534. else /* E2 + E3A0 */
  1535. bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
  1536. help_data, ets,
  1537. &cos_data,
  1538. pg_pri_orginal_spread,
  1539. pri_join_mask,
  1540. num_of_dif_pri);
  1541. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1542. struct bnx2x_dcbx_cos_params *p =
  1543. &bp->dcbx_port_params.ets.cos_params[i];
  1544. p->strict = cos_data.data[i].strict;
  1545. p->bw_tbl = cos_data.data[i].cos_bw;
  1546. p->pri_bitmask = cos_data.data[i].pri_join_mask;
  1547. p->pauseable = cos_data.data[i].pausable;
  1548. /* sanity */
  1549. if (p->bw_tbl != DCBX_INVALID_COS_BW ||
  1550. p->strict != BNX2X_DCBX_STRICT_INVALID) {
  1551. if (p->pri_bitmask == 0)
  1552. BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
  1553. if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
  1554. if (p->pauseable &&
  1555. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1556. p->pri_bitmask) != 0)
  1557. BNX2X_ERR("Inconsistent config for "
  1558. "pausable COS %d\n", i);
  1559. if (!p->pauseable &&
  1560. DCBX_PFC_PRI_GET_PAUSE(bp,
  1561. p->pri_bitmask) != 0)
  1562. BNX2X_ERR("Inconsistent config for "
  1563. "nonpausable COS %d\n", i);
  1564. }
  1565. }
  1566. if (p->pauseable)
  1567. DP(NETIF_MSG_LINK, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1568. i, cos_data.data[i].pri_join_mask);
  1569. else
  1570. DP(NETIF_MSG_LINK, "COS %d NONPAUSABLE prijoinmask "
  1571. "0x%x\n",
  1572. i, cos_data.data[i].pri_join_mask);
  1573. }
  1574. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1575. }
  1576. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1577. u32 *set_configuration_ets_pg,
  1578. u32 *pri_pg_tbl)
  1579. {
  1580. int i;
  1581. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1582. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1583. DP(NETIF_MSG_LINK, "set_configuration_ets_pg[%d] = 0x%x\n",
  1584. i, set_configuration_ets_pg[i]);
  1585. }
  1586. }
  1587. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp)
  1588. {
  1589. struct flow_control_configuration *pfc_fw_cfg = NULL;
  1590. u16 pri_bit = 0;
  1591. u8 cos = 0, pri = 0;
  1592. struct priority_cos *tt2cos;
  1593. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1594. pfc_fw_cfg = (struct flow_control_configuration *)
  1595. bnx2x_sp(bp, pfc_config);
  1596. memset(pfc_fw_cfg, 0, sizeof(struct flow_control_configuration));
  1597. /*shortcut*/
  1598. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1599. /* Fw version should be incremented each update */
  1600. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1601. pfc_fw_cfg->dcb_enabled = 1;
  1602. /* Fill priority parameters */
  1603. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1604. tt2cos[pri].priority = ttp[pri];
  1605. pri_bit = 1 << tt2cos[pri].priority;
  1606. /* Fill COS parameters based on COS calculated to
  1607. * make it more general for future use */
  1608. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1609. if (bp->dcbx_port_params.ets.cos_params[cos].
  1610. pri_bitmask & pri_bit)
  1611. tt2cos[pri].cos = cos;
  1612. }
  1613. /* we never want the FW to add a 0 vlan tag */
  1614. pfc_fw_cfg->dont_add_pri_0_en = 1;
  1615. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1616. }
  1617. void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
  1618. {
  1619. /* if we need to syncronize DCBX result from prev PMF
  1620. * read it from shmem and update bp accordingly
  1621. */
  1622. if (SHMEM2_HAS(bp, drv_flags) &&
  1623. GET_FLAGS(SHMEM2_RD(bp, drv_flags), DRV_FLAGS_DCB_CONFIGURED)) {
  1624. /* Read neg results if dcbx is in the FW */
  1625. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  1626. return;
  1627. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1628. bp->dcbx_error);
  1629. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1630. bp->dcbx_error);
  1631. }
  1632. }
  1633. /* DCB netlink */
  1634. #ifdef BCM_DCBNL
  1635. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1636. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1637. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1638. {
  1639. /* validate dcbnl call that may change HW state:
  1640. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1641. */
  1642. return bp->dcb_state && bp->dcbx_mode_uset;
  1643. }
  1644. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1645. {
  1646. struct bnx2x *bp = netdev_priv(netdev);
  1647. DP(NETIF_MSG_LINK, "state = %d\n", bp->dcb_state);
  1648. return bp->dcb_state;
  1649. }
  1650. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1651. {
  1652. struct bnx2x *bp = netdev_priv(netdev);
  1653. DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
  1654. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1655. return 0;
  1656. }
  1657. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1658. u8 *perm_addr)
  1659. {
  1660. struct bnx2x *bp = netdev_priv(netdev);
  1661. DP(NETIF_MSG_LINK, "GET-PERM-ADDR\n");
  1662. /* first the HW mac address */
  1663. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1664. #ifdef BCM_CNIC
  1665. /* second SAN address */
  1666. memcpy(perm_addr+netdev->addr_len, bp->fip_mac, netdev->addr_len);
  1667. #endif
  1668. }
  1669. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1670. u8 prio_type, u8 pgid, u8 bw_pct,
  1671. u8 up_map)
  1672. {
  1673. struct bnx2x *bp = netdev_priv(netdev);
  1674. DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, pgid);
  1675. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1676. return;
  1677. /**
  1678. * bw_pct ingnored - band-width percentage devision between user
  1679. * priorities within the same group is not
  1680. * standard and hence not supported
  1681. *
  1682. * prio_type igonred - priority levels within the same group are not
  1683. * standard and hence are not supported. According
  1684. * to the standard pgid 15 is dedicated to strict
  1685. * prioirty traffic (on the port level).
  1686. *
  1687. * up_map ignored
  1688. */
  1689. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1690. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1691. }
  1692. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1693. int pgid, u8 bw_pct)
  1694. {
  1695. struct bnx2x *bp = netdev_priv(netdev);
  1696. DP(NETIF_MSG_LINK, "pgid[%d] = %d\n", pgid, bw_pct);
  1697. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1698. return;
  1699. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1700. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1701. }
  1702. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1703. u8 prio_type, u8 pgid, u8 bw_pct,
  1704. u8 up_map)
  1705. {
  1706. struct bnx2x *bp = netdev_priv(netdev);
  1707. DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
  1708. }
  1709. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1710. int pgid, u8 bw_pct)
  1711. {
  1712. struct bnx2x *bp = netdev_priv(netdev);
  1713. DP(NETIF_MSG_LINK, "Nothing to set; No RX support\n");
  1714. }
  1715. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1716. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1717. u8 *up_map)
  1718. {
  1719. struct bnx2x *bp = netdev_priv(netdev);
  1720. DP(NETIF_MSG_LINK, "prio = %d\n", prio);
  1721. /**
  1722. * bw_pct ingnored - band-width percentage devision between user
  1723. * priorities within the same group is not
  1724. * standard and hence not supported
  1725. *
  1726. * prio_type igonred - priority levels within the same group are not
  1727. * standard and hence are not supported. According
  1728. * to the standard pgid 15 is dedicated to strict
  1729. * prioirty traffic (on the port level).
  1730. *
  1731. * up_map ignored
  1732. */
  1733. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1734. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1735. return;
  1736. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1737. }
  1738. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1739. int pgid, u8 *bw_pct)
  1740. {
  1741. struct bnx2x *bp = netdev_priv(netdev);
  1742. DP(NETIF_MSG_LINK, "pgid = %d\n", pgid);
  1743. *bw_pct = 0;
  1744. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1745. return;
  1746. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1747. }
  1748. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1749. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1750. u8 *up_map)
  1751. {
  1752. struct bnx2x *bp = netdev_priv(netdev);
  1753. DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
  1754. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1755. }
  1756. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1757. int pgid, u8 *bw_pct)
  1758. {
  1759. struct bnx2x *bp = netdev_priv(netdev);
  1760. DP(NETIF_MSG_LINK, "Nothing to get; No RX support\n");
  1761. *bw_pct = 0;
  1762. }
  1763. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1764. u8 setting)
  1765. {
  1766. struct bnx2x *bp = netdev_priv(netdev);
  1767. DP(NETIF_MSG_LINK, "prio[%d] = %d\n", prio, setting);
  1768. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1769. return;
  1770. bp->dcbx_config_params.admin_pfc_bitmap |= ((setting ? 1 : 0) << prio);
  1771. if (setting)
  1772. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1773. }
  1774. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1775. u8 *setting)
  1776. {
  1777. struct bnx2x *bp = netdev_priv(netdev);
  1778. DP(NETIF_MSG_LINK, "prio = %d\n", prio);
  1779. *setting = 0;
  1780. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1781. return;
  1782. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1783. }
  1784. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1785. {
  1786. struct bnx2x *bp = netdev_priv(netdev);
  1787. int rc = 0;
  1788. DP(NETIF_MSG_LINK, "SET-ALL\n");
  1789. if (!bnx2x_dcbnl_set_valid(bp))
  1790. return 1;
  1791. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1792. netdev_err(bp->dev, "Handling parity error recovery. "
  1793. "Try again later\n");
  1794. return 1;
  1795. }
  1796. if (netif_running(bp->dev)) {
  1797. bnx2x_nic_unload(bp, UNLOAD_NORMAL);
  1798. rc = bnx2x_nic_load(bp, LOAD_NORMAL);
  1799. }
  1800. DP(NETIF_MSG_LINK, "set_dcbx_params done (%d)\n", rc);
  1801. if (rc)
  1802. return 1;
  1803. return 0;
  1804. }
  1805. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1806. {
  1807. struct bnx2x *bp = netdev_priv(netdev);
  1808. u8 rval = 0;
  1809. if (bp->dcb_state) {
  1810. switch (capid) {
  1811. case DCB_CAP_ATTR_PG:
  1812. *cap = true;
  1813. break;
  1814. case DCB_CAP_ATTR_PFC:
  1815. *cap = true;
  1816. break;
  1817. case DCB_CAP_ATTR_UP2TC:
  1818. *cap = false;
  1819. break;
  1820. case DCB_CAP_ATTR_PG_TCS:
  1821. *cap = 0x80; /* 8 priorities for PGs */
  1822. break;
  1823. case DCB_CAP_ATTR_PFC_TCS:
  1824. *cap = 0x80; /* 8 priorities for PFC */
  1825. break;
  1826. case DCB_CAP_ATTR_GSP:
  1827. *cap = true;
  1828. break;
  1829. case DCB_CAP_ATTR_BCN:
  1830. *cap = false;
  1831. break;
  1832. case DCB_CAP_ATTR_DCBX:
  1833. *cap = BNX2X_DCBX_CAPS;
  1834. default:
  1835. rval = -EINVAL;
  1836. break;
  1837. }
  1838. } else
  1839. rval = -EINVAL;
  1840. DP(NETIF_MSG_LINK, "capid %d:%x\n", capid, *cap);
  1841. return rval;
  1842. }
  1843. static u8 bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1844. {
  1845. struct bnx2x *bp = netdev_priv(netdev);
  1846. u8 rval = 0;
  1847. DP(NETIF_MSG_LINK, "tcid %d\n", tcid);
  1848. if (bp->dcb_state) {
  1849. switch (tcid) {
  1850. case DCB_NUMTCS_ATTR_PG:
  1851. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1852. DCBX_COS_MAX_NUM_E2;
  1853. break;
  1854. case DCB_NUMTCS_ATTR_PFC:
  1855. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1856. DCBX_COS_MAX_NUM_E2;
  1857. break;
  1858. default:
  1859. rval = -EINVAL;
  1860. break;
  1861. }
  1862. } else
  1863. rval = -EINVAL;
  1864. return rval;
  1865. }
  1866. static u8 bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1867. {
  1868. struct bnx2x *bp = netdev_priv(netdev);
  1869. DP(NETIF_MSG_LINK, "num tcs = %d; Not supported\n", num);
  1870. return -EINVAL;
  1871. }
  1872. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1873. {
  1874. struct bnx2x *bp = netdev_priv(netdev);
  1875. DP(NETIF_MSG_LINK, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1876. if (!bp->dcb_state)
  1877. return 0;
  1878. return bp->dcbx_local_feat.pfc.enabled;
  1879. }
  1880. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1881. {
  1882. struct bnx2x *bp = netdev_priv(netdev);
  1883. DP(NETIF_MSG_LINK, "state = %s\n", state ? "on" : "off");
  1884. if (!bnx2x_dcbnl_set_valid(bp))
  1885. return;
  1886. bp->dcbx_config_params.admin_pfc_tx_enable =
  1887. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1888. }
  1889. static void bnx2x_admin_app_set_ent(
  1890. struct bnx2x_admin_priority_app_table *app_ent,
  1891. u8 idtype, u16 idval, u8 up)
  1892. {
  1893. app_ent->valid = 1;
  1894. switch (idtype) {
  1895. case DCB_APP_IDTYPE_ETHTYPE:
  1896. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1897. break;
  1898. case DCB_APP_IDTYPE_PORTNUM:
  1899. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1900. break;
  1901. default:
  1902. break; /* never gets here */
  1903. }
  1904. app_ent->app_id = idval;
  1905. app_ent->priority = up;
  1906. }
  1907. static bool bnx2x_admin_app_is_equal(
  1908. struct bnx2x_admin_priority_app_table *app_ent,
  1909. u8 idtype, u16 idval)
  1910. {
  1911. if (!app_ent->valid)
  1912. return false;
  1913. switch (idtype) {
  1914. case DCB_APP_IDTYPE_ETHTYPE:
  1915. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1916. return false;
  1917. break;
  1918. case DCB_APP_IDTYPE_PORTNUM:
  1919. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1920. return false;
  1921. break;
  1922. default:
  1923. return false;
  1924. }
  1925. if (app_ent->app_id != idval)
  1926. return false;
  1927. return true;
  1928. }
  1929. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1930. {
  1931. int i, ff;
  1932. /* iterate over the app entries looking for idtype and idval */
  1933. for (i = 0, ff = -1; i < 4; i++) {
  1934. struct bnx2x_admin_priority_app_table *app_ent =
  1935. &bp->dcbx_config_params.admin_priority_app_table[i];
  1936. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1937. break;
  1938. if (ff < 0 && !app_ent->valid)
  1939. ff = i;
  1940. }
  1941. if (i < 4)
  1942. /* if found overwrite up */
  1943. bp->dcbx_config_params.
  1944. admin_priority_app_table[i].priority = up;
  1945. else if (ff >= 0)
  1946. /* not found use first-free */
  1947. bnx2x_admin_app_set_ent(
  1948. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1949. idtype, idval, up);
  1950. else
  1951. /* app table is full */
  1952. return -EBUSY;
  1953. /* up configured, if not 0 make sure feature is enabled */
  1954. if (up)
  1955. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1956. return 0;
  1957. }
  1958. static u8 bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  1959. u16 idval, u8 up)
  1960. {
  1961. struct bnx2x *bp = netdev_priv(netdev);
  1962. DP(NETIF_MSG_LINK, "app_type %d, app_id %x, prio bitmap %d\n",
  1963. idtype, idval, up);
  1964. if (!bnx2x_dcbnl_set_valid(bp))
  1965. return -EINVAL;
  1966. /* verify idtype */
  1967. switch (idtype) {
  1968. case DCB_APP_IDTYPE_ETHTYPE:
  1969. case DCB_APP_IDTYPE_PORTNUM:
  1970. break;
  1971. default:
  1972. return -EINVAL;
  1973. }
  1974. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  1975. }
  1976. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  1977. {
  1978. struct bnx2x *bp = netdev_priv(netdev);
  1979. u8 state;
  1980. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  1981. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  1982. state |= DCB_CAP_DCBX_STATIC;
  1983. return state;
  1984. }
  1985. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  1986. {
  1987. struct bnx2x *bp = netdev_priv(netdev);
  1988. DP(NETIF_MSG_LINK, "state = %02x\n", state);
  1989. /* set dcbx mode */
  1990. if ((state & BNX2X_DCBX_CAPS) != state) {
  1991. BNX2X_ERR("Requested DCBX mode %x is beyond advertised "
  1992. "capabilities\n", state);
  1993. return 1;
  1994. }
  1995. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  1996. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  1997. return 1;
  1998. }
  1999. if (state & DCB_CAP_DCBX_STATIC)
  2000. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  2001. else
  2002. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  2003. bp->dcbx_mode_uset = true;
  2004. return 0;
  2005. }
  2006. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  2007. u8 *flags)
  2008. {
  2009. struct bnx2x *bp = netdev_priv(netdev);
  2010. u8 rval = 0;
  2011. DP(NETIF_MSG_LINK, "featid %d\n", featid);
  2012. if (bp->dcb_state) {
  2013. *flags = 0;
  2014. switch (featid) {
  2015. case DCB_FEATCFG_ATTR_PG:
  2016. if (bp->dcbx_local_feat.ets.enabled)
  2017. *flags |= DCB_FEATCFG_ENABLE;
  2018. if (bp->dcbx_error & DCBX_LOCAL_ETS_ERROR)
  2019. *flags |= DCB_FEATCFG_ERROR;
  2020. break;
  2021. case DCB_FEATCFG_ATTR_PFC:
  2022. if (bp->dcbx_local_feat.pfc.enabled)
  2023. *flags |= DCB_FEATCFG_ENABLE;
  2024. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  2025. DCBX_LOCAL_PFC_MISMATCH))
  2026. *flags |= DCB_FEATCFG_ERROR;
  2027. break;
  2028. case DCB_FEATCFG_ATTR_APP:
  2029. if (bp->dcbx_local_feat.app.enabled)
  2030. *flags |= DCB_FEATCFG_ENABLE;
  2031. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  2032. DCBX_LOCAL_APP_MISMATCH))
  2033. *flags |= DCB_FEATCFG_ERROR;
  2034. break;
  2035. default:
  2036. rval = -EINVAL;
  2037. break;
  2038. }
  2039. } else
  2040. rval = -EINVAL;
  2041. return rval;
  2042. }
  2043. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  2044. u8 flags)
  2045. {
  2046. struct bnx2x *bp = netdev_priv(netdev);
  2047. u8 rval = 0;
  2048. DP(NETIF_MSG_LINK, "featid = %d flags = %02x\n", featid, flags);
  2049. /* ignore the 'advertise' flag */
  2050. if (bnx2x_dcbnl_set_valid(bp)) {
  2051. switch (featid) {
  2052. case DCB_FEATCFG_ATTR_PG:
  2053. bp->dcbx_config_params.admin_ets_enable =
  2054. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2055. bp->dcbx_config_params.admin_ets_willing =
  2056. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2057. break;
  2058. case DCB_FEATCFG_ATTR_PFC:
  2059. bp->dcbx_config_params.admin_pfc_enable =
  2060. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2061. bp->dcbx_config_params.admin_pfc_willing =
  2062. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2063. break;
  2064. case DCB_FEATCFG_ATTR_APP:
  2065. /* ignore enable, always enabled */
  2066. bp->dcbx_config_params.admin_app_priority_willing =
  2067. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2068. break;
  2069. default:
  2070. rval = -EINVAL;
  2071. break;
  2072. }
  2073. } else
  2074. rval = -EINVAL;
  2075. return rval;
  2076. }
  2077. static int bnx2x_peer_appinfo(struct net_device *netdev,
  2078. struct dcb_peer_app_info *info, u16* app_count)
  2079. {
  2080. int i;
  2081. struct bnx2x *bp = netdev_priv(netdev);
  2082. DP(NETIF_MSG_LINK, "APP-INFO\n");
  2083. info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
  2084. info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
  2085. *app_count = 0;
  2086. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  2087. if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
  2088. DCBX_APP_ENTRY_VALID)
  2089. (*app_count)++;
  2090. return 0;
  2091. }
  2092. static int bnx2x_peer_apptable(struct net_device *netdev,
  2093. struct dcb_app *table)
  2094. {
  2095. int i, j;
  2096. struct bnx2x *bp = netdev_priv(netdev);
  2097. DP(NETIF_MSG_LINK, "APP-TABLE\n");
  2098. for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  2099. struct dcbx_app_priority_entry *ent =
  2100. &bp->dcbx_remote_feat.app.app_pri_tbl[i];
  2101. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  2102. table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  2103. table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
  2104. table[j++].protocol = ent->app_id;
  2105. }
  2106. }
  2107. return 0;
  2108. }
  2109. static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
  2110. {
  2111. int i;
  2112. struct bnx2x *bp = netdev_priv(netdev);
  2113. pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
  2114. for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
  2115. pg->pg_bw[i] =
  2116. DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
  2117. pg->prio_pg[i] =
  2118. DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
  2119. }
  2120. return 0;
  2121. }
  2122. static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
  2123. struct cee_pfc *pfc)
  2124. {
  2125. struct bnx2x *bp = netdev_priv(netdev);
  2126. pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
  2127. pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
  2128. return 0;
  2129. }
  2130. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  2131. .getstate = bnx2x_dcbnl_get_state,
  2132. .setstate = bnx2x_dcbnl_set_state,
  2133. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  2134. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  2135. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  2136. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  2137. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  2138. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  2139. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  2140. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  2141. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  2142. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  2143. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  2144. .setall = bnx2x_dcbnl_set_all,
  2145. .getcap = bnx2x_dcbnl_get_cap,
  2146. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  2147. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  2148. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  2149. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  2150. .setapp = bnx2x_dcbnl_set_app_up,
  2151. .getdcbx = bnx2x_dcbnl_get_dcbx,
  2152. .setdcbx = bnx2x_dcbnl_set_dcbx,
  2153. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  2154. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  2155. .peer_getappinfo = bnx2x_peer_appinfo,
  2156. .peer_getapptable = bnx2x_peer_apptable,
  2157. .cee_peer_getpg = bnx2x_cee_peer_getpg,
  2158. .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
  2159. };
  2160. #endif /* BCM_DCBNL */