pio.c 20 KB

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  1. /*
  2. Broadcom B43 wireless driver
  3. PIO data transfer
  4. Copyright (c) 2005-2008 Michael Buesch <mb@bu3sch.de>
  5. This program is free software; you can redistribute it and/or modify
  6. it under the terms of the GNU General Public License as published by
  7. the Free Software Foundation; either version 2 of the License, or
  8. (at your option) any later version.
  9. This program is distributed in the hope that it will be useful,
  10. but WITHOUT ANY WARRANTY; without even the implied warranty of
  11. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  12. GNU General Public License for more details.
  13. You should have received a copy of the GNU General Public License
  14. along with this program; see the file COPYING. If not, write to
  15. the Free Software Foundation, Inc., 51 Franklin Steet, Fifth Floor,
  16. Boston, MA 02110-1301, USA.
  17. */
  18. #include "b43.h"
  19. #include "pio.h"
  20. #include "dma.h"
  21. #include "main.h"
  22. #include "xmit.h"
  23. #include <linux/delay.h>
  24. static void b43_pio_rx_work(struct work_struct *work);
  25. static u16 generate_cookie(struct b43_pio_txqueue *q,
  26. struct b43_pio_txpacket *pack)
  27. {
  28. u16 cookie;
  29. /* Use the upper 4 bits of the cookie as
  30. * PIO controller ID and store the packet index number
  31. * in the lower 12 bits.
  32. * Note that the cookie must never be 0, as this
  33. * is a special value used in RX path.
  34. * It can also not be 0xFFFF because that is special
  35. * for multicast frames.
  36. */
  37. cookie = (((u16)q->index + 1) << 12);
  38. cookie |= pack->index;
  39. return cookie;
  40. }
  41. static
  42. struct b43_pio_txqueue *parse_cookie(struct b43_wldev *dev,
  43. u16 cookie,
  44. struct b43_pio_txpacket **pack)
  45. {
  46. struct b43_pio *pio = &dev->pio;
  47. struct b43_pio_txqueue *q = NULL;
  48. unsigned int pack_index;
  49. switch (cookie & 0xF000) {
  50. case 0x1000:
  51. q = pio->tx_queue_AC_BK;
  52. break;
  53. case 0x2000:
  54. q = pio->tx_queue_AC_BE;
  55. break;
  56. case 0x3000:
  57. q = pio->tx_queue_AC_VI;
  58. break;
  59. case 0x4000:
  60. q = pio->tx_queue_AC_VO;
  61. break;
  62. case 0x5000:
  63. q = pio->tx_queue_mcast;
  64. break;
  65. }
  66. if (B43_WARN_ON(!q))
  67. return NULL;
  68. pack_index = (cookie & 0x0FFF);
  69. if (B43_WARN_ON(pack_index >= ARRAY_SIZE(q->packets)))
  70. return NULL;
  71. *pack = &q->packets[pack_index];
  72. return q;
  73. }
  74. static u16 index_to_pioqueue_base(struct b43_wldev *dev,
  75. unsigned int index)
  76. {
  77. static const u16 bases[] = {
  78. B43_MMIO_PIO_BASE0,
  79. B43_MMIO_PIO_BASE1,
  80. B43_MMIO_PIO_BASE2,
  81. B43_MMIO_PIO_BASE3,
  82. B43_MMIO_PIO_BASE4,
  83. B43_MMIO_PIO_BASE5,
  84. B43_MMIO_PIO_BASE6,
  85. B43_MMIO_PIO_BASE7,
  86. };
  87. static const u16 bases_rev11[] = {
  88. B43_MMIO_PIO11_BASE0,
  89. B43_MMIO_PIO11_BASE1,
  90. B43_MMIO_PIO11_BASE2,
  91. B43_MMIO_PIO11_BASE3,
  92. B43_MMIO_PIO11_BASE4,
  93. B43_MMIO_PIO11_BASE5,
  94. };
  95. if (dev->dev->id.revision >= 11) {
  96. B43_WARN_ON(index >= ARRAY_SIZE(bases_rev11));
  97. return bases_rev11[index];
  98. }
  99. B43_WARN_ON(index >= ARRAY_SIZE(bases));
  100. return bases[index];
  101. }
  102. static u16 pio_txqueue_offset(struct b43_wldev *dev)
  103. {
  104. if (dev->dev->id.revision >= 11)
  105. return 0x18;
  106. return 0;
  107. }
  108. static u16 pio_rxqueue_offset(struct b43_wldev *dev)
  109. {
  110. if (dev->dev->id.revision >= 11)
  111. return 0x38;
  112. return 8;
  113. }
  114. static struct b43_pio_txqueue *b43_setup_pioqueue_tx(struct b43_wldev *dev,
  115. unsigned int index)
  116. {
  117. struct b43_pio_txqueue *q;
  118. struct b43_pio_txpacket *p;
  119. unsigned int i;
  120. q = kzalloc(sizeof(*q), GFP_KERNEL);
  121. if (!q)
  122. return NULL;
  123. q->dev = dev;
  124. q->rev = dev->dev->id.revision;
  125. q->mmio_base = index_to_pioqueue_base(dev, index) +
  126. pio_txqueue_offset(dev);
  127. q->index = index;
  128. q->free_packet_slots = B43_PIO_MAX_NR_TXPACKETS;
  129. if (q->rev >= 8) {
  130. q->buffer_size = 1920; //FIXME this constant is wrong.
  131. } else {
  132. q->buffer_size = b43_piotx_read16(q, B43_PIO_TXQBUFSIZE);
  133. q->buffer_size -= 80;
  134. }
  135. INIT_LIST_HEAD(&q->packets_list);
  136. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  137. p = &(q->packets[i]);
  138. INIT_LIST_HEAD(&p->list);
  139. p->index = i;
  140. p->queue = q;
  141. list_add(&p->list, &q->packets_list);
  142. }
  143. return q;
  144. }
  145. static struct b43_pio_rxqueue *b43_setup_pioqueue_rx(struct b43_wldev *dev,
  146. unsigned int index)
  147. {
  148. struct b43_pio_rxqueue *q;
  149. q = kzalloc(sizeof(*q), GFP_KERNEL);
  150. if (!q)
  151. return NULL;
  152. q->dev = dev;
  153. q->rev = dev->dev->id.revision;
  154. q->mmio_base = index_to_pioqueue_base(dev, index) +
  155. pio_rxqueue_offset(dev);
  156. INIT_WORK(&q->rx_work, b43_pio_rx_work);
  157. /* Enable Direct FIFO RX (PIO) on the engine. */
  158. b43_dma_direct_fifo_rx(dev, index, 1);
  159. return q;
  160. }
  161. static void b43_pio_cancel_tx_packets(struct b43_pio_txqueue *q)
  162. {
  163. struct b43_pio_txpacket *pack;
  164. unsigned int i;
  165. for (i = 0; i < ARRAY_SIZE(q->packets); i++) {
  166. pack = &(q->packets[i]);
  167. if (pack->skb) {
  168. dev_kfree_skb_any(pack->skb);
  169. pack->skb = NULL;
  170. }
  171. }
  172. }
  173. static void b43_destroy_pioqueue_tx(struct b43_pio_txqueue *q,
  174. const char *name)
  175. {
  176. if (!q)
  177. return;
  178. b43_pio_cancel_tx_packets(q);
  179. kfree(q);
  180. }
  181. static void b43_destroy_pioqueue_rx(struct b43_pio_rxqueue *q,
  182. const char *name)
  183. {
  184. if (!q)
  185. return;
  186. kfree(q);
  187. }
  188. #define destroy_queue_tx(pio, queue) do { \
  189. b43_destroy_pioqueue_tx((pio)->queue, __stringify(queue)); \
  190. (pio)->queue = NULL; \
  191. } while (0)
  192. #define destroy_queue_rx(pio, queue) do { \
  193. b43_destroy_pioqueue_rx((pio)->queue, __stringify(queue)); \
  194. (pio)->queue = NULL; \
  195. } while (0)
  196. void b43_pio_free(struct b43_wldev *dev)
  197. {
  198. struct b43_pio *pio;
  199. if (!b43_using_pio_transfers(dev))
  200. return;
  201. pio = &dev->pio;
  202. destroy_queue_rx(pio, rx_queue);
  203. destroy_queue_tx(pio, tx_queue_mcast);
  204. destroy_queue_tx(pio, tx_queue_AC_VO);
  205. destroy_queue_tx(pio, tx_queue_AC_VI);
  206. destroy_queue_tx(pio, tx_queue_AC_BE);
  207. destroy_queue_tx(pio, tx_queue_AC_BK);
  208. }
  209. void b43_pio_stop(struct b43_wldev *dev)
  210. {
  211. if (!b43_using_pio_transfers(dev))
  212. return;
  213. cancel_work_sync(&dev->pio.rx_queue->rx_work);
  214. }
  215. int b43_pio_init(struct b43_wldev *dev)
  216. {
  217. struct b43_pio *pio = &dev->pio;
  218. int err = -ENOMEM;
  219. b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
  220. & ~B43_MACCTL_BE);
  221. b43_shm_write16(dev, B43_SHM_SHARED, B43_SHM_SH_RXPADOFF, 0);
  222. pio->tx_queue_AC_BK = b43_setup_pioqueue_tx(dev, 0);
  223. if (!pio->tx_queue_AC_BK)
  224. goto out;
  225. pio->tx_queue_AC_BE = b43_setup_pioqueue_tx(dev, 1);
  226. if (!pio->tx_queue_AC_BE)
  227. goto err_destroy_bk;
  228. pio->tx_queue_AC_VI = b43_setup_pioqueue_tx(dev, 2);
  229. if (!pio->tx_queue_AC_VI)
  230. goto err_destroy_be;
  231. pio->tx_queue_AC_VO = b43_setup_pioqueue_tx(dev, 3);
  232. if (!pio->tx_queue_AC_VO)
  233. goto err_destroy_vi;
  234. pio->tx_queue_mcast = b43_setup_pioqueue_tx(dev, 4);
  235. if (!pio->tx_queue_mcast)
  236. goto err_destroy_vo;
  237. pio->rx_queue = b43_setup_pioqueue_rx(dev, 0);
  238. if (!pio->rx_queue)
  239. goto err_destroy_mcast;
  240. b43dbg(dev->wl, "PIO initialized\n");
  241. err = 0;
  242. out:
  243. return err;
  244. err_destroy_mcast:
  245. destroy_queue_tx(pio, tx_queue_mcast);
  246. err_destroy_vo:
  247. destroy_queue_tx(pio, tx_queue_AC_VO);
  248. err_destroy_vi:
  249. destroy_queue_tx(pio, tx_queue_AC_VI);
  250. err_destroy_be:
  251. destroy_queue_tx(pio, tx_queue_AC_BE);
  252. err_destroy_bk:
  253. destroy_queue_tx(pio, tx_queue_AC_BK);
  254. return err;
  255. }
  256. /* Static mapping of mac80211's queues (priorities) to b43 PIO queues. */
  257. static struct b43_pio_txqueue *select_queue_by_priority(struct b43_wldev *dev,
  258. u8 queue_prio)
  259. {
  260. struct b43_pio_txqueue *q;
  261. if (dev->qos_enabled) {
  262. /* 0 = highest priority */
  263. switch (queue_prio) {
  264. default:
  265. B43_WARN_ON(1);
  266. /* fallthrough */
  267. case 0:
  268. q = dev->pio.tx_queue_AC_VO;
  269. break;
  270. case 1:
  271. q = dev->pio.tx_queue_AC_VI;
  272. break;
  273. case 2:
  274. q = dev->pio.tx_queue_AC_BE;
  275. break;
  276. case 3:
  277. q = dev->pio.tx_queue_AC_BK;
  278. break;
  279. }
  280. } else
  281. q = dev->pio.tx_queue_AC_BE;
  282. return q;
  283. }
  284. static u16 tx_write_2byte_queue(struct b43_pio_txqueue *q,
  285. u16 ctl,
  286. const void *_data,
  287. unsigned int data_len)
  288. {
  289. struct b43_wldev *dev = q->dev;
  290. const u8 *data = _data;
  291. ctl |= B43_PIO_TXCTL_WRITELO | B43_PIO_TXCTL_WRITEHI;
  292. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  293. ssb_block_write(dev->dev, data, (data_len & ~1),
  294. q->mmio_base + B43_PIO_TXDATA,
  295. sizeof(u16));
  296. if (data_len & 1) {
  297. /* Write the last byte. */
  298. ctl &= ~B43_PIO_TXCTL_WRITEHI;
  299. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  300. b43_piotx_write16(q, B43_PIO_TXDATA, data[data_len - 1]);
  301. }
  302. return ctl;
  303. }
  304. static void pio_tx_frame_2byte_queue(struct b43_pio_txpacket *pack,
  305. const u8 *hdr, unsigned int hdrlen)
  306. {
  307. struct b43_pio_txqueue *q = pack->queue;
  308. const char *frame = pack->skb->data;
  309. unsigned int frame_len = pack->skb->len;
  310. u16 ctl;
  311. ctl = b43_piotx_read16(q, B43_PIO_TXCTL);
  312. ctl |= B43_PIO_TXCTL_FREADY;
  313. ctl &= ~B43_PIO_TXCTL_EOF;
  314. /* Transfer the header data. */
  315. ctl = tx_write_2byte_queue(q, ctl, hdr, hdrlen);
  316. /* Transfer the frame data. */
  317. ctl = tx_write_2byte_queue(q, ctl, frame, frame_len);
  318. ctl |= B43_PIO_TXCTL_EOF;
  319. b43_piotx_write16(q, B43_PIO_TXCTL, ctl);
  320. }
  321. static u32 tx_write_4byte_queue(struct b43_pio_txqueue *q,
  322. u32 ctl,
  323. const void *_data,
  324. unsigned int data_len)
  325. {
  326. struct b43_wldev *dev = q->dev;
  327. const u8 *data = _data;
  328. ctl |= B43_PIO8_TXCTL_0_7 | B43_PIO8_TXCTL_8_15 |
  329. B43_PIO8_TXCTL_16_23 | B43_PIO8_TXCTL_24_31;
  330. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  331. ssb_block_write(dev->dev, data, (data_len & ~3),
  332. q->mmio_base + B43_PIO8_TXDATA,
  333. sizeof(u32));
  334. if (data_len & 3) {
  335. u32 value = 0;
  336. /* Write the last few bytes. */
  337. ctl &= ~(B43_PIO8_TXCTL_8_15 | B43_PIO8_TXCTL_16_23 |
  338. B43_PIO8_TXCTL_24_31);
  339. data = &(data[data_len - 1]);
  340. switch (data_len & 3) {
  341. case 3:
  342. ctl |= B43_PIO8_TXCTL_16_23;
  343. value |= (u32)(*data) << 16;
  344. data--;
  345. case 2:
  346. ctl |= B43_PIO8_TXCTL_8_15;
  347. value |= (u32)(*data) << 8;
  348. data--;
  349. case 1:
  350. value |= (u32)(*data);
  351. }
  352. b43_piotx_write32(q, B43_PIO8_TXCTL, ctl);
  353. b43_piotx_write32(q, B43_PIO8_TXDATA, value);
  354. }
  355. return ctl;
  356. }
  357. static void pio_tx_frame_4byte_queue(struct b43_pio_txpacket *pack,
  358. const u8 *hdr, unsigned int hdrlen)
  359. {
  360. struct b43_pio_txqueue *q = pack->queue;
  361. const char *frame = pack->skb->data;
  362. unsigned int frame_len = pack->skb->len;
  363. u32 ctl;
  364. ctl = b43_piotx_read32(q, B43_PIO8_TXCTL);
  365. ctl |= B43_PIO8_TXCTL_FREADY;
  366. ctl &= ~B43_PIO8_TXCTL_EOF;
  367. /* Transfer the header data. */
  368. ctl = tx_write_4byte_queue(q, ctl, hdr, hdrlen);
  369. /* Transfer the frame data. */
  370. ctl = tx_write_4byte_queue(q, ctl, frame, frame_len);
  371. ctl |= B43_PIO8_TXCTL_EOF;
  372. b43_piotx_write32(q, B43_PIO_TXCTL, ctl);
  373. }
  374. static int pio_tx_frame(struct b43_pio_txqueue *q,
  375. struct sk_buff *skb)
  376. {
  377. struct b43_pio_txpacket *pack;
  378. struct b43_txhdr txhdr;
  379. u16 cookie;
  380. int err;
  381. unsigned int hdrlen;
  382. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  383. B43_WARN_ON(list_empty(&q->packets_list));
  384. pack = list_entry(q->packets_list.next,
  385. struct b43_pio_txpacket, list);
  386. cookie = generate_cookie(q, pack);
  387. hdrlen = b43_txhdr_size(q->dev);
  388. err = b43_generate_txhdr(q->dev, (u8 *)&txhdr, skb,
  389. info, cookie);
  390. if (err)
  391. return err;
  392. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  393. /* Tell the firmware about the cookie of the last
  394. * mcast frame, so it can clear the more-data bit in it. */
  395. b43_shm_write16(q->dev, B43_SHM_SHARED,
  396. B43_SHM_SH_MCASTCOOKIE, cookie);
  397. }
  398. pack->skb = skb;
  399. if (q->rev >= 8)
  400. pio_tx_frame_4byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  401. else
  402. pio_tx_frame_2byte_queue(pack, (const u8 *)&txhdr, hdrlen);
  403. /* Remove it from the list of available packet slots.
  404. * It will be put back when we receive the status report. */
  405. list_del(&pack->list);
  406. /* Update the queue statistics. */
  407. q->buffer_used += roundup(skb->len + hdrlen, 4);
  408. q->free_packet_slots -= 1;
  409. return 0;
  410. }
  411. int b43_pio_tx(struct b43_wldev *dev, struct sk_buff *skb)
  412. {
  413. struct b43_pio_txqueue *q;
  414. struct ieee80211_hdr *hdr;
  415. unsigned int hdrlen, total_len;
  416. int err = 0;
  417. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  418. hdr = (struct ieee80211_hdr *)skb->data;
  419. if (info->flags & IEEE80211_TX_CTL_SEND_AFTER_DTIM) {
  420. /* The multicast queue will be sent after the DTIM. */
  421. q = dev->pio.tx_queue_mcast;
  422. /* Set the frame More-Data bit. Ucode will clear it
  423. * for us on the last frame. */
  424. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_MOREDATA);
  425. } else {
  426. /* Decide by priority where to put this frame. */
  427. q = select_queue_by_priority(dev, skb_get_queue_mapping(skb));
  428. }
  429. hdrlen = b43_txhdr_size(dev);
  430. total_len = roundup(skb->len + hdrlen, 4);
  431. if (unlikely(total_len > q->buffer_size)) {
  432. err = -ENOBUFS;
  433. b43dbg(dev->wl, "PIO: TX packet longer than queue.\n");
  434. goto out;
  435. }
  436. if (unlikely(q->free_packet_slots == 0)) {
  437. err = -ENOBUFS;
  438. b43warn(dev->wl, "PIO: TX packet overflow.\n");
  439. goto out;
  440. }
  441. B43_WARN_ON(q->buffer_used > q->buffer_size);
  442. if (total_len > (q->buffer_size - q->buffer_used)) {
  443. /* Not enough memory on the queue. */
  444. err = -EBUSY;
  445. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  446. q->stopped = 1;
  447. goto out;
  448. }
  449. /* Assign the queue number to the ring (if not already done before)
  450. * so TX status handling can use it. The mac80211-queue to b43-queue
  451. * mapping is static, so we don't need to store it per frame. */
  452. q->queue_prio = skb_get_queue_mapping(skb);
  453. err = pio_tx_frame(q, skb);
  454. if (unlikely(err == -ENOKEY)) {
  455. /* Drop this packet, as we don't have the encryption key
  456. * anymore and must not transmit it unencrypted. */
  457. dev_kfree_skb_any(skb);
  458. err = 0;
  459. goto out;
  460. }
  461. if (unlikely(err)) {
  462. b43err(dev->wl, "PIO transmission failure\n");
  463. goto out;
  464. }
  465. q->nr_tx_packets++;
  466. B43_WARN_ON(q->buffer_used > q->buffer_size);
  467. if (((q->buffer_size - q->buffer_used) < roundup(2 + 2 + 6, 4)) ||
  468. (q->free_packet_slots == 0)) {
  469. /* The queue is full. */
  470. ieee80211_stop_queue(dev->wl->hw, skb_get_queue_mapping(skb));
  471. q->stopped = 1;
  472. }
  473. out:
  474. return err;
  475. }
  476. void b43_pio_handle_txstatus(struct b43_wldev *dev,
  477. const struct b43_txstatus *status)
  478. {
  479. struct b43_pio_txqueue *q;
  480. struct b43_pio_txpacket *pack = NULL;
  481. unsigned int total_len;
  482. struct ieee80211_tx_info *info;
  483. q = parse_cookie(dev, status->cookie, &pack);
  484. if (unlikely(!q))
  485. return;
  486. B43_WARN_ON(!pack);
  487. info = IEEE80211_SKB_CB(pack->skb);
  488. b43_fill_txstatus_report(dev, info, status);
  489. total_len = pack->skb->len + b43_txhdr_size(dev);
  490. total_len = roundup(total_len, 4);
  491. q->buffer_used -= total_len;
  492. q->free_packet_slots += 1;
  493. ieee80211_tx_status_irqsafe(dev->wl->hw, pack->skb);
  494. pack->skb = NULL;
  495. list_add(&pack->list, &q->packets_list);
  496. if (q->stopped) {
  497. ieee80211_wake_queue(dev->wl->hw, q->queue_prio);
  498. q->stopped = 0;
  499. }
  500. }
  501. void b43_pio_get_tx_stats(struct b43_wldev *dev,
  502. struct ieee80211_tx_queue_stats *stats)
  503. {
  504. const int nr_queues = dev->wl->hw->queues;
  505. struct b43_pio_txqueue *q;
  506. int i;
  507. for (i = 0; i < nr_queues; i++) {
  508. q = select_queue_by_priority(dev, i);
  509. stats[i].len = B43_PIO_MAX_NR_TXPACKETS - q->free_packet_slots;
  510. stats[i].limit = B43_PIO_MAX_NR_TXPACKETS;
  511. stats[i].count = q->nr_tx_packets;
  512. }
  513. }
  514. /* Returns whether we should fetch another frame. */
  515. static bool pio_rx_frame(struct b43_pio_rxqueue *q)
  516. {
  517. struct b43_wldev *dev = q->dev;
  518. struct b43_rxhdr_fw4 rxhdr;
  519. u16 len;
  520. u32 macstat;
  521. unsigned int i, padding;
  522. struct sk_buff *skb;
  523. const char *err_msg = NULL;
  524. memset(&rxhdr, 0, sizeof(rxhdr));
  525. /* Check if we have data and wait for it to get ready. */
  526. if (q->rev >= 8) {
  527. u32 ctl;
  528. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  529. if (!(ctl & B43_PIO8_RXCTL_FRAMERDY))
  530. return 0;
  531. b43_piorx_write32(q, B43_PIO8_RXCTL,
  532. B43_PIO8_RXCTL_FRAMERDY);
  533. for (i = 0; i < 10; i++) {
  534. ctl = b43_piorx_read32(q, B43_PIO8_RXCTL);
  535. if (ctl & B43_PIO8_RXCTL_DATARDY)
  536. goto data_ready;
  537. udelay(10);
  538. }
  539. } else {
  540. u16 ctl;
  541. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  542. if (!(ctl & B43_PIO_RXCTL_FRAMERDY))
  543. return 0;
  544. b43_piorx_write16(q, B43_PIO_RXCTL,
  545. B43_PIO_RXCTL_FRAMERDY);
  546. for (i = 0; i < 10; i++) {
  547. ctl = b43_piorx_read16(q, B43_PIO_RXCTL);
  548. if (ctl & B43_PIO_RXCTL_DATARDY)
  549. goto data_ready;
  550. udelay(10);
  551. }
  552. }
  553. b43dbg(q->dev->wl, "PIO RX timed out\n");
  554. return 1;
  555. data_ready:
  556. /* Get the preamble (RX header) */
  557. if (q->rev >= 8) {
  558. ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
  559. q->mmio_base + B43_PIO8_RXDATA,
  560. sizeof(u32));
  561. } else {
  562. ssb_block_read(dev->dev, &rxhdr, sizeof(rxhdr),
  563. q->mmio_base + B43_PIO_RXDATA,
  564. sizeof(u16));
  565. }
  566. /* Sanity checks. */
  567. len = le16_to_cpu(rxhdr.frame_len);
  568. if (unlikely(len > 0x700)) {
  569. err_msg = "len > 0x700";
  570. goto rx_error;
  571. }
  572. if (unlikely(len == 0)) {
  573. err_msg = "len == 0";
  574. goto rx_error;
  575. }
  576. macstat = le32_to_cpu(rxhdr.mac_status);
  577. if (macstat & B43_RX_MAC_FCSERR) {
  578. if (!(q->dev->wl->filter_flags & FIF_FCSFAIL)) {
  579. /* Drop frames with failed FCS. */
  580. err_msg = "Frame FCS error";
  581. goto rx_error;
  582. }
  583. }
  584. /* We always pad 2 bytes, as that's what upstream code expects
  585. * due to the RX-header being 30 bytes. In case the frame is
  586. * unaligned, we pad another 2 bytes. */
  587. padding = (macstat & B43_RX_MAC_PADDING) ? 2 : 0;
  588. skb = dev_alloc_skb(len + padding + 2);
  589. if (unlikely(!skb)) {
  590. err_msg = "Out of memory";
  591. goto rx_error;
  592. }
  593. skb_reserve(skb, 2);
  594. skb_put(skb, len + padding);
  595. if (q->rev >= 8) {
  596. ssb_block_read(dev->dev, skb->data + padding, (len & ~3),
  597. q->mmio_base + B43_PIO8_RXDATA,
  598. sizeof(u32));
  599. if (len & 3) {
  600. u32 value;
  601. char *data;
  602. /* Read the last few bytes. */
  603. value = b43_piorx_read32(q, B43_PIO8_RXDATA);
  604. data = &(skb->data[len + padding - 1]);
  605. switch (len & 3) {
  606. case 3:
  607. *data = (value >> 16);
  608. data--;
  609. case 2:
  610. *data = (value >> 8);
  611. data--;
  612. case 1:
  613. *data = value;
  614. }
  615. }
  616. } else {
  617. ssb_block_read(dev->dev, skb->data + padding, (len & ~1),
  618. q->mmio_base + B43_PIO_RXDATA,
  619. sizeof(u16));
  620. if (len & 1) {
  621. u16 value;
  622. /* Read the last byte. */
  623. value = b43_piorx_read16(q, B43_PIO_RXDATA);
  624. skb->data[len + padding - 1] = value;
  625. }
  626. }
  627. b43_rx(q->dev, skb, &rxhdr);
  628. return 1;
  629. rx_error:
  630. if (err_msg)
  631. b43dbg(q->dev->wl, "PIO RX error: %s\n", err_msg);
  632. b43_piorx_write16(q, B43_PIO_RXCTL, B43_PIO_RXCTL_DATARDY);
  633. return 1;
  634. }
  635. /* RX workqueue. We can sleep, yay! */
  636. static void b43_pio_rx_work(struct work_struct *work)
  637. {
  638. struct b43_pio_rxqueue *q = container_of(work, struct b43_pio_rxqueue,
  639. rx_work);
  640. unsigned int budget = 50;
  641. bool stop;
  642. do {
  643. mutex_lock(&q->dev->wl->mutex);
  644. stop = (pio_rx_frame(q) == 0);
  645. mutex_unlock(&q->dev->wl->mutex);
  646. cond_resched();
  647. if (stop)
  648. break;
  649. } while (--budget);
  650. }
  651. /* Called with IRQs disabled. */
  652. void b43_pio_rx(struct b43_pio_rxqueue *q)
  653. {
  654. /* Due to latency issues we must run the RX path in
  655. * a workqueue to be able to schedule between packets. */
  656. ieee80211_queue_work(q->dev->wl->hw, &q->rx_work);
  657. }
  658. static void b43_pio_tx_suspend_queue(struct b43_pio_txqueue *q)
  659. {
  660. if (q->rev >= 8) {
  661. b43_piotx_write32(q, B43_PIO8_TXCTL,
  662. b43_piotx_read32(q, B43_PIO8_TXCTL)
  663. | B43_PIO8_TXCTL_SUSPREQ);
  664. } else {
  665. b43_piotx_write16(q, B43_PIO_TXCTL,
  666. b43_piotx_read16(q, B43_PIO_TXCTL)
  667. | B43_PIO_TXCTL_SUSPREQ);
  668. }
  669. }
  670. static void b43_pio_tx_resume_queue(struct b43_pio_txqueue *q)
  671. {
  672. if (q->rev >= 8) {
  673. b43_piotx_write32(q, B43_PIO8_TXCTL,
  674. b43_piotx_read32(q, B43_PIO8_TXCTL)
  675. & ~B43_PIO8_TXCTL_SUSPREQ);
  676. } else {
  677. b43_piotx_write16(q, B43_PIO_TXCTL,
  678. b43_piotx_read16(q, B43_PIO_TXCTL)
  679. & ~B43_PIO_TXCTL_SUSPREQ);
  680. }
  681. }
  682. void b43_pio_tx_suspend(struct b43_wldev *dev)
  683. {
  684. b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
  685. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BK);
  686. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_BE);
  687. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VI);
  688. b43_pio_tx_suspend_queue(dev->pio.tx_queue_AC_VO);
  689. b43_pio_tx_suspend_queue(dev->pio.tx_queue_mcast);
  690. }
  691. void b43_pio_tx_resume(struct b43_wldev *dev)
  692. {
  693. b43_pio_tx_resume_queue(dev->pio.tx_queue_mcast);
  694. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VO);
  695. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_VI);
  696. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BE);
  697. b43_pio_tx_resume_queue(dev->pio.tx_queue_AC_BK);
  698. b43_power_saving_ctl_bits(dev, 0);
  699. }