mach-universal_c210.c 28 KB

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  1. /* linux/arch/arm/mach-exynos4/mach-universal_c210.c
  2. *
  3. * Copyright (c) 2010 Samsung Electronics Co., Ltd.
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #include <linux/platform_device.h>
  10. #include <linux/serial_core.h>
  11. #include <linux/input.h>
  12. #include <linux/i2c.h>
  13. #include <linux/gpio_keys.h>
  14. #include <linux/gpio.h>
  15. #include <linux/fb.h>
  16. #include <linux/mfd/max8998.h>
  17. #include <linux/regulator/machine.h>
  18. #include <linux/regulator/fixed.h>
  19. #include <linux/regulator/max8952.h>
  20. #include <linux/mmc/host.h>
  21. #include <linux/i2c-gpio.h>
  22. #include <linux/i2c/mcs.h>
  23. #include <linux/i2c/atmel_mxt_ts.h>
  24. #include <asm/mach/arch.h>
  25. #include <asm/hardware/gic.h>
  26. #include <asm/mach-types.h>
  27. #include <plat/regs-serial.h>
  28. #include <plat/cpu.h>
  29. #include <plat/devs.h>
  30. #include <plat/iic.h>
  31. #include <plat/gpio-cfg.h>
  32. #include <plat/fb.h>
  33. #include <plat/mfc.h>
  34. #include <plat/sdhci.h>
  35. #include <plat/pd.h>
  36. #include <plat/regs-fb-v4.h>
  37. #include <plat/fimc-core.h>
  38. #include <plat/camport.h>
  39. #include <plat/mipi_csis.h>
  40. #include <mach/map.h>
  41. #include <media/v4l2-mediabus.h>
  42. #include <media/s5p_fimc.h>
  43. #include <media/m5mols.h>
  44. #include <media/s5k6aa.h>
  45. #include "common.h"
  46. /* Following are default values for UCON, ULCON and UFCON UART registers */
  47. #define UNIVERSAL_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
  48. S3C2410_UCON_RXILEVEL | \
  49. S3C2410_UCON_TXIRQMODE | \
  50. S3C2410_UCON_RXIRQMODE | \
  51. S3C2410_UCON_RXFIFO_TOI | \
  52. S3C2443_UCON_RXERR_IRQEN)
  53. #define UNIVERSAL_ULCON_DEFAULT S3C2410_LCON_CS8
  54. #define UNIVERSAL_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
  55. S5PV210_UFCON_TXTRIG256 | \
  56. S5PV210_UFCON_RXTRIG256)
  57. static struct s3c2410_uartcfg universal_uartcfgs[] __initdata = {
  58. [0] = {
  59. .hwport = 0,
  60. .ucon = UNIVERSAL_UCON_DEFAULT,
  61. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  62. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  63. },
  64. [1] = {
  65. .hwport = 1,
  66. .ucon = UNIVERSAL_UCON_DEFAULT,
  67. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  68. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  69. },
  70. [2] = {
  71. .hwport = 2,
  72. .ucon = UNIVERSAL_UCON_DEFAULT,
  73. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  74. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  75. },
  76. [3] = {
  77. .hwport = 3,
  78. .ucon = UNIVERSAL_UCON_DEFAULT,
  79. .ulcon = UNIVERSAL_ULCON_DEFAULT,
  80. .ufcon = UNIVERSAL_UFCON_DEFAULT,
  81. },
  82. };
  83. static struct regulator_consumer_supply max8952_consumer =
  84. REGULATOR_SUPPLY("vdd_arm", NULL);
  85. static struct max8952_platform_data universal_max8952_pdata __initdata = {
  86. .gpio_vid0 = EXYNOS4_GPX0(3),
  87. .gpio_vid1 = EXYNOS4_GPX0(4),
  88. .gpio_en = -1, /* Not controllable, set "Always High" */
  89. .default_mode = 0, /* vid0 = 0, vid1 = 0 */
  90. .dvs_mode = { 48, 32, 28, 18 }, /* 1.25, 1.20, 1.05, 0.95V */
  91. .sync_freq = 0, /* default: fastest */
  92. .ramp_speed = 0, /* default: fastest */
  93. .reg_data = {
  94. .constraints = {
  95. .name = "VARM_1.2V",
  96. .min_uV = 770000,
  97. .max_uV = 1400000,
  98. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
  99. .always_on = 1,
  100. .boot_on = 1,
  101. },
  102. .num_consumer_supplies = 1,
  103. .consumer_supplies = &max8952_consumer,
  104. },
  105. };
  106. static struct regulator_consumer_supply lp3974_buck1_consumer =
  107. REGULATOR_SUPPLY("vdd_int", NULL);
  108. static struct regulator_consumer_supply lp3974_buck2_consumer =
  109. REGULATOR_SUPPLY("vddg3d", NULL);
  110. static struct regulator_consumer_supply lp3974_buck3_consumer[] = {
  111. REGULATOR_SUPPLY("vdet", "s5p-sdo"),
  112. REGULATOR_SUPPLY("vdd_reg", "0-003c"),
  113. };
  114. static struct regulator_init_data lp3974_buck1_data = {
  115. .constraints = {
  116. .name = "VINT_1.1V",
  117. .min_uV = 750000,
  118. .max_uV = 1500000,
  119. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  120. REGULATOR_CHANGE_STATUS,
  121. .boot_on = 1,
  122. .state_mem = {
  123. .disabled = 1,
  124. },
  125. },
  126. .num_consumer_supplies = 1,
  127. .consumer_supplies = &lp3974_buck1_consumer,
  128. };
  129. static struct regulator_init_data lp3974_buck2_data = {
  130. .constraints = {
  131. .name = "VG3D_1.1V",
  132. .min_uV = 750000,
  133. .max_uV = 1500000,
  134. .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE |
  135. REGULATOR_CHANGE_STATUS,
  136. .boot_on = 1,
  137. .state_mem = {
  138. .disabled = 1,
  139. },
  140. },
  141. .num_consumer_supplies = 1,
  142. .consumer_supplies = &lp3974_buck2_consumer,
  143. };
  144. static struct regulator_init_data lp3974_buck3_data = {
  145. .constraints = {
  146. .name = "VCC_1.8V",
  147. .min_uV = 1800000,
  148. .max_uV = 1800000,
  149. .apply_uV = 1,
  150. .always_on = 1,
  151. .state_mem = {
  152. .enabled = 1,
  153. },
  154. },
  155. .num_consumer_supplies = ARRAY_SIZE(lp3974_buck3_consumer),
  156. .consumer_supplies = lp3974_buck3_consumer,
  157. };
  158. static struct regulator_init_data lp3974_buck4_data = {
  159. .constraints = {
  160. .name = "VMEM_1.2V",
  161. .min_uV = 1200000,
  162. .max_uV = 1200000,
  163. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  164. .apply_uV = 1,
  165. .state_mem = {
  166. .disabled = 1,
  167. },
  168. },
  169. };
  170. static struct regulator_init_data lp3974_ldo2_data = {
  171. .constraints = {
  172. .name = "VALIVE_1.2V",
  173. .min_uV = 1200000,
  174. .max_uV = 1200000,
  175. .apply_uV = 1,
  176. .always_on = 1,
  177. .state_mem = {
  178. .enabled = 1,
  179. },
  180. },
  181. };
  182. static struct regulator_consumer_supply lp3974_ldo3_consumer[] = {
  183. REGULATOR_SUPPLY("vdd", "exynos4-hdmi"),
  184. REGULATOR_SUPPLY("vdd_pll", "exynos4-hdmi"),
  185. REGULATOR_SUPPLY("vdd11", "s5p-mipi-csis.0"),
  186. };
  187. static struct regulator_init_data lp3974_ldo3_data = {
  188. .constraints = {
  189. .name = "VUSB+MIPI_1.1V",
  190. .min_uV = 1100000,
  191. .max_uV = 1100000,
  192. .apply_uV = 1,
  193. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  194. .state_mem = {
  195. .disabled = 1,
  196. },
  197. },
  198. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo3_consumer),
  199. .consumer_supplies = lp3974_ldo3_consumer,
  200. };
  201. static struct regulator_consumer_supply lp3974_ldo4_consumer[] = {
  202. REGULATOR_SUPPLY("vdd_osc", "exynos4-hdmi"),
  203. };
  204. static struct regulator_init_data lp3974_ldo4_data = {
  205. .constraints = {
  206. .name = "VADC_3.3V",
  207. .min_uV = 3300000,
  208. .max_uV = 3300000,
  209. .apply_uV = 1,
  210. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  211. .state_mem = {
  212. .disabled = 1,
  213. },
  214. },
  215. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo4_consumer),
  216. .consumer_supplies = lp3974_ldo4_consumer,
  217. };
  218. static struct regulator_init_data lp3974_ldo5_data = {
  219. .constraints = {
  220. .name = "VTF_2.8V",
  221. .min_uV = 2800000,
  222. .max_uV = 2800000,
  223. .apply_uV = 1,
  224. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  225. .state_mem = {
  226. .disabled = 1,
  227. },
  228. },
  229. };
  230. static struct regulator_init_data lp3974_ldo6_data = {
  231. .constraints = {
  232. .name = "LDO6",
  233. .min_uV = 2000000,
  234. .max_uV = 2000000,
  235. .apply_uV = 1,
  236. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  237. .state_mem = {
  238. .disabled = 1,
  239. },
  240. },
  241. };
  242. static struct regulator_consumer_supply lp3974_ldo7_consumer[] = {
  243. REGULATOR_SUPPLY("vdd18", "s5p-mipi-csis.0"),
  244. };
  245. static struct regulator_init_data lp3974_ldo7_data = {
  246. .constraints = {
  247. .name = "VLCD+VMIPI_1.8V",
  248. .min_uV = 1800000,
  249. .max_uV = 1800000,
  250. .apply_uV = 1,
  251. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  252. .state_mem = {
  253. .disabled = 1,
  254. },
  255. },
  256. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo7_consumer),
  257. .consumer_supplies = lp3974_ldo7_consumer,
  258. };
  259. static struct regulator_consumer_supply lp3974_ldo8_consumer[] = {
  260. REGULATOR_SUPPLY("vdd33a_dac", "s5p-sdo"),
  261. };
  262. static struct regulator_init_data lp3974_ldo8_data = {
  263. .constraints = {
  264. .name = "VUSB+VDAC_3.3V",
  265. .min_uV = 3300000,
  266. .max_uV = 3300000,
  267. .apply_uV = 1,
  268. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  269. .state_mem = {
  270. .disabled = 1,
  271. },
  272. },
  273. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo8_consumer),
  274. .consumer_supplies = lp3974_ldo8_consumer,
  275. };
  276. static struct regulator_consumer_supply lp3974_ldo9_consumer =
  277. REGULATOR_SUPPLY("vddio", "0-003c");
  278. static struct regulator_init_data lp3974_ldo9_data = {
  279. .constraints = {
  280. .name = "VCC_2.8V",
  281. .min_uV = 2800000,
  282. .max_uV = 2800000,
  283. .apply_uV = 1,
  284. .always_on = 1,
  285. .state_mem = {
  286. .enabled = 1,
  287. },
  288. },
  289. .num_consumer_supplies = 1,
  290. .consumer_supplies = &lp3974_ldo9_consumer,
  291. };
  292. static struct regulator_init_data lp3974_ldo10_data = {
  293. .constraints = {
  294. .name = "VPLL_1.1V",
  295. .min_uV = 1100000,
  296. .max_uV = 1100000,
  297. .boot_on = 1,
  298. .apply_uV = 1,
  299. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  300. .state_mem = {
  301. .disabled = 1,
  302. },
  303. },
  304. };
  305. static struct regulator_consumer_supply lp3974_ldo11_consumer =
  306. REGULATOR_SUPPLY("dig_28", "0-001f");
  307. static struct regulator_init_data lp3974_ldo11_data = {
  308. .constraints = {
  309. .name = "CAM_AF_3.3V",
  310. .min_uV = 3300000,
  311. .max_uV = 3300000,
  312. .apply_uV = 1,
  313. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  314. .state_mem = {
  315. .disabled = 1,
  316. },
  317. },
  318. .num_consumer_supplies = 1,
  319. .consumer_supplies = &lp3974_ldo11_consumer,
  320. };
  321. static struct regulator_init_data lp3974_ldo12_data = {
  322. .constraints = {
  323. .name = "PS_2.8V",
  324. .min_uV = 2800000,
  325. .max_uV = 2800000,
  326. .apply_uV = 1,
  327. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  328. .state_mem = {
  329. .disabled = 1,
  330. },
  331. },
  332. };
  333. static struct regulator_init_data lp3974_ldo13_data = {
  334. .constraints = {
  335. .name = "VHIC_1.2V",
  336. .min_uV = 1200000,
  337. .max_uV = 1200000,
  338. .apply_uV = 1,
  339. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  340. .state_mem = {
  341. .disabled = 1,
  342. },
  343. },
  344. };
  345. static struct regulator_consumer_supply lp3974_ldo14_consumer =
  346. REGULATOR_SUPPLY("dig_18", "0-001f");
  347. static struct regulator_init_data lp3974_ldo14_data = {
  348. .constraints = {
  349. .name = "CAM_I_HOST_1.8V",
  350. .min_uV = 1800000,
  351. .max_uV = 1800000,
  352. .apply_uV = 1,
  353. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  354. .state_mem = {
  355. .disabled = 1,
  356. },
  357. },
  358. .num_consumer_supplies = 1,
  359. .consumer_supplies = &lp3974_ldo14_consumer,
  360. };
  361. static struct regulator_consumer_supply lp3974_ldo15_consumer =
  362. REGULATOR_SUPPLY("dig_12", "0-001f");
  363. static struct regulator_init_data lp3974_ldo15_data = {
  364. .constraints = {
  365. .name = "CAM_S_DIG+FM33_CORE_1.2V",
  366. .min_uV = 1200000,
  367. .max_uV = 1200000,
  368. .apply_uV = 1,
  369. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  370. .state_mem = {
  371. .disabled = 1,
  372. },
  373. },
  374. .num_consumer_supplies = 1,
  375. .consumer_supplies = &lp3974_ldo15_consumer,
  376. };
  377. static struct regulator_consumer_supply lp3974_ldo16_consumer[] = {
  378. REGULATOR_SUPPLY("vdda", "0-003c"),
  379. REGULATOR_SUPPLY("a_sensor", "0-001f"),
  380. };
  381. static struct regulator_init_data lp3974_ldo16_data = {
  382. .constraints = {
  383. .name = "CAM_S_ANA_2.8V",
  384. .min_uV = 2800000,
  385. .max_uV = 2800000,
  386. .apply_uV = 1,
  387. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  388. .state_mem = {
  389. .disabled = 1,
  390. },
  391. },
  392. .num_consumer_supplies = ARRAY_SIZE(lp3974_ldo16_consumer),
  393. .consumer_supplies = lp3974_ldo16_consumer,
  394. };
  395. static struct regulator_init_data lp3974_ldo17_data = {
  396. .constraints = {
  397. .name = "VCC_3.0V_LCD",
  398. .min_uV = 3000000,
  399. .max_uV = 3000000,
  400. .apply_uV = 1,
  401. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  402. .boot_on = 1,
  403. .state_mem = {
  404. .disabled = 1,
  405. },
  406. },
  407. };
  408. static struct regulator_init_data lp3974_32khz_ap_data = {
  409. .constraints = {
  410. .name = "32KHz AP",
  411. .always_on = 1,
  412. .state_mem = {
  413. .enabled = 1,
  414. },
  415. },
  416. };
  417. static struct regulator_init_data lp3974_32khz_cp_data = {
  418. .constraints = {
  419. .name = "32KHz CP",
  420. .state_mem = {
  421. .disabled = 1,
  422. },
  423. },
  424. };
  425. static struct regulator_init_data lp3974_vichg_data = {
  426. .constraints = {
  427. .name = "VICHG",
  428. .state_mem = {
  429. .disabled = 1,
  430. },
  431. },
  432. };
  433. static struct regulator_init_data lp3974_esafeout1_data = {
  434. .constraints = {
  435. .name = "SAFEOUT1",
  436. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  437. .state_mem = {
  438. .enabled = 1,
  439. },
  440. },
  441. };
  442. static struct regulator_init_data lp3974_esafeout2_data = {
  443. .constraints = {
  444. .name = "SAFEOUT2",
  445. .boot_on = 1,
  446. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  447. .state_mem = {
  448. .enabled = 1,
  449. },
  450. },
  451. };
  452. static struct max8998_regulator_data lp3974_regulators[] = {
  453. { MAX8998_LDO2, &lp3974_ldo2_data },
  454. { MAX8998_LDO3, &lp3974_ldo3_data },
  455. { MAX8998_LDO4, &lp3974_ldo4_data },
  456. { MAX8998_LDO5, &lp3974_ldo5_data },
  457. { MAX8998_LDO6, &lp3974_ldo6_data },
  458. { MAX8998_LDO7, &lp3974_ldo7_data },
  459. { MAX8998_LDO8, &lp3974_ldo8_data },
  460. { MAX8998_LDO9, &lp3974_ldo9_data },
  461. { MAX8998_LDO10, &lp3974_ldo10_data },
  462. { MAX8998_LDO11, &lp3974_ldo11_data },
  463. { MAX8998_LDO12, &lp3974_ldo12_data },
  464. { MAX8998_LDO13, &lp3974_ldo13_data },
  465. { MAX8998_LDO14, &lp3974_ldo14_data },
  466. { MAX8998_LDO15, &lp3974_ldo15_data },
  467. { MAX8998_LDO16, &lp3974_ldo16_data },
  468. { MAX8998_LDO17, &lp3974_ldo17_data },
  469. { MAX8998_BUCK1, &lp3974_buck1_data },
  470. { MAX8998_BUCK2, &lp3974_buck2_data },
  471. { MAX8998_BUCK3, &lp3974_buck3_data },
  472. { MAX8998_BUCK4, &lp3974_buck4_data },
  473. { MAX8998_EN32KHZ_AP, &lp3974_32khz_ap_data },
  474. { MAX8998_EN32KHZ_CP, &lp3974_32khz_cp_data },
  475. { MAX8998_ENVICHG, &lp3974_vichg_data },
  476. { MAX8998_ESAFEOUT1, &lp3974_esafeout1_data },
  477. { MAX8998_ESAFEOUT2, &lp3974_esafeout2_data },
  478. };
  479. static struct max8998_platform_data universal_lp3974_pdata = {
  480. .num_regulators = ARRAY_SIZE(lp3974_regulators),
  481. .regulators = lp3974_regulators,
  482. .buck1_voltage1 = 1100000, /* INT */
  483. .buck1_voltage2 = 1000000,
  484. .buck1_voltage3 = 1100000,
  485. .buck1_voltage4 = 1000000,
  486. .buck1_set1 = EXYNOS4_GPX0(5),
  487. .buck1_set2 = EXYNOS4_GPX0(6),
  488. .buck2_voltage1 = 1200000, /* G3D */
  489. .buck2_voltage2 = 1100000,
  490. .buck1_default_idx = 0,
  491. .buck2_set3 = EXYNOS4_GPE2(0),
  492. .buck2_default_idx = 0,
  493. .wakeup = true,
  494. };
  495. enum fixed_regulator_id {
  496. FIXED_REG_ID_MMC0,
  497. FIXED_REG_ID_HDMI_5V,
  498. FIXED_REG_ID_CAM_S_IF,
  499. FIXED_REG_ID_CAM_I_CORE,
  500. FIXED_REG_ID_CAM_VT_DIO,
  501. };
  502. static struct regulator_consumer_supply hdmi_fixed_consumer =
  503. REGULATOR_SUPPLY("hdmi-en", "exynos4-hdmi");
  504. static struct regulator_init_data hdmi_fixed_voltage_init_data = {
  505. .constraints = {
  506. .name = "HDMI_5V",
  507. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  508. },
  509. .num_consumer_supplies = 1,
  510. .consumer_supplies = &hdmi_fixed_consumer,
  511. };
  512. static struct fixed_voltage_config hdmi_fixed_voltage_config = {
  513. .supply_name = "HDMI_EN1",
  514. .microvolts = 5000000,
  515. .gpio = EXYNOS4_GPE0(1),
  516. .enable_high = true,
  517. .init_data = &hdmi_fixed_voltage_init_data,
  518. };
  519. static struct platform_device hdmi_fixed_voltage = {
  520. .name = "reg-fixed-voltage",
  521. .id = FIXED_REG_ID_HDMI_5V,
  522. .dev = {
  523. .platform_data = &hdmi_fixed_voltage_config,
  524. },
  525. };
  526. /* GPIO I2C 5 (PMIC) */
  527. static struct i2c_board_info i2c5_devs[] __initdata = {
  528. {
  529. I2C_BOARD_INFO("max8952", 0xC0 >> 1),
  530. .platform_data = &universal_max8952_pdata,
  531. }, {
  532. I2C_BOARD_INFO("lp3974", 0xCC >> 1),
  533. .platform_data = &universal_lp3974_pdata,
  534. },
  535. };
  536. /* I2C3 (TSP) */
  537. static struct mxt_platform_data qt602240_platform_data = {
  538. .x_line = 19,
  539. .y_line = 11,
  540. .x_size = 800,
  541. .y_size = 480,
  542. .blen = 0x11,
  543. .threshold = 0x28,
  544. .voltage = 2800000, /* 2.8V */
  545. .orient = MXT_DIAGONAL,
  546. };
  547. static struct i2c_board_info i2c3_devs[] __initdata = {
  548. {
  549. I2C_BOARD_INFO("qt602240_ts", 0x4a),
  550. .platform_data = &qt602240_platform_data,
  551. },
  552. };
  553. static void __init universal_tsp_init(void)
  554. {
  555. int gpio;
  556. /* TSP_LDO_ON: XMDMADDR_11 */
  557. gpio = EXYNOS4_GPE2(3);
  558. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "TSP_LDO_ON");
  559. gpio_export(gpio, 0);
  560. /* TSP_INT: XMDMADDR_7 */
  561. gpio = EXYNOS4_GPE1(7);
  562. gpio_request(gpio, "TSP_INT");
  563. s5p_register_gpio_interrupt(gpio);
  564. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  565. s3c_gpio_setpull(gpio, S3C_GPIO_PULL_UP);
  566. i2c3_devs[0].irq = gpio_to_irq(gpio);
  567. }
  568. /* GPIO I2C 12 (3 Touchkey) */
  569. static uint32_t touchkey_keymap[] = {
  570. /* MCS_KEY_MAP(value, keycode) */
  571. MCS_KEY_MAP(0, KEY_MENU), /* KEY_SEND */
  572. MCS_KEY_MAP(1, KEY_BACK), /* KEY_END */
  573. };
  574. static struct mcs_platform_data touchkey_data = {
  575. .keymap = touchkey_keymap,
  576. .keymap_size = ARRAY_SIZE(touchkey_keymap),
  577. .key_maxval = 2,
  578. };
  579. /* GPIO I2C 3_TOUCH 2.8V */
  580. #define I2C_GPIO_BUS_12 12
  581. static struct i2c_gpio_platform_data i2c_gpio12_data = {
  582. .sda_pin = EXYNOS4_GPE4(0), /* XMDMDATA_8 */
  583. .scl_pin = EXYNOS4_GPE4(1), /* XMDMDATA_9 */
  584. };
  585. static struct platform_device i2c_gpio12 = {
  586. .name = "i2c-gpio",
  587. .id = I2C_GPIO_BUS_12,
  588. .dev = {
  589. .platform_data = &i2c_gpio12_data,
  590. },
  591. };
  592. static struct i2c_board_info i2c_gpio12_devs[] __initdata = {
  593. {
  594. I2C_BOARD_INFO("mcs5080_touchkey", 0x20),
  595. .platform_data = &touchkey_data,
  596. },
  597. };
  598. static void __init universal_touchkey_init(void)
  599. {
  600. int gpio;
  601. gpio = EXYNOS4_GPE3(7); /* XMDMDATA_7 */
  602. gpio_request(gpio, "3_TOUCH_INT");
  603. s5p_register_gpio_interrupt(gpio);
  604. s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(0xf));
  605. i2c_gpio12_devs[0].irq = gpio_to_irq(gpio);
  606. gpio = EXYNOS4_GPE3(3); /* XMDMDATA_3 */
  607. gpio_request_one(gpio, GPIOF_OUT_INIT_HIGH, "3_TOUCH_EN");
  608. }
  609. static struct s3c2410_platform_i2c universal_i2c0_platdata __initdata = {
  610. .frequency = 300 * 1000,
  611. .sda_delay = 200,
  612. };
  613. /* GPIO KEYS */
  614. static struct gpio_keys_button universal_gpio_keys_tables[] = {
  615. {
  616. .code = KEY_VOLUMEUP,
  617. .gpio = EXYNOS4_GPX2(0), /* XEINT16 */
  618. .desc = "gpio-keys: KEY_VOLUMEUP",
  619. .type = EV_KEY,
  620. .active_low = 1,
  621. .debounce_interval = 1,
  622. }, {
  623. .code = KEY_VOLUMEDOWN,
  624. .gpio = EXYNOS4_GPX2(1), /* XEINT17 */
  625. .desc = "gpio-keys: KEY_VOLUMEDOWN",
  626. .type = EV_KEY,
  627. .active_low = 1,
  628. .debounce_interval = 1,
  629. }, {
  630. .code = KEY_CONFIG,
  631. .gpio = EXYNOS4_GPX2(2), /* XEINT18 */
  632. .desc = "gpio-keys: KEY_CONFIG",
  633. .type = EV_KEY,
  634. .active_low = 1,
  635. .debounce_interval = 1,
  636. }, {
  637. .code = KEY_CAMERA,
  638. .gpio = EXYNOS4_GPX2(3), /* XEINT19 */
  639. .desc = "gpio-keys: KEY_CAMERA",
  640. .type = EV_KEY,
  641. .active_low = 1,
  642. .debounce_interval = 1,
  643. }, {
  644. .code = KEY_OK,
  645. .gpio = EXYNOS4_GPX3(5), /* XEINT29 */
  646. .desc = "gpio-keys: KEY_OK",
  647. .type = EV_KEY,
  648. .active_low = 1,
  649. .debounce_interval = 1,
  650. },
  651. };
  652. static struct gpio_keys_platform_data universal_gpio_keys_data = {
  653. .buttons = universal_gpio_keys_tables,
  654. .nbuttons = ARRAY_SIZE(universal_gpio_keys_tables),
  655. };
  656. static struct platform_device universal_gpio_keys = {
  657. .name = "gpio-keys",
  658. .dev = {
  659. .platform_data = &universal_gpio_keys_data,
  660. },
  661. };
  662. /* eMMC */
  663. static struct s3c_sdhci_platdata universal_hsmmc0_data __initdata = {
  664. .max_width = 8,
  665. .host_caps = (MMC_CAP_8_BIT_DATA | MMC_CAP_4_BIT_DATA |
  666. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  667. MMC_CAP_DISABLE),
  668. .cd_type = S3C_SDHCI_CD_PERMANENT,
  669. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  670. };
  671. static struct regulator_consumer_supply mmc0_supplies[] = {
  672. REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
  673. };
  674. static struct regulator_init_data mmc0_fixed_voltage_init_data = {
  675. .constraints = {
  676. .name = "VMEM_VDD_2.8V",
  677. .valid_ops_mask = REGULATOR_CHANGE_STATUS,
  678. },
  679. .num_consumer_supplies = ARRAY_SIZE(mmc0_supplies),
  680. .consumer_supplies = mmc0_supplies,
  681. };
  682. static struct fixed_voltage_config mmc0_fixed_voltage_config = {
  683. .supply_name = "MASSMEMORY_EN",
  684. .microvolts = 2800000,
  685. .gpio = EXYNOS4_GPE1(3),
  686. .enable_high = true,
  687. .init_data = &mmc0_fixed_voltage_init_data,
  688. };
  689. static struct platform_device mmc0_fixed_voltage = {
  690. .name = "reg-fixed-voltage",
  691. .id = FIXED_REG_ID_MMC0,
  692. .dev = {
  693. .platform_data = &mmc0_fixed_voltage_config,
  694. },
  695. };
  696. /* SD */
  697. static struct s3c_sdhci_platdata universal_hsmmc2_data __initdata = {
  698. .max_width = 4,
  699. .host_caps = MMC_CAP_4_BIT_DATA |
  700. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  701. MMC_CAP_DISABLE,
  702. .ext_cd_gpio = EXYNOS4_GPX3(4), /* XEINT_28 */
  703. .ext_cd_gpio_invert = 1,
  704. .cd_type = S3C_SDHCI_CD_GPIO,
  705. .clk_type = S3C_SDHCI_CLK_DIV_EXTERNAL,
  706. };
  707. /* WiFi */
  708. static struct s3c_sdhci_platdata universal_hsmmc3_data __initdata = {
  709. .max_width = 4,
  710. .host_caps = MMC_CAP_4_BIT_DATA |
  711. MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED |
  712. MMC_CAP_DISABLE,
  713. .cd_type = S3C_SDHCI_CD_EXTERNAL,
  714. };
  715. static void __init universal_sdhci_init(void)
  716. {
  717. s3c_sdhci0_set_platdata(&universal_hsmmc0_data);
  718. s3c_sdhci2_set_platdata(&universal_hsmmc2_data);
  719. s3c_sdhci3_set_platdata(&universal_hsmmc3_data);
  720. }
  721. /* I2C1 */
  722. static struct i2c_board_info i2c1_devs[] __initdata = {
  723. /* Gyro, To be updated */
  724. };
  725. /* Frame Buffer */
  726. static struct s3c_fb_pd_win universal_fb_win0 = {
  727. .win_mode = {
  728. .left_margin = 16,
  729. .right_margin = 16,
  730. .upper_margin = 2,
  731. .lower_margin = 28,
  732. .hsync_len = 2,
  733. .vsync_len = 1,
  734. .xres = 480,
  735. .yres = 800,
  736. .refresh = 55,
  737. },
  738. .max_bpp = 32,
  739. .default_bpp = 16,
  740. .virtual_x = 480,
  741. .virtual_y = 2 * 800,
  742. };
  743. static struct s3c_fb_platdata universal_lcd_pdata __initdata = {
  744. .win[0] = &universal_fb_win0,
  745. .vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB |
  746. VIDCON0_CLKSEL_LCD,
  747. .vidcon1 = VIDCON1_INV_VCLK | VIDCON1_INV_VDEN
  748. | VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
  749. .setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
  750. };
  751. static struct regulator_consumer_supply cam_vt_dio_supply =
  752. REGULATOR_SUPPLY("vdd_core", "0-003c");
  753. static struct regulator_init_data cam_vt_dio_reg_init_data = {
  754. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  755. .num_consumer_supplies = 1,
  756. .consumer_supplies = &cam_vt_dio_supply,
  757. };
  758. static struct fixed_voltage_config cam_vt_dio_fixed_voltage_cfg = {
  759. .supply_name = "CAM_VT_D_IO",
  760. .microvolts = 2800000,
  761. .gpio = EXYNOS4_GPE2(1), /* CAM_PWR_EN2 */
  762. .enable_high = 1,
  763. .init_data = &cam_vt_dio_reg_init_data,
  764. };
  765. static struct platform_device cam_vt_dio_fixed_reg_dev = {
  766. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_VT_DIO,
  767. .dev = { .platform_data = &cam_vt_dio_fixed_voltage_cfg },
  768. };
  769. static struct regulator_consumer_supply cam_i_core_supply =
  770. REGULATOR_SUPPLY("core", "0-001f");
  771. static struct regulator_init_data cam_i_core_reg_init_data = {
  772. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  773. .num_consumer_supplies = 1,
  774. .consumer_supplies = &cam_i_core_supply,
  775. };
  776. static struct fixed_voltage_config cam_i_core_fixed_voltage_cfg = {
  777. .supply_name = "CAM_I_CORE_1.2V",
  778. .microvolts = 1200000,
  779. .gpio = EXYNOS4_GPE2(2), /* CAM_8M_CORE_EN */
  780. .enable_high = 1,
  781. .init_data = &cam_i_core_reg_init_data,
  782. };
  783. static struct platform_device cam_i_core_fixed_reg_dev = {
  784. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_I_CORE,
  785. .dev = { .platform_data = &cam_i_core_fixed_voltage_cfg },
  786. };
  787. static struct regulator_consumer_supply cam_s_if_supply =
  788. REGULATOR_SUPPLY("d_sensor", "0-001f");
  789. static struct regulator_init_data cam_s_if_reg_init_data = {
  790. .constraints = { .valid_ops_mask = REGULATOR_CHANGE_STATUS },
  791. .num_consumer_supplies = 1,
  792. .consumer_supplies = &cam_s_if_supply,
  793. };
  794. static struct fixed_voltage_config cam_s_if_fixed_voltage_cfg = {
  795. .supply_name = "CAM_S_IF_1.8V",
  796. .microvolts = 1800000,
  797. .gpio = EXYNOS4_GPE3(0), /* CAM_PWR_EN1 */
  798. .enable_high = 1,
  799. .init_data = &cam_s_if_reg_init_data,
  800. };
  801. static struct platform_device cam_s_if_fixed_reg_dev = {
  802. .name = "reg-fixed-voltage", .id = FIXED_REG_ID_CAM_S_IF,
  803. .dev = { .platform_data = &cam_s_if_fixed_voltage_cfg },
  804. };
  805. static struct s5p_platform_mipi_csis mipi_csis_platdata = {
  806. .clk_rate = 166000000UL,
  807. .lanes = 2,
  808. .alignment = 32,
  809. .hs_settle = 12,
  810. .phy_enable = s5p_csis_phy_enable,
  811. };
  812. #define GPIO_CAM_LEVEL_EN(n) EXYNOS4_GPE4(n + 3)
  813. #define GPIO_CAM_8M_ISP_INT EXYNOS4_GPX1(5) /* XEINT_13 */
  814. #define GPIO_CAM_MEGA_nRST EXYNOS4_GPE2(5)
  815. #define GPIO_CAM_VGA_NRST EXYNOS4_GPE4(7)
  816. #define GPIO_CAM_VGA_NSTBY EXYNOS4_GPE4(6)
  817. static int s5k6aa_set_power(int on)
  818. {
  819. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  820. return 0;
  821. }
  822. static struct s5k6aa_platform_data s5k6aa_platdata = {
  823. .mclk_frequency = 21600000UL,
  824. .gpio_reset = { GPIO_CAM_VGA_NRST, 0 },
  825. .gpio_stby = { GPIO_CAM_VGA_NSTBY, 0 },
  826. .bus_type = V4L2_MBUS_PARALLEL,
  827. .horiz_flip = 1,
  828. .set_power = s5k6aa_set_power,
  829. };
  830. static struct i2c_board_info s5k6aa_board_info = {
  831. I2C_BOARD_INFO("S5K6AA", 0x3C),
  832. .platform_data = &s5k6aa_platdata,
  833. };
  834. static int m5mols_set_power(struct device *dev, int on)
  835. {
  836. gpio_set_value(GPIO_CAM_LEVEL_EN(1), !on);
  837. gpio_set_value(GPIO_CAM_LEVEL_EN(2), !!on);
  838. return 0;
  839. }
  840. static struct m5mols_platform_data m5mols_platdata = {
  841. .gpio_reset = GPIO_CAM_MEGA_nRST,
  842. .reset_polarity = 0,
  843. .set_power = m5mols_set_power,
  844. };
  845. static struct i2c_board_info m5mols_board_info = {
  846. I2C_BOARD_INFO("M5MOLS", 0x1F),
  847. .platform_data = &m5mols_platdata,
  848. };
  849. static struct s5p_fimc_isp_info universal_camera_sensors[] = {
  850. {
  851. .mux_id = 0,
  852. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  853. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  854. .bus_type = FIMC_ITU_601,
  855. .board_info = &s5k6aa_board_info,
  856. .i2c_bus_num = 0,
  857. .clk_frequency = 24000000UL,
  858. }, {
  859. .mux_id = 0,
  860. .flags = V4L2_MBUS_PCLK_SAMPLE_FALLING |
  861. V4L2_MBUS_VSYNC_ACTIVE_LOW,
  862. .bus_type = FIMC_MIPI_CSI2,
  863. .board_info = &m5mols_board_info,
  864. .i2c_bus_num = 0,
  865. .clk_frequency = 21600000UL,
  866. .csi_data_align = 32,
  867. },
  868. };
  869. static struct s5p_platform_fimc fimc_md_platdata = {
  870. .isp_info = universal_camera_sensors,
  871. .num_clients = ARRAY_SIZE(universal_camera_sensors),
  872. };
  873. static struct gpio universal_camera_gpios[] = {
  874. { GPIO_CAM_LEVEL_EN(1), GPIOF_OUT_INIT_HIGH, "CAM_LVL_EN1" },
  875. { GPIO_CAM_LEVEL_EN(2), GPIOF_OUT_INIT_LOW, "CAM_LVL_EN2" },
  876. { GPIO_CAM_8M_ISP_INT, GPIOF_IN, "8M_ISP_INT" },
  877. { GPIO_CAM_MEGA_nRST, GPIOF_OUT_INIT_LOW, "CAM_8M_NRST" },
  878. { GPIO_CAM_VGA_NRST, GPIOF_OUT_INIT_LOW, "CAM_VGA_NRST" },
  879. { GPIO_CAM_VGA_NSTBY, GPIOF_OUT_INIT_LOW, "CAM_VGA_NSTBY" },
  880. };
  881. static void __init universal_camera_init(void)
  882. {
  883. s3c_set_platdata(&mipi_csis_platdata, sizeof(mipi_csis_platdata),
  884. &s5p_device_mipi_csis0);
  885. s3c_set_platdata(&fimc_md_platdata, sizeof(fimc_md_platdata),
  886. &s5p_device_fimc_md);
  887. if (gpio_request_array(universal_camera_gpios,
  888. ARRAY_SIZE(universal_camera_gpios))) {
  889. pr_err("%s: GPIO request failed\n", __func__);
  890. return;
  891. }
  892. if (!s3c_gpio_cfgpin(GPIO_CAM_8M_ISP_INT, S3C_GPIO_SFN(0xf)))
  893. m5mols_board_info.irq = gpio_to_irq(GPIO_CAM_8M_ISP_INT);
  894. else
  895. pr_err("Failed to configure 8M_ISP_INT GPIO\n");
  896. /* Free GPIOs controlled directly by the sensor drivers. */
  897. gpio_free(GPIO_CAM_MEGA_nRST);
  898. gpio_free(GPIO_CAM_8M_ISP_INT);
  899. gpio_free(GPIO_CAM_VGA_NRST);
  900. gpio_free(GPIO_CAM_VGA_NSTBY);
  901. if (exynos4_fimc_setup_gpio(S5P_CAMPORT_A))
  902. pr_err("Camera port A setup failed\n");
  903. }
  904. static struct platform_device *universal_devices[] __initdata = {
  905. /* Samsung Platform Devices */
  906. &s5p_device_mipi_csis0,
  907. &s5p_device_fimc0,
  908. &s5p_device_fimc1,
  909. &s5p_device_fimc2,
  910. &s5p_device_fimc3,
  911. &s5p_device_g2d,
  912. &mmc0_fixed_voltage,
  913. &s3c_device_hsmmc0,
  914. &s3c_device_hsmmc2,
  915. &s3c_device_hsmmc3,
  916. &s3c_device_i2c0,
  917. &s3c_device_i2c3,
  918. &s3c_device_i2c5,
  919. &s5p_device_i2c_hdmiphy,
  920. &hdmi_fixed_voltage,
  921. &exynos4_device_pd[PD_TV],
  922. &s5p_device_hdmi,
  923. &s5p_device_sdo,
  924. &s5p_device_mixer,
  925. /* Universal Devices */
  926. &i2c_gpio12,
  927. &universal_gpio_keys,
  928. &s5p_device_onenand,
  929. &s5p_device_fimd0,
  930. &s5p_device_mfc,
  931. &s5p_device_mfc_l,
  932. &s5p_device_mfc_r,
  933. &exynos4_device_pd[PD_MFC],
  934. &exynos4_device_pd[PD_LCD0],
  935. &exynos4_device_pd[PD_CAM],
  936. &cam_vt_dio_fixed_reg_dev,
  937. &cam_i_core_fixed_reg_dev,
  938. &cam_s_if_fixed_reg_dev,
  939. &s5p_device_fimc_md,
  940. };
  941. static void __init universal_map_io(void)
  942. {
  943. exynos_init_io(NULL, 0);
  944. s3c24xx_init_clocks(24000000);
  945. s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
  946. }
  947. void s5p_tv_setup(void)
  948. {
  949. /* direct HPD to HDMI chip */
  950. gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug");
  951. s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
  952. s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
  953. /* setup dependencies between TV devices */
  954. s5p_device_hdmi.dev.parent = &exynos4_device_pd[PD_TV].dev;
  955. s5p_device_mixer.dev.parent = &exynos4_device_pd[PD_TV].dev;
  956. }
  957. static void __init universal_reserve(void)
  958. {
  959. s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
  960. }
  961. static void __init universal_machine_init(void)
  962. {
  963. universal_sdhci_init();
  964. s5p_tv_setup();
  965. s3c_i2c0_set_platdata(&universal_i2c0_platdata);
  966. i2c_register_board_info(1, i2c1_devs, ARRAY_SIZE(i2c1_devs));
  967. universal_tsp_init();
  968. s3c_i2c3_set_platdata(NULL);
  969. i2c_register_board_info(3, i2c3_devs, ARRAY_SIZE(i2c3_devs));
  970. s3c_i2c5_set_platdata(NULL);
  971. s5p_i2c_hdmiphy_set_platdata(NULL);
  972. i2c_register_board_info(5, i2c5_devs, ARRAY_SIZE(i2c5_devs));
  973. s5p_fimd0_set_platdata(&universal_lcd_pdata);
  974. universal_touchkey_init();
  975. i2c_register_board_info(I2C_GPIO_BUS_12, i2c_gpio12_devs,
  976. ARRAY_SIZE(i2c_gpio12_devs));
  977. universal_camera_init();
  978. /* Last */
  979. platform_add_devices(universal_devices, ARRAY_SIZE(universal_devices));
  980. s5p_device_mfc.dev.parent = &exynos4_device_pd[PD_MFC].dev;
  981. s5p_device_fimd0.dev.parent = &exynos4_device_pd[PD_LCD0].dev;
  982. s5p_device_fimc0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  983. s5p_device_fimc1.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  984. s5p_device_fimc2.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  985. s5p_device_fimc3.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  986. s5p_device_mipi_csis0.dev.parent = &exynos4_device_pd[PD_CAM].dev;
  987. }
  988. MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
  989. /* Maintainer: Kyungmin Park <kyungmin.park@samsung.com> */
  990. .atag_offset = 0x100,
  991. .init_irq = exynos4_init_irq,
  992. .map_io = universal_map_io,
  993. .handle_irq = gic_handle_irq,
  994. .init_machine = universal_machine_init,
  995. .timer = &exynos4_timer,
  996. .reserve = &universal_reserve,
  997. .restart = exynos4_restart,
  998. MACHINE_END