cx88-dvb.c 27 KB

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  1. /*
  2. *
  3. * device driver for Conexant 2388x based TV cards
  4. * MPEG Transport Stream (DVB) routines
  5. *
  6. * (c) 2004, 2005 Chris Pascoe <c.pascoe@itee.uq.edu.au>
  7. * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  22. */
  23. #include <linux/module.h>
  24. #include <linux/init.h>
  25. #include <linux/device.h>
  26. #include <linux/fs.h>
  27. #include <linux/kthread.h>
  28. #include <linux/file.h>
  29. #include <linux/suspend.h>
  30. #include "cx88.h"
  31. #include "dvb-pll.h"
  32. #include <media/v4l2-common.h>
  33. #include "mt352.h"
  34. #include "mt352_priv.h"
  35. #include "cx88-vp3054-i2c.h"
  36. #include "zl10353.h"
  37. #include "cx22702.h"
  38. #include "or51132.h"
  39. #include "lgdt330x.h"
  40. #include "s5h1409.h"
  41. #include "xc5000.h"
  42. #include "nxt200x.h"
  43. #include "cx24123.h"
  44. #include "isl6421.h"
  45. #include "tuner-xc2028.h"
  46. #include "tuner-xc2028-types.h"
  47. #include "tuner-simple.h"
  48. #include "tda9887.h"
  49. MODULE_DESCRIPTION("driver for cx2388x based DVB cards");
  50. MODULE_AUTHOR("Chris Pascoe <c.pascoe@itee.uq.edu.au>");
  51. MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
  52. MODULE_LICENSE("GPL");
  53. static unsigned int debug;
  54. module_param(debug, int, 0644);
  55. MODULE_PARM_DESC(debug,"enable debug messages [dvb]");
  56. #define dprintk(level,fmt, arg...) if (debug >= level) \
  57. printk(KERN_DEBUG "%s/2-dvb: " fmt, core->name, ## arg)
  58. /* ------------------------------------------------------------------ */
  59. static int dvb_buf_setup(struct videobuf_queue *q,
  60. unsigned int *count, unsigned int *size)
  61. {
  62. struct cx8802_dev *dev = q->priv_data;
  63. dev->ts_packet_size = 188 * 4;
  64. dev->ts_packet_count = 32;
  65. *size = dev->ts_packet_size * dev->ts_packet_count;
  66. *count = 32;
  67. return 0;
  68. }
  69. static int dvb_buf_prepare(struct videobuf_queue *q,
  70. struct videobuf_buffer *vb, enum v4l2_field field)
  71. {
  72. struct cx8802_dev *dev = q->priv_data;
  73. return cx8802_buf_prepare(q, dev, (struct cx88_buffer*)vb,field);
  74. }
  75. static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  76. {
  77. struct cx8802_dev *dev = q->priv_data;
  78. cx8802_buf_queue(dev, (struct cx88_buffer*)vb);
  79. }
  80. static void dvb_buf_release(struct videobuf_queue *q,
  81. struct videobuf_buffer *vb)
  82. {
  83. cx88_free_buffer(q, (struct cx88_buffer*)vb);
  84. }
  85. static struct videobuf_queue_ops dvb_qops = {
  86. .buf_setup = dvb_buf_setup,
  87. .buf_prepare = dvb_buf_prepare,
  88. .buf_queue = dvb_buf_queue,
  89. .buf_release = dvb_buf_release,
  90. };
  91. /* ------------------------------------------------------------------ */
  92. static int cx88_dvb_bus_ctrl(struct dvb_frontend* fe, int acquire)
  93. {
  94. struct cx8802_dev *dev= fe->dvb->priv;
  95. struct cx8802_driver *drv = NULL;
  96. int ret = 0;
  97. drv = cx8802_get_driver(dev, CX88_MPEG_DVB);
  98. if (drv) {
  99. if (acquire)
  100. ret = drv->request_acquire(drv);
  101. else
  102. ret = drv->request_release(drv);
  103. }
  104. return ret;
  105. }
  106. /* ------------------------------------------------------------------ */
  107. static int dvico_fusionhdtv_demod_init(struct dvb_frontend* fe)
  108. {
  109. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x39 };
  110. static u8 reset [] = { RESET, 0x80 };
  111. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  112. static u8 agc_cfg [] = { AGC_TARGET, 0x24, 0x20 };
  113. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  114. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  115. mt352_write(fe, clock_config, sizeof(clock_config));
  116. udelay(200);
  117. mt352_write(fe, reset, sizeof(reset));
  118. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  119. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  120. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  121. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  122. return 0;
  123. }
  124. static int dvico_dual_demod_init(struct dvb_frontend *fe)
  125. {
  126. static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x38 };
  127. static u8 reset [] = { RESET, 0x80 };
  128. static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
  129. static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0x20 };
  130. static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x33 };
  131. static u8 capt_range_cfg[] = { CAPT_RANGE, 0x32 };
  132. mt352_write(fe, clock_config, sizeof(clock_config));
  133. udelay(200);
  134. mt352_write(fe, reset, sizeof(reset));
  135. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  136. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  137. mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
  138. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  139. return 0;
  140. }
  141. static int dntv_live_dvbt_demod_init(struct dvb_frontend* fe)
  142. {
  143. static u8 clock_config [] = { 0x89, 0x38, 0x39 };
  144. static u8 reset [] = { 0x50, 0x80 };
  145. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  146. static u8 agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
  147. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  148. static u8 dntv_extra[] = { 0xB5, 0x7A };
  149. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  150. mt352_write(fe, clock_config, sizeof(clock_config));
  151. udelay(2000);
  152. mt352_write(fe, reset, sizeof(reset));
  153. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  154. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  155. udelay(2000);
  156. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  157. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  158. return 0;
  159. }
  160. static struct mt352_config dvico_fusionhdtv = {
  161. .demod_address = 0x0f,
  162. .demod_init = dvico_fusionhdtv_demod_init,
  163. };
  164. static struct mt352_config dntv_live_dvbt_config = {
  165. .demod_address = 0x0f,
  166. .demod_init = dntv_live_dvbt_demod_init,
  167. };
  168. static struct mt352_config dvico_fusionhdtv_dual = {
  169. .demod_address = 0x0f,
  170. .demod_init = dvico_dual_demod_init,
  171. };
  172. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  173. static int dntv_live_dvbt_pro_demod_init(struct dvb_frontend* fe)
  174. {
  175. static u8 clock_config [] = { 0x89, 0x38, 0x38 };
  176. static u8 reset [] = { 0x50, 0x80 };
  177. static u8 adc_ctl_1_cfg [] = { 0x8E, 0x40 };
  178. static u8 agc_cfg [] = { 0x67, 0x10, 0x20, 0x00, 0xFF, 0xFF,
  179. 0x00, 0xFF, 0x00, 0x40, 0x40 };
  180. static u8 dntv_extra[] = { 0xB5, 0x7A };
  181. static u8 capt_range_cfg[] = { 0x75, 0x32 };
  182. mt352_write(fe, clock_config, sizeof(clock_config));
  183. udelay(2000);
  184. mt352_write(fe, reset, sizeof(reset));
  185. mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
  186. mt352_write(fe, agc_cfg, sizeof(agc_cfg));
  187. udelay(2000);
  188. mt352_write(fe, dntv_extra, sizeof(dntv_extra));
  189. mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
  190. return 0;
  191. }
  192. static struct mt352_config dntv_live_dvbt_pro_config = {
  193. .demod_address = 0x0f,
  194. .no_tuner = 1,
  195. .demod_init = dntv_live_dvbt_pro_demod_init,
  196. };
  197. #endif
  198. static struct zl10353_config dvico_fusionhdtv_hybrid = {
  199. .demod_address = 0x0f,
  200. .no_tuner = 1,
  201. };
  202. static struct zl10353_config dvico_fusionhdtv_xc3028 = {
  203. .demod_address = 0x0f,
  204. .if2 = 45600,
  205. .no_tuner = 1,
  206. };
  207. static struct mt352_config dvico_fusionhdtv_mt352_xc3028 = {
  208. .demod_address = 0x0f,
  209. .if2 = 4560,
  210. .no_tuner = 1,
  211. .demod_init = dvico_fusionhdtv_demod_init,
  212. };
  213. static struct zl10353_config dvico_fusionhdtv_plus_v1_1 = {
  214. .demod_address = 0x0f,
  215. };
  216. static struct cx22702_config connexant_refboard_config = {
  217. .demod_address = 0x43,
  218. .output_mode = CX22702_SERIAL_OUTPUT,
  219. };
  220. static struct cx22702_config hauppauge_hvr_config = {
  221. .demod_address = 0x63,
  222. .output_mode = CX22702_SERIAL_OUTPUT,
  223. };
  224. static int or51132_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  225. {
  226. struct cx8802_dev *dev= fe->dvb->priv;
  227. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  228. return 0;
  229. }
  230. static struct or51132_config pchdtv_hd3000 = {
  231. .demod_address = 0x15,
  232. .set_ts_params = or51132_set_ts_param,
  233. };
  234. static int lgdt330x_pll_rf_set(struct dvb_frontend* fe, int index)
  235. {
  236. struct cx8802_dev *dev= fe->dvb->priv;
  237. struct cx88_core *core = dev->core;
  238. dprintk(1, "%s: index = %d\n", __FUNCTION__, index);
  239. if (index == 0)
  240. cx_clear(MO_GP0_IO, 8);
  241. else
  242. cx_set(MO_GP0_IO, 8);
  243. return 0;
  244. }
  245. static int lgdt330x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  246. {
  247. struct cx8802_dev *dev= fe->dvb->priv;
  248. if (is_punctured)
  249. dev->ts_gen_cntrl |= 0x04;
  250. else
  251. dev->ts_gen_cntrl &= ~0x04;
  252. return 0;
  253. }
  254. static struct lgdt330x_config fusionhdtv_3_gold = {
  255. .demod_address = 0x0e,
  256. .demod_chip = LGDT3302,
  257. .serial_mpeg = 0x04, /* TPSERIAL for 3302 in TOP_CONTROL */
  258. .set_ts_params = lgdt330x_set_ts_param,
  259. };
  260. static struct lgdt330x_config fusionhdtv_5_gold = {
  261. .demod_address = 0x0e,
  262. .demod_chip = LGDT3303,
  263. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  264. .set_ts_params = lgdt330x_set_ts_param,
  265. };
  266. static struct lgdt330x_config pchdtv_hd5500 = {
  267. .demod_address = 0x59,
  268. .demod_chip = LGDT3303,
  269. .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
  270. .set_ts_params = lgdt330x_set_ts_param,
  271. };
  272. static int nxt200x_set_ts_param(struct dvb_frontend* fe, int is_punctured)
  273. {
  274. struct cx8802_dev *dev= fe->dvb->priv;
  275. dev->ts_gen_cntrl = is_punctured ? 0x04 : 0x00;
  276. return 0;
  277. }
  278. static struct nxt200x_config ati_hdtvwonder = {
  279. .demod_address = 0x0a,
  280. .set_ts_params = nxt200x_set_ts_param,
  281. };
  282. static int cx24123_set_ts_param(struct dvb_frontend* fe,
  283. int is_punctured)
  284. {
  285. struct cx8802_dev *dev= fe->dvb->priv;
  286. dev->ts_gen_cntrl = 0x02;
  287. return 0;
  288. }
  289. static int kworld_dvbs_100_set_voltage(struct dvb_frontend* fe,
  290. fe_sec_voltage_t voltage)
  291. {
  292. struct cx8802_dev *dev= fe->dvb->priv;
  293. struct cx88_core *core = dev->core;
  294. if (voltage == SEC_VOLTAGE_OFF)
  295. cx_write(MO_GP0_IO, 0x000006fb);
  296. else
  297. cx_write(MO_GP0_IO, 0x000006f9);
  298. if (core->prev_set_voltage)
  299. return core->prev_set_voltage(fe, voltage);
  300. return 0;
  301. }
  302. static int geniatech_dvbs_set_voltage(struct dvb_frontend *fe,
  303. fe_sec_voltage_t voltage)
  304. {
  305. struct cx8802_dev *dev= fe->dvb->priv;
  306. struct cx88_core *core = dev->core;
  307. if (voltage == SEC_VOLTAGE_OFF) {
  308. dprintk(1,"LNB Voltage OFF\n");
  309. cx_write(MO_GP0_IO, 0x0000efff);
  310. }
  311. if (core->prev_set_voltage)
  312. return core->prev_set_voltage(fe, voltage);
  313. return 0;
  314. }
  315. static int cx88_pci_nano_callback(void *ptr, int command, int arg)
  316. {
  317. struct cx88_core *core = ptr;
  318. switch (command) {
  319. case XC2028_TUNER_RESET:
  320. /* Send the tuner in then out of reset */
  321. dprintk(1, "%s: XC2028_TUNER_RESET %d\n", __FUNCTION__, arg);
  322. switch (core->boardnr) {
  323. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  324. /* GPIO-4 xc3028 tuner */
  325. cx_set(MO_GP0_IO, 0x00001000);
  326. cx_clear(MO_GP0_IO, 0x00000010);
  327. msleep(100);
  328. cx_set(MO_GP0_IO, 0x00000010);
  329. msleep(100);
  330. break;
  331. }
  332. break;
  333. case XC2028_RESET_CLK:
  334. dprintk(1, "%s: XC2028_RESET_CLK %d\n", __FUNCTION__, arg);
  335. break;
  336. default:
  337. dprintk(1, "%s: unknown command %d, arg %d\n", __FUNCTION__,
  338. command, arg);
  339. return -EINVAL;
  340. }
  341. return 0;
  342. }
  343. static struct cx24123_config geniatech_dvbs_config = {
  344. .demod_address = 0x55,
  345. .set_ts_params = cx24123_set_ts_param,
  346. };
  347. static struct cx24123_config hauppauge_novas_config = {
  348. .demod_address = 0x55,
  349. .set_ts_params = cx24123_set_ts_param,
  350. };
  351. static struct cx24123_config kworld_dvbs_100_config = {
  352. .demod_address = 0x15,
  353. .set_ts_params = cx24123_set_ts_param,
  354. .lnb_polarity = 1,
  355. };
  356. static struct s5h1409_config pinnacle_pctv_hd_800i_config = {
  357. .demod_address = 0x32 >> 1,
  358. .output_mode = S5H1409_PARALLEL_OUTPUT,
  359. .gpio = S5H1409_GPIO_ON,
  360. .qam_if = 44000,
  361. .inversion = S5H1409_INVERSION_OFF,
  362. .status_mode = S5H1409_DEMODLOCKING,
  363. .mpeg_timing = S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK,
  364. };
  365. static struct s5h1409_config dvico_hdtv5_pci_nano_config = {
  366. .demod_address = 0x32 >> 1,
  367. .output_mode = S5H1409_SERIAL_OUTPUT,
  368. .gpio = S5H1409_GPIO_OFF,
  369. .inversion = S5H1409_INVERSION_OFF,
  370. .status_mode = S5H1409_DEMODLOCKING,
  371. .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
  372. };
  373. static struct xc5000_config pinnacle_pctv_hd_800i_tuner_config = {
  374. .i2c_address = 0x64,
  375. .if_khz = 5380,
  376. .tuner_callback = cx88_tuner_callback,
  377. };
  378. static struct zl10353_config cx88_geniatech_x8000_mt = {
  379. .demod_address = (0x1e >> 1),
  380. .no_tuner = 1,
  381. };
  382. static int attach_xc3028(u8 addr, struct cx8802_dev *dev)
  383. {
  384. struct dvb_frontend *fe;
  385. struct xc2028_config cfg = {
  386. .i2c_adap = &dev->core->i2c_adap,
  387. .i2c_addr = addr,
  388. };
  389. if (!dev->dvb.frontend) {
  390. printk(KERN_ERR "%s/2: dvb frontend not attached. "
  391. "Can't attach xc3028\n",
  392. dev->core->name);
  393. return -EINVAL;
  394. }
  395. fe = dvb_attach(xc2028_attach, dev->dvb.frontend, &cfg);
  396. if (!fe) {
  397. printk(KERN_ERR "%s/2: xc3028 attach failed\n",
  398. dev->core->name);
  399. dvb_frontend_detach(dev->dvb.frontend);
  400. dvb_unregister_frontend(dev->dvb.frontend);
  401. dev->dvb.frontend = NULL;
  402. return -EINVAL;
  403. }
  404. printk(KERN_INFO "%s/2: xc3028 attached\n",
  405. dev->core->name);
  406. return 0;
  407. }
  408. static int dvb_register(struct cx8802_dev *dev)
  409. {
  410. /* init struct videobuf_dvb */
  411. dev->dvb.name = dev->core->name;
  412. dev->ts_gen_cntrl = 0x0c;
  413. /* init frontend */
  414. switch (dev->core->boardnr) {
  415. case CX88_BOARD_HAUPPAUGE_DVB_T1:
  416. dev->dvb.frontend = dvb_attach(cx22702_attach,
  417. &connexant_refboard_config,
  418. &dev->core->i2c_adap);
  419. if (dev->dvb.frontend != NULL) {
  420. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  421. &dev->core->i2c_adap,
  422. DVB_PLL_THOMSON_DTT759X);
  423. }
  424. break;
  425. case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1:
  426. case CX88_BOARD_CONEXANT_DVB_T1:
  427. case CX88_BOARD_KWORLD_DVB_T_CX22702:
  428. case CX88_BOARD_WINFAST_DTV1000:
  429. dev->dvb.frontend = dvb_attach(cx22702_attach,
  430. &connexant_refboard_config,
  431. &dev->core->i2c_adap);
  432. if (dev->dvb.frontend != NULL) {
  433. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  434. &dev->core->i2c_adap,
  435. DVB_PLL_THOMSON_DTT7579);
  436. }
  437. break;
  438. case CX88_BOARD_WINFAST_DTV2000H:
  439. case CX88_BOARD_HAUPPAUGE_HVR1100:
  440. case CX88_BOARD_HAUPPAUGE_HVR1100LP:
  441. case CX88_BOARD_HAUPPAUGE_HVR1300:
  442. case CX88_BOARD_HAUPPAUGE_HVR3000:
  443. dev->dvb.frontend = dvb_attach(cx22702_attach,
  444. &hauppauge_hvr_config,
  445. &dev->core->i2c_adap);
  446. if (dev->dvb.frontend != NULL) {
  447. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  448. &dev->core->i2c_adap, 0x61,
  449. TUNER_PHILIPS_FMD1216ME_MK3);
  450. }
  451. break;
  452. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PLUS:
  453. dev->dvb.frontend = dvb_attach(mt352_attach,
  454. &dvico_fusionhdtv,
  455. &dev->core->i2c_adap);
  456. if (dev->dvb.frontend != NULL) {
  457. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  458. NULL, DVB_PLL_THOMSON_DTT7579);
  459. break;
  460. }
  461. /* ZL10353 replaces MT352 on later cards */
  462. dev->dvb.frontend = dvb_attach(zl10353_attach,
  463. &dvico_fusionhdtv_plus_v1_1,
  464. &dev->core->i2c_adap);
  465. if (dev->dvb.frontend != NULL) {
  466. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x60,
  467. NULL, DVB_PLL_THOMSON_DTT7579);
  468. }
  469. break;
  470. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL:
  471. /* The tin box says DEE1601, but it seems to be DTT7579
  472. * compatible, with a slightly different MT352 AGC gain. */
  473. dev->dvb.frontend = dvb_attach(mt352_attach,
  474. &dvico_fusionhdtv_dual,
  475. &dev->core->i2c_adap);
  476. if (dev->dvb.frontend != NULL) {
  477. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  478. NULL, DVB_PLL_THOMSON_DTT7579);
  479. break;
  480. }
  481. /* ZL10353 replaces MT352 on later cards */
  482. dev->dvb.frontend = dvb_attach(zl10353_attach,
  483. &dvico_fusionhdtv_plus_v1_1,
  484. &dev->core->i2c_adap);
  485. if (dev->dvb.frontend != NULL) {
  486. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  487. NULL, DVB_PLL_THOMSON_DTT7579);
  488. }
  489. break;
  490. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T1:
  491. dev->dvb.frontend = dvb_attach(mt352_attach,
  492. &dvico_fusionhdtv,
  493. &dev->core->i2c_adap);
  494. if (dev->dvb.frontend != NULL) {
  495. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  496. NULL, DVB_PLL_LG_Z201);
  497. }
  498. break;
  499. case CX88_BOARD_KWORLD_DVB_T:
  500. case CX88_BOARD_DNTV_LIVE_DVB_T:
  501. case CX88_BOARD_ADSTECH_DVB_T_PCI:
  502. dev->dvb.frontend = dvb_attach(mt352_attach,
  503. &dntv_live_dvbt_config,
  504. &dev->core->i2c_adap);
  505. if (dev->dvb.frontend != NULL) {
  506. dvb_attach(dvb_pll_attach, dev->dvb.frontend, 0x61,
  507. NULL, DVB_PLL_UNKNOWN_1);
  508. }
  509. break;
  510. case CX88_BOARD_DNTV_LIVE_DVB_T_PRO:
  511. #if defined(CONFIG_VIDEO_CX88_VP3054) || (defined(CONFIG_VIDEO_CX88_VP3054_MODULE) && defined(MODULE))
  512. /* MT352 is on a secondary I2C bus made from some GPIO lines */
  513. dev->dvb.frontend = dvb_attach(mt352_attach, &dntv_live_dvbt_pro_config,
  514. &dev->vp3054->adap);
  515. if (dev->dvb.frontend != NULL) {
  516. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  517. &dev->core->i2c_adap, 0x61,
  518. TUNER_PHILIPS_FMD1216ME_MK3);
  519. }
  520. #else
  521. printk(KERN_ERR "%s/2: built without vp3054 support\n", dev->core->name);
  522. #endif
  523. break;
  524. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_HYBRID:
  525. dev->dvb.frontend = dvb_attach(zl10353_attach,
  526. &dvico_fusionhdtv_hybrid,
  527. &dev->core->i2c_adap);
  528. if (dev->dvb.frontend != NULL) {
  529. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  530. &dev->core->i2c_adap, 0x61,
  531. TUNER_THOMSON_FE6600);
  532. }
  533. break;
  534. case CX88_BOARD_DVICO_FUSIONHDTV_DVB_T_PRO:
  535. dev->dvb.frontend = dvb_attach(zl10353_attach,
  536. &dvico_fusionhdtv_xc3028,
  537. &dev->core->i2c_adap);
  538. if (dev->dvb.frontend == NULL)
  539. dev->dvb.frontend = dvb_attach(mt352_attach,
  540. &dvico_fusionhdtv_mt352_xc3028,
  541. &dev->core->i2c_adap);
  542. /*
  543. * On this board, the demod provides the I2C bus pullup.
  544. * We must not permit gate_ctrl to be performed, or
  545. * the xc3028 cannot communicate on the bus.
  546. */
  547. if (dev->dvb.frontend)
  548. dev->dvb.frontend->ops.i2c_gate_ctrl = NULL;
  549. if (attach_xc3028(0x61, dev) < 0)
  550. return -EINVAL;
  551. break;
  552. case CX88_BOARD_PCHDTV_HD3000:
  553. dev->dvb.frontend = dvb_attach(or51132_attach, &pchdtv_hd3000,
  554. &dev->core->i2c_adap);
  555. if (dev->dvb.frontend != NULL) {
  556. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  557. &dev->core->i2c_adap, 0x61,
  558. TUNER_THOMSON_DTT761X);
  559. }
  560. break;
  561. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_Q:
  562. dev->ts_gen_cntrl = 0x08;
  563. {
  564. /* Do a hardware reset of chip before using it. */
  565. struct cx88_core *core = dev->core;
  566. cx_clear(MO_GP0_IO, 1);
  567. mdelay(100);
  568. cx_set(MO_GP0_IO, 1);
  569. mdelay(200);
  570. /* Select RF connector callback */
  571. fusionhdtv_3_gold.pll_rf_set = lgdt330x_pll_rf_set;
  572. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  573. &fusionhdtv_3_gold,
  574. &dev->core->i2c_adap);
  575. if (dev->dvb.frontend != NULL) {
  576. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  577. &dev->core->i2c_adap, 0x61,
  578. TUNER_MICROTUNE_4042FI5);
  579. }
  580. }
  581. break;
  582. case CX88_BOARD_DVICO_FUSIONHDTV_3_GOLD_T:
  583. dev->ts_gen_cntrl = 0x08;
  584. {
  585. /* Do a hardware reset of chip before using it. */
  586. struct cx88_core *core = dev->core;
  587. cx_clear(MO_GP0_IO, 1);
  588. mdelay(100);
  589. cx_set(MO_GP0_IO, 9);
  590. mdelay(200);
  591. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  592. &fusionhdtv_3_gold,
  593. &dev->core->i2c_adap);
  594. if (dev->dvb.frontend != NULL) {
  595. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  596. &dev->core->i2c_adap, 0x61,
  597. TUNER_THOMSON_DTT761X);
  598. }
  599. }
  600. break;
  601. case CX88_BOARD_DVICO_FUSIONHDTV_5_GOLD:
  602. dev->ts_gen_cntrl = 0x08;
  603. {
  604. /* Do a hardware reset of chip before using it. */
  605. struct cx88_core *core = dev->core;
  606. cx_clear(MO_GP0_IO, 1);
  607. mdelay(100);
  608. cx_set(MO_GP0_IO, 1);
  609. mdelay(200);
  610. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  611. &fusionhdtv_5_gold,
  612. &dev->core->i2c_adap);
  613. if (dev->dvb.frontend != NULL) {
  614. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  615. &dev->core->i2c_adap, 0x61,
  616. TUNER_LG_TDVS_H06XF);
  617. dvb_attach(tda9887_attach, dev->dvb.frontend,
  618. &dev->core->i2c_adap, 0x43);
  619. }
  620. }
  621. break;
  622. case CX88_BOARD_PCHDTV_HD5500:
  623. dev->ts_gen_cntrl = 0x08;
  624. {
  625. /* Do a hardware reset of chip before using it. */
  626. struct cx88_core *core = dev->core;
  627. cx_clear(MO_GP0_IO, 1);
  628. mdelay(100);
  629. cx_set(MO_GP0_IO, 1);
  630. mdelay(200);
  631. dev->dvb.frontend = dvb_attach(lgdt330x_attach,
  632. &pchdtv_hd5500,
  633. &dev->core->i2c_adap);
  634. if (dev->dvb.frontend != NULL) {
  635. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  636. &dev->core->i2c_adap, 0x61,
  637. TUNER_LG_TDVS_H06XF);
  638. dvb_attach(tda9887_attach, dev->dvb.frontend,
  639. &dev->core->i2c_adap, 0x43);
  640. }
  641. }
  642. break;
  643. case CX88_BOARD_ATI_HDTVWONDER:
  644. dev->dvb.frontend = dvb_attach(nxt200x_attach,
  645. &ati_hdtvwonder,
  646. &dev->core->i2c_adap);
  647. if (dev->dvb.frontend != NULL) {
  648. dvb_attach(simple_tuner_attach, dev->dvb.frontend,
  649. &dev->core->i2c_adap, 0x61,
  650. TUNER_PHILIPS_TUV1236D);
  651. }
  652. break;
  653. case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1:
  654. case CX88_BOARD_HAUPPAUGE_NOVASE2_S1:
  655. dev->dvb.frontend = dvb_attach(cx24123_attach,
  656. &hauppauge_novas_config,
  657. &dev->core->i2c_adap);
  658. if (dev->dvb.frontend) {
  659. dvb_attach(isl6421_attach, dev->dvb.frontend,
  660. &dev->core->i2c_adap, 0x08, 0x00, 0x00);
  661. }
  662. break;
  663. case CX88_BOARD_KWORLD_DVBS_100:
  664. dev->dvb.frontend = dvb_attach(cx24123_attach,
  665. &kworld_dvbs_100_config,
  666. &dev->core->i2c_adap);
  667. if (dev->dvb.frontend) {
  668. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  669. dev->dvb.frontend->ops.set_voltage = kworld_dvbs_100_set_voltage;
  670. }
  671. break;
  672. case CX88_BOARD_GENIATECH_DVBS:
  673. dev->dvb.frontend = dvb_attach(cx24123_attach,
  674. &geniatech_dvbs_config,
  675. &dev->core->i2c_adap);
  676. if (dev->dvb.frontend) {
  677. dev->core->prev_set_voltage = dev->dvb.frontend->ops.set_voltage;
  678. dev->dvb.frontend->ops.set_voltage = geniatech_dvbs_set_voltage;
  679. }
  680. break;
  681. case CX88_BOARD_PINNACLE_PCTV_HD_800i:
  682. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  683. &pinnacle_pctv_hd_800i_config,
  684. &dev->core->i2c_adap);
  685. if (dev->dvb.frontend != NULL) {
  686. /* tuner_config.video_dev must point to
  687. * i2c_adap.algo_data
  688. */
  689. pinnacle_pctv_hd_800i_tuner_config.priv =
  690. dev->core->i2c_adap.algo_data;
  691. dvb_attach(xc5000_attach, dev->dvb.frontend,
  692. &dev->core->i2c_adap,
  693. &pinnacle_pctv_hd_800i_tuner_config);
  694. }
  695. break;
  696. case CX88_BOARD_DVICO_FUSIONHDTV_5_PCI_NANO:
  697. dev->dvb.frontend = dvb_attach(s5h1409_attach,
  698. &dvico_hdtv5_pci_nano_config,
  699. &dev->core->i2c_adap);
  700. if (dev->dvb.frontend != NULL) {
  701. struct dvb_frontend *fe;
  702. struct xc2028_config cfg = {
  703. .i2c_adap = &dev->core->i2c_adap,
  704. .i2c_addr = 0x61,
  705. .callback = cx88_pci_nano_callback,
  706. };
  707. static struct xc2028_ctrl ctl = {
  708. .fname = "xc3028-v27.fw",
  709. .max_len = 64,
  710. .scode_table = OREN538,
  711. };
  712. fe = dvb_attach(xc2028_attach,
  713. dev->dvb.frontend, &cfg);
  714. if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
  715. fe->ops.tuner_ops.set_config(fe, &ctl);
  716. }
  717. break;
  718. case CX88_BOARD_PINNACLE_HYBRID_PCTV:
  719. dev->dvb.frontend = dvb_attach(zl10353_attach,
  720. &cx88_geniatech_x8000_mt,
  721. &dev->core->i2c_adap);
  722. if (attach_xc3028(0x61, dev) < 0)
  723. return -EINVAL;
  724. break;
  725. case CX88_BOARD_GENIATECH_X8000_MT:
  726. dev->ts_gen_cntrl = 0x00;
  727. dev->dvb.frontend = dvb_attach(zl10353_attach,
  728. &cx88_geniatech_x8000_mt,
  729. &dev->core->i2c_adap);
  730. if (attach_xc3028(0x61, dev) < 0)
  731. return -EINVAL;
  732. break;
  733. default:
  734. printk(KERN_ERR "%s/2: The frontend of your DVB/ATSC card isn't supported yet\n",
  735. dev->core->name);
  736. break;
  737. }
  738. if (NULL == dev->dvb.frontend) {
  739. printk(KERN_ERR
  740. "%s/2: frontend initialization failed\n",
  741. dev->core->name);
  742. return -EINVAL;
  743. }
  744. /* Ensure all frontends negotiate bus access */
  745. dev->dvb.frontend->ops.ts_bus_ctrl = cx88_dvb_bus_ctrl;
  746. /* Put the analog decoder in standby to keep it quiet */
  747. cx88_call_i2c_clients (dev->core, TUNER_SET_STANDBY, NULL);
  748. /* register everything */
  749. return videobuf_dvb_register(&dev->dvb, THIS_MODULE, dev, &dev->pci->dev);
  750. }
  751. /* ----------------------------------------------------------- */
  752. /* CX8802 MPEG -> mini driver - We have been given the hardware */
  753. static int cx8802_dvb_advise_acquire(struct cx8802_driver *drv)
  754. {
  755. struct cx88_core *core = drv->core;
  756. int err = 0;
  757. dprintk( 1, "%s\n", __FUNCTION__);
  758. switch (core->boardnr) {
  759. case CX88_BOARD_HAUPPAUGE_HVR1300:
  760. /* We arrive here with either the cx23416 or the cx22702
  761. * on the bus. Take the bus from the cx23416 and enable the
  762. * cx22702 demod
  763. */
  764. cx_set(MO_GP0_IO, 0x00000080); /* cx22702 out of reset and enable */
  765. cx_clear(MO_GP0_IO, 0x00000004);
  766. udelay(1000);
  767. break;
  768. default:
  769. err = -ENODEV;
  770. }
  771. return err;
  772. }
  773. /* CX8802 MPEG -> mini driver - We no longer have the hardware */
  774. static int cx8802_dvb_advise_release(struct cx8802_driver *drv)
  775. {
  776. struct cx88_core *core = drv->core;
  777. int err = 0;
  778. dprintk( 1, "%s\n", __FUNCTION__);
  779. switch (core->boardnr) {
  780. case CX88_BOARD_HAUPPAUGE_HVR1300:
  781. /* Do Nothing, leave the cx22702 on the bus. */
  782. break;
  783. default:
  784. err = -ENODEV;
  785. }
  786. return err;
  787. }
  788. static int cx8802_dvb_probe(struct cx8802_driver *drv)
  789. {
  790. struct cx88_core *core = drv->core;
  791. struct cx8802_dev *dev = drv->core->dvbdev;
  792. int err;
  793. dprintk( 1, "%s\n", __FUNCTION__);
  794. dprintk( 1, " ->being probed by Card=%d Name=%s, PCI %02x:%02x\n",
  795. core->boardnr,
  796. core->name,
  797. core->pci_bus,
  798. core->pci_slot);
  799. err = -ENODEV;
  800. if (!(core->board.mpeg & CX88_MPEG_DVB))
  801. goto fail_core;
  802. /* If vp3054 isn't enabled, a stub will just return 0 */
  803. err = vp3054_i2c_probe(dev);
  804. if (0 != err)
  805. goto fail_core;
  806. /* dvb stuff */
  807. printk(KERN_INFO "%s/2: cx2388x based DVB/ATSC card\n", core->name);
  808. videobuf_queue_sg_init(&dev->dvb.dvbq, &dvb_qops,
  809. &dev->pci->dev, &dev->slock,
  810. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  811. V4L2_FIELD_TOP,
  812. sizeof(struct cx88_buffer),
  813. dev);
  814. err = dvb_register(dev);
  815. if (err != 0)
  816. printk(KERN_ERR "%s/2: dvb_register failed (err = %d)\n",
  817. core->name, err);
  818. fail_core:
  819. return err;
  820. }
  821. static int cx8802_dvb_remove(struct cx8802_driver *drv)
  822. {
  823. struct cx8802_dev *dev = drv->core->dvbdev;
  824. /* dvb */
  825. videobuf_dvb_unregister(&dev->dvb);
  826. vp3054_i2c_remove(dev);
  827. return 0;
  828. }
  829. static struct cx8802_driver cx8802_dvb_driver = {
  830. .type_id = CX88_MPEG_DVB,
  831. .hw_access = CX8802_DRVCTL_SHARED,
  832. .probe = cx8802_dvb_probe,
  833. .remove = cx8802_dvb_remove,
  834. .advise_acquire = cx8802_dvb_advise_acquire,
  835. .advise_release = cx8802_dvb_advise_release,
  836. };
  837. static int dvb_init(void)
  838. {
  839. printk(KERN_INFO "cx88/2: cx2388x dvb driver version %d.%d.%d loaded\n",
  840. (CX88_VERSION_CODE >> 16) & 0xff,
  841. (CX88_VERSION_CODE >> 8) & 0xff,
  842. CX88_VERSION_CODE & 0xff);
  843. #ifdef SNAPSHOT
  844. printk(KERN_INFO "cx2388x: snapshot date %04d-%02d-%02d\n",
  845. SNAPSHOT/10000, (SNAPSHOT/100)%100, SNAPSHOT%100);
  846. #endif
  847. return cx8802_register_driver(&cx8802_dvb_driver);
  848. }
  849. static void dvb_fini(void)
  850. {
  851. cx8802_unregister_driver(&cx8802_dvb_driver);
  852. }
  853. module_init(dvb_init);
  854. module_exit(dvb_fini);
  855. /*
  856. * Local variables:
  857. * c-basic-offset: 8
  858. * compile-command: "make DVB=1"
  859. * End:
  860. */