omap-serial.h 3.1 KB

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  1. /*
  2. * Driver for OMAP-UART controller.
  3. * Based on drivers/serial/8250.c
  4. *
  5. * Copyright (C) 2010 Texas Instruments.
  6. *
  7. * Authors:
  8. * Govindraj R <govindraj.raja@ti.com>
  9. * Thara Gopinath <thara@ti.com>
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. */
  16. #ifndef __OMAP_SERIAL_H__
  17. #define __OMAP_SERIAL_H__
  18. #include <linux/serial_core.h>
  19. #include <linux/platform_device.h>
  20. #include <plat/mux.h>
  21. #define DRIVER_NAME "omap_uart"
  22. /*
  23. * Use tty device name as ttyO, [O -> OMAP]
  24. * in bootargs we specify as console=ttyO0 if uart1
  25. * is used as console uart.
  26. */
  27. #define OMAP_SERIAL_NAME "ttyO"
  28. #define OMAP_MODE13X_SPEED 230400
  29. #define OMAP_UART_SCR_TX_EMPTY 0x08
  30. /* WER = 0x7F
  31. * Enable module level wakeup in WER reg
  32. */
  33. #define OMAP_UART_WER_MOD_WKUP 0X7F
  34. /* Enable XON/XOFF flow control on output */
  35. #define OMAP_UART_SW_TX 0x04
  36. /* Enable XON/XOFF flow control on input */
  37. #define OMAP_UART_SW_RX 0x04
  38. #define OMAP_UART_SYSC_RESET 0X07
  39. #define OMAP_UART_TCR_TRIG 0X0F
  40. #define OMAP_UART_SW_CLR 0XF0
  41. #define OMAP_UART_FIFO_CLR 0X06
  42. #define OMAP_UART_DMA_CH_FREE -1
  43. #define RX_TIMEOUT (3 * HZ)
  44. #define OMAP_MAX_HSUART_PORTS 4
  45. #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
  46. #define UART_ERRATA_i202_MDR1_ACCESS BIT(0)
  47. #define UART_ERRATA_i291_DMA_FORCEIDLE BIT(1)
  48. struct omap_uart_port_info {
  49. bool dma_enabled; /* To specify DMA Mode */
  50. unsigned int uartclk; /* UART clock rate */
  51. upf_t flags; /* UPF_* flags */
  52. u32 errata;
  53. int (*get_context_loss_count)(struct device *);
  54. void (*set_forceidle)(struct platform_device *);
  55. void (*set_noidle)(struct platform_device *);
  56. void (*enable_wakeup)(struct platform_device *, bool);
  57. };
  58. struct uart_omap_dma {
  59. u8 uart_dma_tx;
  60. u8 uart_dma_rx;
  61. int rx_dma_channel;
  62. int tx_dma_channel;
  63. dma_addr_t rx_buf_dma_phys;
  64. dma_addr_t tx_buf_dma_phys;
  65. unsigned int uart_base;
  66. /*
  67. * Buffer for rx dma.It is not required for tx because the buffer
  68. * comes from port structure.
  69. */
  70. unsigned char *rx_buf;
  71. unsigned int prev_rx_dma_pos;
  72. int tx_buf_size;
  73. int tx_dma_used;
  74. int rx_dma_used;
  75. spinlock_t tx_lock;
  76. spinlock_t rx_lock;
  77. /* timer to poll activity on rx dma */
  78. struct timer_list rx_timer;
  79. int rx_buf_size;
  80. int rx_timeout;
  81. };
  82. struct uart_omap_port {
  83. struct uart_port port;
  84. struct uart_omap_dma uart_dma;
  85. struct platform_device *pdev;
  86. unsigned char ier;
  87. unsigned char lcr;
  88. unsigned char mcr;
  89. unsigned char fcr;
  90. unsigned char efr;
  91. unsigned char dll;
  92. unsigned char dlh;
  93. unsigned char mdr1;
  94. unsigned char scr;
  95. int use_dma;
  96. /*
  97. * Some bits in registers are cleared on a read, so they must
  98. * be saved whenever the register is read but the bits will not
  99. * be immediately processed.
  100. */
  101. unsigned int lsr_break_flag;
  102. unsigned char msr_saved_flags;
  103. char name[20];
  104. unsigned long port_activity;
  105. u32 context_loss_cnt;
  106. u32 errata;
  107. u8 wakeups_enabled;
  108. };
  109. #endif /* __OMAP_SERIAL_H__ */